1 /** 2 ****************************************************************************** 3 * @file stm32h7xx_hal_dts.h 4 * @author MCD Application Team 5 * @brief Header file of DTS HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef __STM32H7xx_HAL_DTS_H 21 #define __STM32H7xx_HAL_DTS_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32h7xx_hal_def.h" 30 31 32 /** @addtogroup STM32H7xx_HAL_Driver 33 * @{ 34 */ 35 #if defined(DTS) 36 /** @addtogroup DTS 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 /** @defgroup DTS_Exported_Types DTS Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief DTS Init structure definition 47 */ 48 typedef struct 49 { 50 uint32_t QuickMeasure; /*!< Specifies the quick measure option selection of the DTS sensor. 51 This parameter can be a value of @ref DTS_Quick_Measurement */ 52 53 uint32_t RefClock; /*!< Specifies the reference clock selection of the DTS sensor. 54 This parameter can be a value of @ref DTS_Reference_Clock_Selection */ 55 56 uint32_t TriggerInput; /*!< Specifies the trigger input of the DTS sensor. 57 This parameter can be a value of @ref DTS_TriggerConfig */ 58 59 uint32_t SamplingTime; /*!< Specifies the sampling time configuration. 60 This parameter can be a value of @ref DTS_Sampling_Time */ 61 62 uint32_t Divider; /*!< Specifies the high speed clock divider ratio. 63 This parameter can be a value from 0 to 127 */ 64 65 uint32_t HighThreshold; /*!< Specifies the high threshold of the DTS sensor */ 66 67 uint32_t LowThreshold; /*!< Specifies the low threshold of the DTS sensor */ 68 69 } DTS_InitTypeDef; 70 71 /** 72 * @brief HAL State structures definition 73 */ 74 typedef enum 75 { 76 HAL_DTS_STATE_RESET = 0x00UL, /*!< DTS not yet initialized or disabled */ 77 HAL_DTS_STATE_READY = 0x01UL, /*!< DTS initialized and ready for use */ 78 HAL_DTS_STATE_BUSY = 0x02UL, /*!< DTS is running */ 79 HAL_DTS_STATE_TIMEOUT = 0x03UL, /*!< Timeout state */ 80 HAL_DTS_STATE_ERROR = 0x04UL /*!< Internal Process error */ 81 } HAL_DTS_StateTypeDef; 82 83 /** 84 * @brief DTS Handle Structure definition 85 */ 86 #if (USE_HAL_DTS_REGISTER_CALLBACKS == 1) 87 typedef struct __DTS_HandleTypeDef 88 #else 89 typedef struct 90 #endif /* USE_HAL_DTS_REGISTER_CALLBACKS */ 91 { 92 DTS_TypeDef *Instance; /*!< Register base address */ 93 DTS_InitTypeDef Init; /*!< DTS required parameters */ 94 HAL_LockTypeDef Lock; /*!< DTS Locking object */ 95 __IO HAL_DTS_StateTypeDef State; /*!< DTS peripheral state */ 96 #if (USE_HAL_DTS_REGISTER_CALLBACKS == 1) 97 void (* MspInitCallback)(struct __DTS_HandleTypeDef *hdts); /*!< DTS Base Msp Init Callback */ 98 void (* MspDeInitCallback)(struct __DTS_HandleTypeDef *hdts); /*!< DTS Base Msp DeInit Callback */ 99 void (* EndCallback)(struct __DTS_HandleTypeDef *hdts); /*!< End measure Callback */ 100 void (* LowCallback)(struct __DTS_HandleTypeDef *hdts); /*!< low threshold Callback */ 101 void (* HighCallback)(struct __DTS_HandleTypeDef *hdts); /*!< high threshold Callback */ 102 void (* AsyncEndCallback)(struct __DTS_HandleTypeDef *hdts); /*!< Asynchronous end of measure Callback */ 103 void (* AsyncLowCallback)(struct __DTS_HandleTypeDef *hdts); /*!< Asynchronous low threshold Callback */ 104 void (* AsyncHighCallback)(struct __DTS_HandleTypeDef *hdts); /*!< Asynchronous high threshold Callback */ 105 #endif /* USE_HAL_DTS_REGISTER_CALLBACKS */ 106 } DTS_HandleTypeDef; 107 108 #if (USE_HAL_DTS_REGISTER_CALLBACKS == 1) 109 /** 110 * @brief DTS callback ID enumeration definition 111 */ 112 typedef enum 113 { 114 HAL_DTS_MEAS_COMPLETE_CB_ID = 0x00U, /*!< Measure complete callback ID */ 115 HAL_DTS_ASYNC_MEAS_COMPLETE_CB_ID = 0x01U, /*!< Asynchronous measure complete callback ID */ 116 HAL_DTS_LOW_THRESHOLD_CB_ID = 0x02U, /*!< Low threshold detection callback ID */ 117 HAL_DTS_ASYNC_LOW_THRESHOLD_CB_ID = 0x03U, /*!< Asynchronous low threshold detection callback ID */ 118 HAL_DTS_HIGH_THRESHOLD_CB_ID = 0x04U, /*!< High threshold detection callback ID */ 119 HAL_DTS_ASYNC_HIGH_THRESHOLD_CB_ID = 0x05U, /*!< Asynchronous high threshold detection callback ID */ 120 HAL_DTS_MSPINIT_CB_ID = 0x06U, /*!< MSP init callback ID */ 121 HAL_DTS_MSPDEINIT_CB_ID = 0x07U /*!< MSP de-init callback ID */ 122 } HAL_DTS_CallbackIDTypeDef; 123 124 /** 125 * @brief DTS callback pointers definition 126 */ 127 typedef void (*pDTS_CallbackTypeDef)(DTS_HandleTypeDef *hdts); 128 #endif /* USE_HAL_DTS_REGISTER_CALLBACKS */ 129 130 /** 131 * @} 132 */ 133 134 /* Exported constants --------------------------------------------------------*/ 135 /** @defgroup DTS_Exported_Constants DTS Exported Constants 136 * @{ 137 */ 138 139 /** @defgroup DTS_TriggerConfig DTS Trigger Configuration 140 * @{ 141 */ 142 /* @brief No Hardware trigger detection */ 143 #define DTS_TRIGGER_HW_NONE (0UL) 144 145 /* @brief External Interrupt Mode with LPTIMER1 trigger detection */ 146 #define DTS_TRIGGER_LPTIMER1 DTS_CFGR1_TS1_INTRIG_SEL_0 147 148 /* @brief External Interrupt Mode with LPTIMER2 trigger detection */ 149 #define DTS_TRIGGER_LPTIMER2 DTS_CFGR1_TS1_INTRIG_SEL_1 150 151 /* @brief External Interrupt Mode with LPTIMER3 trigger detection */ 152 #define DTS_TRIGGER_LPTIMER3 (DTS_CFGR1_TS1_INTRIG_SEL_0 | DTS_CFGR1_TS1_INTRIG_SEL_1) 153 154 /* @brief External Interrupt Mode with EXTI13 trigger detection */ 155 #define DTS_TRIGGER_EXTI13 DTS_CFGR1_TS1_INTRIG_SEL_2 156 /** 157 * @} 158 */ 159 160 /** @defgroup DTS_Quick_Measurement DTS Quick Measurement 161 * @{ 162 */ 163 #define DTS_QUICKMEAS_ENABLE DTS_CFGR1_Q_MEAS_OPT /*!< Enable the Quick Measure (Measure without calibration) */ 164 #define DTS_QUICKMEAS_DISABLE (0x0UL) /*!< Disable the Quick Measure (Measure with calibration) */ 165 /** 166 * @} 167 */ 168 169 /** @defgroup DTS_Reference_Clock_Selection DTS Reference Clock Selection 170 * @{ 171 */ 172 #define DTS_REFCLKSEL_LSE DTS_CFGR1_REFCLK_SEL /*!< Low speed REF clock (LSE) */ 173 #define DTS_REFCLKSEL_PCLK (0UL) /*!< High speed REF clock (PCLK) */ 174 /** 175 * @} 176 */ 177 178 /** @defgroup DTS_Sampling_Time DTS Sampling Time 179 * @{ 180 */ 181 #define DTS_SMP_TIME_1_CYCLE DTS_CFGR1_TS1_SMP_TIME_0 /*!< 1 clock cycle for the sampling time */ 182 #define DTS_SMP_TIME_2_CYCLE DTS_CFGR1_TS1_SMP_TIME_1 /*!< 2 clock cycle for the sampling time */ 183 #define DTS_SMP_TIME_3_CYCLE (DTS_CFGR1_TS1_SMP_TIME_0 | DTS_CFGR1_TS1_SMP_TIME_1) /*!< 3 clock cycle for the sampling time */ 184 #define DTS_SMP_TIME_4_CYCLE (DTS_CFGR1_TS1_SMP_TIME_2) /*!< 4 clock cycle for the sampling time */ 185 #define DTS_SMP_TIME_5_CYCLE (DTS_CFGR1_TS1_SMP_TIME_0 | DTS_CFGR1_TS1_SMP_TIME_2) /*!< 5 clock cycle for the sampling time */ 186 #define DTS_SMP_TIME_6_CYCLE (DTS_CFGR1_TS1_SMP_TIME_1 | DTS_CFGR1_TS1_SMP_TIME_2) /*!< 6 clock cycle for the sampling time */ 187 #define DTS_SMP_TIME_7_CYCLE (DTS_CFGR1_TS1_SMP_TIME_0 | DTS_CFGR1_TS1_SMP_TIME_1 | DTS_CFGR1_TS1_SMP_TIME_2) /*!< 7 clock cycle for the sampling time */ 188 #define DTS_SMP_TIME_8_CYCLE (DTS_CFGR1_TS1_SMP_TIME_3) /*!< 8 clock cycle for the sampling time */ 189 #define DTS_SMP_TIME_9_CYCLE (DTS_CFGR1_TS1_SMP_TIME_0 | DTS_CFGR1_TS1_SMP_TIME_3) /*!< 9 clock cycle for the sampling time */ 190 #define DTS_SMP_TIME_10_CYCLE (DTS_CFGR1_TS1_SMP_TIME_1 | DTS_CFGR1_TS1_SMP_TIME_3) /*!< 10 clock cycle for the sampling time */ 191 #define DTS_SMP_TIME_11_CYCLE (DTS_CFGR1_TS1_SMP_TIME_0 | DTS_CFGR1_TS1_SMP_TIME_1 | DTS_CFGR1_TS1_SMP_TIME_3) /*!< 11 clock cycle for the sampling time */ 192 #define DTS_SMP_TIME_12_CYCLE (DTS_CFGR1_TS1_SMP_TIME_2 | DTS_CFGR1_TS1_SMP_TIME_3) /*!< 12 clock cycle for the sampling time */ 193 #define DTS_SMP_TIME_13_CYCLE (DTS_CFGR1_TS1_SMP_TIME_0 | DTS_CFGR1_TS1_SMP_TIME_2 | DTS_CFGR1_TS1_SMP_TIME_3) /*!< 13 clock cycle for the sampling time */ 194 #define DTS_SMP_TIME_14_CYCLE (DTS_CFGR1_TS1_SMP_TIME_1 | DTS_CFGR1_TS1_SMP_TIME_2 | DTS_CFGR1_TS1_SMP_TIME_3) /*!< 14 clock cycle for the sampling time */ 195 #define DTS_SMP_TIME_15_CYCLE (DTS_CFGR1_TS1_SMP_TIME_0 | DTS_CFGR1_TS1_SMP_TIME_1 | DTS_CFGR1_TS1_SMP_TIME_2 | DTS_CFGR1_TS1_SMP_TIME_3) /*!< 15 clock cycle for the sampling time */ 196 /** 197 * @} 198 */ 199 /** @defgroup DTS_Flag_Definitions DTS Flag Definitions 200 * @{ 201 */ 202 #define DTS_FLAG_TS1_ITE DTS_SR_TS1_ITEF /*!< Interrupt flag for end of measure for DTS1 */ 203 #define DTS_FLAG_TS1_ITL DTS_SR_TS1_ITLF /*!< Interrupt flag for low threshold for DTS1 */ 204 #define DTS_FLAG_TS1_ITH DTS_SR_TS1_ITHF /*!< Interrupt flag for high threshold for DTS1 */ 205 #define DTS_FLAG_TS1_AITE DTS_SR_TS1_AITEF /*!< Asynchronous Interrupt flag for end of measure for DTS1 */ 206 #define DTS_FLAG_TS1_AITL DTS_SR_TS1_AITLF /*!< Asynchronous Interrupt flag for low threshold for DTS1 */ 207 #define DTS_FLAG_TS1_AITH DTS_SR_TS1_AITHF /*!< Asynchronous Interrupt flag for high threshold for DTS1 */ 208 #define DTS_FLAG_TS1_RDY DTS_SR_TS1_RDY /*!< Ready flag for DTS1 */ 209 /** 210 * @} 211 */ 212 213 /** @defgroup DTS_Interrupts_Definitions DTS Interrupts Definitions 214 * @{ 215 */ 216 #define DTS_IT_TS1_ITE DTS_ITENR_TS1_ITEEN /*!< Enable interrupt flag for end of measure for DTS1 */ 217 #define DTS_IT_TS1_ITL DTS_ITENR_TS1_ITLEN /*!< Enable interrupt flag for low threshold for DTS1 */ 218 #define DTS_IT_TS1_ITH DTS_ITENR_TS1_ITHEN /*!< Enable interrupt flag for high threshold for DTS1 */ 219 #define DTS_IT_TS1_AITE DTS_ITENR_TS1_AITEEN /*!< Enable asynchronous interrupt flag for end of measure for DTS1 */ 220 #define DTS_IT_TS1_AITL DTS_ITENR_TS1_AITLEN /*!< Enable asynchronous interrupt flag for low threshold for DTS1 */ 221 #define DTS_IT_TS1_AITH DTS_ITENR_TS1_AITHEN /*!< Enable asynchronous interrupt flag for high threshold for DTS1 */ 222 /** 223 * @} 224 */ 225 226 /** 227 * @} 228 */ 229 /* Exported macros -----------------------------------------------------------*/ 230 /** @defgroup DTS_Exported_Macros DTS Exported Macros 231 * @{ 232 */ 233 234 /** @brief Reset DTS handle state 235 * @param __HANDLE__ DTS handle. 236 * @retval None 237 */ 238 #if (USE_HAL_DTS_REGISTER_CALLBACKS == 1) 239 #define __HAL_DTS_RESET_HANDLE_STATE(__HANDLE__) do{ \ 240 (__HANDLE__)->State = HAL_DTS_STATE_RESET; \ 241 (__HANDLE__)->MspInitCallback = NULL; \ 242 (__HANDLE__)->MspDeInitCallback = NULL; \ 243 } while(0) 244 #else /* USE_HAL_DTS_REGISTER_CALLBACKS */ 245 #define __HAL_DTS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DTS_STATE_RESET) 246 #endif /* USE_HAL_DTS_REGISTER_CALLBACKS */ 247 248 /** 249 * @brief Enable the specified DTS sensor 250 * @param __HANDLE__ DTS handle. 251 * @retval None 252 */ 253 #define __HAL_DTS_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CFGR1, DTS_CFGR1_TS1_EN) 254 255 /** 256 * @brief Disable the specified DTS sensor 257 * @param __HANDLE__ DTS handle. 258 * @retval None 259 */ 260 #define __HAL_DTS_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CFGR1, DTS_CFGR1_TS1_EN) 261 262 /** 263 * @brief Enable the DTS EXTI line in interrupt mode 264 * @retval None 265 */ 266 #define __HAL_DTS_EXTI_WAKEUP_ENABLE_IT() SET_BIT(EXTI->IMR3, DTS_EXTI_LINE_DTS1) 267 268 /** 269 * @brief Disable the DTS EXTI line in interrupt mode 270 * @retval None 271 */ 272 #define __HAL_DTS_EXTI_WAKEUP_DISABLE_IT() CLEAR_BIT(EXTI->IMR3, DTS_EXTI_LINE_DTS1) 273 274 /** 275 * @brief Enable the DTS EXTI Line in event mode 276 * @retval None 277 */ 278 #define __HAL_DTS_EXTI_WAKEUP_ENABLE_EVENT() SET_BIT(EXTI->EMR3, DTS_EXTI_LINE_DTS1) 279 280 /** 281 * @brief Disable the DTS EXTI Line in event mode 282 * @retval None 283 */ 284 #define __HAL_DTS_EXTI_WAKEUP_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR3, DTS_EXTI_LINE_DTS1) 285 286 /** @brief Checks whether the specified DTS flag is set or not. 287 * @param __HANDLE__ specifies the DTS Handle. 288 * @param __FLAG__ specifies the flag to check. 289 * This parameter can be one of the following values: 290 * @arg DTS_FLAG_TS1_ITE : interrupt flag for end of measure for DTS1 291 * @arg DTS_FLAG_TS1_ITL : interrupt flag for low threshold for DTS1 292 * @arg DTS_FLAG_TS1_ITH : interrupt flag for high threshold for DTS1 293 * @arg DTS_FLAG_TS1_AITE: asynchronous interrupt flag for end of measure for DTS1 294 * @arg DTS_FLAG_TS1_AITL: asynchronous interrupt flag for low threshold for DTS1 295 * @arg DTS_FLAG_TS1_AITH: asynchronous interrupt flag for high threshold for DTS1 296 * @arg DTS_FLAG_TS1_RDY : Ready flag for DTS1 297 * @retval The new state of __FLAG__ (SET or RESET). 298 */ 299 #define __HAL_DTS_GET_FLAG(__HANDLE__, __FLAG__) \ 300 (((((__HANDLE__)->Instance->SR &(__FLAG__)) == (__FLAG__)))? SET : RESET) 301 302 303 /** @brief Clears the specified DTS pending flag. 304 * @param __HANDLE__ specifies the DTS Handle. 305 * @param __FLAG__ specifies the flag to check. 306 * This parameter can be any combination of the following values: 307 * @arg DTS_FLAG_TS1_ITE : interrupt flag for end of measure for DTS1 308 * @arg DTS_FLAG_TS1_ITL : interrupt flag for low threshold for DTS1 309 * @arg DTS_FLAG_TS1_ITH : interrupt flag for high threshold for DTS1 310 * @arg DTS_FLAG_TS1_AITE: asynchronous interrupt flag for end of measure for DTS1 311 * @arg DTS_FLAG_TS1_AITL: asynchronous interrupt flag for low threshold for DTS1 312 * @arg DTS_FLAG_TS1_AITH: asynchronous interrupt flag for high threshold for DTS1 313 * @retval None 314 */ 315 #define __HAL_DTS_CLEAR_FLAG(__HANDLE__, __FLAG__) \ 316 ((__HANDLE__)->Instance->ICIFR = (__FLAG__)) 317 318 319 /** @brief Enable the specified DTS interrupt. 320 * @param __HANDLE__ specifies the DTS Handle. 321 * @param __INTERRUPT__ specifies the DTS interrupt source to enable. 322 * This parameter can be one of the following values: 323 * @arg DTS_IT_TS1_ITE : interrupt flag for end of measure for DTS1 324 * @arg DTS_IT_TS1_ITL : interrupt flag for low of measure for DTS1 325 * @arg DTS_IT_TS1_ITH : interrupt flag for high of measure for DTS1 326 * @arg DTS_IT_TS1_AITE : asynchronous interrupt flag for end of measure for DTS1 327 * @arg DTS_IT_TS1_AITL : asynchronous interrupt flag for low of measure for DTS1 328 * @arg DTS_IT_TS1_AITH : asynchronous interrupt flag for high of measure for DTS1 329 * @retval None 330 */ 331 #define __HAL_DTS_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ 332 SET_BIT((__HANDLE__)->Instance->ITENR, __INTERRUPT__) 333 334 335 /** @brief Disable the specified DTS interrupt. 336 * @param __HANDLE__ specifies the DTS Handle. 337 * @param __INTERRUPT__ specifies the DTS interrupt source to enable. 338 * This parameter can be one of the following values: 339 * @arg DTS_IT_TS1_ITE : interrupt flag for end of measure for DTS1 340 * @arg DTS_IT_TS1_ITL : interrupt flag for low of measure for DTS1 341 * @arg DTS_IT_TS1_ITH : interrupt flag for high of measure for DTS1 342 * @arg DTS_IT_TS1_AITE : asynchronous interrupt flag for end of measure for DTS1 343 * @arg DTS_IT_TS1_AITL : asynchronous interrupt flag for low of measure for DTS1 344 * @arg DTS_IT_TS1_AITH : asynchronous interrupt flag for high of measure for DTS1 345 * @retval None 346 */ 347 #define __HAL_DTS_DISABLE_IT(__HANDLE__,__INTERRUPT__) \ 348 CLEAR_BIT((__HANDLE__)->Instance->ITENR, __INTERRUPT__) 349 350 351 /** @brief Check whether the specified DTS interrupt source is enabled or not. 352 * @param __HANDLE__ DTS handle. 353 * @param __INTERRUPT__ DTS interrupt source to check 354 * This parameter can be one of the following values: 355 * @arg DTS_IT_TS1_ITE : interrupt flag for end of measure for DTS1 356 * @arg DTS_IT_TS1_ITL : interrupt flag for low of measure for DTS1 357 * @arg DTS_IT_TS1_ITH : interrupt flag for high of measure for DTS1 358 * @arg DTS_IT_TS1_AITE : asynchronous interrupt flag for end of measure for DTS1 359 * @arg DTS_IT_TS1_AITL : asynchronous interrupt flag for low of measure for DTS1 360 * @arg DTS_IT_TS1_AITH : asynchronous interrupt flag for high of measure for DTS1 361 * @retval State of interruption (SET or RESET) 362 */ 363 #define __HAL_DTS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \ 364 (( ((__HANDLE__)->Instance->ITENR & (__INTERRUPT__)) == (__INTERRUPT__) \ 365 )? SET : RESET) 366 367 368 /** @brief Check whether the specified DTS REFCLK is selected 369 * @param __HANDLE__ DTS handle. 370 * @param __REFCLK__ DTS reference clock to check 371 * This parameter can be one of the following values: 372 * @arg DTS_REFCLKSEL_LSE: Low speed REF clock 373 * @arg DTS_REFCLKSEL_PCLK: High speed REF clock 374 * @retval State of the REF clock tested (SET or RESET) 375 */ 376 #define __HAL_DTS_GET_REFCLK(__HANDLE__, __REFCLK__) ((((__HANDLE__)->Instance->CFGR1 & (__REFCLK__)) == (__REFCLK__))? SET : RESET) 377 378 /** @brief Get Trigger 379 * @param __HANDLE__ DTS handle. 380 * @retval One of the following trigger 381 * DTS_TRIGGER_HW_NONE : No HW trigger (SW trigger) 382 * DTS_TRIGGER_LPTIMER1: LPTIMER1 trigger 383 * DTS_TRIGGER_LPTIMER2: LPTIMER2 trigger 384 * DTS_TRIGGER_LPTIMER3: LPTIMER3 trigger 385 * DTS_TRIGGER_EXTI13 : EXTI13 trigger 386 */ 387 #define __HAL_DTS_GET_TRIGGER(__HANDLE__) ((__HANDLE__)->Instance->CFGR1 & (DTS_CFGR1_TS1_INTRIG_SEL)) 388 /** 389 * @} 390 */ 391 392 /* Exported functions --------------------------------------------------------*/ 393 /** @addtogroup DTS_Exported_Functions 394 * @{ 395 */ 396 397 /** @addtogroup DTS_Exported_Functions_Group1 398 * @{ 399 */ 400 /* Initialization and de-initialization functions **********************************/ 401 HAL_StatusTypeDef HAL_DTS_Init(DTS_HandleTypeDef *hdts); 402 HAL_StatusTypeDef HAL_DTS_DeInit(DTS_HandleTypeDef *hdts); 403 void HAL_DTS_MspInit(DTS_HandleTypeDef *hdts); 404 void HAL_DTS_MspDeInit(DTS_HandleTypeDef *hdts); 405 #if (USE_HAL_DTS_REGISTER_CALLBACKS == 1) 406 HAL_StatusTypeDef HAL_DTS_RegisterCallback(DTS_HandleTypeDef *hdts, 407 HAL_DTS_CallbackIDTypeDef CallbackID, 408 pDTS_CallbackTypeDef pCallback); 409 HAL_StatusTypeDef HAL_DTS_UnRegisterCallback(DTS_HandleTypeDef *hdts, 410 HAL_DTS_CallbackIDTypeDef CallbackID); 411 #endif /* USE_HAL_DTS_REGISTER_CALLBACKS */ 412 /** 413 * @} 414 */ 415 416 /* IO operation functions *****************************************************/ 417 /** @addtogroup DTS_Exported_Functions_Group2 418 * @{ 419 */ 420 HAL_StatusTypeDef HAL_DTS_Start(DTS_HandleTypeDef *hdts); 421 HAL_StatusTypeDef HAL_DTS_Stop(DTS_HandleTypeDef *hdts); 422 HAL_StatusTypeDef HAL_DTS_GetTemperature(DTS_HandleTypeDef *hdts, int32_t *Temperature); 423 HAL_StatusTypeDef HAL_DTS_Start_IT(DTS_HandleTypeDef *hdts); 424 HAL_StatusTypeDef HAL_DTS_Stop_IT(DTS_HandleTypeDef *hdts); 425 void HAL_DTS_IRQHandler(DTS_HandleTypeDef *hdts); 426 HAL_DTS_StateTypeDef HAL_DTS_GetState(const DTS_HandleTypeDef *hdts); 427 /* Callback in Interrupt mode */ 428 void HAL_DTS_EndCallback(DTS_HandleTypeDef *hdts); 429 void HAL_DTS_LowCallback(DTS_HandleTypeDef *hdts); 430 void HAL_DTS_HighCallback(DTS_HandleTypeDef *hdts); 431 void HAL_DTS_AsyncEndCallback(DTS_HandleTypeDef *hdts); 432 void HAL_DTS_AsyncLowCallback(DTS_HandleTypeDef *hdts); 433 void HAL_DTS_AsyncHighCallback(DTS_HandleTypeDef *hdts); 434 /** 435 * @} 436 */ 437 /** 438 * @} 439 */ 440 441 /* Private types -------------------------------------------------------------*/ 442 /* Private constants ---------------------------------------------------------*/ 443 /** @defgroup DTS_Private_Constants DTS Private Constants 444 * @{ 445 */ 446 /** @defgroup DTS_ExtiLine DTS EXTI Lines 447 * @{ 448 */ 449 #define DTS_EXTI_LINE_DTS1 (EXTI_IMR3_IM88) /*!< EXTI line 88 connected to DTS1 output */ 450 /** 451 * @} 452 */ 453 /** 454 * @} 455 */ 456 457 /* Private macros ------------------------------------------------------------*/ 458 /** @defgroup DTS_Private_Macros DTS Private Macros 459 * @{ 460 */ 461 462 /** @defgroup DTS_IS_DTS_Definitions DTS Private macros to check input parameters 463 * @{ 464 */ 465 #define IS_DTS_QUICKMEAS(__SEL__) (((__SEL__) == DTS_QUICKMEAS_DISABLE) || \ 466 ((__SEL__) == DTS_QUICKMEAS_ENABLE)) 467 468 #define IS_DTS_REFCLK(__SEL__) (((__SEL__) == DTS_REFCLKSEL_LSE) || \ 469 ((__SEL__) == DTS_REFCLKSEL_PCLK)) 470 471 #define IS_DTS_TRIGGERINPUT(__INPUT__) (((__INPUT__) == DTS_TRIGGER_HW_NONE) || \ 472 ((__INPUT__) == DTS_TRIGGER_LPTIMER1) || \ 473 ((__INPUT__) == DTS_TRIGGER_LPTIMER2) || \ 474 ((__INPUT__) == DTS_TRIGGER_LPTIMER3) || \ 475 ((__INPUT__) == DTS_TRIGGER_EXTI13)) 476 477 #define IS_DTS_THRESHOLD(__THRESHOLD__) ((__THRESHOLD__) <= 0xFFFFUL) 478 479 #define IS_DTS_DIVIDER_RATIO_NUMBER(__NUMBER__) ((__NUMBER__) <= 127UL) 480 481 #define IS_DTS_SAMPLINGTIME(__CYCLE__) (((__CYCLE__) == DTS_SMP_TIME_1_CYCLE) || \ 482 ((__CYCLE__) == DTS_SMP_TIME_2_CYCLE) || \ 483 ((__CYCLE__) == DTS_SMP_TIME_3_CYCLE) || \ 484 ((__CYCLE__) == DTS_SMP_TIME_4_CYCLE) || \ 485 ((__CYCLE__) == DTS_SMP_TIME_5_CYCLE) || \ 486 ((__CYCLE__) == DTS_SMP_TIME_6_CYCLE) || \ 487 ((__CYCLE__) == DTS_SMP_TIME_7_CYCLE) || \ 488 ((__CYCLE__) == DTS_SMP_TIME_8_CYCLE) || \ 489 ((__CYCLE__) == DTS_SMP_TIME_9_CYCLE) || \ 490 ((__CYCLE__) == DTS_SMP_TIME_10_CYCLE) || \ 491 ((__CYCLE__) == DTS_SMP_TIME_11_CYCLE) || \ 492 ((__CYCLE__) == DTS_SMP_TIME_12_CYCLE) || \ 493 ((__CYCLE__) == DTS_SMP_TIME_13_CYCLE) || \ 494 ((__CYCLE__) == DTS_SMP_TIME_14_CYCLE) || \ 495 ((__CYCLE__) == DTS_SMP_TIME_15_CYCLE)) 496 497 /** 498 * @} 499 */ 500 501 /** 502 * @} 503 */ 504 505 /* Private functions ---------------------------------------------------------*/ 506 507 /** 508 * @} 509 */ 510 511 /** 512 * @} 513 */ 514 515 #endif /* DTS */ 516 517 #ifdef __cplusplus 518 } 519 #endif 520 521 #endif /* __STM32H7xx_HAL_DTS_H */ 522 523
