1 /**
2 ******************************************************************************
3 * @file stm32h7rsxx_ll_exti.h
4 * @author MCD Application Team
5 * @brief Header file of EXTI LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2022 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32H7RSxx_LL_EXTI_H
21 #define STM32H7RSxx_LL_EXTI_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32h7rsxx.h"
29
30 /** @addtogroup STM32H7RSxx_LL_Driver
31 * @{
32 */
33
34 #if defined (EXTI)
35
36 /** @defgroup EXTI_LL EXTI
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 #define LL_EXTI_REGISTER_PINPOS_SHFT 16U /*!< Define used to shift pin position in EXTICR register */
44
45 /* Private Macros ------------------------------------------------------------*/
46 #if defined(USE_FULL_LL_DRIVER)
47 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
48 * @{
49 */
50 /**
51 * @}
52 */
53 #endif /*USE_FULL_LL_DRIVER*/
54 /* Exported types ------------------------------------------------------------*/
55 #if defined(USE_FULL_LL_DRIVER)
56 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
57 * @{
58 */
59 typedef struct
60 {
61
62 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
63 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
64
65 uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63
66 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
67
68 uint32_t Line_64_95; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 64 to 95
69 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
70
71 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
72 This parameter can be set either to ENABLE or DISABLE */
73
74 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
75 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
76
77 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
78 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
79 } LL_EXTI_InitTypeDef;
80
81 /**
82 * @}
83 */
84 #endif /*USE_FULL_LL_DRIVER*/
85
86 /* Exported constants --------------------------------------------------------*/
87 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
88 * @{
89 */
90
91 /** @defgroup EXTI_LL_EC_LINE LINE
92 * @{
93 */
94 #define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */
95 #define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */
96 #define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */
97 #define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */
98 #define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */
99 #define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */
100 #define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */
101 #define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */
102 #define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */
103 #define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */
104 #define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */
105 #define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */
106 #define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */
107 #define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */
108 #define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */
109 #define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */
110 #define LL_EXTI_LINE_16 EXTI_IMR1_IM16 /*!< Extended line 16 */
111 #define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /*!< Extended line 17 */
112 #define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /*!< Extended line 18 */
113 #define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */
114 #define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /*!< Extended line 20 */
115 #define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /*!< Extended line 21 */
116 #define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /*!< Extended line 22 */
117 #define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */
118 #define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /*!< Extended line 24 */
119 #define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */
120 #define LL_EXTI_LINE_26 EXTI_IMR1_IM26 /*!< Extended line 26 */
121 #define LL_EXTI_LINE_27 EXTI_IMR1_IM27 /*!< Extended line 27 */
122 #define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /*!< Extended line 28 */
123 #define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /*!< Extended line 29 */
124 #define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /*!< Extended line 30 */
125 #define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */
126 #define LL_EXTI_LINE_ALL_0_31 (LL_EXTI_LINE_0 |LL_EXTI_LINE_1 | LL_EXTI_LINE_2 | LL_EXTI_LINE_3 | \
127 LL_EXTI_LINE_4 | LL_EXTI_LINE_5 | LL_EXTI_LINE_6 | LL_EXTI_LINE_7 | \
128 LL_EXTI_LINE_8 | LL_EXTI_LINE_9 | LL_EXTI_LINE_10 | LL_EXTI_LINE_11 | \
129 LL_EXTI_LINE_12 | LL_EXTI_LINE_13 | LL_EXTI_LINE_14 | LL_EXTI_LINE_15 | \
130 LL_EXTI_LINE_16 | LL_EXTI_LINE_17 | LL_EXTI_LINE_18 | LL_EXTI_LINE_19 | \
131 LL_EXTI_LINE_20 | LL_EXTI_LINE_21 | LL_EXTI_LINE_22 | LL_EXTI_LINE_23 | \
132 LL_EXTI_LINE_24 | LL_EXTI_LINE_25 | LL_EXTI_LINE_26 | LL_EXTI_LINE_27 | \
133 LL_EXTI_LINE_28 | LL_EXTI_LINE_29 | LL_EXTI_LINE_30 | LL_EXTI_LINE_31)
134 /*!< All Extended line not reserved*/
135
136 #define LL_EXTI_LINE_32 EXTI_IMR2_IM32 /*!< Extended line 32 */
137 #define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /*!< Extended line 33 */
138 #define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /*!< Extended line 34 */
139 #define LL_EXTI_LINE_35 EXTI_IMR2_IM35 /*!< Extended line 35 */
140 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */
141 #define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /*!< Extended line 37 */
142 #define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /*!< Extended line 38 */
143 #define LL_EXTI_LINE_39 EXTI_IMR2_IM39 /*!< Extended line 39 */
144 #define LL_EXTI_LINE_40 EXTI_IMR2_IM40 /*!< Extended line 40 */
145 #define LL_EXTI_LINE_41 EXTI_IMR2_IM41 /*!< Extended line 41 */
146 #define LL_EXTI_LINE_42 EXTI_IMR2_IM42 /*!< Extended line 42 */
147 #define LL_EXTI_LINE_43 EXTI_IMR2_IM43 /*!< Extended line 43 */
148 #define LL_EXTI_LINE_44 EXTI_IMR2_IM44 /*!< Extended line 44 */
149 #define LL_EXTI_LINE_45 EXTI_IMR2_IM45 /*!< Extended line 45 */
150 #define LL_EXTI_LINE_46 EXTI_IMR2_IM46 /*!< Extended line 46 */
151 #define LL_EXTI_LINE_47 EXTI_IMR2_IM47 /*!< Extended line 47 */
152 #define LL_EXTI_LINE_48 EXTI_IMR2_IM48 /*!< Extended line 48 */
153 #define LL_EXTI_LINE_49 EXTI_IMR2_IM49 /*!< Extended line 49 */
154 #define LL_EXTI_LINE_50 EXTI_IMR2_IM50 /*!< Extended line 50 */
155 #define LL_EXTI_LINE_51 EXTI_IMR2_IM51 /*!< Extended line 51 */
156 #define LL_EXTI_LINE_52 EXTI_IMR2_IM52 /*!< Extended line 52 */
157 #define LL_EXTI_LINE_53 EXTI_IMR2_IM53 /*!< Extended line 53 */
158 #define LL_EXTI_LINE_54 EXTI_IMR2_IM54 /*!< Extended line 54 */
159 #define LL_EXTI_LINE_55 EXTI_IMR2_IM55 /*!< Extended line 55 */
160 #define LL_EXTI_LINE_56 EXTI_IMR2_IM56 /*!< Extended line 56 */
161 #define LL_EXTI_LINE_57 EXTI_IMR2_IM57 /*!< Extended line 57 */
162 #define LL_EXTI_LINE_58 EXTI_IMR2_IM58 /*!< Extended line 58 */
163 #define LL_EXTI_LINE_59 EXTI_IMR2_IM59 /*!< Extended line 59 */
164 #define LL_EXTI_LINE_ALL_32_63 (LL_EXTI_LINE_32 | LL_EXTI_LINE_33 | LL_EXTI_LINE_34 | LL_EXTI_LINE_35 | \
165 LL_EXTI_LINE_36 | LL_EXTI_LINE_37 | LL_EXTI_LINE_38 | LL_EXTI_LINE_39 | \
166 LL_EXTI_LINE_40 | LL_EXTI_LINE_41 | LL_EXTI_LINE_42 | LL_EXTI_LINE_43 | \
167 LL_EXTI_LINE_44 | LL_EXTI_LINE_45 | LL_EXTI_LINE_46 | LL_EXTI_LINE_47 | \
168 LL_EXTI_LINE_48 | LL_EXTI_LINE_49 | LL_EXTI_LINE_50 | LL_EXTI_LINE_51 | \
169 LL_EXTI_LINE_52 | LL_EXTI_LINE_53 | LL_EXTI_LINE_54 | LL_EXTI_LINE_55 | \
170 LL_EXTI_LINE_56 | LL_EXTI_LINE_57 | LL_EXTI_LINE_58 | LL_EXTI_LINE_59)
171 /*!< All Extended line not reserved*/
172
173 #define LL_EXTI_LINE_77 EXTI_IMR3_IM77 /*!< Extended line 77 */
174 #define LL_EXTI_LINE_ALL_64_95 LL_EXTI_LINE_77 /*!< All Extended line not reserved*/
175
176 #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */
177
178 #if defined(USE_FULL_LL_DRIVER)
179 #define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */
180 #endif /*USE_FULL_LL_DRIVER*/
181 /**
182 * @}
183 */
184 #if defined(USE_FULL_LL_DRIVER)
185
186 /** @defgroup EXTI_LL_EC_MODE Mode
187 * @{
188 */
189 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
190 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
191 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
192 /**
193 * @}
194 */
195
196 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
197 * @{
198 */
199 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
200 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
201 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
202 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
203
204 /**
205 * @}
206 */
207
208
209 #endif /*USE_FULL_LL_DRIVER*/
210
211
212 /**
213 * @}
214 */
215
216 /* Exported macro ------------------------------------------------------------*/
217 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
218 * @{
219 */
220
221 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
222 * @{
223 */
224
225 /**
226 * @brief Write a value in EXTI register
227 * @param __REG__ Register to be written
228 * @param __VALUE__ Value to be written in the register
229 * @retval None
230 */
231 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
232
233 /**
234 * @brief Read a value in EXTI register
235 * @param __REG__ Register to be read
236 * @retval Register value
237 */
238 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
239 /**
240 * @}
241 */
242
243
244 /**
245 * @}
246 */
247
248
249
250 /* Exported functions --------------------------------------------------------*/
251 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
252 * @{
253 */
254 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
255 * @{
256 */
257
258 /**
259 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
260 * @note The reset value for the direct or internal lines (see RM)
261 * is set to 1 in order to enable the interrupt by default.
262 * Bits are set automatically at Power on.
263 * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31
264 * @param ExtiLine This parameter can be one of the following values:
265 * @arg @ref LL_EXTI_LINE_0
266 * @arg @ref LL_EXTI_LINE_1
267 * @arg @ref LL_EXTI_LINE_2
268 * @arg @ref LL_EXTI_LINE_3
269 * @arg @ref LL_EXTI_LINE_4
270 * @arg @ref LL_EXTI_LINE_5
271 * @arg @ref LL_EXTI_LINE_6
272 * @arg @ref LL_EXTI_LINE_7
273 * @arg @ref LL_EXTI_LINE_8
274 * @arg @ref LL_EXTI_LINE_9
275 * @arg @ref LL_EXTI_LINE_10
276 * @arg @ref LL_EXTI_LINE_11
277 * @arg @ref LL_EXTI_LINE_12
278 * @arg @ref LL_EXTI_LINE_13
279 * @arg @ref LL_EXTI_LINE_14
280 * @arg @ref LL_EXTI_LINE_15
281 * @arg @ref LL_EXTI_LINE_16
282 * @arg @ref LL_EXTI_LINE_17
283 * @arg @ref LL_EXTI_LINE_18
284 * @arg @ref LL_EXTI_LINE_19
285 * @arg @ref LL_EXTI_LINE_20
286 * @arg @ref LL_EXTI_LINE_21
287 * @arg @ref LL_EXTI_LINE_22
288 * @arg @ref LL_EXTI_LINE_23
289 * @arg @ref LL_EXTI_LINE_24
290 * @arg @ref LL_EXTI_LINE_26
291 * @arg @ref LL_EXTI_LINE_27
292 * @arg @ref LL_EXTI_LINE_28
293 * @arg @ref LL_EXTI_LINE_30
294 * @arg @ref LL_EXTI_LINE_31
295 * @arg @ref LL_EXTI_LINE_ALL_0_31
296 * @note Please check each device line mapping for EXTI Line availability
297 * @retval None
298 */
LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)299 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
300 {
301 SET_BIT(EXTI->IMR1, ExtiLine);
302 }
303
304 /**
305 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63
306 * @note The reset value for the the direct or internal lines (see RM)
307 * is set to 1 in order to enable the interrupt by default.
308 * Bits are set automatically at Power on.
309 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63
310 * @param ExtiLine This parameter can be one of the following values:
311 * @arg @ref LL_EXTI_LINE_32
312 * @arg @ref LL_EXTI_LINE_33
313 * @arg @ref LL_EXTI_LINE_34
314 * @arg @ref LL_EXTI_LINE_35
315 * @arg @ref LL_EXTI_LINE_36
316 * @arg @ref LL_EXTI_LINE_37
317 * @arg @ref LL_EXTI_LINE_38
318 * @arg @ref LL_EXTI_LINE_39
319 * @arg @ref LL_EXTI_LINE_40
320 * @arg @ref LL_EXTI_LINE_41
321 * @arg @ref LL_EXTI_LINE_42
322 * @arg @ref LL_EXTI_LINE_43
323 * @arg @ref LL_EXTI_LINE_44
324 * @arg @ref LL_EXTI_LINE_46
325 * @arg @ref LL_EXTI_LINE_47
326 * @arg @ref LL_EXTI_LINE_48
327 * @arg @ref LL_EXTI_LINE_49
328 * @arg @ref LL_EXTI_LINE_50
329 * @arg @ref LL_EXTI_LINE_51
330 * @arg @ref LL_EXTI_LINE_52
331 * @arg @ref LL_EXTI_LINE_53
332 * @arg @ref LL_EXTI_LINE_54
333 * @arg @ref LL_EXTI_LINE_55
334 * @arg @ref LL_EXTI_LINE_56
335 * @arg @ref LL_EXTI_LINE_57
336 * @arg @ref LL_EXTI_LINE_58
337 * @arg @ref LL_EXTI_LINE_59
338 * @arg @ref LL_EXTI_LINE_ALL_32_63
339 * @retval None
340 */
LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)341 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)
342 {
343 SET_BIT(EXTI->IMR2, ExtiLine);
344 }
345
346 /**
347 * @brief Enable ExtiLine Interrupt request for Lines in range 64 to 95
348 * @note The reset value for the direct lines (see RM)
349 * is set to 1 in order to enable the interrupt by default.
350 * Bits are set automatically at Power on.
351 * @rmtoll IMR3 IMx LL_EXTI_EnableIT_64_95
352 * @param ExtiLine This parameter can be one of the following values:
353 * @arg @ref LL_EXTI_LINE_77
354 * @arg @ref LL_EXTI_LINE_ALL_64_95
355 * @retval None
356 */
LL_EXTI_EnableIT_64_95(uint32_t ExtiLine)357 __STATIC_INLINE void LL_EXTI_EnableIT_64_95(uint32_t ExtiLine)
358 {
359 SET_BIT(EXTI->IMR3, ExtiLine);
360 }
361
362 /**
363 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
364 * @note The reset value for the direct or internal lines (see RM)
365 * is set to 1 in order to enable the interrupt by default.
366 * Bits are set automatically at Power on.
367 * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31
368 * @param ExtiLine This parameter can be one of the following values:
369 * @arg @ref LL_EXTI_LINE_0
370 * @arg @ref LL_EXTI_LINE_1
371 * @arg @ref LL_EXTI_LINE_2
372 * @arg @ref LL_EXTI_LINE_3
373 * @arg @ref LL_EXTI_LINE_4
374 * @arg @ref LL_EXTI_LINE_5
375 * @arg @ref LL_EXTI_LINE_6
376 * @arg @ref LL_EXTI_LINE_7
377 * @arg @ref LL_EXTI_LINE_8
378 * @arg @ref LL_EXTI_LINE_9
379 * @arg @ref LL_EXTI_LINE_10
380 * @arg @ref LL_EXTI_LINE_11
381 * @arg @ref LL_EXTI_LINE_12
382 * @arg @ref LL_EXTI_LINE_13
383 * @arg @ref LL_EXTI_LINE_14
384 * @arg @ref LL_EXTI_LINE_15
385 * @arg @ref LL_EXTI_LINE_16
386 * @arg @ref LL_EXTI_LINE_17
387 * @arg @ref LL_EXTI_LINE_18
388 * @arg @ref LL_EXTI_LINE_19
389 * @arg @ref LL_EXTI_LINE_20
390 * @arg @ref LL_EXTI_LINE_21
391 * @arg @ref LL_EXTI_LINE_22
392 * @arg @ref LL_EXTI_LINE_23
393 * @arg @ref LL_EXTI_LINE_24
394 * @arg @ref LL_EXTI_LINE_26
395 * @arg @ref LL_EXTI_LINE_27
396 * @arg @ref LL_EXTI_LINE_28
397 * @arg @ref LL_EXTI_LINE_30
398 * @arg @ref LL_EXTI_LINE_31
399 * @arg @ref LL_EXTI_LINE_ALL_0_31
400 * @note Please check each device line mapping for EXTI Line availability
401 * @retval None
402 */
LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)403 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
404 {
405 CLEAR_BIT(EXTI->IMR1, ExtiLine);
406 }
407
408 /**
409 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63
410 * @note The reset value for the direct lines (see RM)
411 * is set to 1 in order to enable the interrupt by default.
412 * Bits are set automatically at Power on.
413 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63
414 * @param ExtiLine This parameter can be one of the following values:
415 * @arg @ref LL_EXTI_LINE_32
416 * @arg @ref LL_EXTI_LINE_33
417 * @arg @ref LL_EXTI_LINE_34
418 * @arg @ref LL_EXTI_LINE_35
419 * @arg @ref LL_EXTI_LINE_36
420 * @arg @ref LL_EXTI_LINE_37
421 * @arg @ref LL_EXTI_LINE_38
422 * @arg @ref LL_EXTI_LINE_39
423 * @arg @ref LL_EXTI_LINE_40
424 * @arg @ref LL_EXTI_LINE_41
425 * @arg @ref LL_EXTI_LINE_42
426 * @arg @ref LL_EXTI_LINE_43
427 * @arg @ref LL_EXTI_LINE_44
428 * @arg @ref LL_EXTI_LINE_46
429 * @arg @ref LL_EXTI_LINE_47
430 * @arg @ref LL_EXTI_LINE_48
431 * @arg @ref LL_EXTI_LINE_49
432 * @arg @ref LL_EXTI_LINE_50
433 * @arg @ref LL_EXTI_LINE_51
434 * @arg @ref LL_EXTI_LINE_52
435 * @arg @ref LL_EXTI_LINE_53
436 * @arg @ref LL_EXTI_LINE_54
437 * @arg @ref LL_EXTI_LINE_55
438 * @arg @ref LL_EXTI_LINE_56
439 * @arg @ref LL_EXTI_LINE_57
440 * @arg @ref LL_EXTI_LINE_58
441 * @arg @ref LL_EXTI_LINE_59
442 * @arg @ref LL_EXTI_LINE_ALL_32_63
443 * @retval None
444 */
LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)445 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)
446 {
447 CLEAR_BIT(EXTI->IMR2, ExtiLine);
448 }
449
450 /**
451 * @brief Disable ExtiLine Interrupt request for Lines in range 64 to 95
452 * @note The reset value for the the direct or internal lines (see RM)
453 * is set to 1 in order to enable the interrupt by default.
454 * Bits are set automatically at Power on.
455 * @rmtoll IMR3 IMx LL_EXTI_DisableIT_64_95
456 * @param ExtiLine This parameter can be one of the following values:
457 * @arg @ref LL_EXTI_LINE_77
458 * @arg @ref LL_EXTI_LINE_ALL_64_95
459 * @retval None
460 */
LL_EXTI_DisableIT_64_95(uint32_t ExtiLine)461 __STATIC_INLINE void LL_EXTI_DisableIT_64_95(uint32_t ExtiLine)
462 {
463 CLEAR_BIT(EXTI->IMR3, ExtiLine);
464 }
465
466 /**
467 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
468 * @note The reset value for the direct or internal lines (see RM)
469 * is set to 1 in order to enable the interrupt by default.
470 * Bits are set automatically at Power on.
471 * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31
472 * @param ExtiLine This parameter can be one of the following values:
473 * @arg @ref LL_EXTI_LINE_0
474 * @arg @ref LL_EXTI_LINE_1
475 * @arg @ref LL_EXTI_LINE_2
476 * @arg @ref LL_EXTI_LINE_3
477 * @arg @ref LL_EXTI_LINE_4
478 * @arg @ref LL_EXTI_LINE_5
479 * @arg @ref LL_EXTI_LINE_6
480 * @arg @ref LL_EXTI_LINE_7
481 * @arg @ref LL_EXTI_LINE_8
482 * @arg @ref LL_EXTI_LINE_9
483 * @arg @ref LL_EXTI_LINE_10
484 * @arg @ref LL_EXTI_LINE_11
485 * @arg @ref LL_EXTI_LINE_12
486 * @arg @ref LL_EXTI_LINE_13
487 * @arg @ref LL_EXTI_LINE_14
488 * @arg @ref LL_EXTI_LINE_15
489 * @arg @ref LL_EXTI_LINE_16
490 * @arg @ref LL_EXTI_LINE_17
491 * @arg @ref LL_EXTI_LINE_18
492 * @arg @ref LL_EXTI_LINE_19
493 * @arg @ref LL_EXTI_LINE_20
494 * @arg @ref LL_EXTI_LINE_21
495 * @arg @ref LL_EXTI_LINE_22
496 * @arg @ref LL_EXTI_LINE_23
497 * @arg @ref LL_EXTI_LINE_24
498 * @arg @ref LL_EXTI_LINE_26
499 * @arg @ref LL_EXTI_LINE_27
500 * @arg @ref LL_EXTI_LINE_28
501 * @arg @ref LL_EXTI_LINE_30
502 * @arg @ref LL_EXTI_LINE_31
503 * @arg @ref LL_EXTI_LINE_ALL_0_31
504 * @note Please check each device line mapping for EXTI Line availability
505 * @retval State of bit (1 or 0).
506 */
LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)507 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
508 {
509 return ((READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
510 }
511
512 /**
513 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63
514 * @note The reset value for the the direct or internal lines (see RM)
515 * is set to 1 in order to enable the interrupt by default.
516 * Bits are set automatically at Power on.
517 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63
518 * @param ExtiLine This parameter can be one of the following values:
519 * @arg @ref LL_EXTI_LINE_32
520 * @arg @ref LL_EXTI_LINE_33
521 * @arg @ref LL_EXTI_LINE_34
522 * @arg @ref LL_EXTI_LINE_35
523 * @arg @ref LL_EXTI_LINE_36
524 * @arg @ref LL_EXTI_LINE_37
525 * @arg @ref LL_EXTI_LINE_38
526 * @arg @ref LL_EXTI_LINE_39
527 * @arg @ref LL_EXTI_LINE_40
528 * @arg @ref LL_EXTI_LINE_41
529 * @arg @ref LL_EXTI_LINE_42
530 * @arg @ref LL_EXTI_LINE_43
531 * @arg @ref LL_EXTI_LINE_44
532 * @arg @ref LL_EXTI_LINE_46
533 * @arg @ref LL_EXTI_LINE_47
534 * @arg @ref LL_EXTI_LINE_48
535 * @arg @ref LL_EXTI_LINE_49
536 * @arg @ref LL_EXTI_LINE_50
537 * @arg @ref LL_EXTI_LINE_51
538 * @arg @ref LL_EXTI_LINE_52
539 * @arg @ref LL_EXTI_LINE_53
540 * @arg @ref LL_EXTI_LINE_54
541 * @arg @ref LL_EXTI_LINE_55
542 * @arg @ref LL_EXTI_LINE_56
543 * @arg @ref LL_EXTI_LINE_57
544 * @arg @ref LL_EXTI_LINE_58
545 * @arg @ref LL_EXTI_LINE_59
546 * @arg @ref LL_EXTI_LINE_ALL_32_63
547 * @retval State of bit (1 or 0).
548 */
LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)549 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
550 {
551 return ((READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
552 }
553
554 /**
555 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 64 to 95
556 * @note The reset value for the direct lines (see RM)
557 * is set to 1 in order to enable the interrupt by default.
558 * Bits are set automatically at Power on.
559 * @rmtoll IMR3 IMx LL_EXTI_IsEnabledIT_64_95
560 * @param ExtiLine This parameter can be one of the following values:
561 * @arg @ref LL_EXTI_LINE_77
562 * @arg @ref LL_EXTI_LINE_ALL_64_95
563 * @retval State of bit (1 or 0).
564 */
LL_EXTI_IsEnabledIT_64_95(uint32_t ExtiLine)565 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_64_95(uint32_t ExtiLine)
566 {
567 return ((READ_BIT(EXTI->IMR3, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
568 }
569
570 /**
571 * @}
572 */
573
574 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
575 * @{
576 */
577
578 /**
579 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
580 * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31
581 * @param ExtiLine This parameter can be one of the following values:
582 * @arg @ref LL_EXTI_LINE_0
583 * @arg @ref LL_EXTI_LINE_1
584 * @arg @ref LL_EXTI_LINE_2
585 * @arg @ref LL_EXTI_LINE_3
586 * @arg @ref LL_EXTI_LINE_4
587 * @arg @ref LL_EXTI_LINE_5
588 * @arg @ref LL_EXTI_LINE_6
589 * @arg @ref LL_EXTI_LINE_7
590 * @arg @ref LL_EXTI_LINE_8
591 * @arg @ref LL_EXTI_LINE_9
592 * @arg @ref LL_EXTI_LINE_10
593 * @arg @ref LL_EXTI_LINE_11
594 * @arg @ref LL_EXTI_LINE_12
595 * @arg @ref LL_EXTI_LINE_13
596 * @arg @ref LL_EXTI_LINE_14
597 * @arg @ref LL_EXTI_LINE_15
598 * @arg @ref LL_EXTI_LINE_16
599 * @arg @ref LL_EXTI_LINE_17
600 * @arg @ref LL_EXTI_LINE_18
601 * @arg @ref LL_EXTI_LINE_19
602 * @arg @ref LL_EXTI_LINE_20
603 * @arg @ref LL_EXTI_LINE_21
604 * @arg @ref LL_EXTI_LINE_22
605 * @arg @ref LL_EXTI_LINE_23
606 * @arg @ref LL_EXTI_LINE_24
607 * @arg @ref LL_EXTI_LINE_26
608 * @arg @ref LL_EXTI_LINE_27
609 * @arg @ref LL_EXTI_LINE_28
610 * @arg @ref LL_EXTI_LINE_30
611 * @arg @ref LL_EXTI_LINE_31
612 * @arg @ref LL_EXTI_LINE_ALL_0_31
613 * @note Please check each device line mapping for EXTI Line availability
614 * @retval None
615 */
LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)616 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
617 {
618 SET_BIT(EXTI->EMR1, ExtiLine);
619
620 }
621
622 /**
623 * @brief Enable ExtiLine Event request for Lines in range 32 to 63
624 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63
625 * @param ExtiLine This parameter can be a combination of the following values:
626 * @arg @ref LL_EXTI_LINE_32
627 * @arg @ref LL_EXTI_LINE_33
628 * @arg @ref LL_EXTI_LINE_34
629 * @arg @ref LL_EXTI_LINE_35
630 * @arg @ref LL_EXTI_LINE_36
631 * @arg @ref LL_EXTI_LINE_37
632 * @arg @ref LL_EXTI_LINE_38
633 * @arg @ref LL_EXTI_LINE_39
634 * @arg @ref LL_EXTI_LINE_40
635 * @arg @ref LL_EXTI_LINE_41
636 * @arg @ref LL_EXTI_LINE_42
637 * @arg @ref LL_EXTI_LINE_43
638 * @arg @ref LL_EXTI_LINE_44
639 * @arg @ref LL_EXTI_LINE_46
640 * @arg @ref LL_EXTI_LINE_47
641 * @arg @ref LL_EXTI_LINE_48
642 * @arg @ref LL_EXTI_LINE_49
643 * @arg @ref LL_EXTI_LINE_50
644 * @arg @ref LL_EXTI_LINE_51
645 * @arg @ref LL_EXTI_LINE_52
646 * @arg @ref LL_EXTI_LINE_53
647 * @arg @ref LL_EXTI_LINE_54
648 * @arg @ref LL_EXTI_LINE_55
649 * @arg @ref LL_EXTI_LINE_56
650 * @arg @ref LL_EXTI_LINE_57
651 * @arg @ref LL_EXTI_LINE_58
652 * @arg @ref LL_EXTI_LINE_59
653 * @arg @ref LL_EXTI_LINE_ALL_32_63
654 * @retval None
655 */
LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)656 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
657 {
658 SET_BIT(EXTI->EMR2, ExtiLine);
659 }
660
661 /**
662 * @brief Enable ExtiLine Event request for Lines in range 64 to 95
663 * @rmtoll EMR3 EMx LL_EXTI_EnableEvent_64_95
664 * @param ExtiLine This parameter can be a combination of the following values:
665 * @arg @ref LL_EXTI_LINE_77
666 * @arg @ref LL_EXTI_LINE_ALL_64_95
667 * @retval None
668 */
LL_EXTI_EnableEvent_64_95(uint32_t ExtiLine)669 __STATIC_INLINE void LL_EXTI_EnableEvent_64_95(uint32_t ExtiLine)
670 {
671 SET_BIT(EXTI->EMR3, ExtiLine);
672 }
673
674 /**
675 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
676 * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31
677 * @param ExtiLine This parameter can be one of the following values:
678 * @arg @ref LL_EXTI_LINE_0
679 * @arg @ref LL_EXTI_LINE_1
680 * @arg @ref LL_EXTI_LINE_2
681 * @arg @ref LL_EXTI_LINE_3
682 * @arg @ref LL_EXTI_LINE_4
683 * @arg @ref LL_EXTI_LINE_5
684 * @arg @ref LL_EXTI_LINE_6
685 * @arg @ref LL_EXTI_LINE_7
686 * @arg @ref LL_EXTI_LINE_8
687 * @arg @ref LL_EXTI_LINE_9
688 * @arg @ref LL_EXTI_LINE_10
689 * @arg @ref LL_EXTI_LINE_11
690 * @arg @ref LL_EXTI_LINE_12
691 * @arg @ref LL_EXTI_LINE_13
692 * @arg @ref LL_EXTI_LINE_14
693 * @arg @ref LL_EXTI_LINE_15
694 * @arg @ref LL_EXTI_LINE_16
695 * @arg @ref LL_EXTI_LINE_17
696 * @arg @ref LL_EXTI_LINE_18
697 * @arg @ref LL_EXTI_LINE_19
698 * @arg @ref LL_EXTI_LINE_20
699 * @arg @ref LL_EXTI_LINE_21
700 * @arg @ref LL_EXTI_LINE_22
701 * @arg @ref LL_EXTI_LINE_23
702 * @arg @ref LL_EXTI_LINE_24
703 * @arg @ref LL_EXTI_LINE_26
704 * @arg @ref LL_EXTI_LINE_27
705 * @arg @ref LL_EXTI_LINE_28
706 * @arg @ref LL_EXTI_LINE_30
707 * @arg @ref LL_EXTI_LINE_31
708 * @arg @ref LL_EXTI_LINE_ALL_0_31
709 * @note Please check each device line mapping for EXTI Line availability
710 * @retval None
711 */
LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)712 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
713 {
714 CLEAR_BIT(EXTI->EMR1, ExtiLine);
715 }
716
717 /**
718 * @brief Disable ExtiLine Event request for Lines in range 32 to 63
719 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63
720 * @param ExtiLine This parameter can be a combination of the following values:
721 * @arg @ref LL_EXTI_LINE_32
722 * @arg @ref LL_EXTI_LINE_33
723 * @arg @ref LL_EXTI_LINE_34
724 * @arg @ref LL_EXTI_LINE_35
725 * @arg @ref LL_EXTI_LINE_36
726 * @arg @ref LL_EXTI_LINE_37
727 * @arg @ref LL_EXTI_LINE_38
728 * @arg @ref LL_EXTI_LINE_39
729 * @arg @ref LL_EXTI_LINE_40
730 * @arg @ref LL_EXTI_LINE_41
731 * @arg @ref LL_EXTI_LINE_42
732 * @arg @ref LL_EXTI_LINE_43
733 * @arg @ref LL_EXTI_LINE_44
734 * @arg @ref LL_EXTI_LINE_46
735 * @arg @ref LL_EXTI_LINE_47
736 * @arg @ref LL_EXTI_LINE_48
737 * @arg @ref LL_EXTI_LINE_49
738 * @arg @ref LL_EXTI_LINE_50
739 * @arg @ref LL_EXTI_LINE_51
740 * @arg @ref LL_EXTI_LINE_52
741 * @arg @ref LL_EXTI_LINE_53
742 * @arg @ref LL_EXTI_LINE_54
743 * @arg @ref LL_EXTI_LINE_55
744 * @arg @ref LL_EXTI_LINE_56
745 * @arg @ref LL_EXTI_LINE_57
746 * @arg @ref LL_EXTI_LINE_58
747 * @arg @ref LL_EXTI_LINE_59
748 * @arg @ref LL_EXTI_LINE_ALL_32_63
749 * @retval None
750 */
LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)751 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
752 {
753 CLEAR_BIT(EXTI->EMR2, ExtiLine);
754 }
755
756 /**
757 * @brief Disable ExtiLine Event request for Lines in range 64 to 95
758 * @rmtoll EMR3 EMx LL_EXTI_DisableEvent_64_95
759 * @param ExtiLine This parameter can be a combination of the following values:
760 * @arg @ref LL_EXTI_LINE_77
761 * @arg @ref LL_EXTI_LINE_ALL_64_95
762 * @retval None
763 */
LL_EXTI_DisableEvent_64_95(uint32_t ExtiLine)764 __STATIC_INLINE void LL_EXTI_DisableEvent_64_95(uint32_t ExtiLine)
765 {
766 CLEAR_BIT(EXTI->EMR3, ExtiLine);
767 }
768
769 /**
770 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
771 * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31
772 * @param ExtiLine This parameter can be one of the following values:
773 * @arg @ref LL_EXTI_LINE_0
774 * @arg @ref LL_EXTI_LINE_1
775 * @arg @ref LL_EXTI_LINE_2
776 * @arg @ref LL_EXTI_LINE_3
777 * @arg @ref LL_EXTI_LINE_4
778 * @arg @ref LL_EXTI_LINE_5
779 * @arg @ref LL_EXTI_LINE_6
780 * @arg @ref LL_EXTI_LINE_7
781 * @arg @ref LL_EXTI_LINE_8
782 * @arg @ref LL_EXTI_LINE_9
783 * @arg @ref LL_EXTI_LINE_10
784 * @arg @ref LL_EXTI_LINE_11
785 * @arg @ref LL_EXTI_LINE_12
786 * @arg @ref LL_EXTI_LINE_13
787 * @arg @ref LL_EXTI_LINE_14
788 * @arg @ref LL_EXTI_LINE_15
789 * @arg @ref LL_EXTI_LINE_16
790 * @arg @ref LL_EXTI_LINE_17
791 * @arg @ref LL_EXTI_LINE_18
792 * @arg @ref LL_EXTI_LINE_19
793 * @arg @ref LL_EXTI_LINE_20
794 * @arg @ref LL_EXTI_LINE_21
795 * @arg @ref LL_EXTI_LINE_22
796 * @arg @ref LL_EXTI_LINE_23
797 * @arg @ref LL_EXTI_LINE_24
798 * @arg @ref LL_EXTI_LINE_26
799 * @arg @ref LL_EXTI_LINE_27
800 * @arg @ref LL_EXTI_LINE_28
801 * @arg @ref LL_EXTI_LINE_30
802 * @arg @ref LL_EXTI_LINE_31
803 * @arg @ref LL_EXTI_LINE_ALL_0_31
804 * @note Please check each device line mapping for EXTI Line availability
805 * @retval State of bit (1 or 0).
806 */
LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)807 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
808 {
809 return ((READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
810
811 }
812
813 /**
814 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63
815 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63
816 * @param ExtiLine This parameter can be a combination of the following values:
817 * @arg @ref LL_EXTI_LINE_32
818 * @arg @ref LL_EXTI_LINE_33
819 * @arg @ref LL_EXTI_LINE_34
820 * @arg @ref LL_EXTI_LINE_35
821 * @arg @ref LL_EXTI_LINE_36
822 * @arg @ref LL_EXTI_LINE_37
823 * @arg @ref LL_EXTI_LINE_38
824 * @arg @ref LL_EXTI_LINE_39
825 * @arg @ref LL_EXTI_LINE_40
826 * @arg @ref LL_EXTI_LINE_41
827 * @arg @ref LL_EXTI_LINE_42
828 * @arg @ref LL_EXTI_LINE_43
829 * @arg @ref LL_EXTI_LINE_44
830 * @arg @ref LL_EXTI_LINE_46
831 * @arg @ref LL_EXTI_LINE_47
832 * @arg @ref LL_EXTI_LINE_48
833 * @arg @ref LL_EXTI_LINE_49
834 * @arg @ref LL_EXTI_LINE_50
835 * @arg @ref LL_EXTI_LINE_51
836 * @arg @ref LL_EXTI_LINE_52
837 * @arg @ref LL_EXTI_LINE_53
838 * @arg @ref LL_EXTI_LINE_54
839 * @arg @ref LL_EXTI_LINE_55
840 * @arg @ref LL_EXTI_LINE_56
841 * @arg @ref LL_EXTI_LINE_57
842 * @arg @ref LL_EXTI_LINE_58
843 * @arg @ref LL_EXTI_LINE_59
844 * @arg @ref LL_EXTI_LINE_ALL_32_63
845 * @retval State of bit (1 or 0).
846 */
LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)847 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
848 {
849 return ((READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
850 }
851
852 /**
853 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 64 to 95
854 * @rmtoll EMR3 EMx LL_EXTI_IsEnabledEvent_64_95
855 * @param ExtiLine This parameter can be a combination of the following values:
856 * @arg @ref LL_EXTI_LINE_77
857 * @arg @ref LL_EXTI_LINE_ALL_64_95
858 * @retval State of bit (1 or 0).
859 */
LL_EXTI_IsEnabledEvent_64_95(uint32_t ExtiLine)860 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_64_95(uint32_t ExtiLine)
861 {
862 return ((READ_BIT(EXTI->EMR3, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
863 }
864
865 /**
866 * @}
867 */
868
869 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
870 * @{
871 */
872
873 /**
874 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
875 * @note The configurable wakeup lines are edge-triggered. No glitch must be
876 * generated on these lines. If a rising edge on a configurable interrupt
877 * line occurs during a write operation in the EXTI_RTSR register, the
878 * pending bit is not set.
879 * Rising and falling edge triggers can be set for
880 * the same interrupt line. In this case, both generate a trigger
881 * condition.
882 * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31
883 * @param ExtiLine This parameter can be a combination of the following values:
884 * @arg @ref LL_EXTI_LINE_0
885 * @arg @ref LL_EXTI_LINE_1
886 * @arg @ref LL_EXTI_LINE_2
887 * @arg @ref LL_EXTI_LINE_3
888 * @arg @ref LL_EXTI_LINE_4
889 * @arg @ref LL_EXTI_LINE_5
890 * @arg @ref LL_EXTI_LINE_6
891 * @arg @ref LL_EXTI_LINE_7
892 * @arg @ref LL_EXTI_LINE_8
893 * @arg @ref LL_EXTI_LINE_9
894 * @arg @ref LL_EXTI_LINE_10
895 * @arg @ref LL_EXTI_LINE_11
896 * @arg @ref LL_EXTI_LINE_12
897 * @arg @ref LL_EXTI_LINE_13
898 * @arg @ref LL_EXTI_LINE_14
899 * @arg @ref LL_EXTI_LINE_15
900 * @arg @ref LL_EXTI_LINE_16
901 * @arg @ref LL_EXTI_LINE_17
902 * @arg @ref LL_EXTI_LINE_18
903 * @arg @ref LL_EXTI_LINE_19
904 * @arg @ref LL_EXTI_LINE_20
905 * @arg @ref LL_EXTI_LINE_21
906 * @retval None
907 */
LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)908 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
909 {
910 SET_BIT(EXTI->RTSR1, ExtiLine);
911 }
912
913 /**
914 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
915 * @note The configurable wakeup lines are edge-triggered. No glitch must be
916 * generated on these lines. If a rising edge on a configurable interrupt
917 * line occurs during a write operation in the EXTI_RTSR register, the
918 * pending bit is not set.Rising and falling edge triggers can be set for
919 * the same interrupt line. In this case, both generate a trigger
920 * condition.
921 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63
922 * @param ExtiLine This parameter can be a combination of the following values:
923 * @arg @ref LL_EXTI_LINE_34
924 * @arg @ref LL_EXTI_LINE_46
925 * @arg @ref LL_EXTI_LINE_49
926 * @arg @ref LL_EXTI_LINE_51
927 * @arg @ref LL_EXTI_LINE_54
928 * @retval None
929 */
LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)930 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)
931 {
932 SET_BIT(EXTI->RTSR2, ExtiLine);
933 }
934
935 /**
936 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
937 * @note The configurable wakeup lines are edge-triggered. No glitch must be
938 * generated on these lines. If a rising edge on a configurable interrupt
939 * line occurs during a write operation in the EXTI_RTSR register, the
940 * pending bit is not set.
941 * Rising and falling edge triggers can be set for
942 * the same interrupt line. In this case, both generate a trigger
943 * condition.
944 * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31
945 * @param ExtiLine This parameter can be a combination of the following values:
946 * @arg @ref LL_EXTI_LINE_0
947 * @arg @ref LL_EXTI_LINE_1
948 * @arg @ref LL_EXTI_LINE_2
949 * @arg @ref LL_EXTI_LINE_3
950 * @arg @ref LL_EXTI_LINE_4
951 * @arg @ref LL_EXTI_LINE_5
952 * @arg @ref LL_EXTI_LINE_6
953 * @arg @ref LL_EXTI_LINE_7
954 * @arg @ref LL_EXTI_LINE_8
955 * @arg @ref LL_EXTI_LINE_9
956 * @arg @ref LL_EXTI_LINE_10
957 * @arg @ref LL_EXTI_LINE_11
958 * @arg @ref LL_EXTI_LINE_12
959 * @arg @ref LL_EXTI_LINE_13
960 * @arg @ref LL_EXTI_LINE_14
961 * @arg @ref LL_EXTI_LINE_15
962 * @arg @ref LL_EXTI_LINE_16
963 * @arg @ref LL_EXTI_LINE_17
964 * @arg @ref LL_EXTI_LINE_18
965 * @arg @ref LL_EXTI_LINE_19
966 * @arg @ref LL_EXTI_LINE_20
967 * @arg @ref LL_EXTI_LINE_21
968 * @retval None
969 */
LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)970 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
971 {
972 CLEAR_BIT(EXTI->RTSR1, ExtiLine);
973
974 }
975
976 /**
977 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
978 * @note The configurable wakeup lines are edge-triggered. No glitch must be
979 * generated on these lines. If a rising edge on a configurable interrupt
980 * line occurs during a write operation in the EXTI_RTSR register, the
981 * pending bit is not set.
982 * Rising and falling edge triggers can be set for
983 * the same interrupt line. In this case, both generate a trigger
984 * condition.
985 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63
986 * @param ExtiLine This parameter can be a combination of the following values:
987 * @arg @ref LL_EXTI_LINE_34
988 * @arg @ref LL_EXTI_LINE_46
989 * @arg @ref LL_EXTI_LINE_49
990 * @arg @ref LL_EXTI_LINE_51
991 * @arg @ref LL_EXTI_LINE_54
992 * @retval None
993 */
LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)994 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)
995 {
996 CLEAR_BIT(EXTI->RTSR2, ExtiLine);
997 }
998
999 /**
1000 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
1001 * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31
1002 * @param ExtiLine This parameter can be a combination of the following values:
1003 * @arg @ref LL_EXTI_LINE_0
1004 * @arg @ref LL_EXTI_LINE_1
1005 * @arg @ref LL_EXTI_LINE_2
1006 * @arg @ref LL_EXTI_LINE_3
1007 * @arg @ref LL_EXTI_LINE_4
1008 * @arg @ref LL_EXTI_LINE_5
1009 * @arg @ref LL_EXTI_LINE_6
1010 * @arg @ref LL_EXTI_LINE_7
1011 * @arg @ref LL_EXTI_LINE_8
1012 * @arg @ref LL_EXTI_LINE_9
1013 * @arg @ref LL_EXTI_LINE_10
1014 * @arg @ref LL_EXTI_LINE_11
1015 * @arg @ref LL_EXTI_LINE_12
1016 * @arg @ref LL_EXTI_LINE_13
1017 * @arg @ref LL_EXTI_LINE_14
1018 * @arg @ref LL_EXTI_LINE_15
1019 * @arg @ref LL_EXTI_LINE_16
1020 * @arg @ref LL_EXTI_LINE_17
1021 * @arg @ref LL_EXTI_LINE_18
1022 * @arg @ref LL_EXTI_LINE_19
1023 * @arg @ref LL_EXTI_LINE_20
1024 * @arg @ref LL_EXTI_LINE_21
1025 * @retval State of bit (1 or 0).
1026 */
LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)1027 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
1028 {
1029 return ((READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1030 }
1031
1032 /**
1033 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63
1034 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63
1035 * @param ExtiLine This parameter can be a combination of the following values:
1036 * @arg @ref LL_EXTI_LINE_34
1037 * @arg @ref LL_EXTI_LINE_46
1038 * @arg @ref LL_EXTI_LINE_49
1039 * @arg @ref LL_EXTI_LINE_51
1040 * @arg @ref LL_EXTI_LINE_54
1041 * @retval State of bit (1 or 0).
1042 */
LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)1043 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)
1044 {
1045 return ((READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1046 }
1047
1048 /**
1049 * @}
1050 */
1051
1052 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
1053 * @{
1054 */
1055
1056 /**
1057 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
1058 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1059 * generated on these lines. If a falling edge on a configurable interrupt
1060 * line occurs during a write operation in the EXTI_FTSR register, the
1061 * pending bit is not set.
1062 * Rising and falling edge triggers can be set for
1063 * the same interrupt line. In this case, both generate a trigger
1064 * condition.
1065 * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31
1066 * @param ExtiLine This parameter can be a combination of the following values:
1067 * @arg @ref LL_EXTI_LINE_0
1068 * @arg @ref LL_EXTI_LINE_1
1069 * @arg @ref LL_EXTI_LINE_2
1070 * @arg @ref LL_EXTI_LINE_3
1071 * @arg @ref LL_EXTI_LINE_4
1072 * @arg @ref LL_EXTI_LINE_5
1073 * @arg @ref LL_EXTI_LINE_6
1074 * @arg @ref LL_EXTI_LINE_7
1075 * @arg @ref LL_EXTI_LINE_8
1076 * @arg @ref LL_EXTI_LINE_9
1077 * @arg @ref LL_EXTI_LINE_10
1078 * @arg @ref LL_EXTI_LINE_11
1079 * @arg @ref LL_EXTI_LINE_12
1080 * @arg @ref LL_EXTI_LINE_13
1081 * @arg @ref LL_EXTI_LINE_14
1082 * @arg @ref LL_EXTI_LINE_15
1083 * @arg @ref LL_EXTI_LINE_16
1084 * @arg @ref LL_EXTI_LINE_17
1085 * @arg @ref LL_EXTI_LINE_18
1086 * @arg @ref LL_EXTI_LINE_19
1087 * @arg @ref LL_EXTI_LINE_20
1088 * @arg @ref LL_EXTI_LINE_21
1089 * @retval None
1090 */
LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)1091 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
1092 {
1093 SET_BIT(EXTI->FTSR1, ExtiLine);
1094 }
1095
1096 /**
1097 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
1098 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1099 * generated on these lines. If a Falling edge on a configurable interrupt
1100 * line occurs during a write operation in the EXTI_FTSR register, the
1101 * pending bit is not set.
1102 * Rising and falling edge triggers can be set for
1103 * the same interrupt line. In this case, both generate a trigger
1104 * condition.
1105 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63
1106 * @param ExtiLine This parameter can be a combination of the following values:
1107 * @arg @ref LL_EXTI_LINE_34
1108 * @arg @ref LL_EXTI_LINE_46
1109 * @arg @ref LL_EXTI_LINE_49
1110 * @arg @ref LL_EXTI_LINE_51
1111 * @arg @ref LL_EXTI_LINE_54
1112 * @retval None
1113 */
LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)1114 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)
1115 {
1116 SET_BIT(EXTI->FTSR2, ExtiLine);
1117 }
1118
1119 /**
1120 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
1121 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1122 * generated on these lines. If a Falling edge on a configurable interrupt
1123 * line occurs during a write operation in the EXTI_FTSR register, the
1124 * pending bit is not set.
1125 * Rising and falling edge triggers can be set for the same interrupt line.
1126 * In this case, both generate a trigger condition.
1127 * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31
1128 * @param ExtiLine This parameter can be a combination of the following values:
1129 * @arg @ref LL_EXTI_LINE_0
1130 * @arg @ref LL_EXTI_LINE_1
1131 * @arg @ref LL_EXTI_LINE_2
1132 * @arg @ref LL_EXTI_LINE_3
1133 * @arg @ref LL_EXTI_LINE_4
1134 * @arg @ref LL_EXTI_LINE_5
1135 * @arg @ref LL_EXTI_LINE_6
1136 * @arg @ref LL_EXTI_LINE_7
1137 * @arg @ref LL_EXTI_LINE_8
1138 * @arg @ref LL_EXTI_LINE_9
1139 * @arg @ref LL_EXTI_LINE_10
1140 * @arg @ref LL_EXTI_LINE_11
1141 * @arg @ref LL_EXTI_LINE_12
1142 * @arg @ref LL_EXTI_LINE_13
1143 * @arg @ref LL_EXTI_LINE_14
1144 * @arg @ref LL_EXTI_LINE_15
1145 * @arg @ref LL_EXTI_LINE_16
1146 * @arg @ref LL_EXTI_LINE_17
1147 * @arg @ref LL_EXTI_LINE_18
1148 * @arg @ref LL_EXTI_LINE_19
1149 * @arg @ref LL_EXTI_LINE_20
1150 * @arg @ref LL_EXTI_LINE_21
1151 * @retval None
1152 */
LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)1153 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
1154 {
1155 CLEAR_BIT(EXTI->FTSR1, ExtiLine);
1156 }
1157
1158 /**
1159 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
1160 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1161 * generated on these lines. If a Falling edge on a configurable interrupt
1162 * line occurs during a write operation in the EXTI_FTSR register, the
1163 * pending bit is not set.
1164 * Rising and falling edge triggers can be set for the same interrupt line.
1165 * In this case, both generate a trigger condition.
1166 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63
1167 * @param ExtiLine This parameter can be a combination of the following values:
1168 * @arg @ref LL_EXTI_LINE_34
1169 * @arg @ref LL_EXTI_LINE_46
1170 * @arg @ref LL_EXTI_LINE_49
1171 * @arg @ref LL_EXTI_LINE_51
1172 * @arg @ref LL_EXTI_LINE_54
1173 * @retval None
1174 */
LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)1175 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)
1176 {
1177 CLEAR_BIT(EXTI->FTSR2, ExtiLine);
1178 }
1179
1180 /**
1181 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
1182 * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31
1183 * @param ExtiLine This parameter can be a combination of the following values:
1184 * @arg @ref LL_EXTI_LINE_0
1185 * @arg @ref LL_EXTI_LINE_1
1186 * @arg @ref LL_EXTI_LINE_2
1187 * @arg @ref LL_EXTI_LINE_3
1188 * @arg @ref LL_EXTI_LINE_4
1189 * @arg @ref LL_EXTI_LINE_5
1190 * @arg @ref LL_EXTI_LINE_6
1191 * @arg @ref LL_EXTI_LINE_7
1192 * @arg @ref LL_EXTI_LINE_8
1193 * @arg @ref LL_EXTI_LINE_9
1194 * @arg @ref LL_EXTI_LINE_10
1195 * @arg @ref LL_EXTI_LINE_11
1196 * @arg @ref LL_EXTI_LINE_12
1197 * @arg @ref LL_EXTI_LINE_13
1198 * @arg @ref LL_EXTI_LINE_14
1199 * @arg @ref LL_EXTI_LINE_15
1200 * @arg @ref LL_EXTI_LINE_16
1201 * @arg @ref LL_EXTI_LINE_17
1202 * @arg @ref LL_EXTI_LINE_18
1203 * @arg @ref LL_EXTI_LINE_19
1204 * @arg @ref LL_EXTI_LINE_20
1205 * @arg @ref LL_EXTI_LINE_21
1206 * @retval State of bit (1 or 0).
1207 */
LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)1208 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
1209 {
1210 return ((READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1211 }
1212
1213 /**
1214 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63
1215 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63
1216 * @param ExtiLine This parameter can be a combination of the following values:
1217 * @arg @ref LL_EXTI_LINE_34
1218 * @arg @ref LL_EXTI_LINE_46
1219 * @arg @ref LL_EXTI_LINE_49
1220 * @arg @ref LL_EXTI_LINE_51
1221 * @arg @ref LL_EXTI_LINE_54
1222 * @retval State of bit (1 or 0).
1223 */
LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)1224 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)
1225 {
1226 return ((READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1227 }
1228
1229 /**
1230 * @}
1231 */
1232
1233 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
1234 * @{
1235 */
1236
1237 /**
1238 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
1239 * @note If the interrupt is enabled on this line in the EXTI_IMR1, writing a 1 to
1240 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR1
1241 * resulting in an interrupt request generation.
1242 * This bit is cleared by clearing the corresponding bit in the EXTI_PR1
1243 * register (by writing a 1 into the bit)
1244 * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31
1245 * @param ExtiLine This parameter can be a combination of the following values:
1246 * @arg @ref LL_EXTI_LINE_0
1247 * @arg @ref LL_EXTI_LINE_1
1248 * @arg @ref LL_EXTI_LINE_2
1249 * @arg @ref LL_EXTI_LINE_3
1250 * @arg @ref LL_EXTI_LINE_4
1251 * @arg @ref LL_EXTI_LINE_5
1252 * @arg @ref LL_EXTI_LINE_6
1253 * @arg @ref LL_EXTI_LINE_7
1254 * @arg @ref LL_EXTI_LINE_8
1255 * @arg @ref LL_EXTI_LINE_9
1256 * @arg @ref LL_EXTI_LINE_10
1257 * @arg @ref LL_EXTI_LINE_11
1258 * @arg @ref LL_EXTI_LINE_12
1259 * @arg @ref LL_EXTI_LINE_13
1260 * @arg @ref LL_EXTI_LINE_14
1261 * @arg @ref LL_EXTI_LINE_15
1262 * @arg @ref LL_EXTI_LINE_16
1263 * @arg @ref LL_EXTI_LINE_17
1264 * @arg @ref LL_EXTI_LINE_18
1265 * @arg @ref LL_EXTI_LINE_19
1266 * @arg @ref LL_EXTI_LINE_20
1267 * @arg @ref LL_EXTI_LINE_21
1268 * @note Please check each device line mapping for EXTI Line availability
1269 * @retval None
1270 */
LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)1271 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
1272 {
1273 SET_BIT(EXTI->SWIER1, ExtiLine);
1274 }
1275
1276 /**
1277 * @brief Generate a software Interrupt Event for Lines in range 32 to 63
1278 * @note If the interrupt is enabled on this line in the EXTI_IMR2, writing a 1 to
1279 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR2
1280 * resulting in an interrupt request generation.
1281 * This bit is cleared by clearing the corresponding bit in the EXTI_PR2
1282 * register (by writing a 1 into the bit)
1283 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63
1284 * @param ExtiLine This parameter can be a combination of the following values:
1285 * @arg @ref LL_EXTI_LINE_34
1286 * @arg @ref LL_EXTI_LINE_46
1287 * @arg @ref LL_EXTI_LINE_49
1288 * @arg @ref LL_EXTI_LINE_51
1289 * @arg @ref LL_EXTI_LINE_54
1290 * @retval None
1291 */
LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)1292 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)
1293 {
1294 SET_BIT(EXTI->SWIER2, ExtiLine);
1295 }
1296
1297 /**
1298 * @}
1299 */
1300
1301 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
1302 * @{
1303 */
1304
1305 /**
1306 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
1307 * @note This bit is set when the selected edge event arrives on the interrupt
1308 * line. This bit is cleared by writing a 1 to the bit.
1309 * @rmtoll PR1 PIFx LL_EXTI_IsActiveFlag_0_31
1310 * @param ExtiLine This parameter can be a combination of the following values:
1311 * @arg @ref LL_EXTI_LINE_0
1312 * @arg @ref LL_EXTI_LINE_1
1313 * @arg @ref LL_EXTI_LINE_2
1314 * @arg @ref LL_EXTI_LINE_3
1315 * @arg @ref LL_EXTI_LINE_4
1316 * @arg @ref LL_EXTI_LINE_5
1317 * @arg @ref LL_EXTI_LINE_6
1318 * @arg @ref LL_EXTI_LINE_7
1319 * @arg @ref LL_EXTI_LINE_8
1320 * @arg @ref LL_EXTI_LINE_9
1321 * @arg @ref LL_EXTI_LINE_10
1322 * @arg @ref LL_EXTI_LINE_11
1323 * @arg @ref LL_EXTI_LINE_12
1324 * @arg @ref LL_EXTI_LINE_13
1325 * @arg @ref LL_EXTI_LINE_14
1326 * @arg @ref LL_EXTI_LINE_15
1327 * @arg @ref LL_EXTI_LINE_16
1328 * @arg @ref LL_EXTI_LINE_17
1329 * @arg @ref LL_EXTI_LINE_18
1330 * @arg @ref LL_EXTI_LINE_19
1331 * @arg @ref LL_EXTI_LINE_20
1332 * @arg @ref LL_EXTI_LINE_21
1333 * @note Please check each device line mapping for EXTI Line availability
1334 * @retval State of bit (1 or 0).
1335 */
LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)1336 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
1337 {
1338 return ((READ_BIT(EXTI->PR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1339 }
1340
1341 /**
1342 * @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63
1343 * @note This bit is set when the selected edge event arrives on the interrupt
1344 * line. This bit is cleared by writing a 1 to the bit.
1345 * @rmtoll PR2 PIFx LL_EXTI_IsActiveFlag_32_63
1346 * @param ExtiLine This parameter can be a combination of the following values:
1347 * @arg @ref LL_EXTI_LINE_34
1348 * @arg @ref LL_EXTI_LINE_46
1349 * @arg @ref LL_EXTI_LINE_49
1350 * @arg @ref LL_EXTI_LINE_51
1351 * @arg @ref LL_EXTI_LINE_54
1352 * @retval State of bit (1 or 0).
1353 */
LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)1354 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)
1355 {
1356 return ((READ_BIT(EXTI->PR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1357 }
1358
1359 /**
1360 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31
1361 * @note This bit is set when the selected edge event arrives on the interrupt
1362 * line. This bit is cleared by writing a 1 to the bit.
1363 * @rmtoll PR1 PIFx LL_EXTI_ReadFlag_0_31
1364 * @param ExtiLine This parameter can be a combination of the following values:
1365 * @arg @ref LL_EXTI_LINE_0
1366 * @arg @ref LL_EXTI_LINE_1
1367 * @arg @ref LL_EXTI_LINE_2
1368 * @arg @ref LL_EXTI_LINE_3
1369 * @arg @ref LL_EXTI_LINE_4
1370 * @arg @ref LL_EXTI_LINE_5
1371 * @arg @ref LL_EXTI_LINE_6
1372 * @arg @ref LL_EXTI_LINE_7
1373 * @arg @ref LL_EXTI_LINE_8
1374 * @arg @ref LL_EXTI_LINE_9
1375 * @arg @ref LL_EXTI_LINE_10
1376 * @arg @ref LL_EXTI_LINE_11
1377 * @arg @ref LL_EXTI_LINE_12
1378 * @arg @ref LL_EXTI_LINE_13
1379 * @arg @ref LL_EXTI_LINE_14
1380 * @arg @ref LL_EXTI_LINE_15
1381 * @arg @ref LL_EXTI_LINE_16
1382 * @arg @ref LL_EXTI_LINE_17
1383 * @arg @ref LL_EXTI_LINE_18
1384 * @arg @ref LL_EXTI_LINE_19
1385 * @arg @ref LL_EXTI_LINE_20
1386 * @arg @ref LL_EXTI_LINE_21
1387 * @note Please check each device line mapping for EXTI Line availability
1388 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1389 */
LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)1390 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
1391 {
1392 return (uint32_t)(READ_BIT(EXTI->PR1, ExtiLine));
1393 }
1394
1395 /**
1396 * @brief Read ExtLine Combination Flag for Lines in range 32 to 63
1397 * @note This bit is set when the selected edge event arrives on the interrupt
1398 * line. This bit is cleared by writing a 1 to the bit.
1399 * @rmtoll PR2 PIFx LL_EXTI_ReadFlag_32_63
1400 * @param ExtiLine This parameter can be a combination of the following values:
1401 * @arg @ref LL_EXTI_LINE_34
1402 * @arg @ref LL_EXTI_LINE_46
1403 * @arg @ref LL_EXTI_LINE_49
1404 * @arg @ref LL_EXTI_LINE_51
1405 * @arg @ref LL_EXTI_LINE_54
1406 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1407 */
LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)1408 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)
1409 {
1410 return (uint32_t)(READ_BIT(EXTI->PR2, ExtiLine));
1411 }
1412
1413 /**
1414 * @brief Clear ExtLine Flags for Lines in range 0 to 31
1415 * @note This bit is set when the selected edge event arrives on the interrupt
1416 * line. This bit is cleared by writing a 1 to the bit.
1417 * @rmtoll PR1 PIFx LL_EXTI_ClearFlag_0_31
1418 * @param ExtiLine This parameter can be a combination of the following values:
1419 * @arg @ref LL_EXTI_LINE_0
1420 * @arg @ref LL_EXTI_LINE_1
1421 * @arg @ref LL_EXTI_LINE_2
1422 * @arg @ref LL_EXTI_LINE_3
1423 * @arg @ref LL_EXTI_LINE_4
1424 * @arg @ref LL_EXTI_LINE_5
1425 * @arg @ref LL_EXTI_LINE_6
1426 * @arg @ref LL_EXTI_LINE_7
1427 * @arg @ref LL_EXTI_LINE_8
1428 * @arg @ref LL_EXTI_LINE_9
1429 * @arg @ref LL_EXTI_LINE_10
1430 * @arg @ref LL_EXTI_LINE_11
1431 * @arg @ref LL_EXTI_LINE_12
1432 * @arg @ref LL_EXTI_LINE_13
1433 * @arg @ref LL_EXTI_LINE_14
1434 * @arg @ref LL_EXTI_LINE_15
1435 * @arg @ref LL_EXTI_LINE_16
1436 * @arg @ref LL_EXTI_LINE_17
1437 * @arg @ref LL_EXTI_LINE_18
1438 * @arg @ref LL_EXTI_LINE_19
1439 * @arg @ref LL_EXTI_LINE_20
1440 * @arg @ref LL_EXTI_LINE_21
1441 * @note Please check each device line mapping for EXTI Line availability
1442 * @retval None
1443 */
LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)1444 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
1445 {
1446 WRITE_REG(EXTI->PR1, ExtiLine);
1447 }
1448
1449 /**
1450 * @brief Clear ExtLine Flags for Lines in range 32 to 63
1451 * @note This bit is set when the selected edge event arrives on the interrupt
1452 * line. This bit is cleared by writing a 1 to the bit.
1453 * @rmtoll PR2 PIFx LL_EXTI_ClearFlag_32_63
1454 * @param ExtiLine This parameter can be a combination of the following values:
1455 * @arg @ref LL_EXTI_LINE_34
1456 * @arg @ref LL_EXTI_LINE_46
1457 * @arg @ref LL_EXTI_LINE_49
1458 * @arg @ref LL_EXTI_LINE_51
1459 * @arg @ref LL_EXTI_LINE_54
1460 * @retval Please check each device line mapping for EXTI Line availability
1461 */
LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)1462 __STATIC_INLINE void LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)
1463 {
1464 WRITE_REG(EXTI->PR2, ExtiLine);
1465 }
1466
1467 /**
1468 * @}
1469 */
1470
1471 #if defined(USE_FULL_LL_DRIVER)
1472 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
1473 * @{
1474 */
1475
1476 ErrorStatus LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1477 ErrorStatus LL_EXTI_DeInit(void);
1478 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1479
1480
1481 /**
1482 * @}
1483 */
1484 #endif /* USE_FULL_LL_DRIVER */
1485
1486 /**
1487 * @}
1488 */
1489
1490 /**
1491 * @}
1492 */
1493
1494 #endif /* EXTI */
1495
1496 /**
1497 * @}
1498 */
1499
1500 #ifdef __cplusplus
1501 }
1502 #endif
1503
1504 #endif /* STM32H7RSxx_LL_EXTI_H */
1505