1 /** 2 ****************************************************************************** 3 * @file stm32h7rsxx_hal_uart_ex.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H7RSxx_HAL_UART_EX_H 21 #define STM32H7RSxx_HAL_UART_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h7rsxx_hal_def.h" 29 30 /** @addtogroup STM32H7RSxx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UARTEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UARTEx_Exported_Types UARTEx Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART wake up from stop mode parameters 45 */ 46 typedef struct 47 { 48 uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF). 49 This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. 50 If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must 51 be filled up. */ 52 53 uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. 54 This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ 55 56 uint8_t Address; /*!< UART/USART node address (7-bit long max). */ 57 } UART_WakeUpTypeDef; 58 59 /** 60 * @} 61 */ 62 63 /* Exported constants --------------------------------------------------------*/ 64 /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants 65 * @{ 66 */ 67 68 /** @defgroup UARTEx_Word_Length UARTEx Word Length 69 * @{ 70 */ 71 #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ 72 #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ 73 #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ 74 /** 75 * @} 76 */ 77 78 /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length 79 * @{ 80 */ 81 #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ 82 #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ 83 /** 84 * @} 85 */ 86 87 /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode 88 * @brief UART FIFO mode 89 * @{ 90 */ 91 #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ 92 #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ 93 /** 94 * @} 95 */ 96 97 /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level 98 * @brief UART TXFIFO threshold level 99 * @{ 100 */ 101 #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TX FIFO reaches 1/8 of its depth */ 102 #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TX FIFO reaches 1/4 of its depth */ 103 #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TX FIFO reaches 1/2 of its depth */ 104 #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TX FIFO reaches 3/4 of its depth */ 105 #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TX FIFO reaches 7/8 of its depth */ 106 #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TX FIFO becomes empty */ 107 /** 108 * @} 109 */ 110 111 /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level 112 * @brief UART RXFIFO threshold level 113 * @{ 114 */ 115 #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RX FIFO reaches 1/8 of its depth */ 116 #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RX FIFO reaches 1/4 of its depth */ 117 #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RX FIFO reaches 1/2 of its depth */ 118 #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RX FIFO reaches 3/4 of its depth */ 119 #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RX FIFO reaches 7/8 of its depth */ 120 #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RX FIFO becomes full */ 121 /** 122 * @} 123 */ 124 125 /** 126 * @} 127 */ 128 129 /* Exported macros -----------------------------------------------------------*/ 130 /* Exported functions --------------------------------------------------------*/ 131 /** @addtogroup UARTEx_Exported_Functions 132 * @{ 133 */ 134 135 /** @addtogroup UARTEx_Exported_Functions_Group1 136 * @{ 137 */ 138 139 /* Initialization and de-initialization functions ****************************/ 140 HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, 141 uint32_t DeassertionTime); 142 143 /** 144 * @} 145 */ 146 147 /** @addtogroup UARTEx_Exported_Functions_Group2 148 * @{ 149 */ 150 151 void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); 152 153 void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); 154 void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); 155 156 /** 157 * @} 158 */ 159 160 /** @addtogroup UARTEx_Exported_Functions_Group3 161 * @{ 162 */ 163 164 /* Peripheral Control functions **********************************************/ 165 HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); 166 HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); 167 HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); 168 169 HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); 170 171 HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); 172 HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); 173 HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 174 HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 175 176 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, 177 uint32_t Timeout); 178 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 179 #if defined(HAL_DMA_MODULE_ENABLED) 180 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 181 #endif /* HAL_DMA_MODULE_ENABLED */ 182 183 HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(const UART_HandleTypeDef *huart); 184 185 186 /** 187 * @} 188 */ 189 190 /** 191 * @} 192 */ 193 194 /* Private macros ------------------------------------------------------------*/ 195 /** @defgroup UARTEx_Private_Macros UARTEx Private Macros 196 * @{ 197 */ 198 199 /** @brief Report the UART clock source. 200 * @param __HANDLE__ specifies the UART Handle. 201 * @param __CLOCKSOURCE__ output variable. 202 * @retval UART clocking source, written in __CLOCKSOURCE__. 203 */ 204 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 205 do { \ 206 if((__HANDLE__)->Instance == USART1) \ 207 { \ 208 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 209 { \ 210 case RCC_USART1CLKSOURCE_PCLK2: \ 211 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 212 break; \ 213 case RCC_USART1CLKSOURCE_PLL2Q: \ 214 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2Q; \ 215 break; \ 216 case RCC_USART1CLKSOURCE_PLL3Q: \ 217 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3Q; \ 218 break; \ 219 case RCC_USART1CLKSOURCE_HSI: \ 220 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 221 break; \ 222 case RCC_USART1CLKSOURCE_CSI: \ 223 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 224 break; \ 225 case RCC_USART1CLKSOURCE_LSE: \ 226 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 227 break; \ 228 default: \ 229 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 230 break; \ 231 } \ 232 } \ 233 else if(((__HANDLE__)->Instance == USART2) || \ 234 ((__HANDLE__)->Instance == USART3) || \ 235 ((__HANDLE__)->Instance == UART4) || \ 236 ((__HANDLE__)->Instance == UART5) || \ 237 ((__HANDLE__)->Instance == UART7) || \ 238 ((__HANDLE__)->Instance == UART8)) \ 239 { \ 240 switch(__HAL_RCC_GET_USART234578_SOURCE()) \ 241 { \ 242 case RCC_USART234578CLKSOURCE_PCLK1: \ 243 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 244 break; \ 245 case RCC_USART234578CLKSOURCE_PLL2Q: \ 246 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2Q; \ 247 break; \ 248 case RCC_USART234578CLKSOURCE_PLL3Q: \ 249 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3Q; \ 250 break; \ 251 case RCC_USART234578CLKSOURCE_HSI: \ 252 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 253 break; \ 254 case RCC_USART234578CLKSOURCE_CSI: \ 255 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 256 break; \ 257 case RCC_USART234578CLKSOURCE_LSE: \ 258 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 259 break; \ 260 default: \ 261 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 262 break; \ 263 } \ 264 } \ 265 else if((__HANDLE__)->Instance == LPUART1) \ 266 { \ 267 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 268 { \ 269 case RCC_LPUART1CLKSOURCE_PCLK4: \ 270 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK4; \ 271 break; \ 272 case RCC_LPUART1CLKSOURCE_PLL2Q: \ 273 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2Q; \ 274 break; \ 275 case RCC_LPUART1CLKSOURCE_PLL3Q: \ 276 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3Q; \ 277 break; \ 278 case RCC_LPUART1CLKSOURCE_HSI: \ 279 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 280 break; \ 281 case RCC_LPUART1CLKSOURCE_CSI: \ 282 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 283 break; \ 284 case RCC_LPUART1CLKSOURCE_LSE: \ 285 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 286 break; \ 287 default: \ 288 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 289 break; \ 290 } \ 291 } \ 292 else \ 293 { \ 294 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 295 } \ 296 } while(0U) 297 298 299 /** @brief Report the UART mask to apply to retrieve the received data 300 * according to the word length and to the parity bits activation. 301 * @note If PCE = 1, the parity bit is not included in the data extracted 302 * by the reception API(). 303 * This masking operation is not carried out in the case of 304 * DMA transfers. 305 * @param __HANDLE__ specifies the UART Handle. 306 * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. 307 */ 308 #define UART_MASK_COMPUTATION(__HANDLE__) \ 309 do { \ 310 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ 311 { \ 312 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 313 { \ 314 (__HANDLE__)->Mask = 0x01FFU ; \ 315 } \ 316 else \ 317 { \ 318 (__HANDLE__)->Mask = 0x00FFU ; \ 319 } \ 320 } \ 321 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ 322 { \ 323 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 324 { \ 325 (__HANDLE__)->Mask = 0x00FFU ; \ 326 } \ 327 else \ 328 { \ 329 (__HANDLE__)->Mask = 0x007FU ; \ 330 } \ 331 } \ 332 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ 333 { \ 334 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 335 { \ 336 (__HANDLE__)->Mask = 0x007FU ; \ 337 } \ 338 else \ 339 { \ 340 (__HANDLE__)->Mask = 0x003FU ; \ 341 } \ 342 } \ 343 else \ 344 { \ 345 (__HANDLE__)->Mask = 0x0000U; \ 346 } \ 347 } while(0U) 348 349 /** 350 * @brief Ensure that UART frame length is valid. 351 * @param __LENGTH__ UART frame length. 352 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 353 */ 354 #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ 355 ((__LENGTH__) == UART_WORDLENGTH_8B) || \ 356 ((__LENGTH__) == UART_WORDLENGTH_9B)) 357 358 /** 359 * @brief Ensure that UART wake-up address length is valid. 360 * @param __ADDRESS__ UART wake-up address length. 361 * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) 362 */ 363 #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ 364 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) 365 366 /** 367 * @brief Ensure that UART TXFIFO threshold level is valid. 368 * @param __THRESHOLD__ UART TXFIFO threshold level. 369 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 370 */ 371 #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ 372 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ 373 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ 374 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ 375 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ 376 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) 377 378 /** 379 * @brief Ensure that UART RXFIFO threshold level is valid. 380 * @param __THRESHOLD__ UART RXFIFO threshold level. 381 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 382 */ 383 #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ 384 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ 385 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ 386 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ 387 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ 388 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) 389 390 /** 391 * @} 392 */ 393 394 /* Private functions ---------------------------------------------------------*/ 395 396 /** 397 * @} 398 */ 399 400 /** 401 * @} 402 */ 403 404 #ifdef __cplusplus 405 } 406 #endif 407 408 #endif /* STM32H7RSxx_HAL_UART_EX_H */ 409
