1 /**
2   ******************************************************************************
3   * @file    stm32h7rsxx_hal_tim_ex.h
4   * @author  MCD Application Team
5   * @brief   Header file of TIM HAL Extended module.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2022 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32H7RSxx_HAL_TIM_EX_H
21 #define STM32H7RSxx_HAL_TIM_EX_H
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26 
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32h7rsxx_hal_def.h"
29 
30 /** @addtogroup STM32H7RSxx_HAL_Driver
31   * @{
32   */
33 
34 /** @addtogroup TIMEx
35   * @{
36   */
37 
38 /* Exported types ------------------------------------------------------------*/
39 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
40   * @{
41   */
42 
43 /**
44   * @brief  TIM Hall sensor Configuration Structure definition
45   */
46 
47 typedef struct
48 {
49   uint32_t IC1Polarity;         /*!< Specifies the active edge of the input signal.
50                                      This parameter can be a value of @ref TIM_Input_Capture_Polarity */
51 
52   uint32_t IC1Prescaler;        /*!< Specifies the Input Capture Prescaler.
53                                      This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
54 
55   uint32_t IC1Filter;           /*!< Specifies the input capture filter.
56                                      This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
57 
58   uint32_t Commutation_Delay;   /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
59                                      This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
60 } TIM_HallSensor_InitTypeDef;
61 
62 /**
63   * @brief  TIM Break/Break2 input configuration
64   */
65 typedef struct
66 {
67   uint32_t Source;         /*!< Specifies the source of the timer break input.
68                                 This parameter can be a value of @ref TIMEx_Break_Input_Source */
69   uint32_t Enable;         /*!< Specifies whether or not the break input source is enabled.
70                                 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */
71   uint32_t Polarity;       /*!< Specifies the break input source polarity.
72                                 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity */
73 } TIMEx_BreakInputConfigTypeDef;
74 
75 /**
76   * @brief  TIM Encoder index configuration
77   */
78 typedef struct
79 {
80   uint32_t Polarity;                  /*!< TIM Encoder index polarity.This parameter can be a value of @ref TIMEx_Encoder_Index_Polarity */
81 
82   uint32_t Prescaler;                 /*!< TIM Encoder index prescaler.This parameter can be a value of @ref TIMEx_Encoder_Index_Prescaler */
83 
84   uint32_t Filter;                    /*!< TIM Encoder index filter.This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
85 
86   uint32_t  Blanking;                 /*!< Specifies whether or not the encoder index event is conditioned by TI3 or TI4 input.This parameter can be a value of @ref TIMEx_Encoder_Index_Blanking */
87 
88   FunctionalState  FirstIndexEnable;  /*!< Specifies whether or not the encoder first index is enabled.This parameter value can be ENABLE or DISABLE. */
89 
90   uint32_t Position;                  /*!< Specifies in which AB input configuration the index event resets the counter.This parameter can be a value of @ref TIMEx_Encoder_Index_Position */
91 
92   uint32_t Direction;                 /*!< Specifies in which counter direction the index event resets the counter.This parameter can be a value of @ref TIMEx_Encoder_Index_Direction */
93 
94 } TIMEx_EncoderIndexConfigTypeDef;
95 
96 /**
97   * @}
98   */
99 /* End of exported types -----------------------------------------------------*/
100 
101 /* Exported constants --------------------------------------------------------*/
102 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
103   * @{
104   */
105 
106 /** @defgroup TIMEx_Remap TIM Extended Remapping
107   * @{
108   */
109 #define TIM_TIM1_ETR_GPIO           0x00000000UL                                                /*!< TIM1_ETR is not connected to I/O      */
110 #define TIM_TIM1_ETR_ADC1_AWD1      (TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0)                       /*!< TIM1_ETR is connected to ADC1 AWD1    */
111 #define TIM_TIM1_ETR_ADC1_AWD2      (TIM_AF1_ETRSEL_2)                                          /*!< TIM1_ETR is connected to ADC1 AWD2    */
112 #define TIM_TIM1_ETR_ADC1_AWD3      (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_0)                       /*!< TIM1_ETR is connected to ADC1 AWD3    */
113 #define TIM_TIM1_ETR_ADC2_AWD1      (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1)                       /*!< TIM1_ETR is connected to ADC2 AWD1    */
114 #define TIM_TIM1_ETR_ADC2_AWD2      (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0)    /*!< TIM1_ETR is connected to ADC2 AWD2    */
115 #define TIM_TIM1_ETR_ADC2_AWD3      (TIM_AF1_ETRSEL_3)                                          /*!< TIM1_ETR is connected to ADC2 AWD3    */
116 
117 #define TIM_TIM2_ETR_GPIO           0x00000000UL                                                /*!< TIM2_ETR is not connected to I/O      */
118 #define TIM_TIM2_ETR_DCMIPP_HSYNC   (TIM_AF1_ETRSEL_0)                                          /*!< TIM2_ETR is connected to DCMIPP HSYNC */
119 #define TIM_TIM2_ETR_LTDC_HSYNC     (TIM_AF1_ETRSEL_1)                                          /*!< TIM2_ETR is connected to LTDC HSYNC   */
120 #define TIM_TIM2_ETR_SAI1_FSA       (TIM_AF1_ETRSEL_2)                                          /*!< TIM2_ETR is connected to SAI1 FS_A    */
121 #define TIM_TIM2_ETR_SAI1_FSB       (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_0)                       /*!< TIM2_ETR is connected to SAI1 FS_B    */
122 #define TIM_TIM2_ETR_GFXTIM_TE      (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1)                       /*!< TIM2_ETR is connected to GFXTIM TE    */
123 #define TIM_TIM2_ETR_DCMIPP_VSYNC   (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0)    /*!< TIM2_ETR is connected to DCMIPP VSYNC */
124 #define TIM_TIM2_ETR_LTDC_VSYNC     (TIM_AF1_ETRSEL_3)                                          /*!< TIM2_ETR is connected to LTDC VSYNC   */
125 #define TIM_TIM2_ETR_TIM3_ETR       (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1)                       /*!< TIM2_ETR is connected to TIM3 ETR     */
126 #define TIM_TIM2_ETR_TIM4_ETR       (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0)    /*!< TIM2_ETR is connected to TIM4 ETR     */
127 #define TIM_TIM2_ETR_TIM5_ETR       (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_2)                       /*!< TIM2_ETR is connected to TIM5 ETR     */
128 #define TIM_TIM2_ETR_ETH_PPS        (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_0)    /*!< TIM2_ETR is connected to ETH PPS      */
129 
130 #define TIM_TIM3_ETR_GPIO           0x00000000UL                                                /*!< TIM3_ETR is not connected to I/O      */
131 #define TIM_TIM3_ETR_DCMIPP_HSYNC   (TIM_AF1_ETRSEL_0)                                          /*!< TIM3_ETR is connected to DCMIPP HSYNC */
132 #define TIM_TIM3_ETR_LTDC_HSYNC     (TIM_AF1_ETRSEL_1)                                          /*!< TIM3_ETR is connected to LTDC HSYNC   */
133 #define TIM_TIM3_ETR_GFXTIM_TE      (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1)                       /*!< TIM3_ETR is connected to GFXTIM TE    */
134 #define TIM_TIM3_ETR_DCMIPP_VSYNC   (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0)    /*!< TIM3_ETR is connected to DCMIPP VSYNC */
135 #define TIM_TIM3_ETR_LTDC_VSYNC     (TIM_AF1_ETRSEL_3)                                          /*!< TIM3_ETR is connected to LTDC VSYNC   */
136 #define TIM_TIM3_ETR_TIM2_ETR       (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_0)                       /*!< TIM3_ETR is connected to TIM2 ETR     */
137 #define TIM_TIM3_ETR_TIM4_ETR       (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0)    /*!< TIM3_ETR is connected to TIM4 ETR     */
138 #define TIM_TIM3_ETR_TIM5_ETR       (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_2)                       /*!< TIM3_ETR is connected to TIM5 ETR     */
139 #define TIM_TIM3_ETR_ETH_PPS        (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_0)    /*!< TIM3_ETR is connected to ETH PPS      */
140 
141 #define TIM_TIM4_ETR_GPIO           0x00000000UL                                                /*!< TIM4_ETR is not connected to I/O      */
142 #define TIM_TIM4_ETR_DCMIPP_HSYNC   (TIM_AF1_ETRSEL_0)                                          /*!< TIM4_ETR is connected to DCMIPP HSYNC */
143 #define TIM_TIM4_ETR_LTDC_HSYNC     (TIM_AF1_ETRSEL_1)                                          /*!< TIM4_ETR is connected to LTDC HSYNC   */
144 #define TIM_TIM4_ETR_GFXTIM_TE      (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1)                       /*!< TIM4_ETR is connected to GFXTIM TE    */
145 #define TIM_TIM4_ETR_DCMIPP_VSYNC   (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0)    /*!< TIM4_ETR is connected to DCMIPP VSYNC */
146 #define TIM_TIM4_ETR_LTDC_VSYNC     (TIM_AF1_ETRSEL_3)                                          /*!< TIM4_ETR is connected to LTDC VSYNC   */
147 #define TIM_TIM4_ETR_TIM2_ETR       (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_0)                       /*!< TIM4_ETR is connected to TIM2 ETR     */
148 #define TIM_TIM4_ETR_TIM3_ETR       (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1)                       /*!< TIM4_ETR is connected to TIM3 ETR     */
149 #define TIM_TIM4_ETR_TIM5_ETR       (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_2)                       /*!< TIM4_ETR is connected to TIM5 ETR     */
150 
151 #define TIM_TIM5_ETR_GPIO           0x00000000UL                                                /*!< TIM5_ETR is not connected to I/O      */
152 #define TIM_TIM5_ETR_SAI2_FSA       (TIM_AF1_ETRSEL_0)                                          /*!< TIM5_ETR is connected to SAI2 FS_A    */
153 #define TIM_TIM5_ETR_SAI2_FSB       (TIM_AF1_ETRSEL_1)                                          /*!< TIM5_ETR is connected to SAI2 FS_B    */
154 #define TIM_TIM5_ETR_DCMIPP_HSYNC   (TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0)                       /*!< TIM5_ETR is connected to DCMIPP HSYNC */
155 #define TIM_TIM5_ETR_LTDC_HSYNC     (TIM_AF1_ETRSEL_2)                                          /*!< TIM5_ETR is connected to LTDC HSYNC   */
156 #define TIM_TIM5_ETR_GFXTIM_TE      (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1)                       /*!< TIM5_ETR is connected to GFXTIM TE    */
157 #define TIM_TIM5_ETR_DCMIPP_VSYNC   (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0)    /*!< TIM5_ETR is connected to DCMIPP VSYNC */
158 #define TIM_TIM5_ETR_LTDC_VSYNC     (TIM_AF1_ETRSEL_3)                                          /*!< TIM4_ETR is connected to LTDC VSYNC   */
159 #define TIM_TIM5_ETR_TIM2_ETR       (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_0)                       /*!< TIM5_ETR is connected to TIM2 ETR     */
160 #define TIM_TIM5_ETR_TIM3_ETR       (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1)                       /*!< TIM5_ETR is connected to TIM3 ETR     */
161 #define TIM_TIM5_ETR_TIM4_ETR       (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0)    /*!< TIM5_ETR is connected to TIM4 ETR     */
162 /**
163   * @}
164   */
165 
166 /** @defgroup TIMEx_Break_Input TIM Extended Break input
167   * @{
168   */
169 #define TIM_BREAKINPUT_BRK     0x00000001U                                      /*!< Timer break input  */
170 #define TIM_BREAKINPUT_BRK2    0x00000002U                                      /*!< Timer break2 input */
171 /**
172   * @}
173   */
174 
175 /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source
176   * @{
177   */
178 #define TIM_BREAKINPUTSOURCE_BKIN     0x00000001U                               /*!< An external source (GPIO) is connected to the BKIN pin  */
179 /**
180   * @}
181   */
182 
183 /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling
184   * @{
185   */
186 #define TIM_BREAKINPUTSOURCE_DISABLE     0x00000000U                            /*!< Break input source is disabled */
187 #define TIM_BREAKINPUTSOURCE_ENABLE      0x00000001U                            /*!< Break input source is enabled */
188 /**
189   * @}
190   */
191 
192 /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity
193   * @{
194   */
195 #define TIM_BREAKINPUTSOURCE_POLARITY_LOW     0x00000001U                       /*!< Break input source is active low */
196 #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH    0x00000000U                       /*!< Break input source is active_high */
197 /**
198   * @}
199   */
200 
201 /** @defgroup TIMEx_Timer_Input_Selection TIM Extended Timer input selection
202   * @{
203   */
204 #define TIM_TIM2_TI1_GPIO                          0x00000000UL                                                   /*!< TIM2_TI1 is connected to GPIO */
205 #define TIM_TIM2_TI1_ETH_PPS                       TIM_TISEL_TI1SEL_0                                             /*!< TIM2 TI1 is connected to ETH1 PPS */
206 
207 #define TIM_TIM3_TI1_GPIO                          0x00000000UL                                                   /*!< TIM3_TI1 is connected to GPIO */
208 #define TIM_TIM3_TI1_ETH_PPS                       TIM_TISEL_TI1SEL_0                                             /*!< TIM3 TI1 is connected to ETH1 PPS */
209 
210 #define TIM_TIM9_TI1_GPIO                          0x00000000UL                                                   /*!< TIM9_TI1 is connected to GPIO */
211 #define TIM_TIM9_TI1_MCO1                          (TIM_TISEL_TI1SEL_2)                                           /*!< TIM9_TI1 is connected to MCO1 */
212 #define TIM_TIM9_TI1_MCO2                          (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0)                      /*!< TIM9_TI1 is connected to MCO2 */
213 
214 #define TIM_TIM12_TI1_GPIO                         0x00000000UL                                                   /*!< TIM12_TI1 is connected to GPIO */
215 #define TIM_TIM12_TI1_SPDIF_FS                     (TIM_TISEL_TI1SEL_0)                                           /*!< TIM12_TI1 is connected to SPDIFRX FS */
216 #define TIM_TIM12_TI1_HSI_1024                     (TIM_TISEL_TI1SEL_1)                                           /*!< TIM12_TI1 is connected to HSI/1024 */
217 #define TIM_TIM12_TI1_CSI_128                      (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0)                      /*!< TIM12_TI1 is connected to CSI/128 */
218 #define TIM_TIM12_TI1_MCO1                         (TIM_TISEL_TI1SEL_2)                                           /*!< TIM12_TI1 is connected to MCO1 */
219 #define TIM_TIM12_TI1_MCO2                         (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0)                      /*!< TIM12_TI1 is connected to MCO2 */
220 #define TIM_TIM12_TI2_GPIO                         0x00000000UL                                                   /*!< TIM12_TI2 is connected to GPIO */
221 
222 #define TIM_TIM15_TI1_GPIO                         0x00000000UL                                                   /*!< TIM15_TI1 is connected to GPIO */
223 #define TIM_TIM15_TI1_TIM2_CH1                     (TIM_TISEL_TI1SEL_0)                                           /*!< TIM15_TI1 is connected to TIM2 CH1 GPIO */
224 #define TIM_TIM15_TI1_TIM3_CH1                     (TIM_TISEL_TI1SEL_1)                                           /*!< TIM15_TI1 is connected to TIM3 CH1 GPIO */
225 #define TIM_TIM15_TI1_TIM4_CH1                     (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0)                      /*!< TIM15_TI1 is connected to TIM4 CH1 GPIO */
226 #define TIM_TIM15_TI1_MCO1                         (TIM_TISEL_TI1SEL_2)                                           /*!< TIM15_TI1 is connected to MCO1 */
227 #define TIM_TIM15_TI1_MCO2                         (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0)                      /*!< TIM15_TI1 is connected to MCO2 */
228 #define TIM_TIM15_TI2_GPIO                         0x00000000UL                                                   /*!< TIM15_TI2 is connected to GPIO */
229 #define TIM_TIM15_TI2_TIM2_CH2                     (TIM_TISEL_TI2SEL_0)                                           /*!< TIM15_TI2 is connected to TIM2 CH2 GPIO */
230 #define TIM_TIM15_TI2_TIM3_CH2                     (TIM_TISEL_TI2SEL_1)                                           /*!< TIM15_TI2 is connected to TIM3 CH2 GPIO */
231 #define TIM_TIM15_TI2_TIM4_CH2                     (TIM_TISEL_TI2SEL_1 | TIM_TISEL_TI2SEL_0)                      /*!< TIM15_TI2 is connected to TIM4 CH2 GPIO */
232 
233 #define TIM_TIM16_TI1_GPIO                         0x00000000UL                                                   /*!< TIM16_TI1 is connected to GPIO */
234 #define TIM_TIM16_TI1_RTC_WKUP                     (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0)                      /*!< TIM16_TI1 is connected to RTC Wakeup */
235 
236 #define TIM_TIM17_TI1_GPIO                         0x00000000UL                                                   /*!< TIM17_TI1 is connected to GPIO */
237 #define TIM_TIM17_TI1_SPDIF_FS                     (TIM_TISEL_TI1SEL_0)                                           /*!< TIM17_TI1 is connected to SPDIFRX FS */
238 /**
239   * @}
240   */
241 
242 /** @defgroup TIMEx_SMS_Preload_Enable TIM Extended Bitfield SMS preload enabling
243   * @{
244   */
245 #define TIM_SMS_PRELOAD_SOURCE_UPDATE     0x00000000U                            /*!< Prelaod of SMS bitfield is disabled */
246 #define TIM_SMS_PRELOAD_SOURCE_INDEX      TIM_SMCR_SMSPS                         /*!< Preload of SMS bitfield is enabled  */
247 /**
248   * @}
249   */
250 
251 /** @defgroup TIMEx_Encoder_Index_Blanking TIM Extended Encoder index blanking
252   * @{
253   */
254 #define TIM_ENCODERINDEX_BLANKING_DISABLE   0x00000000U     /*!< Encoder index blanking is disabled */
255 #define TIM_ENCODERINDEX_BLANKING_TI3       TIM_ECR_IBLK_0     /*!< Encoder index blanking is enabled on TI3 */
256 #define TIM_ENCODERINDEX_BLANKING_TI4       TIM_ECR_IBLK_1     /*!< Encoder index blanking is enabled on TI4 */
257 
258 /**
259   * @}
260   */
261 
262 /** @defgroup TIMEx_Encoder_Index_Position TIM Extended Encoder index position
263   * @{
264   */
265 #define TIM_ENCODERINDEX_POSITION_00        0x00000000U                           /*!< Encoder index position is AB=00 */
266 #define TIM_ENCODERINDEX_POSITION_01        TIM_ECR_IPOS_0                        /*!< Encoder index position is AB=01 */
267 #define TIM_ENCODERINDEX_POSITION_10        TIM_ECR_IPOS_1                        /*!< Encoder index position is AB=10 */
268 #define TIM_ENCODERINDEX_POSITION_11        (TIM_ECR_IPOS_1 | TIM_ECR_IPOS_0)     /*!< Encoder index position is AB=11 */
269 #define TIM_ENCODERINDEX_POSITION_0         0x00000000U                           /*!< In directional clock mode or clock plus direction mode, index resets the counter when clock is 0 */
270 #define TIM_ENCODERINDEX_POSITION_1         TIM_ECR_IPOS_0                        /*!< In directional clock mode or clock plus direction mode, index resets the counter when clock is 1 */
271 /**
272   * @}
273   */
274 
275 /** @defgroup TIMEx_Encoder_Index_Direction TIM Extended Encoder index direction
276   * @{
277   */
278 #define TIM_ENCODERINDEX_DIRECTION_UP_DOWN 0x00000000U        /*!< Index resets the counter whatever the direction  */
279 #define TIM_ENCODERINDEX_DIRECTION_UP      TIM_ECR_IDIR_0     /*!< Index resets the counter when up-counting only   */
280 #define TIM_ENCODERINDEX_DIRECTION_DOWN    TIM_ECR_IDIR_1     /*!< Index resets the counter when down-counting only */
281 /**
282   * @}
283   */
284 
285 /** @defgroup TIMEx_Encoder_Index_Polarity TIM Extended Encoder index polarity
286   * @{
287   */
288 #define TIM_ENCODERINDEX_POLARITY_INVERTED           TIM_ETRPOLARITY_INVERTED      /*!< Polarity for ETRx pin */
289 #define TIM_ENCODERINDEX_POLARITY_NONINVERTED        TIM_ETRPOLARITY_NONINVERTED   /*!< Polarity for ETRx pin */
290 /**
291   * @}
292   */
293 
294 /** @defgroup TIMEx_Encoder_Index_Prescaler TIM Extended Encodder index prescaler
295   * @{
296   */
297 #define TIM_ENCODERINDEX_PRESCALER_DIV1              TIM_ETRPRESCALER_DIV1         /*!< No prescaler is used                                                   */
298 #define TIM_ENCODERINDEX_PRESCALER_DIV2              TIM_ETRPRESCALER_DIV2         /*!< Prescaler for External ETR pin: Capture performed once every 2 events. */
299 #define TIM_ENCODERINDEX_PRESCALER_DIV4              TIM_ETRPRESCALER_DIV4         /*!< Prescaler for External ETR pin: Capture performed once every 4 events. */
300 #define TIM_ENCODERINDEX_PRESCALER_DIV8              TIM_ETRPRESCALER_DIV8         /*!< Prescaler for External ETR pin: Capture performed once every 8 events. */
301 /**
302   * @}
303   */
304 
305 /**
306   * @}
307   */
308 /* End of exported constants -------------------------------------------------*/
309 
310 /* Exported macro ------------------------------------------------------------*/
311 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
312   * @{
313   */
314 
315 /**
316   * @brief  HELPER macro calculating the prescaler value to achieve the required counter clock frequency.
317   * @note   ex: @ref __HAL_TIM_CALC_PSC(80000000, 1000000);
318   * @param  __TIMCLK__ timer input clock frequency (in Hz)
319   * @param  __CNTCLK__ counter clock frequency (in Hz)
320   * @retval Prescaler value  (between Min_Data=0 and Max_Data=65535)
321   */
322 #define __HAL_TIM_CALC_PSC(__TIMCLK__, __CNTCLK__)   \
323   ((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)((__TIMCLK__)/(__CNTCLK__) - 1U) : 0U
324 
325 /**
326   * @brief  HELPER macro calculating the auto-reload value to achieve the required output signal frequency.
327   * @note   ex: @ref __HAL_TIM_CALC_PERIOD(1000000, 0, 10000);
328   * @param  __TIMCLK__ timer input clock frequency (in Hz)
329   * @param  __PSC__ prescaler
330   * @param  __FREQ__ output signal frequency (in Hz)
331   * @retval  Auto-reload value  (between Min_Data=0 and Max_Data=65535)
332   */
333 #define __HAL_TIM_CALC_PERIOD(__TIMCLK__, __PSC__, __FREQ__) \
334   (((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? ((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U)) - 1U) : 0U
335 
336 /**
337   * @brief  HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required
338   *         output signal frequency.
339   * @note   ex: @ref __HAL_TIM_CALC_PERIOD_DITHER(1000000, 0, 10000);
340   * @note   This macro should be used only if dithering is already enabled
341   * @param  __TIMCLK__ timer input clock frequency (in Hz)
342   * @param  __PSC__ prescaler
343   * @param  __FREQ__ output signal frequency (in Hz)
344   * @retval  Auto-reload value  (between Min_Data=0 and Max_Data=65519)
345   */
346 #define __HAL_TIM_CALC_PERIOD_DITHER(__TIMCLK__, __PSC__, __FREQ__) \
347   (((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? \
348   (uint32_t)(((uint64_t)(__TIMCLK__)*16/((__FREQ__) * ((__PSC__) + 1U)) - 16U)) : 0U
349 
350 /**
351   * @brief  HELPER macro calculating the compare value required to achieve the required timer output compare
352   *         active/inactive delay.
353   * @note   ex: @ref __HAL_TIM_CALC_PULSE(1000000, 0, 10);
354   * @param  __TIMCLK__ timer input clock frequency (in Hz)
355   * @param  __PSC__ prescaler
356   * @param  __DELAY__ timer output compare active/inactive delay (in us)
357   * @retval Compare value  (between Min_Data=0 and Max_Data=65535)
358   */
359 #define __HAL_TIM_CALC_PULSE(__TIMCLK__, __PSC__, __DELAY__)  \
360   ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \
361               / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U))))
362 
363 /**
364   * @brief  HELPER macro calculating the compare value, with dithering feature enabled, to achieve the required timer
365   *         output compare active/inactive delay.
366   * @note   ex: @ref __HAL_TIM_CALC_PULSE_DITHER(1000000, 0, 10);
367   * @note   This macro should be used only if dithering is already enabled
368   * @param  __TIMCLK__ timer input clock frequency (in Hz)
369   * @param  __PSC__ prescaler
370   * @param  __DELAY__ timer output compare active/inactive delay (in us)
371   * @retval Compare value  (between Min_Data=0 and Max_Data=65519)
372   */
373 #define __HAL_TIM_CALC_PULSE_DITHER(__TIMCLK__, __PSC__, __DELAY__)  \
374   ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__) * 16U) \
375               / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U))))
376 
377 /**
378   * @brief  HELPER macro calculating the auto-reload value to achieve the required pulse duration
379   *        (when the timer operates in one pulse mode).
380   * @note   ex: @ref __HAL_TIM_CALC_PERIOD_BY_DELAY(1000000, 0, 10, 20);
381   * @param  __TIMCLK__ timer input clock frequency (in Hz)
382   * @param  __PSC__ prescaler
383   * @param  __DELAY__ timer output compare active/inactive delay (in us)
384   * @param  __PULSE__ pulse duration (in us)
385   * @retval Auto-reload value  (between Min_Data=0 and Max_Data=65535)
386   */
387 #define __HAL_TIM_CALC_PERIOD_BY_DELAY(__TIMCLK__, __PSC__, __DELAY__, __PULSE__)  \
388   ((uint32_t)(__HAL_TIM_CALC_PULSE((__TIMCLK__), (__PSC__), (__PULSE__)) \
389               + __HAL_TIM_CALC_PULSE((__TIMCLK__), (__PSC__), (__DELAY__))))
390 
391 /**
392   * @brief  HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required
393   *         pulse duration (when the timer operates in one pulse mode).
394   * @note   ex: @ref __HAL_TIM_CALC_PERIOD_DITHER_BY_DELAY(1000000, 0, 10, 20);
395   * @note   This macro should be used only if dithering is already enabled
396   * @param  __TIMCLK__ timer input clock frequency (in Hz)
397   * @param  __PSC__ prescaler
398   * @param  __DELAY__ timer output compare active/inactive delay (in us)
399   * @param  __PULSE__ pulse duration (in us)
400   * @retval Auto-reload value  (between Min_Data=0 and Max_Data=65519)
401   */
402 #define __HAL_TIM_CALC_PERIOD_DITHER_BY_DELAY(__TIMCLK__, __PSC__, __DELAY__, __PULSE__)  \
403   ((uint32_t)(__HAL_TIM_CALC_PULSE_DITHER((__TIMCLK__), (__PSC__), (__PULSE__)) \
404               + __HAL_TIM_CALC_PULSE_DITHER((__TIMCLK__), (__PSC__), (__DELAY__))))
405 
406 /**
407   * @}
408   */
409 /* End of exported macro -----------------------------------------------------*/
410 
411 /* Private macro -------------------------------------------------------------*/
412 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
413   * @{
414   */
415 #define IS_TIM_REMAP(INSTANCE, TIM_REMAP)                                     \
416   ((((INSTANCE) == TIM1)  && (((TIM_REMAP) == TIM_TIM1_ETR_GPIO)           || \
417                               ((TIM_REMAP) == TIM_TIM1_ETR_ADC1_AWD1)      || \
418                               ((TIM_REMAP) == TIM_TIM1_ETR_ADC1_AWD2)      || \
419                               ((TIM_REMAP) == TIM_TIM1_ETR_ADC1_AWD3)      || \
420                               ((TIM_REMAP) == TIM_TIM1_ETR_ADC2_AWD1)      || \
421                               ((TIM_REMAP) == TIM_TIM1_ETR_ADC2_AWD2)      || \
422                               ((TIM_REMAP) == TIM_TIM1_ETR_ADC2_AWD3)))    || \
423    (((INSTANCE) == TIM2)  && (((TIM_REMAP) == TIM_TIM2_ETR_GPIO)           || \
424                               ((TIM_REMAP) == TIM_TIM2_ETR_DCMIPP_HSYNC)   || \
425                               ((TIM_REMAP) == TIM_TIM2_ETR_LTDC_HSYNC)     || \
426                               ((TIM_REMAP) == TIM_TIM2_ETR_SAI1_FSA)       || \
427                               ((TIM_REMAP) == TIM_TIM2_ETR_SAI1_FSB)       || \
428                               ((TIM_REMAP) == TIM_TIM2_ETR_GFXTIM_TE)      || \
429                               ((TIM_REMAP) == TIM_TIM2_ETR_DCMIPP_VSYNC)   || \
430                               ((TIM_REMAP) == TIM_TIM2_ETR_LTDC_VSYNC)     || \
431                               ((TIM_REMAP) == TIM_TIM2_ETR_TIM3_ETR)       || \
432                               ((TIM_REMAP) == TIM_TIM2_ETR_TIM4_ETR)       || \
433                               ((TIM_REMAP) == TIM_TIM2_ETR_TIM5_ETR)       || \
434                               ((TIM_REMAP) == TIM_TIM2_ETR_ETH_PPS)))      || \
435    (((INSTANCE) == TIM3)  && (((TIM_REMAP) == TIM_TIM3_ETR_GPIO)           || \
436                               ((TIM_REMAP) == TIM_TIM3_ETR_DCMIPP_HSYNC)   || \
437                               ((TIM_REMAP) == TIM_TIM3_ETR_LTDC_HSYNC)     || \
438                               ((TIM_REMAP) == TIM_TIM3_ETR_GFXTIM_TE)      || \
439                               ((TIM_REMAP) == TIM_TIM3_ETR_DCMIPP_VSYNC)   || \
440                               ((TIM_REMAP) == TIM_TIM3_ETR_LTDC_VSYNC)     || \
441                               ((TIM_REMAP) == TIM_TIM3_ETR_TIM2_ETR)       || \
442                               ((TIM_REMAP) == TIM_TIM3_ETR_TIM4_ETR)       || \
443                               ((TIM_REMAP) == TIM_TIM3_ETR_TIM5_ETR)       || \
444                               ((TIM_REMAP) == TIM_TIM3_ETR_ETH_PPS)))      || \
445    (((INSTANCE) == TIM4)  && (((TIM_REMAP) == TIM_TIM4_ETR_GPIO)           || \
446                               ((TIM_REMAP) == TIM_TIM4_ETR_DCMIPP_HSYNC)   || \
447                               ((TIM_REMAP) == TIM_TIM4_ETR_LTDC_HSYNC)     || \
448                               ((TIM_REMAP) == TIM_TIM4_ETR_GFXTIM_TE)      || \
449                               ((TIM_REMAP) == TIM_TIM4_ETR_DCMIPP_VSYNC)   || \
450                               ((TIM_REMAP) == TIM_TIM4_ETR_LTDC_VSYNC)     || \
451                               ((TIM_REMAP) == TIM_TIM4_ETR_TIM2_ETR)       || \
452                               ((TIM_REMAP) == TIM_TIM4_ETR_TIM3_ETR)       || \
453                               ((TIM_REMAP) == TIM_TIM4_ETR_TIM5_ETR)))     || \
454    (((INSTANCE) == TIM5)  && (((TIM_REMAP) == TIM_TIM5_ETR_GPIO)           || \
455                               ((TIM_REMAP) == TIM_TIM5_ETR_SAI2_FSA)       || \
456                               ((TIM_REMAP) == TIM_TIM5_ETR_SAI2_FSB)       || \
457                               ((TIM_REMAP) == TIM_TIM5_ETR_DCMIPP_HSYNC)   || \
458                               ((TIM_REMAP) == TIM_TIM5_ETR_LTDC_HSYNC)     || \
459                               ((TIM_REMAP) == TIM_TIM5_ETR_GFXTIM_TE)      || \
460                               ((TIM_REMAP) == TIM_TIM5_ETR_DCMIPP_VSYNC)   || \
461                               ((TIM_REMAP) == TIM_TIM5_ETR_LTDC_VSYNC)     || \
462                               ((TIM_REMAP) == TIM_TIM5_ETR_TIM2_ETR)       || \
463                               ((TIM_REMAP) == TIM_TIM5_ETR_TIM3_ETR)       || \
464                               ((TIM_REMAP) == TIM_TIM5_ETR_TIM4_ETR))))
465 
466 #define IS_TIM_BREAKINPUT(__BREAKINPUT__)  (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK)  || \
467                                             ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2))
468 
469 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__)  ((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN)
470 
471 #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__)  (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE)  || \
472                                                    ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE))
473 
474 #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__)  (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW)  || \
475                                                          ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH))
476 
477 #define IS_TIM_TISEL(__TISEL__) ((((__TISEL__) & 0xF0F0F0F0U) == 0x00000000U))
478 
479 #define IS_TIM_TISEL_TIX_INSTANCE(INSTANCE, CHANNEL) \
480   (IS_TIM_CCX_INSTANCE(INSTANCE, CHANNEL) && ((CHANNEL) < TIM_CHANNEL_5))
481 
482 #define IS_TIM_CLOCKSOURCE_INSTANCE(INSTANCE, __CLOCK__) \
483   ((((INSTANCE) == TIM1) &&                  \
484     (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL)  ||          \
485      ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED)     ||          \
486      ((__CLOCK__) == TIM_CLOCKSOURCE_TI1)       ||          \
487      ((__CLOCK__) == TIM_CLOCKSOURCE_TI2)       ||          \
488      ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1)  ||          \
489      ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2)  ||          \
490      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1)      ||          \
491      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2)      ||          \
492      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3)      ||          \
493      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4)      ||          \
494      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5)      ||          \
495      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6)      ||          \
496      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7)      ||          \
497      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8)      ||          \
498      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9)      ||          \
499      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10)     ||          \
500      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11)))               \
501    ||                                        \
502    (((INSTANCE) == TIM2) &&                  \
503     (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL)  ||          \
504      ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED)     ||          \
505      ((__CLOCK__) == TIM_CLOCKSOURCE_TI1)       ||          \
506      ((__CLOCK__) == TIM_CLOCKSOURCE_TI2)       ||          \
507      ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1)  ||          \
508      ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2)  ||          \
509      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0)      ||          \
510      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2)      ||          \
511      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3)      ||          \
512      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4)      ||          \
513      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5)      ||          \
514      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6)      ||          \
515      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7)      ||          \
516      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8)      ||          \
517      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9)      ||          \
518      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10)     ||          \
519      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11)     ||          \
520      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR13)     ||          \
521      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR14)))               \
522    ||                                        \
523    (((INSTANCE) == TIM3) &&                  \
524     (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL)  ||          \
525      ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED)     ||          \
526      ((__CLOCK__) == TIM_CLOCKSOURCE_TI1)       ||          \
527      ((__CLOCK__) == TIM_CLOCKSOURCE_TI2)       ||          \
528      ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1)  ||          \
529      ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2)  ||          \
530      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0)      ||          \
531      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1)      ||          \
532      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3)      ||          \
533      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4)      ||          \
534      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5)      ||          \
535      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6)      ||          \
536      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7)      ||          \
537      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8)      ||          \
538      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9)      ||          \
539      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10)     ||          \
540      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11)))               \
541    ||                                        \
542    (((INSTANCE) == TIM4) &&                  \
543     (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL)  ||          \
544      ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED)     ||          \
545      ((__CLOCK__) == TIM_CLOCKSOURCE_TI1)       ||          \
546      ((__CLOCK__) == TIM_CLOCKSOURCE_TI2)       ||          \
547      ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1)  ||          \
548      ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2)  ||          \
549      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0)      ||          \
550      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1)      ||          \
551      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2)      ||          \
552      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4)      ||          \
553      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5)      ||          \
554      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6)      ||          \
555      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7)      ||          \
556      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8)      ||          \
557      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9)      ||          \
558      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10)     ||          \
559      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11)))               \
560    ||                                        \
561    (((INSTANCE) == TIM5) &&                  \
562     (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL)  ||          \
563      ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED)     ||          \
564      ((__CLOCK__) == TIM_CLOCKSOURCE_TI1)       ||          \
565      ((__CLOCK__) == TIM_CLOCKSOURCE_TI2)       ||          \
566      ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1)  ||          \
567      ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2)  ||          \
568      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0)      ||          \
569      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1)      ||          \
570      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2)      ||          \
571      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3)      ||          \
572      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5)      ||          \
573      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6)      ||          \
574      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7)      ||          \
575      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8)      ||          \
576      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9)      ||          \
577      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10)     ||          \
578      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11)     ||          \
579      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR13)))               \
580    ||                                        \
581    (((INSTANCE) == TIM9) &&                  \
582     (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL)  ||          \
583      ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED)     ||          \
584      ((__CLOCK__) == TIM_CLOCKSOURCE_TI1)       ||          \
585      ((__CLOCK__) == TIM_CLOCKSOURCE_TI2)       ||          \
586      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0)      ||          \
587      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1)      ||          \
588      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2)      ||          \
589      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3)      ||          \
590      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4)      ||          \
591      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6)      ||          \
592      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7)      ||          \
593      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8)      ||          \
594      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9)      ||          \
595      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10)     ||          \
596      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11)))               \
597    ||                                        \
598    (((INSTANCE) == TIM12) &&                 \
599     (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL)  ||          \
600      ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED)     ||          \
601      ((__CLOCK__) == TIM_CLOCKSOURCE_TI1)       ||          \
602      ((__CLOCK__) == TIM_CLOCKSOURCE_TI2)       ||          \
603      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0)      ||          \
604      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1)      ||          \
605      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2)      ||          \
606      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3)      ||          \
607      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4)      ||          \
608      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5)      ||          \
609      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7)      ||          \
610      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8)      ||          \
611      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9)      ||          \
612      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10)     ||          \
613      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11)))               \
614    ||                                        \
615    (((INSTANCE) == TIM15) &&                 \
616     (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL)  ||          \
617      ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED)     ||          \
618      ((__CLOCK__) == TIM_CLOCKSOURCE_TI1)       ||          \
619      ((__CLOCK__) == TIM_CLOCKSOURCE_TI2)       ||          \
620      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0)      ||          \
621      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1)      ||          \
622      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2)      ||          \
623      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3)      ||          \
624      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4)      ||          \
625      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5)      ||          \
626      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6)      ||          \
627      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7)      ||          \
628      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8)      ||          \
629      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10)     ||          \
630      ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11))))
631 
632 #define IS_TIM_TRIGGER_INSTANCE(INSTANCE, __SELECTION__) \
633   ((((INSTANCE) == TIM1) &&                  \
634     (((__SELECTION__) == TIM_TS_ITR1)    ||          \
635      ((__SELECTION__) == TIM_TS_ITR2)    ||          \
636      ((__SELECTION__) == TIM_TS_ITR3)    ||          \
637      ((__SELECTION__) == TIM_TS_TI1F_ED) ||          \
638      ((__SELECTION__) == TIM_TS_TI1FP1)  ||          \
639      ((__SELECTION__) == TIM_TS_TI2FP2)  ||          \
640      ((__SELECTION__) == TIM_TS_ETRF)    ||          \
641      ((__SELECTION__) == TIM_TS_ITR4)    ||          \
642      ((__SELECTION__) == TIM_TS_ITR5)    ||          \
643      ((__SELECTION__) == TIM_TS_ITR6)    ||          \
644      ((__SELECTION__) == TIM_TS_ITR7)    ||          \
645      ((__SELECTION__) == TIM_TS_ITR8)    ||          \
646      ((__SELECTION__) == TIM_TS_ITR9)    ||          \
647      ((__SELECTION__) == TIM_TS_ITR10)   ||          \
648      ((__SELECTION__) == TIM_TS_ITR11)))             \
649    ||                                        \
650    (((INSTANCE) == TIM2) &&                  \
651     (((__SELECTION__) == TIM_TS_ITR0)    ||          \
652      ((__SELECTION__) == TIM_TS_ITR2)    ||          \
653      ((__SELECTION__) == TIM_TS_ITR3)    ||          \
654      ((__SELECTION__) == TIM_TS_TI1F_ED) ||          \
655      ((__SELECTION__) == TIM_TS_TI1FP1)  ||          \
656      ((__SELECTION__) == TIM_TS_TI2FP2)  ||          \
657      ((__SELECTION__) == TIM_TS_ETRF)    ||          \
658      ((__SELECTION__) == TIM_TS_ITR4)    ||          \
659      ((__SELECTION__) == TIM_TS_ITR5)    ||          \
660      ((__SELECTION__) == TIM_TS_ITR6)    ||          \
661      ((__SELECTION__) == TIM_TS_ITR7)    ||          \
662      ((__SELECTION__) == TIM_TS_ITR8)    ||          \
663      ((__SELECTION__) == TIM_TS_ITR9)    ||          \
664      ((__SELECTION__) == TIM_TS_ITR10)   ||          \
665      ((__SELECTION__) == TIM_TS_ITR11)   ||          \
666      ((__SELECTION__) == TIM_TS_ITR13)   ||          \
667      ((__SELECTION__) == TIM_TS_ITR14)))             \
668    ||                                        \
669    (((INSTANCE) == TIM3) &&                  \
670     (((__SELECTION__) == TIM_TS_ITR0)    ||          \
671      ((__SELECTION__) == TIM_TS_ITR1)    ||          \
672      ((__SELECTION__) == TIM_TS_ITR3)    ||          \
673      ((__SELECTION__) == TIM_TS_TI1F_ED) ||          \
674      ((__SELECTION__) == TIM_TS_TI1FP1)  ||          \
675      ((__SELECTION__) == TIM_TS_TI2FP2)  ||          \
676      ((__SELECTION__) == TIM_TS_ETRF)    ||          \
677      ((__SELECTION__) == TIM_TS_ITR4)    ||          \
678      ((__SELECTION__) == TIM_TS_ITR5)    ||          \
679      ((__SELECTION__) == TIM_TS_ITR6)    ||          \
680      ((__SELECTION__) == TIM_TS_ITR7)    ||          \
681      ((__SELECTION__) == TIM_TS_ITR8)    ||          \
682      ((__SELECTION__) == TIM_TS_ITR9)    ||          \
683      ((__SELECTION__) == TIM_TS_ITR10)   ||          \
684      ((__SELECTION__) == TIM_TS_ITR11)))             \
685    ||                                        \
686    (((INSTANCE) == TIM4) &&                  \
687     (((__SELECTION__) == TIM_TS_ITR0)    ||          \
688      ((__SELECTION__) == TIM_TS_ITR1)    ||          \
689      ((__SELECTION__) == TIM_TS_ITR2)    ||          \
690      ((__SELECTION__) == TIM_TS_TI1F_ED) ||          \
691      ((__SELECTION__) == TIM_TS_TI1FP1)  ||          \
692      ((__SELECTION__) == TIM_TS_TI2FP2)  ||          \
693      ((__SELECTION__) == TIM_TS_ETRF)    ||          \
694      ((__SELECTION__) == TIM_TS_ITR4)    ||          \
695      ((__SELECTION__) == TIM_TS_ITR5)    ||          \
696      ((__SELECTION__) == TIM_TS_ITR6)    ||          \
697      ((__SELECTION__) == TIM_TS_ITR7)    ||          \
698      ((__SELECTION__) == TIM_TS_ITR8)    ||          \
699      ((__SELECTION__) == TIM_TS_ITR9)    ||          \
700      ((__SELECTION__) == TIM_TS_ITR10)   ||          \
701      ((__SELECTION__) == TIM_TS_ITR11)))             \
702    ||                                        \
703    (((INSTANCE) == TIM5) &&                  \
704     (((__SELECTION__) == TIM_TS_ITR0)    ||          \
705      ((__SELECTION__) == TIM_TS_ITR1)    ||          \
706      ((__SELECTION__) == TIM_TS_ITR2)    ||          \
707      ((__SELECTION__) == TIM_TS_ITR3)    ||          \
708      ((__SELECTION__) == TIM_TS_TI1F_ED) ||          \
709      ((__SELECTION__) == TIM_TS_TI1FP1)  ||          \
710      ((__SELECTION__) == TIM_TS_TI2FP2)  ||          \
711      ((__SELECTION__) == TIM_TS_ETRF)    ||          \
712      ((__SELECTION__) == TIM_TS_ITR5)    ||          \
713      ((__SELECTION__) == TIM_TS_ITR6)    ||          \
714      ((__SELECTION__) == TIM_TS_ITR7)    ||          \
715      ((__SELECTION__) == TIM_TS_ITR8)    ||          \
716      ((__SELECTION__) == TIM_TS_ITR9)    ||          \
717      ((__SELECTION__) == TIM_TS_ITR10)   ||          \
718      ((__SELECTION__) == TIM_TS_ITR11)   ||          \
719      ((__SELECTION__) == TIM_TS_ITR13)   ||          \
720      ((__SELECTION__) == TIM_TS_ITR14)))             \
721    ||                                        \
722    (((INSTANCE) == TIM9) &&                  \
723     (((__SELECTION__) == TIM_TS_ITR0)    ||          \
724      ((__SELECTION__) == TIM_TS_ITR1)    ||          \
725      ((__SELECTION__) == TIM_TS_ITR2)    ||          \
726      ((__SELECTION__) == TIM_TS_ITR3)    ||          \
727      ((__SELECTION__) == TIM_TS_TI1F_ED) ||          \
728      ((__SELECTION__) == TIM_TS_TI1FP1)  ||          \
729      ((__SELECTION__) == TIM_TS_TI2FP2)  ||          \
730      ((__SELECTION__) == TIM_TS_ITR4)    ||          \
731      ((__SELECTION__) == TIM_TS_ITR6)    ||          \
732      ((__SELECTION__) == TIM_TS_ITR7)    ||          \
733      ((__SELECTION__) == TIM_TS_ITR8)    ||          \
734      ((__SELECTION__) == TIM_TS_ITR9)    ||          \
735      ((__SELECTION__) == TIM_TS_ITR10)   ||          \
736      ((__SELECTION__) == TIM_TS_ITR11)))             \
737    ||                                        \
738    (((INSTANCE) == TIM12) &&                 \
739     (((__SELECTION__) == TIM_TS_ITR0)    ||          \
740      ((__SELECTION__) == TIM_TS_ITR1)    ||          \
741      ((__SELECTION__) == TIM_TS_ITR2)    ||          \
742      ((__SELECTION__) == TIM_TS_ITR3)    ||          \
743      ((__SELECTION__) == TIM_TS_TI1F_ED) ||          \
744      ((__SELECTION__) == TIM_TS_TI1FP1)  ||          \
745      ((__SELECTION__) == TIM_TS_TI2FP2)  ||          \
746      ((__SELECTION__) == TIM_TS_ITR4)    ||          \
747      ((__SELECTION__) == TIM_TS_ITR5)    ||          \
748      ((__SELECTION__) == TIM_TS_ITR7)    ||          \
749      ((__SELECTION__) == TIM_TS_ITR8)    ||          \
750      ((__SELECTION__) == TIM_TS_ITR9)    ||          \
751      ((__SELECTION__) == TIM_TS_ITR10)   ||          \
752      ((__SELECTION__) == TIM_TS_ITR11)))             \
753    ||                                        \
754    (((INSTANCE) == TIM15) &&                 \
755     (((__SELECTION__) == TIM_TS_ITR0)    ||          \
756      ((__SELECTION__) == TIM_TS_ITR1)    ||          \
757      ((__SELECTION__) == TIM_TS_ITR2)    ||          \
758      ((__SELECTION__) == TIM_TS_ITR3)    ||          \
759      ((__SELECTION__) == TIM_TS_TI1F_ED) ||          \
760      ((__SELECTION__) == TIM_TS_TI1FP1)  ||          \
761      ((__SELECTION__) == TIM_TS_TI2FP2)  ||          \
762      ((__SELECTION__) == TIM_TS_ITR4)    ||          \
763      ((__SELECTION__) == TIM_TS_ITR5)    ||          \
764      ((__SELECTION__) == TIM_TS_ITR6)    ||          \
765      ((__SELECTION__) == TIM_TS_ITR7)    ||          \
766      ((__SELECTION__) == TIM_TS_ITR8)    ||          \
767      ((__SELECTION__) == TIM_TS_ITR10)   ||          \
768      ((__SELECTION__) == TIM_TS_ITR11))))
769 
770 #define IS_TIM_INTERNAL_TRIGGEREVENT_INSTANCE(INSTANCE, __SELECTION__) \
771   ((((INSTANCE) == TIM1) &&                  \
772     (((__SELECTION__) == TIM_TS_ITR1)  ||          \
773      ((__SELECTION__) == TIM_TS_ITR2)  ||          \
774      ((__SELECTION__) == TIM_TS_ITR3)  ||          \
775      ((__SELECTION__) == TIM_TS_ITR4)  ||          \
776      ((__SELECTION__) == TIM_TS_ITR5)  ||          \
777      ((__SELECTION__) == TIM_TS_ITR6)  ||          \
778      ((__SELECTION__) == TIM_TS_ITR7)  ||          \
779      ((__SELECTION__) == TIM_TS_ITR8)  ||          \
780      ((__SELECTION__) == TIM_TS_ITR9)  ||          \
781      ((__SELECTION__) == TIM_TS_ITR10) ||          \
782      ((__SELECTION__) == TIM_TS_ITR11) ||          \
783      ((__SELECTION__) == TIM_TS_NONE)))            \
784    ||                                        \
785    (((INSTANCE) == TIM2) &&                  \
786     (((__SELECTION__) == TIM_TS_ITR0)  ||          \
787      ((__SELECTION__) == TIM_TS_ITR2)  ||          \
788      ((__SELECTION__) == TIM_TS_ITR3)  ||          \
789      ((__SELECTION__) == TIM_TS_ITR4)  ||          \
790      ((__SELECTION__) == TIM_TS_ITR5)  ||          \
791      ((__SELECTION__) == TIM_TS_ITR6)  ||          \
792      ((__SELECTION__) == TIM_TS_ITR7)  ||          \
793      ((__SELECTION__) == TIM_TS_ITR8)  ||          \
794      ((__SELECTION__) == TIM_TS_ITR9)  ||          \
795      ((__SELECTION__) == TIM_TS_ITR10) ||          \
796      ((__SELECTION__) == TIM_TS_ITR11) ||          \
797      ((__SELECTION__) == TIM_TS_ITR13) ||          \
798      ((__SELECTION__) == TIM_TS_ITR14) ||          \
799      ((__SELECTION__) == TIM_TS_NONE)))            \
800    ||                                        \
801    (((INSTANCE) == TIM3) &&                  \
802     (((__SELECTION__) == TIM_TS_ITR0)  ||          \
803      ((__SELECTION__) == TIM_TS_ITR1)  ||          \
804      ((__SELECTION__) == TIM_TS_ITR3)  ||          \
805      ((__SELECTION__) == TIM_TS_ITR4)  ||          \
806      ((__SELECTION__) == TIM_TS_ITR5)  ||          \
807      ((__SELECTION__) == TIM_TS_ITR6)  ||          \
808      ((__SELECTION__) == TIM_TS_ITR7)  ||          \
809      ((__SELECTION__) == TIM_TS_ITR8)  ||          \
810      ((__SELECTION__) == TIM_TS_ITR9)  ||          \
811      ((__SELECTION__) == TIM_TS_ITR10) ||          \
812      ((__SELECTION__) == TIM_TS_ITR11) ||          \
813      ((__SELECTION__) == TIM_TS_NONE)))            \
814    ||                                        \
815    (((INSTANCE) == TIM4) &&                  \
816     (((__SELECTION__) == TIM_TS_ITR0)  ||          \
817      ((__SELECTION__) == TIM_TS_ITR1)  ||          \
818      ((__SELECTION__) == TIM_TS_ITR2)  ||          \
819      ((__SELECTION__) == TIM_TS_ITR4)  ||          \
820      ((__SELECTION__) == TIM_TS_ITR5)  ||          \
821      ((__SELECTION__) == TIM_TS_ITR6)  ||          \
822      ((__SELECTION__) == TIM_TS_ITR7)  ||          \
823      ((__SELECTION__) == TIM_TS_ITR8)  ||          \
824      ((__SELECTION__) == TIM_TS_ITR9)  ||          \
825      ((__SELECTION__) == TIM_TS_ITR10) ||          \
826      ((__SELECTION__) == TIM_TS_ITR11) ||          \
827      ((__SELECTION__) == TIM_TS_NONE)))            \
828    ||                                        \
829    (((INSTANCE) == TIM5) &&                  \
830     (((__SELECTION__) == TIM_TS_ITR0)  ||          \
831      ((__SELECTION__) == TIM_TS_ITR1)  ||          \
832      ((__SELECTION__) == TIM_TS_ITR2)  ||          \
833      ((__SELECTION__) == TIM_TS_ITR3)  ||          \
834      ((__SELECTION__) == TIM_TS_ITR5)  ||          \
835      ((__SELECTION__) == TIM_TS_ITR6)  ||          \
836      ((__SELECTION__) == TIM_TS_ITR7)  ||          \
837      ((__SELECTION__) == TIM_TS_ITR8)  ||          \
838      ((__SELECTION__) == TIM_TS_ITR9)  ||          \
839      ((__SELECTION__) == TIM_TS_ITR10) ||          \
840      ((__SELECTION__) == TIM_TS_ITR11) ||          \
841      ((__SELECTION__) == TIM_TS_ITR13) ||          \
842      ((__SELECTION__) == TIM_TS_ITR14) ||          \
843      ((__SELECTION__) == TIM_TS_NONE)))            \
844    ||                                        \
845    (((INSTANCE) == TIM9) &&                  \
846     (((__SELECTION__) == TIM_TS_ITR0)  ||          \
847      ((__SELECTION__) == TIM_TS_ITR1)  ||          \
848      ((__SELECTION__) == TIM_TS_ITR2)  ||          \
849      ((__SELECTION__) == TIM_TS_ITR3)  ||          \
850      ((__SELECTION__) == TIM_TS_ITR4)  ||          \
851      ((__SELECTION__) == TIM_TS_ITR6)  ||          \
852      ((__SELECTION__) == TIM_TS_ITR7)  ||          \
853      ((__SELECTION__) == TIM_TS_ITR8)  ||          \
854      ((__SELECTION__) == TIM_TS_ITR9)  ||          \
855      ((__SELECTION__) == TIM_TS_ITR10) ||          \
856      ((__SELECTION__) == TIM_TS_ITR11) ||          \
857      ((__SELECTION__) == TIM_TS_NONE)))            \
858    ||                                        \
859    (((INSTANCE) == TIM12) &&                  \
860     (((__SELECTION__) == TIM_TS_ITR0)  ||          \
861      ((__SELECTION__) == TIM_TS_ITR1)  ||          \
862      ((__SELECTION__) == TIM_TS_ITR2)  ||          \
863      ((__SELECTION__) == TIM_TS_ITR3)  ||          \
864      ((__SELECTION__) == TIM_TS_ITR4)  ||          \
865      ((__SELECTION__) == TIM_TS_ITR5)  ||          \
866      ((__SELECTION__) == TIM_TS_ITR7)  ||          \
867      ((__SELECTION__) == TIM_TS_ITR8)  ||          \
868      ((__SELECTION__) == TIM_TS_ITR9)  ||          \
869      ((__SELECTION__) == TIM_TS_ITR10) ||          \
870      ((__SELECTION__) == TIM_TS_ITR11) ||          \
871      ((__SELECTION__) == TIM_TS_NONE)))            \
872    ||                                        \
873    (((INSTANCE) == TIM15) &&                 \
874     (((__SELECTION__) == TIM_TS_ITR0)  ||          \
875      ((__SELECTION__) == TIM_TS_ITR1)  ||          \
876      ((__SELECTION__) == TIM_TS_ITR2)  ||          \
877      ((__SELECTION__) == TIM_TS_ITR3)  ||          \
878      ((__SELECTION__) == TIM_TS_ITR4)  ||          \
879      ((__SELECTION__) == TIM_TS_ITR5)  ||          \
880      ((__SELECTION__) == TIM_TS_ITR6)  ||          \
881      ((__SELECTION__) == TIM_TS_ITR7)  ||          \
882      ((__SELECTION__) == TIM_TS_ITR8)  ||          \
883      ((__SELECTION__) == TIM_TS_ITR10) ||          \
884      ((__SELECTION__) == TIM_TS_ITR11) ||          \
885      ((__SELECTION__) == TIM_TS_NONE))))
886 
887 #define IS_TIM_OC_CHANNEL_MODE(__MODE__, __CHANNEL__)   \
888   (IS_TIM_OC_MODE(__MODE__) \
889    && ((((__MODE__) == TIM_OCMODE_DIRECTION_OUTPUT) || ((__MODE__) == TIM_OCMODE_PULSE_ON_COMPARE)) \
890        ? (((__CHANNEL__) == TIM_CHANNEL_3) || ((__CHANNEL__) == TIM_CHANNEL_4)) : (1 == 1)))
891 
892 #define IS_TIM_PULSEONCOMPARE_CHANNEL(__CHANNEL__)  \
893   (((__CHANNEL__) == TIM_CHANNEL_3) ||    \
894    ((__CHANNEL__) == TIM_CHANNEL_4))
895 
896 #define IS_TIM_PULSEONCOMPARE_INSTANCE(INSTANCE)  IS_TIM_CC3_INSTANCE(INSTANCE)
897 
898 #define IS_TIM_PULSEONCOMPARE_WIDTH(__WIDTH__)    ((__WIDTH__) <= 0xFFU)
899 
900 #define IS_TIM_PULSEONCOMPARE_WIDTHPRESCALER(__PRESCALER__)    ((__PRESCALER__) <= 0x7U)
901 
902 #define IS_TIM_SLAVE_PRELOAD_SOURCE(__SOURCE__)    (((__SOURCE__) == TIM_SMS_PRELOAD_SOURCE_UPDATE) \
903                                                     || ((__SOURCE__) == TIM_SMS_PRELOAD_SOURCE_INDEX))
904 
905 #define IS_TIM_ENCODERINDEX_POLARITY(__POLARITY__)        (((__POLARITY__) == TIM_ENCODERINDEX_POLARITY_INVERTED)  || \
906                                                            ((__POLARITY__) == TIM_ENCODERINDEX_POLARITY_NONINVERTED))
907 
908 #define IS_TIM_ENCODERINDEX_PRESCALER(__PRESCALER__)      (((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV1) || \
909                                                            ((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV2) || \
910                                                            ((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV4) || \
911                                                            ((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV8))
912 
913 #define IS_TIM_ENCODERINDEX_FILTER(__FILTER__)            ((__FILTER__) <= 0xFUL)
914 
915 #define IS_TIM_ENCODERINDEX_POSITION(__POSITION__)        (((__POSITION__) == TIM_ENCODERINDEX_POSITION_00) || \
916                                                            ((__POSITION__) == TIM_ENCODERINDEX_POSITION_01) || \
917                                                            ((__POSITION__) == TIM_ENCODERINDEX_POSITION_10) || \
918                                                            ((__POSITION__) == TIM_ENCODERINDEX_POSITION_11) || \
919                                                            ((__POSITION__) == TIM_ENCODERINDEX_POSITION_0)  || \
920                                                            ((__POSITION__) == TIM_ENCODERINDEX_POSITION_1))
921 
922 #define IS_TIM_ENCODERINDEX_DIRECTION(__DIRECTION__)      (((__DIRECTION__) == TIM_ENCODERINDEX_DIRECTION_UP_DOWN) || \
923                                                            ((__DIRECTION__) == TIM_ENCODERINDEX_DIRECTION_UP)      || \
924                                                            ((__DIRECTION__) == TIM_ENCODERINDEX_DIRECTION_DOWN))
925 
926 #define IS_TIM_ENCODERINDEX_BLANKING(__BLANKING__)      (((__BLANKING__) == TIM_ENCODERINDEX_BLANKING_DISABLE) || \
927                                                          ((__BLANKING__) == TIM_ENCODERINDEX_BLANKING_TI3)     || \
928                                                          ((__BLANKING__) == TIM_ENCODERINDEX_BLANKING_TI4))
929 
930 /**
931   * @}
932   */
933 /* End of private macro ------------------------------------------------------*/
934 
935 /* Exported functions --------------------------------------------------------*/
936 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
937   * @{
938   */
939 
940 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
941   *  @brief    Timer Hall Sensor functions
942   * @{
943   */
944 /*  Timer Hall Sensor functions  **********************************************/
945 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig);
946 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
947 
948 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
949 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
950 
951 /* Blocking mode: Polling */
952 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
953 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
954 /* Non-Blocking mode: Interrupt */
955 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
956 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
957 /* Non-Blocking mode: DMA */
958 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
959 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
960 /**
961   * @}
962   */
963 
964 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
965   *  @brief   Timer Complementary Output Compare functions
966   * @{
967   */
968 /*  Timer Complementary Output Compare functions  *****************************/
969 /* Blocking mode: Polling */
970 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
971 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
972 
973 /* Non-Blocking mode: Interrupt */
974 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
975 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
976 
977 /* Non-Blocking mode: DMA */
978 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
979                                           uint16_t Length);
980 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
981 /**
982   * @}
983   */
984 
985 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
986   *  @brief    Timer Complementary PWM functions
987   * @{
988   */
989 /*  Timer Complementary PWM functions  ****************************************/
990 /* Blocking mode: Polling */
991 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
992 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
993 
994 /* Non-Blocking mode: Interrupt */
995 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
996 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
997 /* Non-Blocking mode: DMA */
998 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
999                                            uint16_t Length);
1000 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
1001 /**
1002   * @}
1003   */
1004 
1005 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
1006   *  @brief    Timer Complementary One Pulse functions
1007   * @{
1008   */
1009 /*  Timer Complementary One Pulse functions  **********************************/
1010 /* Blocking mode: Polling */
1011 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
1012 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
1013 
1014 /* Non-Blocking mode: Interrupt */
1015 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
1016 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
1017 /**
1018   * @}
1019   */
1020 
1021 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
1022   *  @brief    Peripheral Control functions
1023   * @{
1024   */
1025 /* Extended Control functions  ************************************************/
1026 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t  InputTrigger,
1027                                               uint32_t  CommutationSource);
1028 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t  InputTrigger,
1029                                                  uint32_t  CommutationSource);
1030 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t  InputTrigger,
1031                                                   uint32_t  CommutationSource);
1032 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
1033                                                         const TIM_MasterConfigTypeDef *sMasterConfig);
1034 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
1035                                                 const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
1036 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput,
1037                                              const TIMEx_BreakInputConfigTypeDef *sBreakInputConfig);
1038 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
1039 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
1040 HAL_StatusTypeDef  HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel);
1041 
1042 HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput);
1043 HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(const TIM_HandleTypeDef *htim, uint32_t BreakInput);
1044 HAL_StatusTypeDef HAL_TIMEx_DitheringEnable(TIM_HandleTypeDef *htim);
1045 HAL_StatusTypeDef HAL_TIMEx_DitheringDisable(TIM_HandleTypeDef *htim);
1046 HAL_StatusTypeDef HAL_TIMEx_OC_ConfigPulseOnCompare(TIM_HandleTypeDef *htim, uint32_t PulseWidthPrescaler,
1047                                                     uint32_t PulseWidth);
1048 HAL_StatusTypeDef HAL_TIMEx_ConfigSlaveModePreload(TIM_HandleTypeDef *htim, uint32_t Source);
1049 HAL_StatusTypeDef HAL_TIMEx_EnableSlaveModePreload(TIM_HandleTypeDef *htim);
1050 HAL_StatusTypeDef HAL_TIMEx_DisableSlaveModePreload(TIM_HandleTypeDef *htim);
1051 HAL_StatusTypeDef HAL_TIMEx_EnableDeadTimePreload(TIM_HandleTypeDef *htim);
1052 HAL_StatusTypeDef HAL_TIMEx_DisableDeadTimePreload(TIM_HandleTypeDef *htim);
1053 HAL_StatusTypeDef HAL_TIMEx_ConfigDeadTime(TIM_HandleTypeDef *htim, uint32_t Deadtime);
1054 HAL_StatusTypeDef HAL_TIMEx_ConfigAsymmetricalDeadTime(TIM_HandleTypeDef *htim, uint32_t FallingDeadtime);
1055 HAL_StatusTypeDef HAL_TIMEx_EnableAsymmetricalDeadTime(TIM_HandleTypeDef *htim);
1056 HAL_StatusTypeDef HAL_TIMEx_DisableAsymmetricalDeadTime(TIM_HandleTypeDef *htim);
1057 HAL_StatusTypeDef HAL_TIMEx_ConfigEncoderIndex(TIM_HandleTypeDef *htim,
1058                                                TIMEx_EncoderIndexConfigTypeDef *sEncoderIndexConfig);
1059 HAL_StatusTypeDef HAL_TIMEx_EnableEncoderIndex(TIM_HandleTypeDef *htim);
1060 HAL_StatusTypeDef HAL_TIMEx_DisableEncoderIndex(TIM_HandleTypeDef *htim);
1061 HAL_StatusTypeDef HAL_TIMEx_EnableEncoderFirstIndex(TIM_HandleTypeDef *htim);
1062 HAL_StatusTypeDef HAL_TIMEx_DisableEncoderFirstIndex(TIM_HandleTypeDef *htim);
1063 /**
1064   * @}
1065   */
1066 
1067 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
1068   * @brief    Extended Callbacks functions
1069   * @{
1070   */
1071 /* Extended Callback **********************************************************/
1072 void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim);
1073 void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim);
1074 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
1075 void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim);
1076 void HAL_TIMEx_EncoderIndexCallback(TIM_HandleTypeDef *htim);
1077 void HAL_TIMEx_DirectionChangeCallback(TIM_HandleTypeDef *htim);
1078 void HAL_TIMEx_IndexErrorCallback(TIM_HandleTypeDef *htim);
1079 void HAL_TIMEx_TransitionErrorCallback(TIM_HandleTypeDef *htim);
1080 /**
1081   * @}
1082   */
1083 
1084 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
1085   * @brief    Extended Peripheral State functions
1086   * @{
1087   */
1088 /* Extended Peripheral State functions  ***************************************/
1089 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim);
1090 HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim,  uint32_t ChannelN);
1091 /**
1092   * @}
1093   */
1094 
1095 /**
1096   * @}
1097   */
1098 /* End of exported functions -------------------------------------------------*/
1099 
1100 /* Private functions----------------------------------------------------------*/
1101 /** @addtogroup TIMEx_Private_Functions TIM Extended Private Functions
1102   * @{
1103   */
1104 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
1105 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma);
1106 /**
1107   * @}
1108   */
1109 /* End of private functions --------------------------------------------------*/
1110 
1111 /**
1112   * @}
1113   */
1114 
1115 /**
1116   * @}
1117   */
1118 
1119 #ifdef __cplusplus
1120 }
1121 #endif
1122 
1123 
1124 #endif /* STM32H7RSxx_HAL_TIM_EX_H */
1125