1 /** 2 ****************************************************************************** 3 * @file stm32h7rsxx_hal_pwr.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H7RSxx_HAL_PWR_H 21 #define STM32H7RSxx_HAL_PWR_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif /* __cplusplus */ 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h7rsxx_hal_def.h" 29 30 /** @addtogroup STM32H7RSxx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup PWR 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 40 /** @defgroup PWR_Exported_Types PWR Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief PWR PVD configuration structure definition 46 */ 47 typedef struct 48 { 49 uint32_t PVDLevel; /*!< Specifies the PVD detection level. 50 This parameter can be a value of 51 @ref PWR_PVD_Detection_Level. */ 52 53 uint32_t Mode; /*!< Specifies the operating mode for the selected pins. 54 This parameter can be a value of @ref PWR_PVD_Mode. */ 55 } PWR_PVDTypeDef; 56 /** 57 * @} 58 */ 59 60 /* Exported constants --------------------------------------------------------*/ 61 62 /** @defgroup PWR_Exported_Constants PWR Exported Constants 63 * @{ 64 */ 65 66 /** @defgroup PWR_WakeUp_Pins PWR Wake-Up Pins 67 * @{ 68 */ 69 /* High level and No pull (default configuration) */ 70 #define PWR_WAKEUP_PIN4 PWR_WKUPEPR_WKUPEN4 /*!< Wakeup pin 4 (with high level polarity) */ 71 #define PWR_WAKEUP_PIN3 PWR_WKUPEPR_WKUPEN3 /*!< Wakeup pin 3 (with high level polarity) */ 72 #define PWR_WAKEUP_PIN2 PWR_WKUPEPR_WKUPEN2 /*!< Wakeup pin 2 (with high level polarity) */ 73 #define PWR_WAKEUP_PIN1 PWR_WKUPEPR_WKUPEN1 /*!< Wakeup pin 1 (with high level polarity) */ 74 75 /* High level and No pull */ 76 #define PWR_WAKEUP_PIN4_HIGH PWR_WKUPEPR_WKUPEN4 /*!< Wakeup pin 4 (with high level polarity) */ 77 #define PWR_WAKEUP_PIN3_HIGH PWR_WKUPEPR_WKUPEN3 /*!< Wakeup pin 3 (with high level polarity) */ 78 #define PWR_WAKEUP_PIN2_HIGH PWR_WKUPEPR_WKUPEN2 /*!< Wakeup pin 2 (with high level polarity) */ 79 #define PWR_WAKEUP_PIN1_HIGH PWR_WKUPEPR_WKUPEN1 /*!< Wakeup pin 1 (with high level polarity) */ 80 81 /* Low level and No pull */ 82 #define PWR_WAKEUP_PIN4_LOW (PWR_WKUPEPR_WKUPP4 | PWR_WKUPEPR_WKUPEN4) /*!< Wakeup pin 4 (with low level polarity) */ 83 #define PWR_WAKEUP_PIN3_LOW (PWR_WKUPEPR_WKUPP3 | PWR_WKUPEPR_WKUPEN3) /*!< Wakeup pin 3 (with low level polarity) */ 84 #define PWR_WAKEUP_PIN2_LOW (PWR_WKUPEPR_WKUPP2 | PWR_WKUPEPR_WKUPEN2) /*!< Wakeup pin 2 (with low level polarity) */ 85 #define PWR_WAKEUP_PIN1_LOW (PWR_WKUPEPR_WKUPP1 | PWR_WKUPEPR_WKUPEN1) /*!< Wakeup pin 1 (with low level polarity) */ 86 /** 87 * @} 88 */ 89 90 /** @defgroup PWR_PVD_Detection_Level PWR PVD detection level 91 * @{ 92 */ 93 #define PWR_PVDLEVEL_1 (0x00000000U) /*!< Programmable voltage detector level 1 selection : 1V95 */ 94 #define PWR_PVDLEVEL_2 PWR_CR1_PLS_0 /*!< Programmable voltage detector level 2 selection : 2V1 */ 95 #define PWR_PVDLEVEL_3 PWR_CR1_PLS_1 /*!< Programmable voltage detector level 3 selection : 2V25 */ 96 #define PWR_PVDLEVEL_4 (PWR_CR1_PLS_1 | PWR_CR1_PLS_0) /*!< Programmable voltage detector level 4 selection : 2V4 */ 97 #define PWR_PVDLEVEL_5 PWR_CR1_PLS_2 /*!< Programmable voltage detector level 5 selection : 2V55 */ 98 #define PWR_PVDLEVEL_6 (PWR_CR1_PLS_2 | PWR_CR1_PLS_0) /*!< Programmable voltage detector level 6 selection : 2V7 */ 99 #define PWR_PVDLEVEL_7 (PWR_CR1_PLS_2 | PWR_CR1_PLS_1) /*!< Programmable voltage detector level 7 selection : 2V85 */ 100 #define PWR_PVDLEVEL_EXT_VOL (PWR_CR1_PLS_2 | PWR_CR1_PLS_1 | PWR_CR1_PLS_0) /*!< External input analog voltage (Compare internally to VREF) */ 101 /** 102 * @} 103 */ 104 105 /** @defgroup PWR_PVD_Mode PWR PVD Mode 106 * @{ 107 */ 108 #define PWR_PVD_MODE_NORMAL (0x00000000U) /*!< Basic mode is used */ 109 #define PWR_PVD_MODE_IT_RISING (0x00010001U) /*!< Interrupt Mode with Rising edge trigger detection */ 110 #define PWR_PVD_MODE_IT_FALLING (0x00010002U) /*!< Interrupt Mode with Falling edge trigger detection */ 111 #define PWR_PVD_MODE_IT_RISING_FALLING (0x00010003U) /*!< Interrupt Mode with Rising/Falling edge trigger detection */ 112 #define PWR_PVD_MODE_EVENT_RISING (0x00020001U) /*!< Event Mode with Rising edge trigger detection */ 113 #define PWR_PVD_MODE_EVENT_FALLING (0x00020002U) /*!< Event Mode with Falling edge trigger detection */ 114 #define PWR_PVD_MODE_EVENT_RISING_FALLING (0x00020003U) /*!< Event Mode with Rising/Falling edge trigger detection */ 115 /** 116 * @} 117 */ 118 119 /** @defgroup PWR_Regulator_state_in_LP_mode PWR Regulator state in SLEEP/STOP mode 120 * @{ 121 */ 122 /* define for interface compatibility purpose */ 123 #define PWR_MAINREGULATOR_ON (0x0U) 124 125 /** 126 * @} 127 */ 128 129 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 130 * @{ 131 */ 132 #define PWR_SLEEPENTRY_WFI (0x01U) 133 #define PWR_SLEEPENTRY_WFE (0x02U) 134 #define PWR_SLEEPENTRY_WFE_NO_EVT_CLEAR (0x03U) 135 /** 136 * @} 137 */ 138 139 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 140 * @{ 141 */ 142 #define PWR_STOPENTRY_WFI (0x01U) 143 #define PWR_STOPENTRY_WFE (0x02U) 144 #define PWR_STOPENTRY_WFE_NO_EVT_CLEAR (0x03U) 145 /** 146 * @} 147 */ 148 149 /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale 150 * @{ 151 */ 152 #define PWR_REGULATOR_VOLTAGE_SCALE0 PWR_CSR4_VOS /*!< Voltage scaling range 0 (highest frequency) */ 153 #define PWR_REGULATOR_VOLTAGE_SCALE1 (0U) /*!< Voltage scaling range 1 (lowest power) */ 154 155 /** 156 * @} 157 */ 158 159 /** @defgroup PWR_Flag PWR Status Flags 160 * Elements values convention: 0000 0XXX XXXY YYYYb 161 * - Y YYYY : Flag position in the XXX register (5 bits) 162 * - XXX XXX : Status register (6 bits) 163 * - 000001: SR1 register 164 * - 000010: CSR1 register 165 * - 000100: CSR2 register 166 * - 001000: CSR3 register 167 * - 010000: CSR4 register 168 * - 100000: WKUPCR register 169 * The only exception is PWR_FLAG_WU, encompassing all 170 * wake-up flags and set to PWR_SR1_WUF. 171 * @{ 172 */ 173 /* SR1 */ 174 #define PWR_FLAG_AVDO (0x002DU) /*!< Analog voltage detector output on VDDA */ 175 #define PWR_FLAG_PVDO (0x0024U) /*!< Programmable voltage detect output */ 176 #define PWR_FLAG_ACTVOSRDY (0x0021U) /*!< Voltage levels ready bit for currently used ACTVOS and SDHILEVEL */ 177 #define PWR_FLAG_ACTVOS (0x0020U) /*!< Programmable voltage detect output */ 178 179 /* CSR1 */ 180 #define PWR_FLAG_TEMPH (0x0057U) /*!< Temperature level monitoring versus high threshold */ 181 #define PWR_FLAG_TEMPL (0x0056U) /*!< Temperature level monitoring versus low threshold */ 182 #define PWR_FLAG_VBATH (0x0055U) /*!< VBAT level monitoring versus high threshold */ 183 #define PWR_FLAG_VBATL (0x0054U) /*!< VBAT level monitoring versus low threshold */ 184 #define PWR_FLAG_BRRDY (0x0050U) /*!< Backup regulator ready */ 185 186 /* CSR2 */ 187 #define PWR_FLAG_USB33RDY (0x009AU) /*!< USB supply ready */ 188 #define PWR_FLAG_SDEXTRDY (0x0090U) /*!< SMPS step-down converter external supply ready */ 189 190 /* CSR3 */ 191 #define PWR_FLAG_SBF (0x0109U) /*!< System Standby flag */ 192 #define PWR_FLAG_STOPF (0x0108U) /*!< System Stop flag */ 193 194 /* CSR4 */ 195 #define PWR_FLAG_VOSRDY (0x0201U) /*!< VOS Ready bit for VCORE voltage scaling output selection */ 196 197 /* WKUPCR & WKUPFR */ 198 #define PWR_FLAG_WUF1 (0x0400U) /*!< Wakeup event on wakeup pin 1 */ 199 #define PWR_FLAG_WUF2 (0x0401U) /*!< Wakeup event on wakeup pin 2 */ 200 #define PWR_FLAG_WUF3 (0x0402U) /*!< Wakeup event on wakeup pin 3 */ 201 #define PWR_FLAG_WUF4 (0x0403U) /*!< Wakeup event on wakeup pin 4 */ 202 #define PWR_FLAG_WUF_ALL (0x0404U) /*!< Wakeup flag all */ 203 /** 204 * @} 205 */ 206 207 /** @defgroup PWR_ENABLE_WUP_Mask PWR Enable WUP Mask 208 * @{ 209 */ 210 #define PWR_EWUP_MASK (0x00FF0F0FU) 211 /** 212 * @} 213 */ 214 215 /** @defgroup PWR_Flag_WUP PWR Flag WakeUp 216 * @{ 217 */ 218 #define PWR_FLAG_WKUP1 PWR_WKUPCR_WKUPC1 219 #define PWR_FLAG_WKUP2 PWR_WKUPCR_WKUPC2 220 #define PWR_FLAG_WKUP3 PWR_WKUPCR_WKUPC3 221 #define PWR_FLAG_WKUP4 PWR_WKUPCR_WKUPC4 222 #define PWR_FLAG_WKUP PWR_WKUPCR_WKUPC 223 /** 224 * @} 225 */ 226 227 /** 228 * @} 229 */ 230 /* Exported macro ------------------------------------------------------------*/ 231 /** @defgroup PWR_Exported_Macro PWR Exported Macro 232 * @{ 233 */ 234 235 /** @brief Check whether or not a specific PWR flag is set. 236 * @param __FLAG__ specifies the flag to check. 237 * This parameter can be one of the following values: 238 * @arg PWR_FLAG_ACTVOS: This flag indicates that the regulator voltage 239 * scaling output selection is ready. 240 * @arg PWR_FLAG_ACTVOSRDY: This flag indicates that the regulator voltage 241 * scaling output selection is ready. 242 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD 243 * is enabled by the HAL_PWR_EnablePVD()function. 244 * The PVD is stopped by STANDBY mode. For this reason, 245 * this bit is equal to 0 after STANDBY or reset until the 246 * PVDE bit is set. 247 * @arg PWR_FLAG_AVDO: AVD Output. This flag is valid only if AVD is enabled 248 * by the HAL_PWREx_EnableAVD() function. The AVD is stopped by Standby mode. 249 * For this reason, this bit is equal to 0 after Standby or reset 250 * until the AVDE bit is set. 251 * @arg PWR_FLAG_BRRDY : Backup regulator ready flag. This bit is not reset 252 * when the device wakes up from Standby mode or by a system reset 253 * or power reset. 254 * @arg PWR_FLAG_VBATL: This flag indicates if the VBAT level is above 255 * the low monitoring threshold. 256 * @arg PWR_FLAG_VBATH: This flag indicates if the VBAT level is above 257 * the high monitoring threshold. 258 * @arg PWR_FLAG_TEMPL This flag indicates if the temperature level is above 259 * the low monitoring threshold. 260 * @arg PWR_FLAG_TEMPH: This flag indicates if the temperature level is above 261 * the high monitoring threshold. 262 * @arg PWR_FLAG_SDEXTRDY: This flag indicates if the external supply 263 * from the SMPS step-down converter is ready. 264 * @arg PWR_FLAG_USB33RDY: This flag indicates if the USB supply is ready. 265 * @arg PWR_FLAG_STOPF: STOP mode flag 266 * @arg PWR_FLAG_SBF: Standby mode flag 267 * @arg PWR_FLAG_VOSRDY When an internal regulator is used, this bit indicates 268 * that all the features allowed by the selected VOS can be used. 269 * @arg PWR_FLAG_WUF1: This flag indicates a wakeup event was 270 * received from WKUP1 pin. 271 * @arg PWR_FLAG_WUF2: This flag indicates a wakeup event was 272 * received from WKUP2 pin. 273 * @arg PWR_FLAG_WUF3: This flag indicates a wakeup event was 274 * received from WKUP3 pin. 275 * @arg PWR_FLAG_WUF4: This flag indicates a wakeup event was 276 * received from WKUP4 pin. 277 * @retval The (__FLAG__) state (TRUE or FALSE). 278 */ 279 #define __HAL_PWR_GET_FLAG(__FLAG__) ( \ 280 ((__FLAG__) == PWR_FLAG_ACTVOS) ? ((PWR->SR1 & PWR_SR1_ACTVOS) == PWR_SR1_ACTVOS) : \ 281 ((__FLAG__) == PWR_FLAG_ACTVOSRDY)? ((PWR->SR1 & PWR_SR1_ACTVOSRDY) == PWR_SR1_ACTVOSRDY) : \ 282 ((__FLAG__) == PWR_FLAG_PVDO) ? ((PWR->SR1 & PWR_SR1_PVDO) == PWR_SR1_PVDO) : \ 283 ((__FLAG__) == PWR_FLAG_AVDO) ? ((PWR->SR1 & PWR_SR1_AVDO) == PWR_SR1_AVDO) : \ 284 ((__FLAG__) == PWR_FLAG_BRRDY) ? ((PWR->CSR1 & PWR_CSR1_BRRDY) == PWR_CSR1_BRRDY) : \ 285 ((__FLAG__) == PWR_FLAG_VBATL) ? ((PWR->CSR1 & PWR_CSR1_VBATL) == PWR_CSR1_VBATL) : \ 286 ((__FLAG__) == PWR_FLAG_VBATH) ? ((PWR->CSR1 & PWR_CSR1_VBATH) == PWR_CSR1_VBATH) : \ 287 ((__FLAG__) == PWR_FLAG_TEMPL) ? ((PWR->CSR1 & PWR_CSR1_TEMPL) == PWR_CSR1_TEMPL) : \ 288 ((__FLAG__) == PWR_FLAG_TEMPH) ? ((PWR->CSR1 & PWR_CSR1_TEMPH) == PWR_CSR1_TEMPH) : \ 289 ((__FLAG__) == PWR_FLAG_SDEXTRDY) ? ((PWR->CSR2 & PWR_CSR2_SDEXTRDY) == PWR_CSR2_SDEXTRDY) : \ 290 ((__FLAG__) == PWR_FLAG_USB33RDY) ? ((PWR->CSR2 & PWR_CSR2_USB33RDY) == PWR_CSR2_USB33RDY) : \ 291 ((__FLAG__) == PWR_FLAG_STOPF) ? ((PWR->CSR3 & PWR_CSR3_STOPF) == PWR_CSR3_STOPF) : \ 292 ((__FLAG__) == PWR_FLAG_SBF) ? ((PWR->CSR3 & PWR_CSR3_SBF) == PWR_CSR3_SBF) : \ 293 ((__FLAG__) == PWR_FLAG_VOSRDY) ? ((PWR->CSR4 & PWR_CSR4_VOSRDY) == PWR_CSR4_VOSRDY) : \ 294 ((__FLAG__) == PWR_FLAG_WUF1) ? ((PWR->WKUPFR & PWR_WKUPFR_WKUPF1) == PWR_WKUPFR_WKUPF1) : \ 295 ((__FLAG__) == PWR_FLAG_WUF2) ? ((PWR->WKUPFR & PWR_WKUPFR_WKUPF2) == PWR_WKUPFR_WKUPF2) : \ 296 ((__FLAG__) == PWR_FLAG_WUF3) ? ((PWR->WKUPFR & PWR_WKUPFR_WKUPF3) == PWR_WKUPFR_WKUPF3) : \ 297 ((PWR->WKUPFR & PWR_WKUPFR_WKUPF4) == PWR_WKUPFR_WKUPF4)) 298 299 /** @brief Clear PWR flags. 300 * @param __FLAG__: specifies the flag to clear. 301 * This parameter can be one of the following values: 302 * @arg PWR_FLAG_STOPF : Stop flag. 303 * Indicates that the device was resumed from Stop mode. 304 * @arg PWR_FLAG_SBF : Standby flag. 305 * Indicates that the device was resumed from Standby mode. 306 * @arg PWR_FLAG_WUF1 : Wakeup flag 1. 307 * Indicates that a wakeup event was received from the WKUP line 1. 308 * @arg PWR_FLAG_WUF2 : Wakeup flag 2. 309 * Indicates that a wakeup event was received from the WKUP line 2. 310 * @arg PWR_FLAG_WUF3 : Wakeup flag 3. 311 * Indicates that a wakeup event was received from the WKUP line 3. 312 * @arg PWR_FLAG_WUF4 : Wakeup flag 4. 313 * Indicates that a wakeup event was received from the WKUP line 4. 314 * @arg PWR_FLAG_WUF_ALL: All Wakeup flags. 315 * @retval None. 316 */ 317 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) ( \ 318 ((__FLAG__) == PWR_FLAG_STOPF) ? (SET_BIT(PWR->CSR3, PWR_CSR3_CSSF)) : \ 319 ((__FLAG__) == PWR_FLAG_SBF) ? (SET_BIT(PWR->CSR3, PWR_CSR3_CSSF)) : \ 320 ((__FLAG__) == PWR_FLAG_WUF1) ? (SET_BIT(PWR->WKUPCR, PWR_WKUPCR_WKUPC1)) : \ 321 ((__FLAG__) == PWR_FLAG_WUF2) ? (SET_BIT(PWR->WKUPCR, PWR_WKUPCR_WKUPC2)) : \ 322 ((__FLAG__) == PWR_FLAG_WUF3) ? (SET_BIT(PWR->WKUPCR, PWR_WKUPCR_WKUPC3)) : \ 323 ((__FLAG__) == PWR_FLAG_WUF4) ? (SET_BIT(PWR->WKUPCR, PWR_WKUPCR_WKUPC4)) : \ 324 (SET_BIT(PWR->WKUPCR, PWR_WKUPCR_WKUPC))) 325 326 /** @brief Check PWR wake up flags are set or not. 327 * @param __FLAG__: specifies the wake up flag to check. 328 * This parameter can be one of the following values: 329 * @arg PWR_FLAG_WKUP1 : This parameter gets Wake up line 1 flag. 330 * @arg PWR_FLAG_WKUP2 : This parameter gets Wake up line 2 flag. 331 * @arg PWR_FLAG_WKUP3 : This parameter gets Wake up line 3 flag. 332 * @arg PWR_FLAG_WKUP4 : This parameter gets Wake up line 4 flag. 333 * @arg PWR_FLAG_WKUP : This parameter gets Wake up lines 1 to 4 flags. 334 * @retval The (__FLAG__) state (TRUE or FALSE). 335 */ 336 #define __HAL_PWR_GET_WAKEUPFLAG(__FLAG__) ((PWR->WKUPFR & (__FLAG__)) ? 0 : 1) 337 338 /** @brief Clear CPU PWR wake up flags. 339 * @param __FLAG__ : Specifies the wake up flag to be cleared. 340 * This parameter can be one of the following values : 341 * @arg PWR_FLAG_WKUP1 : This parameter clears Wake up line 1 flag. 342 * @arg PWR_FLAG_WKUP2 : This parameter clears Wake up line 2 flag. 343 * @arg PWR_FLAG_WKUP3 : This parameter clears Wake up line 3 flag. 344 * @arg PWR_FLAG_WKUP4 : This parameter clears Wake up line 4 flag. 345 * @arg PWR_FLAG_WKUP : This parameter clears Wake up lines 1 to 4 flags. 346 * @retval None. 347 */ 348 #define __HAL_PWR_CLEAR_WAKEUPFLAG(__FLAG__) SET_BIT(PWR->WKUPCR, (__FLAG__)) 349 350 /** 351 * @brief Enable the PVD Extended Interrupt Line. 352 * @retval None. 353 */ 354 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) 355 356 /** 357 * @brief Disable the PVD Extended Interrupt Line. 358 * @retval None. 359 */ 360 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) 361 362 /** 363 * @brief Enable the PVD Event Line. 364 * @retval None. 365 */ 366 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EXTI_LINE_PVD) 367 368 /** 369 * @brief Disable the PVD Event Line. 370 * @retval None. 371 */ 372 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EXTI_LINE_PVD) 373 374 /** 375 * @brief Enable the PVD Extended Interrupt Rising Trigger. 376 * @retval None. 377 */ 378 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) 379 380 /** 381 * @brief Disable the PVD Extended Interrupt Rising Trigger. 382 * @retval None. 383 */ 384 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) 385 386 /** 387 * @brief Enable the PVD Extended Interrupt Falling Trigger. 388 * @retval None. 389 */ 390 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) 391 392 /** 393 * @brief Disable the PVD Extended Interrupt Falling Trigger. 394 * @retval None. 395 */ 396 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) 397 398 /** 399 * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger. 400 * @retval None. 401 */ 402 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ 403 do \ 404 { \ 405 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \ 406 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \ 407 } while(0); 408 409 /** 410 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 411 * @retval None. 412 */ 413 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ 414 do \ 415 { \ 416 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \ 417 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \ 418 } while(0); 419 420 /** 421 * @brief Check whether the specified PVD EXTI interrupt flag is set or not. 422 * @retval EXTI PVD Line Status. 423 */ 424 #define __HAL_PWR_PVD_EXTI_GET_FLAG() ((READ_BIT(EXTI->PR1, PWR_EXTI_LINE_PVD) == PWR_EXTI_LINE_PVD) ? 1UL : 0UL) 425 426 /** 427 * @brief Clear the PVD EXTI flag. 428 * @retval None. 429 */ 430 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR1, PWR_EXTI_LINE_PVD) 431 432 /** 433 * @brief Generates a Software interrupt on PVD EXTI line. 434 * @retval None. 435 */ 436 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_PVD) 437 /** 438 * @} 439 */ 440 441 /* Include PWR HAL Extension module */ 442 #include "stm32h7rsxx_hal_pwr_ex.h" 443 444 /* Exported functions --------------------------------------------------------*/ 445 /** @addtogroup PWR_Exported_Functions PWR Exported Functions 446 * @{ 447 */ 448 449 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and De-Initialization Functions 450 * @{ 451 */ 452 /* Initialization and de-initialization functions *****************************/ 453 void HAL_PWR_DeInit(void); 454 void HAL_PWR_EnableBkUpAccess(void); 455 void HAL_PWR_DisableBkUpAccess(void); 456 /** 457 * @} 458 */ 459 460 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control Functions 461 * @{ 462 */ 463 /* Peripheral Control Functions **********************************************/ 464 /* PVD configuration */ 465 void HAL_PWR_ConfigPVD(const PWR_PVDTypeDef *sConfigPVD); 466 void HAL_PWR_EnablePVD(void); 467 void HAL_PWR_DisablePVD(void); 468 469 /* WakeUp pins configuration */ 470 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity); 471 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 472 473 /* Low Power modes entry */ 474 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 475 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 476 void HAL_PWR_EnterSTANDBYMode(void); 477 478 /* Cortex System Control functions *******************************************/ 479 void HAL_PWR_EnableSleepOnExit(void); 480 void HAL_PWR_DisableSleepOnExit(void); 481 void HAL_PWR_EnableSEVOnPend(void); 482 void HAL_PWR_DisableSEVOnPend(void); 483 /** 484 * @} 485 */ 486 487 /** 488 * @} 489 */ 490 491 /* Private types -------------------------------------------------------------*/ 492 /* Private variables ---------------------------------------------------------*/ 493 /* Private constants ---------------------------------------------------------*/ 494 /** @defgroup PWR_Private_Constants PWR Private Constants 495 * @{ 496 */ 497 498 /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line 499 * @{ 500 */ 501 #define PWR_EXTI_LINE_PVD EXTI_IMR1_IM16 /*!< External interrupt line 16 connected to the PVD EXTI Line */ 502 /** 503 * @} 504 */ 505 506 /** 507 * @} 508 */ 509 /* Private macros ------------------------------------------------------------*/ 510 /** @defgroup PWR_Private_Macros PWR Private Macros 511 * @{ 512 */ 513 514 /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters 515 * @{ 516 */ 517 /* Check PVD level parameter */ 518 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_1) ||\ 519 ((LEVEL) == PWR_PVDLEVEL_2) ||\ 520 ((LEVEL) == PWR_PVDLEVEL_3) ||\ 521 ((LEVEL) == PWR_PVDLEVEL_4) ||\ 522 ((LEVEL) == PWR_PVDLEVEL_5) ||\ 523 ((LEVEL) == PWR_PVDLEVEL_6) ||\ 524 ((LEVEL) == PWR_PVDLEVEL_7) ||\ 525 ((LEVEL) == PWR_PVDLEVEL_EXT_VOL)) 526 527 /* Check PVD mode parameter */ 528 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING) ||\ 529 ((MODE) == PWR_PVD_MODE_IT_FALLING) ||\ 530 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) ||\ 531 ((MODE) == PWR_PVD_MODE_EVENT_RISING) ||\ 532 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) ||\ 533 ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) ||\ 534 ((MODE) == PWR_PVD_MODE_NORMAL)) 535 536 /* Check low power regulator parameter */ 537 #define IS_PWR_REGULATOR(REGULATOR) ((REGULATOR) == PWR_MAINREGULATOR_ON) 538 539 /* Check low power mode entry parameter */ 540 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) ||\ 541 ((ENTRY) == PWR_SLEEPENTRY_WFE) ||\ 542 ((ENTRY) == PWR_SLEEPENTRY_WFE_NO_EVT_CLEAR)) 543 544 /* Check low power mode entry parameter */ 545 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) ||\ 546 ((ENTRY) == PWR_STOPENTRY_WFE) ||\ 547 ((ENTRY) == PWR_STOPENTRY_WFE_NO_EVT_CLEAR)) 548 549 /* Check voltage scale level parameter */ 550 #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE0) || \ 551 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1)) 552 553 554 /* Check wake up pin parameter */ 555 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) ||\ 556 ((PIN) == PWR_WAKEUP_PIN2) ||\ 557 ((PIN) == PWR_WAKEUP_PIN3) ||\ 558 ((PIN) == PWR_WAKEUP_PIN4) ||\ 559 ((PIN) == PWR_WAKEUP_PIN1_HIGH) ||\ 560 ((PIN) == PWR_WAKEUP_PIN2_HIGH) ||\ 561 ((PIN) == PWR_WAKEUP_PIN3_HIGH) ||\ 562 ((PIN) == PWR_WAKEUP_PIN4_HIGH) ||\ 563 ((PIN) == PWR_WAKEUP_PIN1_LOW) ||\ 564 ((PIN) == PWR_WAKEUP_PIN2_LOW) ||\ 565 ((PIN) == PWR_WAKEUP_PIN3_LOW) ||\ 566 ((PIN) == PWR_WAKEUP_PIN4_LOW)) 567 568 /** 569 * @} 570 */ 571 572 /** 573 * @} 574 */ 575 576 /** 577 * @} 578 */ 579 580 /** 581 * @} 582 */ 583 584 #ifdef __cplusplus 585 } 586 #endif /* __cplusplus */ 587 588 #endif /* STM32H7RSxx_HAL_PWR_H */ 589