1 /** 2 ****************************************************************************** 3 * @file stm32h7rsxx_hal_lptim.h 4 * @author MCD Application Team 5 * @brief Header file of LPTIM HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H7RSxx_HAL_LPTIM_H 21 #define STM32H7RSxx_HAL_LPTIM_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h7rsxx_hal_def.h" 29 30 /* Include low level driver */ 31 #include "stm32h7rsxx_ll_lptim.h" 32 33 /** @addtogroup STM32H7RSxx_HAL_Driver 34 * @{ 35 */ 36 37 #if defined (LPTIM1) || defined (LPTIM2) || defined (LPTIM3) || defined (LPTIM4) || defined (LPTIM5) 38 39 /** @addtogroup LPTIM 40 * @{ 41 */ 42 43 /* Exported types ------------------------------------------------------------*/ 44 /** @defgroup LPTIM_Exported_Types LPTIM Exported Types 45 * @{ 46 */ 47 #define LPTIM_EXTI_LINE_LPTIM1 EXTI_IMR2_IM47 /*!< External interrupt line 47 Connected to the LPTIM1 EXTI Line */ 48 #define LPTIM_EXTI_LINE_LPTIM2 EXTI_IMR2_IM48 /*!< External interrupt line 48 Connected to the LPTIM2 EXTI Line */ 49 #define LPTIM_EXTI_LINE_LPTIM3 EXTI_IMR2_IM50 /*!< External interrupt line 50 Connected to the LPTIM3 EXTI Line */ 50 #define LPTIM_EXTI_LINE_LPTIM4 EXTI_IMR2_IM52 /*!< External interrupt line 52 Connected to the LPTIM4 EXTI Line */ 51 #define LPTIM_EXTI_LINE_LPTIM5 EXTI_IMR2_IM53 /*!< External interrupt line 53 Connected to the LPTIM5 EXTI Line */ 52 53 /** 54 * @brief LPTIM Clock configuration definition 55 */ 56 typedef struct 57 { 58 uint32_t Source; /*!< Selects the clock source. 59 This parameter can be a value of @ref LPTIM_Clock_Source */ 60 61 uint32_t Prescaler; /*!< Specifies the counter clock Prescaler. 62 This parameter can be a value of @ref LPTIM_Clock_Prescaler */ 63 64 } LPTIM_ClockConfigTypeDef; 65 66 /** 67 * @brief LPTIM Clock configuration definition 68 */ 69 typedef struct 70 { 71 uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit 72 if the ULPTIM input is selected. 73 Note: This parameter is used only when Ultra low power clock source is used. 74 Note: If the polarity is configured on 'both edges', an auxiliary clock 75 (one of the Low power oscillator) must be active. 76 This parameter can be a value of @ref LPTIM_Clock_Polarity */ 77 78 uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter. 79 Note: This parameter is used only when Ultra low power clock source is used. 80 This parameter can be a value of @ref LPTIM_Clock_Sample_Time */ 81 82 } LPTIM_ULPClockConfigTypeDef; 83 84 /** 85 * @brief LPTIM Trigger configuration definition 86 */ 87 typedef struct 88 { 89 uint32_t Source; /*!< Selects the Trigger source. 90 This parameter can be a value of @ref LPTIM_Trigger_Source */ 91 92 uint32_t ActiveEdge; /*!< Selects the Trigger active edge. 93 Note: This parameter is used only when an external trigger is used. 94 This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */ 95 96 uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter. 97 Note: This parameter is used only when an external trigger is used. 98 This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */ 99 } LPTIM_TriggerConfigTypeDef; 100 101 /** 102 * @brief LPTIM Initialization Structure definition 103 */ 104 typedef struct 105 { 106 LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */ 107 108 LPTIM_ULPClockConfigTypeDef UltraLowPowerClock;/*!< Specifies the Ultra Low Power clock parameters */ 109 110 LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */ 111 112 uint32_t Period; /*!< Specifies the period value to be loaded into the active 113 Auto-Reload Register at the next update event. 114 This parameter can be a number between 115 Min_Data = 0x0001 and Max_Data = 0xFFFF. */ 116 117 uint32_t UpdateMode; /*!< Specifies whether the update of the autoreload and the compare 118 values is done immediately or after the end of current period. 119 This parameter can be a value of @ref LPTIM_Updating_Mode */ 120 121 uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event 122 or each external event. 123 This parameter can be a value of @ref LPTIM_Counter_Source */ 124 125 uint32_t Input1Source; /*!< Specifies source selected for input1 (GPIO or comparator output). 126 This parameter can be a value of @ref LPTIM_Input1_Source */ 127 128 uint32_t Input2Source; /*!< Specifies source selected for input2 (GPIO or comparator output). 129 Note: This parameter is used only for encoder feature so is used only 130 for LPTIM1 instance. 131 This parameter can be a value of @ref LPTIM_Input2_Source */ 132 133 uint32_t RepetitionCounter;/*!< Specifies the repetition counter value. 134 Each time the RCR downcounter reaches zero, an update event is 135 generated and counting restarts from the RCR value (N). 136 Note: When using repetition counter the UpdateMode field must be 137 set to LPTIM_UPDATE_ENDOFPERIOD otherwise unpredictable 138 behavior may occur. 139 This parameter must be a number between Min_Data = 0x00 and 140 Max_Data = 0xFF. */ 141 } LPTIM_InitTypeDef; 142 143 /** 144 * @brief LPTIM Output Compare Configuration Structure definition 145 */ 146 typedef struct 147 { 148 uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 149 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 150 uint32_t OCPolarity; /*!< Specifies the output polarity. 151 This parameter can be a value of @ref LPTIM_Output_Compare_Polarity */ 152 } LPTIM_OC_ConfigTypeDef; 153 154 /** 155 * @brief LPTIM Input Capture Configuration Structure definition 156 */ 157 typedef struct 158 { 159 uint32_t ICInputSource; /*!< Specifies source selected for IC channel. 160 This parameter can be a value of @ref LPTIM_Input_Capture_Source */ 161 162 uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler. 163 This parameter can be a value of @ref LPTIM_Input_Capture_Prescaler */ 164 165 uint32_t ICPolarity; /*!< Specifies the active edge of the input signal. 166 This parameter can be a value of @ref LPTIM_Input_Capture_Polarity */ 167 168 uint32_t ICFilter; /*!< Specifies the input capture filter. 169 This parameter can be a value of @ref LPTIM_Input_Capture_Filter */ 170 } LPTIM_IC_ConfigTypeDef; 171 172 /** 173 * @brief HAL LPTIM State structure definition 174 */ 175 typedef enum 176 { 177 HAL_LPTIM_STATE_RESET = 0x00U, /*!< Peripheral not yet initialized or disabled */ 178 HAL_LPTIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 179 HAL_LPTIM_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */ 180 HAL_LPTIM_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ 181 HAL_LPTIM_STATE_ERROR = 0x04U /*!< Internal Process is ongoing */ 182 } HAL_LPTIM_StateTypeDef; 183 184 /** 185 * @brief HAL Active channel structures definition 186 */ 187 typedef enum 188 { 189 HAL_LPTIM_ACTIVE_CHANNEL_1 = 0x01U, /*!< The active channel is 1 */ 190 HAL_LPTIM_ACTIVE_CHANNEL_2 = 0x02U, /*!< The active channel is 2 */ 191 HAL_LPTIM_ACTIVE_CHANNEL_CLEARED = 0x00U /*!< All active channels cleared */ 192 } HAL_LPTIM_ActiveChannel; 193 194 /** 195 * @brief LPTIM Channel States definition 196 */ 197 typedef enum 198 { 199 HAL_LPTIM_CHANNEL_STATE_RESET = 0x00U, /*!< LPTIM Channel initial state */ 200 HAL_LPTIM_CHANNEL_STATE_READY = 0x01U, /*!< LPTIM Channel ready for use */ 201 HAL_LPTIM_CHANNEL_STATE_BUSY = 0x02U, /*!< An internal process is ongoing on the LPTIM channel */ 202 } HAL_LPTIM_ChannelStateTypeDef; 203 204 /** 205 * @brief LPTIM handle Structure definition 206 */ 207 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 208 typedef struct __LPTIM_HandleTypeDef 209 #else 210 typedef struct 211 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 212 { 213 LPTIM_TypeDef *Instance; /*!< Register base address */ 214 215 LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */ 216 217 HAL_LPTIM_ActiveChannel Channel; /*!< Active channel */ 218 219 DMA_HandleTypeDef *hdma[3]; /*!< DMA Handlers array, This array is accessed by a @ref LPTIM_DMA_Handle_index */ 220 221 HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */ 222 223 HAL_LockTypeDef Lock; /*!< LPTIM locking object */ 224 225 __IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */ 226 227 __IO HAL_LPTIM_ChannelStateTypeDef ChannelState[2]; /*!< LPTIM channel operation state */ 228 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 229 void (* MspInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp Init Callback */ 230 void (* MspDeInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp DeInit Callback */ 231 void (* CompareMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare match Callback */ 232 void (* AutoReloadMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload match Callback */ 233 void (* TriggerCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< External trigger event detection Callback */ 234 void (* CompareWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare register write complete Callback */ 235 void (* AutoReloadWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload register write complete Callback */ 236 void (* DirectionUpCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Up-counting direction change Callback */ 237 void (* DirectionDownCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Down-counting direction change Callback */ 238 void (* UpdateEventCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Update event detection Callback */ 239 void (* RepCounterWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Repetition counter register write complete Callback */ 240 void (* UpdateEventHalfCpltCallback)(struct __LPTIM_HandleTypeDef *hlptim);/*!< Update event half complete detection Callback */ 241 void (* ErrorCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Error Callback */ 242 void (* IC_CaptureCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Input capture Callback */ 243 void (* IC_CaptureHalfCpltCallback)(struct __LPTIM_HandleTypeDef *htim); /*!< Input Capture half complete Callback */ 244 void (* IC_OverCaptureCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Over capture Callback */ 245 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 246 } LPTIM_HandleTypeDef; 247 248 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 249 /** 250 * @brief HAL LPTIM Callback ID enumeration definition 251 */ 252 typedef enum 253 { 254 HAL_LPTIM_MSPINIT_CB_ID = 0x00U, /*!< LPTIM Base Msp Init Callback ID */ 255 HAL_LPTIM_MSPDEINIT_CB_ID = 0x01U, /*!< LPTIM Base Msp DeInit Callback ID */ 256 HAL_LPTIM_COMPARE_MATCH_CB_ID = 0x02U, /*!< Compare match Callback ID */ 257 HAL_LPTIM_AUTORELOAD_MATCH_CB_ID = 0x03U, /*!< Auto-reload match Callback ID */ 258 HAL_LPTIM_TRIGGER_CB_ID = 0x04U, /*!< External trigger event detection Callback ID */ 259 HAL_LPTIM_COMPARE_WRITE_CB_ID = 0x05U, /*!< Compare register write complete Callback ID */ 260 HAL_LPTIM_AUTORELOAD_WRITE_CB_ID = 0x06U, /*!< Auto-reload register write complete Callback ID */ 261 HAL_LPTIM_DIRECTION_UP_CB_ID = 0x07U, /*!< Up-counting direction change Callback ID */ 262 HAL_LPTIM_DIRECTION_DOWN_CB_ID = 0x08U, /*!< Down-counting direction change Callback ID */ 263 HAL_LPTIM_UPDATE_EVENT_CB_ID = 0x09U, /*!< Update event detection Callback ID */ 264 HAL_LPTIM_REP_COUNTER_WRITE_CB_ID = 0x0AU, /*!< Repetition counter register write complete Callback ID */ 265 HAL_LPTIM_UPDATE_EVENT_HALF_CB_ID = 0x0BU, /*!< Update event half complete detection Callback ID */ 266 HAL_LPTIM_ERROR_CB_ID = 0x0CU, /*!< LPTIM Error Callback ID */ 267 HAL_LPTIM_IC_CAPTURE_CB_ID = 0x0DU, /*!< Input capture Callback ID */ 268 HAL_LPTIM_IC_CAPTURE_HALF_CB_ID = 0x0EU, /*!< Input capture half complete Callback ID */ 269 HAL_LPTIM_OVER_CAPTURE_CB_ID = 0x0FU, /*!< Over capture Callback ID */ 270 } HAL_LPTIM_CallbackIDTypeDef; 271 272 /** 273 * @brief HAL TIM Callback pointer definition 274 */ 275 typedef void (*pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef *hlptim); /*!< pointer to the LPTIM callback function */ 276 277 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 278 /** 279 * @} 280 */ 281 282 /* Exported constants --------------------------------------------------------*/ 283 /** @defgroup LPTIM_Exported_Constants LPTIM Exported Constants 284 * @{ 285 */ 286 287 /** @defgroup LPTIM_Clock_Source LPTIM Clock Source 288 * @{ 289 */ 290 #define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC 0x00000000U 291 #define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL 292 /** 293 * @} 294 */ 295 296 /** @defgroup LPTIM_Clock_Prescaler LPTIM Clock Prescaler 297 * @{ 298 */ 299 #define LPTIM_PRESCALER_DIV1 0x00000000U 300 #define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 301 #define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 302 #define LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1) 303 #define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 304 #define LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2) 305 #define LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2) 306 #define LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC 307 /** 308 * @} 309 */ 310 311 /** @defgroup LPTIM_Clock_Sample_Time LPTIM Clock Sample Time 312 * @{ 313 */ 314 #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION 0x00000000U 315 #define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0 316 #define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1 317 #define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT 318 /** 319 * @} 320 */ 321 322 /** @defgroup LPTIM_Clock_Polarity LPTIM Clock Polarity 323 * @{ 324 */ 325 #define LPTIM_CLOCKPOLARITY_RISING 0x00000000U 326 #define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0 327 #define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 328 /** 329 * @} 330 */ 331 332 /** @defgroup LPTIM_Trigger_Source LPTIM Trigger Source 333 * @{ 334 */ 335 #define LPTIM_TRIGSOURCE_SOFTWARE 0x0000FFFFU 336 #define LPTIM_TRIGSOURCE_0 0x00000000U 337 #define LPTIM_TRIGSOURCE_1 LPTIM_CFGR_TRIGSEL_0 338 #define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1 339 #define LPTIM_TRIGSOURCE_3 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1) 340 #define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2 341 #define LPTIM_TRIGSOURCE_5 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_2) 342 #define LPTIM_TRIGSOURCE_6 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_2) 343 #define LPTIM_TRIGSOURCE_7 LPTIM_CFGR_TRIGSEL 344 /** 345 * @} 346 */ 347 348 /** @defgroup LPTIM_External_Trigger_Polarity LPTIM External Trigger Polarity 349 * @{ 350 */ 351 #define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0 352 #define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1 353 #define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN 354 /** 355 * @} 356 */ 357 358 /** @defgroup LPTIM_Trigger_Sample_Time LPTIM Trigger Sample Time 359 * @{ 360 */ 361 #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION 0x00000000U 362 #define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0 363 #define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1 364 #define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT 365 /** 366 * @} 367 */ 368 369 /** @defgroup LPTIM_Updating_Mode LPTIM Updating Mode 370 * @{ 371 */ 372 373 #define LPTIM_UPDATE_IMMEDIATE 0x00000000U 374 #define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD 375 /** 376 * @} 377 */ 378 379 /** @defgroup LPTIM_Counter_Source LPTIM Counter Source 380 * @{ 381 */ 382 383 #define LPTIM_COUNTERSOURCE_INTERNAL 0x00000000U 384 #define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE 385 /** 386 * @} 387 */ 388 389 /** @defgroup LPTIM_Input1_Source LPTIM Input1 Source 390 * @{ 391 */ 392 393 #define LPTIM_INPUT1SOURCE_GPIO 0x00000000UL /*!< For LPTIM1 and LPTIM2 */ 394 /** 395 * @} 396 */ 397 398 /** @defgroup LPTIM_Input2_Source LPTIM Input2 Source 399 * @{ 400 */ 401 402 #define LPTIM_INPUT2SOURCE_GPIO 0x00000000UL /*!< For LPTIM1 and LPTIM2 */ 403 /** 404 * @} 405 */ 406 407 /** @defgroup LPTIM_Flag_Definition LPTIM Flags Definition 408 * @{ 409 */ 410 411 #define LPTIM_FLAG_CC1O LPTIM_ISR_CC1OF 412 #define LPTIM_FLAG_CC2O LPTIM_ISR_CC2OF 413 #define LPTIM_FLAG_CC1 LPTIM_ISR_CC1IF 414 #define LPTIM_FLAG_CC2 LPTIM_ISR_CC2IF 415 #define LPTIM_FLAG_CMP1OK LPTIM_ISR_CMP1OK 416 #define LPTIM_FLAG_CMP2OK LPTIM_ISR_CMP2OK 417 #define LPTIM_FLAG_DIEROK LPTIM_ISR_DIEROK 418 #define LPTIM_FLAG_REPOK LPTIM_ISR_REPOK 419 #define LPTIM_FLAG_UPDATE LPTIM_ISR_UE 420 #define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN 421 #define LPTIM_FLAG_UP LPTIM_ISR_UP 422 #define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK 423 #define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG 424 #define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM 425 /** 426 * @} 427 */ 428 429 /** @defgroup LPTIM_DMA_sources LPTIM DMA Sources 430 * @{ 431 */ 432 #define LPTIM_DMA_UPDATE LPTIM_DIER_UEDE /*!< DMA request is triggered by the update event */ 433 #define LPTIM_DMA_CC1 LPTIM_DIER_CC1DE /*!< DMA request is triggered by the capture 1 event */ 434 #define LPTIM_DMA_CC2 LPTIM_DIER_CC2DE /*!< DMA request is triggered by the capture 2 event */ 435 436 /** 437 * @} 438 */ 439 440 /** @defgroup LPTIM_DMA_Handle_index LPTIM DMA Handle Index 441 * @{ 442 */ 443 #define LPTIM_DMA_ID_UPDATE ((uint16_t) 0x0000) /*!< Index of the DMA handle used for Update DMA requests */ 444 #define LPTIM_DMA_ID_CC1 ((uint16_t) 0x0001) /*!< Index of the DMA handle used for Capture/Update event 1 DMA request */ 445 #define LPTIM_DMA_ID_CC2 ((uint16_t) 0x0002) /*!< Index of the DMA handle used for Capture/Update event 2 DMA request */ 446 /** 447 * @} 448 */ 449 450 /** @defgroup LPTIM_Interrupts_Definition LPTIM Interrupts Definition 451 * @{ 452 */ 453 #define LPTIM_IT_CC1O LPTIM_DIER_CC1OIE 454 #define LPTIM_IT_CC2O LPTIM_DIER_CC2OIE 455 #define LPTIM_IT_CC1 LPTIM_DIER_CC1IE 456 #define LPTIM_IT_CC2 LPTIM_DIER_CC2IE 457 #define LPTIM_IT_CMP1OK LPTIM_DIER_CMP1OKIE 458 #define LPTIM_IT_CMP2OK LPTIM_DIER_CMP2OKIE 459 #define LPTIM_IT_REPOK LPTIM_DIER_REPOKIE 460 #define LPTIM_IT_UPDATE LPTIM_DIER_UEIE 461 #define LPTIM_IT_DOWN LPTIM_DIER_DOWNIE 462 #define LPTIM_IT_UP LPTIM_DIER_UPIE 463 #define LPTIM_IT_ARROK LPTIM_DIER_ARROKIE 464 #define LPTIM_IT_EXTTRIG LPTIM_DIER_EXTTRIGIE 465 #define LPTIM_IT_ARRM LPTIM_DIER_ARRMIE 466 /** 467 * @} 468 */ 469 470 /** @defgroup LPTIM_Channel LPTIM Channel 471 * @{ 472 */ 473 #define LPTIM_CHANNEL_1 LL_LPTIM_CHANNEL_CH1 /*!< Capture/compare channel 1 identifier */ 474 #define LPTIM_CHANNEL_2 LL_LPTIM_CHANNEL_CH2 /*!< Capture/compare channel 2 identifier */ 475 /** 476 * @} 477 */ 478 479 /** @defgroup LPTIM_Output_Compare_Polarity LPTIM Output Compare Polarity 480 * @{ 481 */ 482 #define LPTIM_OCPOLARITY_HIGH 0x00000000U /*!< Capture/Compare output polarity */ 483 #define LPTIM_OCPOLARITY_LOW 0x00000001U /*!< Capture/Compare output polarity */ 484 /** 485 * @} 486 */ 487 488 /** @defgroup LPTIM_Input_Capture_Prescaler LPTIM Input Capture Prescaler 489 * @{ 490 */ 491 #define LPTIM_ICPSC_DIV1 0x00000000UL /*!< Capture performed each time an edge is detected on the capture input */ 492 #define LPTIM_ICPSC_DIV2 LPTIM_CCMR1_IC1PSC_0 /*!< Capture performed once every 2 events */ 493 #define LPTIM_ICPSC_DIV4 LPTIM_CCMR1_IC1PSC_1 /*!< Capture performed once every 4 events */ 494 #define LPTIM_ICPSC_DIV8 (LPTIM_CCMR1_IC1PSC_0|LPTIM_CCMR1_IC1PSC_1) /*!< Capture performed once every 8 events */ 495 /** 496 * @} 497 */ 498 499 /** @defgroup LPTIM_Input_Capture_Polarity LPTIM Input Capture Polarity 500 * @{ 501 */ 502 #define LPTIM_ICPOLARITY_RISING 0x00000000UL /*!< Capture/Compare input rising polarity */ 503 #define LPTIM_ICPOLARITY_FALLING LPTIM_CCMR1_CC1P_0 /*!< Capture/Compare input falling polarity */ 504 #define LPTIM_ICPOLARITY_RISING_FALLING (LPTIM_CCMR1_CC1P_0|LPTIM_CCMR1_CC1P_1) /*!< Capture/Compare input rising and falling polarities */ 505 /** 506 * @} 507 */ 508 509 /** @defgroup LPTIM_Input_Capture_Filter LPTIM Input Capture Filter 510 * @{ 511 */ 512 #define LPTIM_ICFLT_CLOCK_DIV1 0x00000000UL /*!< any external input capture signal level change is considered as a valid transition */ 513 #define LPTIM_ICFLT_CLOCK_DIV2 LPTIM_CCMR1_IC1F_0 /*!< external input capture signal level change must be stable for at least 2 clock periods before it is considered as valid transition */ 514 #define LPTIM_ICFLT_CLOCK_DIV4 LPTIM_CCMR1_IC1F_1 /*!< external input capture signal level change must be stable for at least 4 clock periods before it is considered as valid transition */ 515 #define LPTIM_ICFLT_CLOCK_DIV8 (LPTIM_CCMR1_IC1F_0|LPTIM_CCMR1_IC1F_1) /*!< external input capture signal level change must be stable for at least 8 clock periods before it is considered as valid transition */ 516 /** 517 * @} 518 */ 519 520 /** @defgroup LPTIM_Input_Capture_Source LPTIM Input Capture Source 521 * @{ 522 */ 523 #define LPTIM_IC1SOURCE_GPIO 0x00000000UL /*!< For LPTIM1, LPTIM2 and LPTIM3 */ 524 #define LPTIM_IC2SOURCE_GPIO 0x00000000UL /*!< For LPTIM1, LPTIM2 and LPTIM3 */ 525 #define LPTIM_IC2SOURCE_LSI LPTIM_CFGR2_IC2SEL_0 /*!< For LPTIM1 */ 526 #define LPTIM_IC2SOURCE_LSE LPTIM_CFGR2_IC2SEL_1 /*!< For LPTIM1 */ 527 #define LPTIM_IC2SOURCE_HSI_1024 LPTIM_CFGR2_IC2SEL_0 /*!< For LPTIM2 */ 528 #define LPTIM_IC2SOURCE_CSI_128 LPTIM_CFGR2_IC2SEL_1 /*!< For LPTIM2 */ 529 /** 530 * @} 531 */ 532 /** 533 * @} 534 */ 535 536 /* Exported macros -----------------------------------------------------------*/ 537 /** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros 538 * @{ 539 */ 540 541 /** @brief Reset LPTIM handle state. 542 * @param __HANDLE__ LPTIM handle 543 * @retval None 544 */ 545 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 546 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) do { \ 547 (__HANDLE__)->State = HAL_LPTIM_STATE_RESET; \ 548 (__HANDLE__)->ChannelState[0] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 549 (__HANDLE__)->ChannelState[1] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 550 (__HANDLE__)->MspInitCallback = NULL; \ 551 (__HANDLE__)->MspDeInitCallback = NULL; \ 552 } while(0) 553 #else 554 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) do { \ 555 (__HANDLE__)->State = HAL_LPTIM_STATE_RESET; \ 556 (__HANDLE__)->ChannelState[0] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 557 (__HANDLE__)->ChannelState[1] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 558 } while(0) 559 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 560 561 /** 562 * @brief Enable the LPTIM peripheral. 563 * @param __HANDLE__ LPTIM handle 564 * @retval None 565 */ 566 #define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE)) 567 568 /** 569 * @brief Disable the LPTIM peripheral. 570 * @param __HANDLE__ LPTIM handle 571 * @retval None 572 */ 573 #define __HAL_LPTIM_DISABLE(__HANDLE__) \ 574 do { \ 575 if (((__HANDLE__)->Instance->CCMR1 & LPTIM_CCMR1_CC1E) == 0UL) \ 576 { \ 577 if(((__HANDLE__)->Instance->CCMR1 & LPTIM_CCMR1_CC2E) == 0UL) \ 578 { \ 579 (__HANDLE__)->Instance->CR &= ~(LPTIM_CR_ENABLE); \ 580 } \ 581 } \ 582 } while(0) 583 584 /** 585 * @brief Start the LPTIM peripheral in Continuous mode. 586 * @param __HANDLE__ LPTIM handle 587 * @retval None 588 */ 589 #define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT) 590 /** 591 * @brief Start the LPTIM peripheral in single mode. 592 * @param __HANDLE__ LPTIM handle 593 * @retval None 594 */ 595 #define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT) 596 597 /** 598 * @brief Reset the LPTIM Counter register in synchronous mode. 599 * @param __HANDLE__ LPTIM handle 600 * @retval None 601 */ 602 #define __HAL_LPTIM_RESET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_COUNTRST) 603 604 /** 605 * @brief Reset after read of the LPTIM Counter register in asynchronous mode. 606 * @param __HANDLE__ LPTIM handle 607 * @retval None 608 */ 609 #define __HAL_LPTIM_RESET_COUNTER_AFTERREAD(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_RSTARE) 610 611 /** 612 * @brief Write the passed parameter in the Autoreload register. 613 * @param __HANDLE__ LPTIM handle 614 * @param __VALUE__ Autoreload value 615 * @retval None 616 * @note The ARR register can only be modified when the LPTIM instance is enabled. 617 */ 618 #define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__)) 619 620 /** 621 * @brief Write the passed parameter in the Compare register. 622 * @param __HANDLE__ LPTIM handle 623 * @param __VALUE__ Compare value 624 * @param __CHANNEL__ TIM Channel to be configured 625 * @retval None 626 * @note The CCRx registers can only be modified when the LPTIM instance is enabled. 627 */ 628 #define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __CHANNEL__, __VALUE__) \ 629 (((__CHANNEL__) == LPTIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__VALUE__)) :\ 630 ((__CHANNEL__) == LPTIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__VALUE__)) : 0U) 631 632 /** 633 * @brief Write the passed parameter in the Repetition register. 634 * @param __HANDLE__ LPTIM handle 635 * @param __VALUE__ Repetition value 636 * @retval None 637 */ 638 #define __HAL_LPTIM_REPETITIONCOUNTER_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->RCR = (__VALUE__)) 639 640 /** 641 * @brief Return the current Repetition value. 642 * @param __HANDLE__ LPTIM handle 643 * @retval Repetition register value 644 * @note The RCR register can only be modified when the LPTIM instance is enabled. 645 */ 646 #define __HAL_LPTIM_REPETITIONCOUNTER_GET(__HANDLE__) ((__HANDLE__)->Instance->RCR) 647 648 /** 649 * @brief Enable the LPTIM signal input/output on the corresponding pin. 650 * @param __HANDLE__ LPTIM handle 651 * @param __CHANNEL__ LPTIM Channels to be enabled. 652 * This parameter can be one of the following values: 653 * @arg LPTIM_CHANNEL_1: LPTIM Channel 1 selected 654 * @arg LPTIM_CHANNEL_2: LPTIM Channel 2 selected 655 * @retval None 656 */ 657 #define __HAL_LPTIM_CAPTURE_COMPARE_ENABLE(__HANDLE__, __CHANNEL__) \ 658 do { \ 659 switch (__CHANNEL__) \ 660 { \ 661 case LPTIM_CHANNEL_1: \ 662 ((__HANDLE__)->Instance->CCMR1 |= LPTIM_CCMR1_CC1E); \ 663 break; \ 664 case LPTIM_CHANNEL_2: \ 665 ((__HANDLE__)->Instance->CCMR1 |= LPTIM_CCMR1_CC2E); \ 666 break; \ 667 default: \ 668 break; \ 669 } \ 670 } \ 671 while(0) 672 673 /** 674 * @brief Disable the LPTIM signal input/output on the corresponding pin. 675 * @param __HANDLE__ LPTIM handle 676 * @param __CHANNEL__ LPTIM Channels to be disabled. 677 * This parameter can be one of the following values: 678 * @arg LPTIM_CHANNEL_1: LPTIM Channel 1 selected 679 * @arg LPTIM_CHANNEL_2: LPTIM Channel 2 selected 680 * @retval None 681 */ 682 #define __HAL_LPTIM_CAPTURE_COMPARE_DISABLE(__HANDLE__, __CHANNEL__) \ 683 do { \ 684 switch (__CHANNEL__) \ 685 { \ 686 case LPTIM_CHANNEL_1: \ 687 ((__HANDLE__)->Instance->CCMR1 &= ~LPTIM_CCMR1_CC1E); \ 688 break; \ 689 case LPTIM_CHANNEL_2: \ 690 ((__HANDLE__)->Instance->CCMR1 &= ~LPTIM_CCMR1_CC2E); \ 691 break; \ 692 default: \ 693 break; \ 694 } \ 695 } \ 696 while(0) 697 698 /** 699 * @brief Check whether the specified LPTIM flag is set or not. 700 * @param __HANDLE__ LPTIM handle 701 * @param __FLAG__ LPTIM flag to check 702 * This parameter can be a value of: 703 * @arg LPTIM_FLAG_REPOK : Repetition register update OK Flag. 704 * @arg LPTIM_FLAG_UPDATE : Update event Flag. 705 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. 706 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. 707 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. 708 * @arg LPTIM_FLAG_CMP1OK : Compare register 1 update OK Flag. 709 * @arg LPTIM_FLAG_CMP2OK : Compare register 2 update OK Flag. 710 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. 711 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. 712 * @arg LPTIM_FLAG_CC1 : Capture/Compare 1 interrupt flag. 713 * @arg LPTIM_FLAG_CC2 : Capture/Compare 2 interrupt flag. 714 * @arg LPTIM_FLAG_CC1O : Capture/Compare 1 over-capture flag. 715 * @arg LPTIM_FLAG_CC2O : Capture/Compare 2 over-capture flag. 716 * @arg LPTIM_FLAG_DIEROK : DMA & interrupt enable update OK flag. 717 * @retval The state of the specified flag (SET or RESET). 718 */ 719 #define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__)) 720 721 /** 722 * @brief Clear the specified LPTIM flag. 723 * @param __HANDLE__ LPTIM handle. 724 * @param __FLAG__ LPTIM flag to clear. 725 * This parameter can be a value of: 726 * @arg LPTIM_FLAG_REPOK : Repetition register update OK Flag. 727 * @arg LPTIM_FLAG_UPDATE : Update event Flag. 728 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. 729 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. 730 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. 731 * @arg LPTIM_FLAG_CMP1OK : Compare register 1 update OK Flag. 732 * @arg LPTIM_FLAG_CMP2OK : Compare register 2 update OK Flag. 733 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. 734 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. 735 * @arg LPTIM_FLAG_CC1 : Capture/Compare 1 interrupt flag. 736 * @arg LPTIM_FLAG_CC2 : Capture/Compare 2 interrupt flag. 737 * @arg LPTIM_FLAG_CC1O : Capture/Compare 1 over-capture flag. 738 * @arg LPTIM_FLAG_CC2O : Capture/Compare 2 over-capture flag. 739 * @arg LPTIM_FLAG_DIEROK : DMA & interrupt enable update OK flag. 740 * @retval None. 741 */ 742 #define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 743 744 /** 745 * @brief Enable the specified LPTIM interrupt. 746 * @param __HANDLE__ LPTIM handle. 747 * @param __INTERRUPT__ LPTIM interrupt to set. 748 * This parameter can be a value of: 749 * @arg LPTIM_IT_REPOK : Repetition register update OK Interrupt. 750 * @arg LPTIM_IT_UPDATE : Update event register Interrupt. 751 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 752 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 753 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 754 * @arg LPTIM_IT_CMP1OK : Compare register 1 update OK Interrupt. 755 * @arg LPTIM_IT_CMP2OK : Compare register 2 update OK Interrupt. 756 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 757 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 758 * @arg LPTIM_IT_CC1 : Capture/Compare 1 interrupt Interrupt. 759 * @arg LPTIM_IT_CC2 : Capture/Compare 2 interrupt Interrupt. 760 * @arg LPTIM_IT_CC1O : Capture/Compare 1 over-capture Interrupt. 761 * @arg LPTIM_IT_CC2O : Capture/Compare 2 over-capture Interrupt. 762 * @retval None. 763 * @note The LPTIM interrupts can only be enabled when the LPTIM instance is enabled. 764 */ 765 #define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER |= (__INTERRUPT__)) 766 767 /** 768 * @brief Disable the specified LPTIM interrupt. 769 * @param __HANDLE__ LPTIM handle. 770 * @param __INTERRUPT__ LPTIM interrupt to set. 771 * This parameter can be a value of: 772 * @arg LPTIM_IT_REPOK : Repetition register update OK Interrupt. 773 * @arg LPTIM_IT_UPDATE : Update event register Interrupt. 774 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 775 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 776 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 777 * @arg LPTIM_IT_CMP1OK : Compare register 1 update OK Interrupt. 778 * @arg LPTIM_IT_CMP2OK : Compare register 2 update OK Interrupt. 779 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 780 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 781 * @arg LPTIM_IT_CC1 : Capture/Compare 1 interrupt Interrupt. 782 * @arg LPTIM_IT_CC2 : Capture/Compare 2 interrupt Interrupt. 783 * @arg LPTIM_IT_CC1O : Capture/Compare 1 over-capture Interrupt. 784 * @arg LPTIM_IT_CC2O : Capture/Compare 2 over-capture Interrupt. 785 * @retval None. 786 * @note The LPTIM interrupts can only be disabled when the LPTIM instance is enabled. 787 */ 788 #define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= (~(__INTERRUPT__))) 789 790 /** @brief Enable the specified DMA request. 791 * @param __HANDLE__ specifies the TIM Handle. 792 * @param __DMA__ specifies the LPTIM DMA request to enable. 793 * This parameter can be one of the following values: 794 * @arg LPTIM_DMA_UPDATE: Update DMA request 795 * @arg LPTIM_DMA_CC1: Capture/Compare 1 DMA request 796 * @arg LPTIM_DMA_CC2: Capture/Compare 2 DMA request 797 * @retval None 798 */ 799 #define __HAL_LPTIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER |= (__DMA__)) 800 801 /** @brief Disable the specified DMA request. 802 * @param __HANDLE__ specifies the LPTIM Handle. 803 * @param __DMA__ specifies the LPTIM DMA request to disable. 804 * This parameter can be one of the following values: 805 * @arg LPTIM_DMA_UPDATE: Update DMA request 806 * @arg LPTIM_DMA_CC1: Capture/Compare 1 DMA request 807 * @arg LPTIM_DMA_CC2: Capture/Compare 2 DMA request 808 * @retval None 809 */ 810 #define __HAL_LPTIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__)) 811 812 /** 813 * @brief Check whether the specified LPTIM interrupt source is enabled or not. 814 * @param __HANDLE__ LPTIM handle. 815 * @param __INTERRUPT__ LPTIM interrupt to check. 816 * This parameter can be a value of: 817 * @arg LPTIM_IT_REPOK : Repetition register update OK Interrupt. 818 * @arg LPTIM_IT_UPDATE : Update event register Interrupt. 819 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 820 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 821 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 822 * @arg LPTIM_IT_CMP1OK : Compare register 1 update OK Interrupt. 823 * @arg LPTIM_IT_CMP2OK : Compare register 2 update OK Interrupt. 824 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 825 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 826 * @arg LPTIM_IT_CC1 : Capture/Compare 1 interrupt Interrupt. 827 * @arg LPTIM_IT_CC2 : Capture/Compare 2 interrupt Interrupt. 828 * @arg LPTIM_IT_CC1O : Capture/Compare 1 over-capture Interrupt. 829 * @arg LPTIM_IT_CC2O : Capture/Compare 2 over-capture Interrupt. 830 * @retval Interrupt status. 831 */ 832 833 #define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER\ 834 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 835 836 /** 837 * @brief Enable the LPTIM1 EXTI line in interrupt mode. 838 * @retval None 839 */ 840 #define __HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT() (EXTI->IMR2 |= LPTIM_EXTI_LINE_LPTIM1) 841 842 /** 843 * @brief Disable the LPTIM1 EXTI line in interrupt mode. 844 * @retval None 845 */ 846 #define __HAL_LPTIM_LPTIM1_EXTI_DISABLE_IT() (EXTI->IMR2\ 847 &= ~(LPTIM_EXTI_LINE_LPTIM1)) 848 849 /** 850 * @brief Enable the LPTIM2 EXTI line in interrupt mode. 851 * @retval None 852 */ 853 #define __HAL_LPTIM_LPTIM2_EXTI_ENABLE_IT() (EXTI->IMR2 |= LPTIM_EXTI_LINE_LPTIM2) 854 855 /** 856 * @brief Disable the LPTIM2 EXTI line in interrupt mode. 857 * @retval None 858 */ 859 #define __HAL_LPTIM_LPTIM2_EXTI_DISABLE_IT() (EXTI->IMR2\ 860 &= ~(LPTIM_EXTI_LINE_LPTIM2)) 861 862 /** 863 * @brief Enable the LPTIM3 EXTI line in interrupt mode. 864 * @retval None 865 */ 866 #define __HAL_LPTIM_LPTIM3_EXTI_ENABLE_IT() (EXTI->IMR2 |= LPTIM_EXTI_LINE_LPTIM3) 867 868 /** 869 * @brief Disable the LPTIM3 EXTI line in interrupt mode. 870 * @retval None 871 */ 872 #define __HAL_LPTIM_LPTIM3_EXTI_DISABLE_IT() (EXTI->IMR2\ 873 &= ~(LPTIM_EXTI_LINE_LPTIM3)) 874 875 /** 876 * @brief Enable the LPTIM4 EXTI line in interrupt mode. 877 * @retval None 878 */ 879 #define __HAL_LPTIM_LPTIM4_EXTI_ENABLE_IT() (EXTI->IMR2 |= LPTIM_EXTI_LINE_LPTIM4) 880 881 /** 882 * @brief Disable the LPTIM4 EXTI line in interrupt mode. 883 * @retval None 884 */ 885 #define __HAL_LPTIM_LPTIM4_EXTI_DISABLE_IT() (EXTI->IMR2\ 886 &= ~(LPTIM_EXTI_LINE_LPTIM4)) 887 888 /** 889 * @brief Enable the LPTIM5 EXTI line in interrupt mode. 890 * @retval None 891 */ 892 #define __HAL_LPTIM_LPTIM5_EXTI_ENABLE_IT() (EXTI->IMR2 |= LPTIM_EXTI_LINE_LPTIM5) 893 894 /** 895 * @brief Disable the LPTIM5 EXTI line in interrupt mode. 896 * @retval None 897 */ 898 #define __HAL_LPTIM_LPTIM5_EXTI_DISABLE_IT() (EXTI->IMR2\ 899 &= ~(LPTIM_EXTI_LINE_LPTIM5)) 900 901 /** 902 * @} 903 */ 904 905 /* Exported functions --------------------------------------------------------*/ 906 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions 907 * @{ 908 */ 909 910 /** @addtogroup LPTIM_Exported_Functions_Group1 911 * @brief Initialization and Configuration functions. 912 * @{ 913 */ 914 /* Initialization/de-initialization functions ********************************/ 915 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim); 916 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim); 917 918 /* MSP functions *************************************************************/ 919 void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim); 920 void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim); 921 /** 922 * @} 923 */ 924 925 /** @addtogroup LPTIM_Exported_Functions_Group2 926 * @brief Start-Stop operation functions. 927 * @{ 928 */ 929 /* Config functions **********************************************************/ 930 HAL_StatusTypeDef HAL_LPTIM_OC_ConfigChannel(LPTIM_HandleTypeDef *hlptim, const LPTIM_OC_ConfigTypeDef *sConfig, 931 uint32_t Channel); 932 933 /* Start/Stop operation functions *********************************************/ 934 /* ################################# PWM Mode ################################*/ 935 /* Blocking mode: Polling */ 936 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 937 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 938 /* Non-Blocking mode: Interrupt */ 939 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 940 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 941 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel, const uint32_t *pData, 942 uint32_t Length); 943 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 944 945 /* ############################# One Pulse Mode ##############################*/ 946 /* Blocking mode: Polling */ 947 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 948 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 949 /* Non-Blocking mode: Interrupt */ 950 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 951 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 952 953 /* ############################## Set once Mode ##############################*/ 954 /* Blocking mode: Polling */ 955 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 956 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 957 /* Non-Blocking mode: Interrupt */ 958 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 959 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 960 961 /* ############################### Encoder Mode ##############################*/ 962 /* Blocking mode: Polling */ 963 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim); 964 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim); 965 /* Non-Blocking mode: Interrupt */ 966 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim); 967 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim); 968 969 /* ############################# Time out Mode ##############################*/ 970 /* Blocking mode: Polling */ 971 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Timeout); 972 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim); 973 /* Non-Blocking mode: Interrupt */ 974 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Timeout); 975 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim); 976 977 /* ############################## Counter Mode ###############################*/ 978 /* Blocking mode: Polling */ 979 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim); 980 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim); 981 /* Non-Blocking mode: Interrupt */ 982 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim); 983 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim); 984 985 /* ############################## Input Capture Mode ###############################*/ 986 /* Blocking mode: Polling */ 987 HAL_StatusTypeDef HAL_LPTIM_IC_ConfigChannel(LPTIM_HandleTypeDef *hlptim, const LPTIM_IC_ConfigTypeDef *sConfig, 988 uint32_t Channel); 989 HAL_StatusTypeDef HAL_LPTIM_IC_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 990 HAL_StatusTypeDef HAL_LPTIM_IC_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 991 /* Non-Blocking mode: Interrupt */ 992 HAL_StatusTypeDef HAL_LPTIM_IC_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 993 HAL_StatusTypeDef HAL_LPTIM_IC_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 994 HAL_StatusTypeDef HAL_LPTIM_IC_Start_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel, uint32_t *pData, 995 uint32_t Length); 996 HAL_StatusTypeDef HAL_LPTIM_IC_Stop_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 997 /** 998 * @} 999 */ 1000 1001 /** @addtogroup LPTIM_Exported_Functions_Group3 1002 * @brief Read operation functions. 1003 * @{ 1004 */ 1005 /* Reading operation functions ************************************************/ 1006 uint32_t HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef *hlptim); 1007 uint32_t HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef *hlptim); 1008 uint32_t HAL_LPTIM_ReadCapturedValue(const LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 1009 uint8_t HAL_LPTIM_IC_GetOffset(const LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 1010 /** 1011 * @} 1012 */ 1013 1014 /** @addtogroup LPTIM_Exported_Functions_Group4 1015 * @brief LPTIM IRQ handler and callback functions. 1016 * @{ 1017 */ 1018 /* LPTIM IRQ functions *******************************************************/ 1019 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim); 1020 1021 /* CallBack functions ********************************************************/ 1022 void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim); 1023 void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim); 1024 void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim); 1025 void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim); 1026 void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim); 1027 void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim); 1028 void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim); 1029 void HAL_LPTIM_ErrorCallback(LPTIM_HandleTypeDef *hlptim); 1030 void HAL_LPTIM_UpdateEventCallback(LPTIM_HandleTypeDef *hlptim); 1031 void HAL_LPTIM_UpdateEventHalfCpltCallback(LPTIM_HandleTypeDef *hlptim); 1032 void HAL_LPTIM_RepCounterWriteCallback(LPTIM_HandleTypeDef *hlptim); 1033 void HAL_LPTIM_IC_CaptureCallback(LPTIM_HandleTypeDef *hlptim); 1034 void HAL_LPTIM_IC_CaptureHalfCpltCallback(LPTIM_HandleTypeDef *hlptim); 1035 void HAL_LPTIM_IC_OverCaptureCallback(LPTIM_HandleTypeDef *hlptim); 1036 1037 /* Callbacks Register/UnRegister functions ***********************************/ 1038 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 1039 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID, 1040 pLPTIM_CallbackTypeDef pCallback); 1041 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID); 1042 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 1043 /** 1044 * @} 1045 */ 1046 1047 /** @addtogroup LPTIM_Group5 1048 * @brief Peripheral State functions. 1049 * @{ 1050 */ 1051 /* Peripheral State functions ************************************************/ 1052 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(const LPTIM_HandleTypeDef *hlptim); 1053 /** 1054 * @} 1055 */ 1056 1057 /** 1058 * @} 1059 */ 1060 1061 /* Private types -------------------------------------------------------------*/ 1062 /** @defgroup LPTIM_Private_Types LPTIM Private Types 1063 * @{ 1064 */ 1065 1066 /** 1067 * @} 1068 */ 1069 1070 /* Private variables ---------------------------------------------------------*/ 1071 /** @defgroup LPTIM_Private_Variables LPTIM Private Variables 1072 * @{ 1073 */ 1074 1075 /** 1076 * @} 1077 */ 1078 1079 /* Private constants ---------------------------------------------------------*/ 1080 /** @defgroup LPTIM_Private_Constants LPTIM Private Constants 1081 * @{ 1082 */ 1083 1084 /** 1085 * @} 1086 */ 1087 1088 /* Private macros ------------------------------------------------------------*/ 1089 /** @defgroup LPTIM_Private_Macros LPTIM Private Macros 1090 * @{ 1091 */ 1092 1093 #define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \ 1094 ((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)) 1095 1096 1097 #define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \ 1098 ((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \ 1099 ((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \ 1100 ((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \ 1101 ((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \ 1102 ((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \ 1103 ((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \ 1104 ((__PRESCALER__) == LPTIM_PRESCALER_DIV128)) 1105 1106 #define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1) 1107 #define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \ 1108 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \ 1109 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \ 1110 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS)) 1111 1112 #define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \ 1113 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \ 1114 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING)) 1115 1116 #define IS_LPTIM_TRG_SOURCE(__TRIG__) (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \ 1117 ((__TRIG__) == LPTIM_TRIGSOURCE_0) || \ 1118 ((__TRIG__) == LPTIM_TRIGSOURCE_1) || \ 1119 ((__TRIG__) == LPTIM_TRIGSOURCE_2) || \ 1120 ((__TRIG__) == LPTIM_TRIGSOURCE_3) || \ 1121 ((__TRIG__) == LPTIM_TRIGSOURCE_4) || \ 1122 ((__TRIG__) == LPTIM_TRIGSOURCE_5) || \ 1123 ((__TRIG__) == LPTIM_TRIGSOURCE_6) || \ 1124 ((__TRIG__) == LPTIM_TRIGSOURCE_7)) 1125 1126 #define IS_LPTIM_EXT_TRG_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING ) || \ 1127 ((__POLARITY__) == LPTIM_ACTIVEEDGE_FALLING ) || \ 1128 ((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING_FALLING )) 1129 1130 #define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION) || \ 1131 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \ 1132 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \ 1133 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS )) 1134 1135 #define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \ 1136 ((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD)) 1137 1138 #define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \ 1139 ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL)) 1140 1141 #define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((0x00000001UL <= (__AUTORELOAD__)) &&\ 1142 ((__AUTORELOAD__) <= 0x0000FFFFUL)) 1143 1144 #define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFUL) 1145 1146 #define IS_LPTIM_PERIOD(__PERIOD__) ((0x00000001UL <= (__PERIOD__)) &&\ 1147 ((__PERIOD__) <= 0x0000FFFFUL)) 1148 1149 #define IS_LPTIM_PULSE(__PULSE__) ((__PULSE__) <= 0x0000FFFFUL) 1150 1151 #define IS_LPTIM_OC_POLARITY(__OCPOLARITY__) (((__OCPOLARITY__) == LPTIM_OCPOLARITY_LOW) || \ 1152 ((__OCPOLARITY__) == LPTIM_OCPOLARITY_HIGH)) 1153 #define IS_LPTIM_IC_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_ICPSC_DIV1) ||\ 1154 ((__PRESCALER__) == LPTIM_ICPSC_DIV2) ||\ 1155 ((__PRESCALER__) == LPTIM_ICPSC_DIV4) ||\ 1156 ((__PRESCALER__) == LPTIM_ICPSC_DIV8)) 1157 1158 #define IS_LPTIM_IC_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_ICPOLARITY_RISING) || \ 1159 ((__POLARITY__) == LPTIM_ICPOLARITY_FALLING) ||\ 1160 ((__POLARITY__) == LPTIM_ICPOLARITY_RISING_FALLING)) 1161 1162 #define IS_LPTIM_IC_FILTER(__FILTER__) (((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV1) ||\ 1163 ((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV2) ||\ 1164 ((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV4) ||\ 1165 ((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV8)) 1166 1167 #define IS_LPTIM_REPETITION(__REPETITION__) ((__REPETITION__) <= 0x000000FFUL) 1168 1169 #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \ 1170 ((((__INSTANCE__) == LPTIM1) || \ 1171 ((__INSTANCE__) == LPTIM2) || \ 1172 ((__INSTANCE__) == LPTIM3)) && \ 1173 ((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO)) 1174 1175 #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \ 1176 ((((__INSTANCE__) == LPTIM1) || \ 1177 ((__INSTANCE__) == LPTIM2) || \ 1178 ((__INSTANCE__) == LPTIM3)) && \ 1179 ((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO)) 1180 1181 #define IS_LPTIM_IC1_SOURCE(__INSTANCE__, __SOURCE__) \ 1182 ((((__INSTANCE__) == LPTIM1) || \ 1183 ((__INSTANCE__) == LPTIM2)|| \ 1184 ((__INSTANCE__) == LPTIM3)) && \ 1185 ((__SOURCE__) == LPTIM_IC1SOURCE_GPIO)) 1186 1187 #define IS_LPTIM_IC2_SOURCE(__INSTANCE__, __SOURCE__) \ 1188 ((((__INSTANCE__) == LPTIM1) && \ 1189 (((__SOURCE__) == LPTIM_IC2SOURCE_GPIO) || \ 1190 ((__SOURCE__) == LPTIM_IC2SOURCE_LSI) || \ 1191 ((__SOURCE__) == LPTIM_IC2SOURCE_LSE))) \ 1192 || \ 1193 (((__INSTANCE__) == LPTIM2) && \ 1194 (((__SOURCE__) == LPTIM_IC2SOURCE_GPIO) || \ 1195 ((__SOURCE__) == LPTIM_IC2SOURCE_HSI_1024) || \ 1196 ((__SOURCE__) == LPTIM_IC2SOURCE_CSI_128))) \ 1197 || \ 1198 (((__INSTANCE__) == LPTIM3) && \ 1199 ((__SOURCE__) == LPTIM_IC2SOURCE_GPIO))) 1200 1201 #define LPTIM_CHANNEL_STATE_GET(__INSTANCE__, __CHANNEL__)\ 1202 (((__CHANNEL__) == LPTIM_CHANNEL_1) ? (__INSTANCE__)->ChannelState[0] :\ 1203 (__INSTANCE__)->ChannelState[1]) 1204 1205 #define LPTIM_CHANNEL_STATE_SET(__INSTANCE__, __CHANNEL__, __CHANNEL_STATE__) \ 1206 (((__CHANNEL__) == LPTIM_CHANNEL_1) ? ((__INSTANCE__)->ChannelState[0] = (__CHANNEL_STATE__)) :\ 1207 ((__INSTANCE__)->ChannelState[1] = (__CHANNEL_STATE__))) 1208 1209 #define LPTIM_CHANNEL_STATE_SET_ALL(__INSTANCE__, __CHANNEL_STATE__) do { \ 1210 (__INSTANCE__)->ChannelState[0] =\ 1211 (__CHANNEL_STATE__); \ 1212 (__INSTANCE__)->ChannelState[1] =\ 1213 (__CHANNEL_STATE__); \ 1214 } while(0) 1215 1216 #define IS_LPTIM_CCX_INSTANCE(__INSTANCE__, __CHANNEL__) \ 1217 ((((__INSTANCE__) == LPTIM1) && \ 1218 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1219 ((__CHANNEL__) == LPTIM_CHANNEL_2))) \ 1220 || \ 1221 (((__INSTANCE__) == LPTIM2) && \ 1222 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1223 ((__CHANNEL__) == LPTIM_CHANNEL_2))) \ 1224 || \ 1225 (((__INSTANCE__) == LPTIM3) && \ 1226 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1227 ((__CHANNEL__) == LPTIM_CHANNEL_2))) \ 1228 || \ 1229 (((__INSTANCE__) == LPTIM4) && \ 1230 ((__CHANNEL__) == LPTIM_CHANNEL_1)) \ 1231 || \ 1232 (((__INSTANCE__) == LPTIM5) && \ 1233 ((__CHANNEL__) == LPTIM_CHANNEL_1))) 1234 /** 1235 * @} 1236 */ 1237 1238 /* Private functions ---------------------------------------------------------*/ 1239 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions 1240 * @{ 1241 */ 1242 /** 1243 * @} 1244 */ 1245 1246 /** 1247 * @} 1248 */ 1249 1250 #endif /* LPTIM1 || LPTIM2 || LPTIM3 || LPTIM4 || LPTIM5 */ 1251 /** 1252 * @} 1253 */ 1254 1255 #ifdef __cplusplus 1256 } 1257 #endif 1258 1259 #endif /* STM32H7RSxx_HAL_LPTIM_H */ 1260