1 /** 2 ****************************************************************************** 3 * @file stm32h7rsxx_hal_dcmipp.h 4 * @author MCD Application Team 5 * @brief Header file of DCMIPP HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef __STM32H7RSxx_HAL_DCMIPP_H 21 #define __STM32H7RSxx_HAL_DCMIPP_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h7rsxx_hal_def.h" 29 30 /** @addtogroup STM32H7RSxx_HAL_Driver 31 * @{ 32 */ 33 34 #if defined (DCMIPP) 35 36 /** @addtogroup DCMIPP DCMIPP 37 * @brief DCMIPP HAL module driver 38 * @{ 39 */ 40 41 /* Exported types ----------------------------------------------------------------------------------------------------*/ 42 /** @defgroup DCMIPP_Exported_Types DCMIPP Exported Types 43 * @brief DCMIPP Exported Types 44 * @{ 45 */ 46 /** 47 * @brief DCMIPP Embedded Synchronisation Unmask codes structure definition 48 */ 49 typedef struct 50 { 51 uint8_t FrameStartUnmask; /*!< Specifies the frame start delimiter unmask. */ 52 uint8_t LineStartUnmask; /*!< Specifies the line start delimiter unmask. */ 53 uint8_t LineEndUnmask; /*!< Specifies the line end delimiter unmask. */ 54 uint8_t FrameEndUnmask; /*!< Specifies the frame end delimiter unmask. */ 55 } DCMIPP_EmbeddedSyncUnmaskTypeDef; 56 57 /** 58 * @brief DCMIPP Embedded Synchronisation codes structure definition (CCIR656) 59 */ 60 typedef struct 61 { 62 uint8_t FrameStartCode; /*!< Specifies the code of the frame start delimiter. */ 63 uint8_t LineStartCode; /*!< Specifies the code of the line start delimiter. */ 64 uint8_t LineEndCode; /*!< Specifies the code of the line end delimiter. */ 65 uint8_t FrameEndCode; /*!< Specifies the code of the frame end delimiter. */ 66 } DCMIPP_EmbeddedSyncCodesTypeDef; 67 68 69 /** 70 * @brief HAL DCMIPP Parallel configuration structure definition 71 */ 72 typedef struct 73 { 74 uint32_t Format; /*!< Configures the DCMIPP Format 75 This parameter can be one value of @ref DCMIPP_Format */ 76 uint32_t VSPolarity; /*!< Specifies the Vertical synchronization polarity: High or Low. 77 This parameter can be a value of @ref DCMIPP_VSYNC_Polarity */ 78 uint32_t HSPolarity; /*!< Specifies the Horizontal synchronization polarity: High or Low. 79 This parameter can be a value of @ref DCMIPP_HSYNC_Polarity */ 80 uint32_t PCKPolarity; /*!< Specifies the Pixel clock polarity: Falling or Rising. 81 This parameter can be a value of @ref DCMIPP_PIXCK_Polarity */ 82 uint32_t ExtendedDataMode ; /*!< Specifies the data width: 8-bit, 10-bit, 12-bit 14-bit or 16-bits. 83 This parameter can be a value of @ref DCMIPP_Extended_Data_Mode */ 84 uint32_t SynchroMode; /*!< Specifies the Synchronization Mode: Hardware or Embedded. 85 This parameter can be a value of @ref DCMIPP_Synchronization_Mode */ 86 DCMIPP_EmbeddedSyncCodesTypeDef SynchroCodes; /*!< Specifies the code of the line/frame start delimiter and the 87 line/frame end delimiter */ 88 uint32_t SwapBits; /*!< Enable or Disable the Swap Bits. 89 This parameter can be a value of @ref DCMIPP_SWAP_BITS */ 90 uint32_t SwapCycles; /*!< Enable or Disable the Swap Cycles. 91 This parameter can be a value of @ref DCMIPP_SWAP_CYCLES */ 92 } DCMIPP_ParallelConfTypeDef; 93 94 /** 95 * @brief HAL DCMIPP Pipe configuration structure definition 96 */ 97 typedef struct 98 { 99 uint32_t FrameRate; /*!< Configures the DCMIPP Pipe Frame Rate 100 This parameter can be one value of @ref DCMIPP_Frame_Rates */ 101 } DCMIPP_PipeConfTypeDef; 102 103 /** 104 * @brief HAL DCMIPP IPPLUG configuration structure definition 105 */ 106 typedef struct 107 { 108 uint32_t Client; /*!< Configures the DCMIPP IPPLUG Client 109 This parameter can be a value from @ref DCMIPP_IPPLUG_Client */ 110 uint32_t MemoryPageSize; /*!< Configures the DCMIPP IPPLUG Memory page size 111 This parameter can be a value from @ref DCMIPP_Memory_Page_Size */ 112 uint32_t Traffic; /*!< Configures the DCMIPP IPPLUG Traffic 113 This parameter can be a value from @ref DCMIPP_Traffic_Burst_Size */ 114 uint32_t MaxOutstandingTransactions ; /*!< Configures the DCMIPP IPPLUG Maximum outstanding transactions 115 This parameter can be a value from 116 DCMIPP_Maximum_Outstanding_Transactions */ 117 uint32_t DPREGStart; /*!< Configures the End word of the FIFO of Clientx 118 This parameter can be a value between 0 and 0x3FF */ 119 uint32_t DPREGEnd; /*!< Configures the Start word of the FIFO of Clientx 120 This parameter can be a value between 0 and 0x3FF */ 121 uint32_t WLRURatio; /*!< Configures the DCMIPP Ratio for WLRU arbitration 122 This parameter can be a value between 0 and 15 */ 123 } DCMIPP_IPPlugConfTypeDef; 124 125 /** 126 * @brief HAL DCMIPP Crop configuration structure definition 127 */ 128 typedef struct 129 { 130 uint32_t VStart; /*!< Configures the DCMIPP Crop Vertical Start 131 This parameter can be one value between 0 and 4095 */ 132 uint32_t HStart; /*!< Configures the DCMIPP Crop Horizontal Start 133 This parameter can be one value between 0 and 4095 */ 134 uint32_t VSize; /*!< Configures the DCMIPP Crop Vertical Size 135 This parameter can be one value between 0 and 4095 */ 136 uint32_t HSize; /*!< Configures the DCMIPP Crop Horizontal Size 137 This parameter can be one value between 1 and 4095 */ 138 uint32_t PipeArea; /*!< Configures the DCMIPP Crop Area for the pipe0 139 This parameter can be one value of @ref DCMIPP_Crop_Area */ 140 } DCMIPP_CropConfTypeDef; 141 142 143 /** 144 * @brief HAL DCMIPP State enumeration definition 145 */ 146 typedef enum 147 { 148 HAL_DCMIPP_STATE_RESET = 0x00U, /*!< DCMIPP not yet initialized or disabled */ 149 HAL_DCMIPP_STATE_INIT = 0x01U, /*!< DCMIPP initialized */ 150 HAL_DCMIPP_STATE_READY = 0x02U, /*!< DCMIPP configured and ready for use */ 151 HAL_DCMIPP_STATE_BUSY = 0x03U, /*!< DCMIPP internal processing is ongoing */ 152 HAL_DCMIPP_STATE_ERROR = 0x04U, /*!< DCMIPP state error */ 153 } HAL_DCMIPP_StateTypeDef; 154 155 /** 156 * @brief HAL DCMIPP Pipe State enumeration definition 157 */ 158 159 typedef enum 160 { 161 HAL_DCMIPP_PIPE_STATE_RESET = 0x00U, /*!< DCMIPP Pipe not yet initialized or disabled */ 162 HAL_DCMIPP_PIPE_STATE_READY = 0x01U, /*!< DCMIPP Pipe initialized and ready for use */ 163 HAL_DCMIPP_PIPE_STATE_BUSY = 0x02U, /*!< DCMIPP internal processing is ongoing */ 164 HAL_DCMIPP_PIPE_STATE_SUSPEND = 0x03U, /*!< DCMIPP pipe process is suspended */ 165 HAL_DCMIPP_PIPE_STATE_ERROR = 0x04U, /*!< DCMIPP pipe error state */ 166 } HAL_DCMIPP_PipeStateTypeDef; 167 168 #if (USE_HAL_DCMIPP_REGISTER_CALLBACKS == 1) 169 /** 170 * @brief HAL DCMIPP common Callback ID enumeration definition 171 */ 172 typedef enum 173 { 174 HAL_DCMIPP_MSPINIT_CB_ID = 0x00U, /*!< DCMIPP MspInit callback ID */ 175 HAL_DCMIPP_MSPDEINIT_CB_ID = 0x01U, /*!< DCMIPP MspDeInit callback ID */ 176 HAL_DCMIPP_ERROR_CB_ID = 0x02U, /*!< DCMIPP Error callback ID */ 177 } HAL_DCMIPP_CallbackIDTypeDef; 178 179 /** 180 * @brief HAL DCMIPP pipe Callback ID enumeration definition 181 */ 182 typedef enum 183 { 184 HAL_DCMIPP_PIPE_LIMIT_EVENT_CB_ID = 0x01U, /*!< DCMIPP Pipe Limit event callback ID */ 185 HAL_DCMIPP_PIPE_LINE_EVENT_CB_ID = 0x02U, /*!< DCMIPP Pipe Line event callback ID */ 186 HAL_DCMIPP_PIPE_FRAME_EVENT_CB_ID = 0x03U, /*!< DCMIPP Pipe Frame event callback ID */ 187 HAL_DCMIPP_PIPE_VSYNC_EVENT_CB_ID = 0x04U, /*!< DCMIPP Pipe Vsync event callback ID */ 188 HAL_DCMIPP_PIPE_ERROR_CB_ID = 0x05U, /*!< DCMIPP Pipe Error callback ID */ 189 } HAL_DCMIPP_PIPE_CallbackIDTypeDef; 190 #endif /* USE_HAL_DCMIPP_REGISTER_CALLBACKS */ 191 192 /** 193 * @brief HAL DCMIPP handle structures definition 194 */ 195 #if (USE_HAL_DCMIPP_REGISTER_CALLBACKS == 1) 196 typedef struct __DCMIPP_HandleTypeDef 197 #else 198 typedef struct 199 #endif /* USE_HAL_DCMIPP_REGISTER_CALLBACKS */ 200 { 201 DCMIPP_TypeDef *Instance; /*!< Register the DCMIPP base 202 address */ 203 __IO HAL_DCMIPP_StateTypeDef State; /*!< DCMIPP state */ 204 __IO HAL_DCMIPP_PipeStateTypeDef PipeState[DCMIPP_NUM_OF_PIPES]; /*!< DCMIPP Pipes state */ 205 __IO uint32_t ErrorCode; /*!< DCMIPP Error code */ 206 #if (USE_HAL_DCMIPP_REGISTER_CALLBACKS == 1) 207 void (* PIPE_FrameEventCallback)(struct __DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); /*!< DCMIPP Pipe Frame Event 208 Callback */ 209 void (* PIPE_VsyncEventCallback)(struct __DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); /*!< DCMIPP Pipe Vsync Event 210 Callback */ 211 void (* PIPE_LineEventCallback)(struct __DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); /*!< DCMIPP Pipe Line Event 212 Callback */ 213 void (* PIPE_LimitEventCallback)(struct __DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); /*!< DCMIPP Pipe Limit Event 214 Callback */ 215 void (* PIPE_ErrorCallback)(struct __DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); /*!< DCMIPP Pipe Error 216 Callback */ 217 void (* ErrorCallback)(struct __DCMIPP_HandleTypeDef *hdcmipp); /*!< DCMIPP Error Callback */ 218 void (* MspInitCallback)(struct __DCMIPP_HandleTypeDef *hdcmipp); /*!< DCMIPP Msp Init 219 Callback */ 220 void (* MspDeInitCallback)(struct __DCMIPP_HandleTypeDef *hdcmipp); /*!< DCMIPP Msp DeInit 221 Callback */ 222 #endif /* USE_HAL_DCMIPP_REGISTER_CALLBACKS */ 223 } DCMIPP_HandleTypeDef; 224 225 #if (USE_HAL_DCMIPP_REGISTER_CALLBACKS == 1) 226 /** 227 * @brief HAL DCMIPP Callback pointer definition 228 */ 229 typedef void (*pDCMIPP_CallbackTypeDef)(DCMIPP_HandleTypeDef *hdcmipp); /*!< Pointer to a DCMIPP common callback 230 function */ 231 typedef void (*pDCMIPP_PIPE_CallbackTypeDef)(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); /*!< Pointer to a DCMIPP 232 Pipe callback function */ 233 #endif /* USE_HAL_DCMIPP_REGISTER_CALLBACKS */ 234 235 /** 236 * @} 237 */ 238 239 /* Exported constants --------------------------------------------------------*/ 240 241 /** @defgroup DCMIPP_Exported_Constants DCMIPP Exported Constants 242 * @brief DCMIPP Exported constants 243 * @{ 244 */ 245 246 /** @defgroup DCMIPP_Pipes DCMIPP Pipes 247 * @{ 248 */ 249 #define DCMIPP_PIPE0 0U /*!< DCMIPP Pipe0 (Dump pipe) */ 250 /** 251 * @} 252 */ 253 254 /** @defgroup DCMIPP_Error_Codes DCMIPP Error Codes 255 * @{ 256 */ 257 #define HAL_DCMIPP_ERROR_NONE (0x00000000U) /*!< No error */ 258 #define HAL_DCMIPP_ERROR_AXI_TRANSFER (0x00000001U) /*!< IPPLUG AXI Transfer error */ 259 #define HAL_DCMIPP_ERROR_PARALLEL_SYNC (0x00000002U) /*!< Synchronization error */ 260 #define HAL_DCMIPP_ERROR_PIPE0_LIMIT (0x00000004U) /*!< Limit error on pipe0 */ 261 #define HAL_DCMIPP_ERROR_PIPE0_OVR (0x00000008U) /*!< Overrun error on pipe0 */ 262 263 #if (USE_HAL_DCMIPP_REGISTER_CALLBACKS == 1) 264 #define HAL_DCMIPP_ERROR_INVALID_CALLBACK ((uint32_t)0x00000040U) /*!< Invalid Callback error */ 265 #endif /* USE_HAL_DCMIPP_REGISTER_CALLBACKS */ 266 /** 267 * @} 268 */ 269 270 /** @defgroup DCMIPP_Capture_Mode DCMIPP Capture Mode 271 * @{ 272 */ 273 #define DCMIPP_MODE_CONTINUOUS 0U /*!< DCMIPP continuous mode (preview) */ 274 #define DCMIPP_MODE_SNAPSHOT DCMIPP_P0FCTCR_CPTMODE /*!< DCMIPP snapshot mode */ 275 /** 276 * @} 277 */ 278 279 280 /** @defgroup DCMIPP_IPPLUG_Client DCMIPP IPPLUG Client 281 * @{ 282 */ 283 #define DCMIPP_CLIENT1 1U /*!< Client 1 identifier */ 284 /** 285 * @} 286 */ 287 288 /** @defgroup DCMIPP_Traffic_Burst_Size DCMIPP Traffic Burst Size 289 * @{ 290 */ 291 #define DCMIPP_TRAFFIC_BURST_SIZE_8BYTES 0U /*!< Traffic Burst size 8 Bytes */ 292 #define DCMIPP_TRAFFIC_BURST_SIZE_16BYTES (0x01U << DCMIPP_IPC1R1_TRAFFIC_Pos) /*!< Traffic Burst size 16 Bytes */ 293 #define DCMIPP_TRAFFIC_BURST_SIZE_32BYTES (0x02U << DCMIPP_IPC1R1_TRAFFIC_Pos) /*!< Traffic Burst size 32 Bytes */ 294 #define DCMIPP_TRAFFIC_BURST_SIZE_64BYTES (0x03U << DCMIPP_IPC1R1_TRAFFIC_Pos) /*!< Traffic Burst size 64 Bytes */ 295 #define DCMIPP_TRAFFIC_BURST_SIZE_128BYTES (0x04U << DCMIPP_IPC1R1_TRAFFIC_Pos) /*!< Traffic Burst size 128 Bytes */ 296 /** 297 * @} 298 */ 299 300 /** @defgroup DCMIPP_Memory_Page_Size DCMIPP Memory Page Size 301 * @{ 302 */ 303 #define DCMIPP_MEMORY_PAGE_SIZE_64BYTES 0U /*!< Memory Page size 64 Bytes */ 304 #define DCMIPP_MEMORY_PAGE_SIZE_128BYTES (0x01U << DCMIPP_IPGR1_MEMORYPAGE_Pos) /*!< Memory Page size 128 Bytes */ 305 #define DCMIPP_MEMORY_PAGE_SIZE_256BYTES (0x02U << DCMIPP_IPGR1_MEMORYPAGE_Pos) /*!< Memory Page size 256 Bytes */ 306 #define DCMIPP_MEMORY_PAGE_SIZE_512BYTES (0x03U << DCMIPP_IPGR1_MEMORYPAGE_Pos) /*!< Memory Page size 512 Bytes */ 307 #define DCMIPP_MEMORY_PAGE_SIZE_1KBYTES (0x04U << DCMIPP_IPGR1_MEMORYPAGE_Pos) /*!< Memory Page size 1 Bytes */ 308 #define DCMIPP_MEMORY_PAGE_SIZE_2KBYTES (0x05U << DCMIPP_IPGR1_MEMORYPAGE_Pos) /*!< Memory Page size 2 Bytes */ 309 #define DCMIPP_MEMORY_PAGE_SIZE_4KBYTES (0x06U << DCMIPP_IPGR1_MEMORYPAGE_Pos) /*!< Memory Page size 4 Bytes */ 310 #define DCMIPP_MEMORY_PAGE_SIZE_8KBYTES (0x07U << DCMIPP_IPGR1_MEMORYPAGE_Pos) /*!< Memory Page size 8 Bytes */ 311 /** 312 * @} 313 */ 314 /** @defgroup DCMIPP_Maximum_Outstanding_Transactions DCMIPP Maximum Outstanding Transactions 315 * @{ 316 */ 317 #define DCMIPP_OUTSTANDING_TRANSACTION_NONE 0U /*!< Nooutstanding transaction limitation*/ 318 #define DCMIPP_OUTSTANDING_TRANSACTION_2 0x01U /*!< Two outstanding transactions */ 319 #define DCMIPP_OUTSTANDING_TRANSACTION_3 0x02U /*!< Three outstanding transactions */ 320 #define DCMIPP_OUTSTANDING_TRANSACTION_4 0x03U /*!< Four outstanding transactions */ 321 /** 322 * @} 323 */ 324 325 /** @defgroup DCMIPP_Frame_Rates DCMIPP Frame Rates 326 * @{ 327 */ 328 #define DCMIPP_FRAME_RATE_ALL 0U /*!< All frames captured */ 329 #define DCMIPP_FRAME_RATE_1_OVER_2 (1U << DCMIPP_P0FCTCR_FRATE_Pos) /*!< 1 frame over 2 captured */ 330 #define DCMIPP_FRAME_RATE_1_OVER_4 (2U << DCMIPP_P0FCTCR_FRATE_Pos) /*!< 1 frame over 4 captured */ 331 #define DCMIPP_FRAME_RATE_1_OVER_8 (3U << DCMIPP_P0FCTCR_FRATE_Pos) /*!< 1 frame over 8 captured */ 332 /** 333 * @} 334 */ 335 336 /** @defgroup DCMIPP_Crop_Area DCMIPP Crop Area 337 * @{ 338 */ 339 #define DCMIPP_POSITIVE_AREA 0U /*!< Positive Area chosen for crop */ 340 #define DCMIPP_NEGATIVE_AREA DCMIPP_P0SCSZR_POSNEG /*!< Negative Area chosen for crop */ 341 /** 342 * @} 343 */ 344 345 346 /** @defgroup DCMIPP_Format DCMIPP Format 347 * @{ 348 */ 349 #define DCMIPP_FORMAT_BYTE 0U /*!< DCMIPP Format BYTE */ 350 #define DCMIPP_FORMAT_YUV422 (0x1EU << DCMIPP_PRCR_FORMAT_Pos) /*!< DCMIPP Format YUV422 */ 351 #define DCMIPP_FORMAT_RGB565 (0x22U << DCMIPP_PRCR_FORMAT_Pos) /*!< DCMIPP Format RGB565 */ 352 #define DCMIPP_FORMAT_RGB666 (0x23U << DCMIPP_PRCR_FORMAT_Pos) /*!< DCMIPP Format RGB666 */ 353 #define DCMIPP_FORMAT_RGB888 (0x24U << DCMIPP_PRCR_FORMAT_Pos) /*!< DCMIPP Format RGB888 */ 354 #define DCMIPP_FORMAT_RAW8 (0x2AU << DCMIPP_PRCR_FORMAT_Pos) /*!< DCMIPP Format RAW8 */ 355 #define DCMIPP_FORMAT_RAW10 (0x2BU << DCMIPP_PRCR_FORMAT_Pos) /*!< DCMIPP Format RAW10 */ 356 #define DCMIPP_FORMAT_RAW12 (0x2CU << DCMIPP_PRCR_FORMAT_Pos) /*!< DCMIPP Format RAW12 */ 357 #define DCMIPP_FORMAT_RAW14 (0x2DU << DCMIPP_PRCR_FORMAT_Pos) /*!< DCMIPP Format RAW14 */ 358 #define DCMIPP_FORMAT_MONOCHROME_8B (0x4AU << DCMIPP_PRCR_FORMAT_Pos) /*!< DCMIPP Format 8-bits */ 359 #define DCMIPP_FORMAT_MONOCHROME_10B (0x4BU << DCMIPP_PRCR_FORMAT_Pos) /*!< DCMIPP Format 10-bits */ 360 #define DCMIPP_FORMAT_MONOCHROME_12B (0x4CU << DCMIPP_PRCR_FORMAT_Pos) /*!< DCMIPP Format 12-bits */ 361 #define DCMIPP_FORMAT_MONOCHROME_14B (0x4DU << DCMIPP_PRCR_FORMAT_Pos) /*!< DCMIPP Format 14-bits */ 362 /** 363 * @} 364 */ 365 366 /** @defgroup DCMIPP_Extended_Data_Mode DCMIPP Extended Data Mode 367 * @{ 368 */ 369 #define DCMIPP_INTERFACE_8BITS 0U /*!< Interface captures 8bits on every pixel clock */ 370 #define DCMIPP_INTERFACE_10BITS (1U << DCMIPP_PRCR_EDM_Pos) /*!< Interface captures 10bits on every pixel clock */ 371 #define DCMIPP_INTERFACE_12BITS (2U << DCMIPP_PRCR_EDM_Pos) /*!< Interface captures 12bits on every pixel clock */ 372 #define DCMIPP_INTERFACE_14BITS (3U << DCMIPP_PRCR_EDM_Pos) /*!< Interface captures 14bits on every pixel clock */ 373 #define DCMIPP_INTERFACE_16BITS (4U << DCMIPP_PRCR_EDM_Pos) /*!< Interface captures 16bits on every pixel clock */ 374 /** 375 * @} 376 */ 377 378 /** @defgroup DCMIPP_HSYNC_Polarity DCMIPP HSYNC Polarity 379 * @{ 380 */ 381 #define DCMIPP_HSPOLARITY_LOW 0U /*!< Horizontal synchronization active Low */ 382 #define DCMIPP_HSPOLARITY_HIGH DCMIPP_PRCR_HSPOL /*!< Horizontal synchronization active High */ 383 /** 384 * @} 385 */ 386 /** @defgroup DCMIPP_VSYNC_Polarity DCMIPP VSYNC Polarity 387 * @{ 388 */ 389 #define DCMIPP_VSPOLARITY_LOW 0U /*!< Vertical synchronization active Low */ 390 #define DCMIPP_VSPOLARITY_HIGH DCMIPP_PRCR_VSPOL /*!< Vertical synchronization active High */ 391 /** 392 * @} 393 */ 394 /** @defgroup DCMIPP_PIXCK_Polarity DCMIPP PIXCK Polarity 395 * @{ 396 */ 397 #define DCMIPP_PCKPOLARITY_FALLING 0U /*!< Pixel clock active on Falling edge */ 398 #define DCMIPP_PCKPOLARITY_RISING DCMIPP_PRCR_PCKPOL /*!< Pixel clock active on Rising edge */ 399 /** 400 * @} 401 */ 402 403 /** @defgroup DCMIPP_Synchronization_Mode DCMIPP Synchronization Mode 404 * @{ 405 */ 406 #define DCMIPP_SYNCHRO_HARDWARE 0U /*!< Hardware Synchronization */ 407 #define DCMIPP_SYNCHRO_EMBEDDED DCMIPP_PRCR_ESS /*!< Embedded Synchronization */ 408 /** 409 * @} 410 */ 411 412 /** @defgroup DCMIPP_SWAP_CYCLES DCMIPP Swap Cycles 413 * @{ 414 */ 415 #define DCMIPP_SWAPCYCLES_DISABLE 0U /*!< swap data from cycle 0 vs cycle 1 */ 416 #define DCMIPP_SWAPCYCLES_ENABLE (DCMIPP_PRCR_SWAPCYCLES) /*!< swap data from cycle 0 vs cycle 1 */ 417 /** 418 * @} 419 */ 420 421 /** @defgroup DCMIPP_SWAP_BITS DCMIPP Swap Bits 422 * @{ 423 */ 424 #define DCMIPP_SWAPBITS_DISABLE 0U /*!< swap lsb vs msb within each received component */ 425 #define DCMIPP_SWAPBITS_ENABLE (DCMIPP_PRCR_SWAPBITS) /*!< swap lsb vs msb within each received component */ 426 /** 427 * @} 428 */ 429 430 /** @defgroup DCMIPP_Pipe_Line_Decimation DCMIPP Pipe Line Decimation 431 * @{ 432 */ 433 /** @defgroup DCMIPP_Line_Select_Mode DCMIPP Line Select Mode 434 * @{ 435 */ 436 #define DCMIPP_LSM_ALL 0U /*!< Interface captures all received lines */ 437 #define DCMIPP_LSM_ALTERNATE_2 (1U << DCMIPP_P0PPCR_LSM_Pos ) /*!< Interface captures one line out of two */ 438 /** 439 * @} 440 */ 441 /** @defgroup DCMIPP_Line_Start_Mode DCMIPP Line Start Mode 442 * @{ 443 */ 444 #define DCMIPP_OELS_ODD 0U /*!< Interface captures first line from the frame start, 445 second one is dropped */ 446 #define DCMIPP_OELS_EVEN (1U << DCMIPP_P0PPCR_OELS_Pos) /*!< Interface captures second line from the frame 447 start, first one is dropped */ 448 /** 449 * @} 450 */ 451 /** 452 * @} 453 */ 454 455 /** @defgroup DCMIPP_Pipe_Byte_Decimation DCMIPP Pipe Byte Decimation 456 * @{ 457 */ 458 /** @defgroup DCMIPP_Byte_Select_Mode DCMIPP Byte Select Mode 459 * @{ 460 */ 461 #define DCMIPP_BSM_ALL 0U /*!< Interface captures all received data */ 462 #define DCMIPP_BSM_DATA_OUT_2 (1U << DCMIPP_P0PPCR_BSM_Pos) /*!< Interface captures 1 data out of 2 */ 463 #define DCMIPP_BSM_BYTE_OUT_4 (2U << DCMIPP_P0PPCR_BSM_Pos) /*!< Interface captures 1 byte out of 4 */ 464 #define DCMIPP_BSM_2BYTE_OUT_4 (3U << DCMIPP_P0PPCR_BSM_Pos) /*!< Interface captures 2 byte out of 4 */ 465 /** 466 * @} 467 */ 468 /** @defgroup DCMIPP_Byte_Start_Mode DCMIPP Byte Start Mode 469 * @{ 470 */ 471 #define DCMIPP_OEBS_ODD 0U /*!< Interface captures first data (byte or double byte) 472 from the frame/line start,second one being dropped */ 473 #define DCMIPP_OEBS_EVEN (1U << DCMIPP_P0PPCR_OEBS_Pos) /*!< Interface captures second data (byte or double byte) 474 from the frame/line start, first one is dropped */ 475 /** 476 * @} 477 */ 478 /** 479 * @} 480 */ 481 482 /** @defgroup DCMIPP_Memory DCMIPP Memory 483 * @{ 484 */ 485 #define DCMIPP_MEMORY_ADDRESS_0 0U /*!< Base destination address */ 486 #define DCMIPP_MEMORY_ADDRESS_1 1U /*!< Second destination address */ 487 /** 488 * @} 489 */ 490 /** @defgroup DCMIPP_LineMult DCMIPP Line Mult 491 * @{ 492 */ 493 #define DCMIPP_MULTILINE_1_LINE 0U /*!< Event after every 1 line */ 494 #define DCMIPP_MULTILINE_2_LINES (1U << DCMIPP_P0PPCR_LINEMULT_Pos) /*!< Event after every 2 lines */ 495 #define DCMIPP_MULTILINE_4_LINES (2U << DCMIPP_P0PPCR_LINEMULT_Pos) /*!< Event after every 4 lines */ 496 #define DCMIPP_MULTILINE_8_LINES (3U << DCMIPP_P0PPCR_LINEMULT_Pos) /*!< Event after every 8 lines */ 497 #define DCMIPP_MULTILINE_16_LINES (4U << DCMIPP_P0PPCR_LINEMULT_Pos) /*!< Event after every 16 lines */ 498 #define DCMIPP_MULTILINE_32_LINES (5U << DCMIPP_P0PPCR_LINEMULT_Pos) /*!< Event after every 32 lines */ 499 #define DCMIPP_MULTILINE_64_LINES (6U << DCMIPP_P0PPCR_LINEMULT_Pos) /*!< Event after every 64 lines */ 500 #define DCMIPP_MULTILINE_128_LINES (7U << DCMIPP_P0PPCR_LINEMULT_Pos) /*!< Event after every 128 lines */ 501 /** 502 * @} 503 */ 504 /** @defgroup DCMIPP_Interrupt_Sources DCMIPP Interrupt sources 505 * @{ 506 */ 507 #define DCMIPP_IT_AXI_TRANSFER_ERROR DCMIPP_CMIER_ATXERRIE /*!< IPPLUG AXI Transfer error interrupt */ 508 #define DCMIPP_IT_PARALLEL_SYNC_ERROR DCMIPP_CMIER_PRERRIE /*!< Sync error interrupt on parallel interface */ 509 #define DCMIPP_IT_PIPE0_FRAME DCMIPP_CMIER_P0FRAMEIE /*!< Frame capture interrupt complete for pipe0 */ 510 #define DCMIPP_IT_PIPE0_VSYNC DCMIPP_CMIER_P0VSYNCIE /*!< Vertical sync interrupt for pipe0 */ 511 #define DCMIPP_IT_PIPE0_LINE DCMIPP_CMIER_P0LINEIE /*!< Multiline interrupt for pipe0 */ 512 #define DCMIPP_IT_PIPE0_LIMIT DCMIPP_CMIER_P0LIMITIE /*!< Limit interrupt for pipe0 */ 513 #define DCMIPP_IT_PIPE0_OVR DCMIPP_CMIER_P0OVRIE /*!< Overrun interrupt for pipe0 */ 514 /** 515 * @} 516 */ 517 518 /** @defgroup DCMIPP_Interrupt_Flags DCMIPP Interrupt Flags 519 * @{ 520 */ 521 #define DCMIPP_FLAG_AXI_TRANSFER_ERROR DCMIPP_CMSR2_ATXERRF /*!< IPPLUG AXI Transfer error interrupt flag */ 522 #define DCMIPP_FLAG_PARALLEL_SYNC_ERROR DCMIPP_CMSR2_PRERRF /*!< Synchronization error interrupt on parallel interface 523 flag */ 524 #define DCMIPP_FLAG_PIPE0_FRAME DCMIPP_CMSR2_P0FRAMEF /*!< Frame capture interrupt complete for pipe0 flag */ 525 #define DCMIPP_FLAG_PIPE0_VSYNC DCMIPP_CMSR2_P0VSYNCF /*!< Vertical synch interrupt for pipe0 flag */ 526 #define DCMIPP_FLAG_PIPE0_LINE DCMIPP_CMSR2_P0LINEF /*!< Multiline interrupt for pipe0 flag */ 527 #define DCMIPP_FLAG_PIPE0_LIMIT DCMIPP_CMSR2_P0LIMITF /*!< Limit interrupt for pipe0 flag */ 528 #define DCMIPP_FLAG_PIPE0_OVR DCMIPP_CMSR2_P0OVRF /*!< Overrun interrupt for pipe0 flag */ 529 /** 530 * @} 531 */ 532 533 /** 534 * @} 535 */ 536 537 /* Exported macro ------------------------------------------------------------*/ 538 /** @defgroup DCMIPP_Exported_Macros DCMIPP Exported Macros 539 * @brief DCMIPP Exported Macros 540 * @{ 541 */ 542 /** 543 * @brief Enable the specified DCMIPP interrupts. 544 * @param __HANDLE__ DCMIPP handle 545 * @param __INTERRUPT__ specifies the DCMIPP interrupt sources to be enabled. 546 * This parameter can be any combination of the following values: 547 * @arg DCMIPP_IT_AXI_TRANSFER_ERR IPPLUG AXI Transfer error interrupt 548 * @arg DCMIPP_IT_PARALLEL_SYNC_ERR Synchronization error interrupt on parallel interface 549 * @arg DCMIPP_IT_PIPE0_FRAME Frame capture complete interrupt for the pipe0 550 * @arg DCMIPP_IT_PIPE0_VSYNC Vertical sync interrupt for the pipe0 551 * @arg DCMIPP_IT_PIPE0_LINE Multi-line capture complete interrupt for the pipe0 552 * @arg DCMIPP_IT_PIPE0_LIMIT Limit interrupt for the pipe0 553 * @arg DCMIPP_IT_PIPE0_OVR Overrun interrupt for the pipe0 554 * @retval None 555 */ 556 #define __HAL_DCMIPP_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CMIER |= (__INTERRUPT__)) 557 558 /** 559 * @brief Disable the specified DCMIPP interrupts. 560 * @param __HANDLE__ DCMIPP handle 561 * @param __INTERRUPT__ specifies the DCMIPP interrupt sources to be disabled. 562 * This parameter can be any combination of the following values: 563 * @arg DCMIPP_IT_AXI_TRANSFER_ERR IPPLUG AXI Transfer error interrupt 564 * @arg DCMIPP_IT_PARALLEL_SYNC_ERR Synchronization error interrupt on parallel interface 565 * @arg DCMIPP_IT_PIPE0_FRAME Frame capture complete interrupt for the pipe0 566 * @arg DCMIPP_IT_PIPE0_VSYNC Vertical sync interrupt for the pipe0 567 * @arg DCMIPP_IT_PIPE0_LINE Multi-line capture complete interrupt for the pipe0 568 * @arg DCMIPP_IT_PIPE0_LIMIT Limit interrupt for the pipe0 569 * @arg DCMIPP_IT_PIPE0_OVR Overrun interrupt for the pipe0 570 * @retval None 571 */ 572 #define __HAL_DCMIPP_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CMIER &= ~(__INTERRUPT__)) 573 574 /** 575 * @brief Get the DCMIPP pending interrupt flags. 576 * @param __HANDLE__ DCMIPP handle 577 * @param __FLAG__ Get the specified flag. 578 * This parameter can be any combination of the following values: 579 * @arg DCMIPP_FLAG_AXI_TRANSFER_ERR IPPLUG AXI Transfer error interrupt flag 580 * @arg DCMIPP_FLAG_PARALLEL_SYNC_ERR Synchronization error interrupt flag on parallel interface 581 * @arg DCMIPP_FLAG_PIPE0_FRAME Frame capture complete interrupt flag for the pipe0 582 * @arg DCMIPP_FLAG_PIPE0_VSYNC Vertical sync interrupt flag for the pipe0 583 * @arg DCMIPP_FLAG_PIPE0_LINE Multi-line capture complete interrupt flag for the pipe0 584 * @arg DCMIPP_FLAG_PIPE0_LIMIT Limit interrupt flag for the pipe0 585 * @arg DCMIPP_FLAG_PIPE0_OVR Overrun interrupt flag for the pipe0 586 * @retval The state of FLAG (SET or RESET). 587 */ 588 #define __HAL_DCMIPP_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CMSR2 & (__FLAG__)) 589 590 /** 591 * @brief Clear the DCMIPP pending interrupt flags. 592 * @param __HANDLE__ DCMIPP handle 593 * @param __FLAG__ specifies the flag to clear. 594 * This parameter can be any combination of the following values: 595 * @arg DCMIPP_FLAG_AXI_TRANSFER_ERR IPPLUG AXI Transfer error interrupt 596 * @arg DCMIPP_FLAG_PARALLEL_SYNC_ERR Synchronization error interrupt on parallel interface 597 * @arg DCMIPP_FLAG_PIPE0_FRAME Frame capture complete interrupt for the pipe0 598 * @arg DCMIPP_FLAG_PIPE0_VSYNC Vertical sync interrupt for the pipe0 599 * @arg DCMIPP_FLAG_PIPE0_LINE Multi-line capture complete interrupt for the pipe0 600 * @arg DCMIPP_FLAG_PIPE0_LIMIT Limit interrupt for the pipe0 601 * @arg DCMIPP_FLAG_PIPE0_OVR Overrun interrupt for the pipe0 602 * @retval None 603 */ 604 #define __HAL_DCMIPP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CMFCR = (__FLAG__)) 605 606 /** 607 * @brief Checks whether the specified DCMIPP interrupt is enabled or not. 608 * @param __HANDLE__ DCMIPP handle 609 * @param __INTERRUPT__ specifies the DCMIPP interrupt sources to be checked. 610 * This parameter can be any combination of the following values: 611 * @arg DCMIPP_IT_AXI_TRANSFER_ERR IPPLUG AXI Transfer error interrupt 612 * @arg DCMIPP_IT_PARALLEL_SYNC_ERR Synchronization error interrupt on parallel interface 613 * @arg DCMIPP_IT_PIPE0_FRAME Frame capture complete interrupt for the pipe0 614 * @arg DCMIPP_IT_PIPE0_VSYNC Vertical sync interrupt for the pipe0 615 * @arg DCMIPP_IT_PIPE0_LINE Multi-line capture complete interrupt for the pipe0 616 * @arg DCMIPP_IT_PIPE0_LIMIT Limit interrupt for the pipe0 617 * @arg DCMIPP_IT_PIPE0_OVR Overrun interrupt for the pipe0 618 * @retval The state of DCMIPP interrupt (SET or RESET). 619 */ 620 #define __HAL_DCMIPP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CMIER & \ 621 (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 622 623 /** 624 * @} 625 */ 626 627 /* Exported functions --------------------------------------------------------*/ 628 /** @addtogroup DCMIPP_Exported_Functions 629 * @{ 630 */ 631 632 /** @addtogroup DCMIPP_Initialization_De-Initialization_Functions DCMIPP Initialization De-Initialization Functions 633 * @brief Initialization and De-Initialization Functions 634 * @{ 635 */ 636 HAL_StatusTypeDef HAL_DCMIPP_Init(DCMIPP_HandleTypeDef *hdcmipp); 637 HAL_StatusTypeDef HAL_DCMIPP_DeInit(DCMIPP_HandleTypeDef *hdcmipp); 638 void HAL_DCMIPP_MspInit(DCMIPP_HandleTypeDef *hdcmipp); 639 void HAL_DCMIPP_MspDeInit(DCMIPP_HandleTypeDef *hdcmipp); 640 /** 641 * @} 642 */ 643 644 /** @defgroup DCMIPP_Configuration_Functions DCMIPP Configuration Functions 645 * @brief Configuration Functions 646 * @{ 647 */ 648 649 HAL_StatusTypeDef HAL_DCMIPP_PARALLEL_SetConfig(DCMIPP_HandleTypeDef *hdcmipp, 650 const DCMIPP_ParallelConfTypeDef *pParallelConfig); 651 652 HAL_StatusTypeDef HAL_DCMIPP_PIPE_SetConfig(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe, 653 const DCMIPP_PipeConfTypeDef *pPipeConfig); 654 HAL_StatusTypeDef HAL_DCMIPP_SetIPPlugConfig(DCMIPP_HandleTypeDef *hdcmipp, 655 const DCMIPP_IPPlugConfTypeDef *pIPPlugConfig); 656 /** 657 * @} 658 */ 659 660 /** @addtogroup DCMIPP_IO_operation_Functions DCMIPP IO operation Functions 661 * @brief IO Operation Functions 662 * @{ 663 */ 664 HAL_StatusTypeDef HAL_DCMIPP_PIPE_Start(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe, uint32_t DstAddress, 665 uint32_t CaptureMode); 666 HAL_StatusTypeDef HAL_DCMIPP_PIPE_DoubleBufferStart(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe, uint32_t DstAddress0, 667 uint32_t DstAddress1, uint32_t CaptureMode); 668 HAL_StatusTypeDef HAL_DCMIPP_PIPE_Stop(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); 669 HAL_StatusTypeDef HAL_DCMIPP_PIPE_Suspend(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); 670 HAL_StatusTypeDef HAL_DCMIPP_PIPE_Resume(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); 671 672 /** 673 * @} 674 */ 675 676 /** @addtogroup DCMIPP_IRQ_and_Callbacks_Functions DCMIPP IRQ and Callbacks Functions 677 * @brief IRQ and Callbacks functions 678 * @{ 679 */ 680 /** @addtogroup DCMIPP_IRQHandler_Function IRQHandler Function 681 * @{ 682 */ 683 void HAL_DCMIPP_IRQHandler(DCMIPP_HandleTypeDef *hdcmipp); 684 /** 685 * @} 686 */ 687 /** @addtogroup DCMIPP_Callback_Functions Callback Functions 688 * @{ 689 */ 690 void HAL_DCMIPP_PIPE_FrameEventCallback(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); 691 void HAL_DCMIPP_PIPE_VsyncEventCallback(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); 692 void HAL_DCMIPP_PIPE_LineEventCallback(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); 693 void HAL_DCMIPP_PIPE_LimitEventCallback(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); 694 void HAL_DCMIPP_PIPE_ErrorCallback(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); 695 void HAL_DCMIPP_ErrorCallback(DCMIPP_HandleTypeDef *hdcmipp); 696 /** 697 * @} 698 */ 699 700 /** @addtogroup DCMIPP_RegisterCallback_Functions Register Callback Functions 701 * @{ 702 */ 703 /* Callbacks Register/UnRegister functions ***********************************/ 704 #if (USE_HAL_DCMIPP_REGISTER_CALLBACKS == 1) 705 HAL_StatusTypeDef HAL_DCMIPP_RegisterCallback(DCMIPP_HandleTypeDef *hdcmipp, HAL_DCMIPP_CallbackIDTypeDef CallbackID, 706 pDCMIPP_CallbackTypeDef pCallback); 707 HAL_StatusTypeDef HAL_DCMIPP_UnRegisterCallback(DCMIPP_HandleTypeDef *hdcmipp, 708 HAL_DCMIPP_CallbackIDTypeDef CallbackID); 709 710 HAL_StatusTypeDef HAL_DCMIPP_PIPE_RegisterCallback(DCMIPP_HandleTypeDef *hdcmipp, 711 HAL_DCMIPP_PIPE_CallbackIDTypeDef CallbackID, 712 pDCMIPP_PIPE_CallbackTypeDef pCallback); 713 HAL_StatusTypeDef HAL_DCMIPP_PIPE_UnRegisterCallback(DCMIPP_HandleTypeDef *hdcmipp, 714 HAL_DCMIPP_PIPE_CallbackIDTypeDef CallbackID); 715 #endif /* USE_HAL_DCMIPP_REGISTER_CALLBACKS */ 716 /** 717 * @} 718 */ 719 720 /** 721 * @} 722 */ 723 724 /** @defgroup DCMIPP_Decimation_Functions DCMIPP Decimation Functions 725 * @{ 726 */ 727 HAL_StatusTypeDef HAL_DCMIPP_PIPE_SetBytesDecimationConfig(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe, 728 uint32_t SelectStart, uint32_t SelectMode); 729 HAL_StatusTypeDef HAL_DCMIPP_PIPE_SetLinesDecimationConfig(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe, 730 uint32_t SelectStart, uint32_t SelectMode); 731 /** 732 * @} 733 */ 734 /** @defgroup DCMIPP_Crop_Functions DCMIPP Crop Functions 735 * @{ 736 */ 737 HAL_StatusTypeDef HAL_DCMIPP_PIPE_SetCropConfig(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe, 738 const DCMIPP_CropConfTypeDef *pCropConfig); 739 HAL_StatusTypeDef HAL_DCMIPP_PIPE_EnableCrop(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); 740 HAL_StatusTypeDef HAL_DCMIPP_PIPE_DisableCrop(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); 741 /** 742 * @} 743 */ 744 /** @defgroup DCMIPP_Line_Event_Functions DCMIPP Line Event Functions 745 * @{ 746 */ 747 HAL_StatusTypeDef HAL_DCMIPP_PIPE_EnableLineEvent(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe, uint32_t Line); 748 HAL_StatusTypeDef HAL_DCMIPP_PIPE_DisableLineEvent(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); 749 /** 750 * @} 751 */ 752 /** @defgroup DCMIPP_LimitEvent_Functions DCMIPP Limit Event Functions 753 * @{ 754 */ 755 HAL_StatusTypeDef HAL_DCMIPP_PIPE_EnableLimitEvent(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe, uint32_t Limit); 756 HAL_StatusTypeDef HAL_DCMIPP_PIPE_DisableLimitEvent(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); 757 /** 758 * @} 759 */ 760 761 /** @defgroup DCMIPP_PeripheralControl_Functions DCMIPP Peripheral Control Functions 762 * @{ 763 */ 764 HAL_StatusTypeDef HAL_DCMIPP_PIPE_SetFrameRate(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe, uint32_t FrameRate); 765 HAL_StatusTypeDef HAL_DCMIPP_PIPE_SetCaptureMode(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe, uint32_t CaptureMode); 766 HAL_StatusTypeDef HAL_DCMIPP_PIPE_EnableCapture(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); 767 HAL_StatusTypeDef HAL_DCMIPP_PIPE_SetMemoryAddress(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe, uint32_t Memory, 768 uint32_t DstAddress); 769 HAL_StatusTypeDef HAL_DCMIPP_PIPE_PARALLEL_SetInputPixelFormat(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe, 770 uint32_t InputPixelFormat); 771 HAL_StatusTypeDef HAL_DCMIPP_PARALLEL_SetSyncUnmask(DCMIPP_HandleTypeDef *hdcmipp, 772 const DCMIPP_EmbeddedSyncUnmaskTypeDef *SyncUnmask); 773 /** 774 * @} 775 */ 776 777 /** @defgroup DCMIPP_Frame_Counter_Functions DCMIPP Frame Counter Functions 778 * @{ 779 */ 780 HAL_StatusTypeDef HAL_DCMIPP_PIPE_ResetFrameCounter(DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); 781 HAL_StatusTypeDef HAL_DCMIPP_PIPE_ReadFrameCounter(const DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe, 782 uint32_t *pCounter); 783 /** 784 * @} 785 */ 786 /** @defgroup DCMIPP_Data_Counter_Functions DCMIPP Data Counter Functions 787 * @{ 788 */ 789 HAL_StatusTypeDef HAL_DCMIPP_PIPE_GetDataCounter(const DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe, 790 uint32_t *pCounter); 791 /** 792 * @} 793 */ 794 795 /** @addtogroup DCMIPP_State_and_Error_Functions DCMIPP State and Error Functions 796 * @{ 797 */ 798 HAL_DCMIPP_StateTypeDef HAL_DCMIPP_GetState(const DCMIPP_HandleTypeDef *hdcmipp); 799 HAL_DCMIPP_PipeStateTypeDef HAL_DCMIPP_PIPE_GetState(const DCMIPP_HandleTypeDef *hdcmipp, uint32_t Pipe); 800 uint32_t HAL_DCMIPP_GetError(const DCMIPP_HandleTypeDef *hdcmipp); 801 802 /** 803 * @} 804 */ 805 /** 806 * @} 807 */ 808 809 /* Private macros ------------------------------------------------------------*/ 810 /** @defgroup DCMIPP_Private_Macros DCMIPP Private Macros 811 * @{ 812 */ 813 #define IS_DCMIPP_PIPE(PIPE) ((PIPE) == DCMIPP_PIPE0) 814 #define IS_DCMIPP_FORMAT(FORMAT) (((FORMAT) == DCMIPP_FORMAT_BYTE) ||\ 815 ((FORMAT) == DCMIPP_FORMAT_YUV422) ||\ 816 ((FORMAT) == DCMIPP_FORMAT_RGB565) ||\ 817 ((FORMAT) == DCMIPP_FORMAT_RGB666) ||\ 818 ((FORMAT) == DCMIPP_FORMAT_RGB888) ||\ 819 ((FORMAT) == DCMIPP_FORMAT_RAW8 ) ||\ 820 ((FORMAT) == DCMIPP_FORMAT_RAW10 ) ||\ 821 ((FORMAT) == DCMIPP_FORMAT_RAW12 ) ||\ 822 ((FORMAT) == DCMIPP_FORMAT_RAW14 ) ||\ 823 ((FORMAT) == DCMIPP_FORMAT_MONOCHROME_8B) ||\ 824 ((FORMAT) == DCMIPP_FORMAT_MONOCHROME_10B) ||\ 825 ((FORMAT) == DCMIPP_FORMAT_MONOCHROME_12B) ||\ 826 ((FORMAT) == DCMIPP_FORMAT_MONOCHROME_14B)) 827 828 829 #define IS_DCMIPP_PCKPOLARITY(POLARITY)(((POLARITY) == DCMIPP_PCKPOLARITY_FALLING) || \ 830 ((POLARITY) == DCMIPP_PCKPOLARITY_RISING)) 831 832 #define IS_DCMIPP_VSPOLARITY(POLARITY)(((POLARITY) == DCMIPP_VSPOLARITY_LOW) || \ 833 ((POLARITY) == DCMIPP_VSPOLARITY_HIGH)) 834 835 #define IS_DCMIPP_HSPOLARITY(POLARITY)(((POLARITY) == DCMIPP_HSPOLARITY_LOW) || \ 836 ((POLARITY) == DCMIPP_HSPOLARITY_HIGH)) 837 838 839 #define IS_DCMIPP_EXTENDED_DATA_MODE(INTERFACE)(((INTERFACE) == DCMIPP_INTERFACE_8BITS ) ||\ 840 ((INTERFACE) == DCMIPP_INTERFACE_10BITS) ||\ 841 ((INTERFACE) == DCMIPP_INTERFACE_12BITS) ||\ 842 ((INTERFACE) == DCMIPP_INTERFACE_14BITS) ||\ 843 ((INTERFACE) == DCMIPP_INTERFACE_16BITS)) 844 845 #define IS_DCMIPP_SYNC_MODE(SYNC_MODE) (((SYNC_MODE) == DCMIPP_SYNCHRO_HARDWARE) ||\ 846 ((SYNC_MODE) == DCMIPP_SYNCHRO_EMBEDDED)) 847 848 #define IS_DCMIPP_SWAP_BITS(SWAP_BITS) (((SWAP_BITS) == DCMIPP_SWAPBITS_ENABLE) ||\ 849 ((SWAP_BITS) == DCMIPP_SWAPBITS_DISABLE)) 850 851 #define IS_DCMIPP_SWAP_CYCLES(SWAP_CYCLES) (((SWAP_CYCLES) == DCMIPP_SWAPCYCLES_ENABLE) ||\ 852 ((SWAP_CYCLES) == DCMIPP_SWAPCYCLES_DISABLE)) 853 854 855 #define IS_DCMIPP_FRAME_RATE(FRAME_RATE) (((FRAME_RATE) == DCMIPP_FRAME_RATE_ALL) ||\ 856 ((FRAME_RATE) == DCMIPP_FRAME_RATE_1_OVER_2) ||\ 857 ((FRAME_RATE) == DCMIPP_FRAME_RATE_1_OVER_4) ||\ 858 ((FRAME_RATE) == DCMIPP_FRAME_RATE_1_OVER_8)) 859 #define IS_DCMIPP_CLIENT(CLIENT) (((CLIENT) == DCMIPP_CLIENT1)) 860 861 #define IS_DCMIPP_DPREG_END(DPREG_END) ((DPREG_END) <= 0x1FU) 862 #define IS_DCMIPP_DPREG_START(DPREG_START) ((DPREG_START) <= 0x1FU) 863 864 #define IS_DCMIPP_MAX_OUTSTANDING_TRANSACTIONS(OUTS_TRANS) (((OUTS_TRANS) == DCMIPP_OUTSTANDING_TRANSACTION_NONE )||\ 865 ((OUTS_TRANS) == DCMIPP_OUTSTANDING_TRANSACTION_2 )||\ 866 ((OUTS_TRANS) == DCMIPP_OUTSTANDING_TRANSACTION_3 )||\ 867 ((OUTS_TRANS) == DCMIPP_OUTSTANDING_TRANSACTION_4 )) 868 869 #define IS_DCMIPP_MEMORY_PAGE_SIZE(MEMORY_PAGE_SIZE) (((MEMORY_PAGE_SIZE) == DCMIPP_MEMORY_PAGE_SIZE_64BYTES) ||\ 870 ((MEMORY_PAGE_SIZE) == DCMIPP_MEMORY_PAGE_SIZE_128BYTES) ||\ 871 ((MEMORY_PAGE_SIZE) == DCMIPP_MEMORY_PAGE_SIZE_256BYTES) ||\ 872 ((MEMORY_PAGE_SIZE) == DCMIPP_MEMORY_PAGE_SIZE_512BYTES) ||\ 873 ((MEMORY_PAGE_SIZE) == DCMIPP_MEMORY_PAGE_SIZE_1KBYTES) ||\ 874 ((MEMORY_PAGE_SIZE) == DCMIPP_MEMORY_PAGE_SIZE_2KBYTES) ||\ 875 ((MEMORY_PAGE_SIZE) == DCMIPP_MEMORY_PAGE_SIZE_4KBYTES) ||\ 876 ((MEMORY_PAGE_SIZE) == DCMIPP_MEMORY_PAGE_SIZE_8KBYTES)) 877 #define IS_DCMIPP_TRAFFIC(TRAFFIC) (((TRAFFIC) == DCMIPP_TRAFFIC_BURST_SIZE_8BYTES ) ||\ 878 ((TRAFFIC) == DCMIPP_TRAFFIC_BURST_SIZE_16BYTES) ||\ 879 ((TRAFFIC) == DCMIPP_TRAFFIC_BURST_SIZE_32BYTES) ||\ 880 ((TRAFFIC) == DCMIPP_TRAFFIC_BURST_SIZE_64BYTES) ||\ 881 ((TRAFFIC) == DCMIPP_TRAFFIC_BURST_SIZE_128BYTES)) 882 #define IS_DCMIPP_WLRU_RATIO(WLRU_RATIO) ((WLRU_RATIO)<= 0xFU) 883 884 #define IS_DCMIPP_CAPTURE_MODE(CAPTURE_MODE) (((CAPTURE_MODE) == DCMIPP_MODE_CONTINUOUS)||\ 885 ((CAPTURE_MODE) == DCMIPP_MODE_SNAPSHOT)) 886 887 #define IS_DCMIPP_PIPE_CROP_AREA(CROP_AREA)(((CROP_AREA) == DCMIPP_POSITIVE_AREA) ||\ 888 ((CROP_AREA) == DCMIPP_NEGATIVE_AREA)) 889 890 #define IS_DCMIPP_PIPE_CROP_HSIZE(CROP_HSIZE) (((CROP_HSIZE) >= 0x1U) && ((CROP_HSIZE) <= 0xFFFU)) 891 #define IS_DCMIPP_PIPE_CROP_VSIZE(CROP_VSIZE) (((CROP_VSIZE) >= 0x1U) && ((CROP_VSIZE) <= 0xFFFU)) 892 #define IS_DCMIPP_PIPE_CROP_VSTART(CROP_VSTART) ((CROP_VSTART) <= 0xFFFU) 893 #define IS_DCMIPP_PIPE_CROP_HSTART(CROP_HSTART) ((CROP_HSTART) <= 0xFFFU) 894 895 #define IS_DCMIPP_BYTE_SELECT_MODE(BYTE_SELECT) (((BYTE_SELECT) == DCMIPP_BSM_ALL) ||\ 896 ((BYTE_SELECT) == DCMIPP_BSM_DATA_OUT_2) ||\ 897 ((BYTE_SELECT) == DCMIPP_BSM_BYTE_OUT_4) ||\ 898 ((BYTE_SELECT) == DCMIPP_BSM_2BYTE_OUT_4)) 899 900 #define IS_DCMIPP_BYTE_SELECT_START(BYTE_START)(((BYTE_START) == DCMIPP_OEBS_ODD) ||\ 901 ((BYTE_START) == DCMIPP_OEBS_EVEN)) 902 903 #define IS_DCMIPP_LINE_SELECT_MODE(LINE_SELECT) (((LINE_SELECT) == DCMIPP_LSM_ALL) ||\ 904 ((LINE_SELECT) == DCMIPP_LSM_ALTERNATE_2)) 905 906 #define IS_DCMIPP_LINE_SELECT_START(LINE__START)(((LINE__START) == DCMIPP_OELS_ODD) ||\ 907 ((LINE__START) == DCMIPP_OELS_EVEN)) 908 909 910 #define IS_DCMIPP_MEMORY_ADDRESS(MEMORY_ADDRESS) (((MEMORY_ADDRESS) == DCMIPP_MEMORY_ADDRESS_0) ||\ 911 ((MEMORY_ADDRESS) == DCMIPP_MEMORY_ADDRESS_1)) 912 913 #define IS_DCMIPP_DATA_LIMIT(DATA_LIMIT) (((DATA_LIMIT) >=1U ) && ((DATA_LIMIT) <= 0xFFFFFFU)) 914 915 916 #define IS_DCMIPP_PIPE_MULTILINE(MULTILINE) (((MULTILINE) == DCMIPP_MULTILINE_1_LINE ) ||\ 917 ((MULTILINE) == DCMIPP_MULTILINE_2_LINES) ||\ 918 ((MULTILINE) == DCMIPP_MULTILINE_4_LINES) ||\ 919 ((MULTILINE) == DCMIPP_MULTILINE_8_LINES) ||\ 920 ((MULTILINE) == DCMIPP_MULTILINE_16_LINES) ||\ 921 ((MULTILINE) == DCMIPP_MULTILINE_32_LINES) ||\ 922 ((MULTILINE) == DCMIPP_MULTILINE_64_LINES) ||\ 923 ((MULTILINE) == DCMIPP_MULTILINE_128_LINES)) 924 925 /** 926 * @} 927 */ 928 929 /** 930 * @} 931 */ 932 933 #endif /* DCMIPP */ 934 935 /** 936 * @} 937 */ 938 939 #ifdef __cplusplus 940 } 941 #endif 942 943 #endif /* __STM32H7RSxx_HAL_DCMIPP_H */ 944
