1 /** 2 ****************************************************************************** 3 * @file stm32h5xx_hal_usart.h 4 * @author MCD Application Team 5 * @brief Header file of USART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2023 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H5xx_HAL_USART_H 21 #define STM32H5xx_HAL_USART_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h5xx_hal_def.h" 29 30 /** @addtogroup STM32H5xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup USART 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup USART_Exported_Types USART Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief USART Init Structure definition 45 */ 46 typedef struct 47 { 48 uint32_t BaudRate; /*!< This member configures the Usart communication baud rate. 49 The baud rate is computed using the following formula: 50 Baud Rate Register[15:4] = ((2 * fclk_pres) / 51 ((huart->Init.BaudRate)))[15:4] 52 Baud Rate Register[3] = 0 53 Baud Rate Register[2:0] = (((2 * fclk_pres) / 54 ((huart->Init.BaudRate)))[3:0]) >> 1 55 where fclk_pres is the USART input clock frequency (fclk) 56 divided by a prescaler. 57 @note Oversampling by 8 is systematically applied to 58 achieve high baud rates. */ 59 60 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 61 This parameter can be a value of @ref USARTEx_Word_Length. */ 62 63 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 64 This parameter can be a value of @ref USART_Stop_Bits. */ 65 66 uint32_t Parity; /*!< Specifies the parity mode. 67 This parameter can be a value of @ref USART_Parity 68 @note When parity is enabled, the computed parity is inserted 69 at the MSB position of the transmitted data (9th bit when 70 the word length is set to 9 data bits; 8th bit when the 71 word length is set to 8 data bits). */ 72 73 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 74 This parameter can be a value of @ref USART_Mode. */ 75 76 uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock. 77 This parameter can be a value of @ref USART_Clock_Polarity. */ 78 79 uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made. 80 This parameter can be a value of @ref USART_Clock_Phase. */ 81 82 uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted 83 data bit (MSB) has to be output on the SCLK pin in synchronous mode. 84 This parameter can be a value of @ref USART_Last_Bit. */ 85 86 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the USART clock source. 87 This parameter can be a value of @ref USART_ClockPrescaler. */ 88 } USART_InitTypeDef; 89 90 /** 91 * @brief HAL USART State structures definition 92 */ 93 typedef enum 94 { 95 HAL_USART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized */ 96 HAL_USART_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 97 HAL_USART_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ 98 HAL_USART_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */ 99 HAL_USART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ 100 HAL_USART_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission Reception process is ongoing */ 101 HAL_USART_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ 102 HAL_USART_STATE_ERROR = 0x04U /*!< Error */ 103 } HAL_USART_StateTypeDef; 104 105 /** 106 * @brief USART clock sources definitions 107 */ 108 typedef enum 109 { 110 USART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 111 USART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ 112 USART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ 113 USART_CLOCKSOURCE_CSI = 0x04U, /*!< CSI clock source */ 114 USART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ 115 USART_CLOCKSOURCE_PLL2Q = 0x10U, /*!< PLL2 clock source */ 116 USART_CLOCKSOURCE_PLL3Q = 0x20U, /*!< PLL3 clock source */ 117 USART_CLOCKSOURCE_UNDEFINED = 0x40U /*!< Undefined clock source */ 118 } USART_ClockSourceTypeDef; 119 120 /** 121 * @brief USART handle Structure definition 122 */ 123 typedef struct __USART_HandleTypeDef 124 { 125 USART_TypeDef *Instance; /*!< USART registers base address */ 126 127 USART_InitTypeDef Init; /*!< USART communication parameters */ 128 129 const uint8_t *pTxBuffPtr; /*!< Pointer to USART Tx transfer Buffer */ 130 131 uint16_t TxXferSize; /*!< USART Tx Transfer size */ 132 133 __IO uint16_t TxXferCount; /*!< USART Tx Transfer Counter */ 134 135 uint8_t *pRxBuffPtr; /*!< Pointer to USART Rx transfer Buffer */ 136 137 uint16_t RxXferSize; /*!< USART Rx Transfer size */ 138 139 __IO uint16_t RxXferCount; /*!< USART Rx Transfer Counter */ 140 141 uint16_t Mask; /*!< USART Rx RDR register mask */ 142 143 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 144 145 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 146 147 uint32_t SlaveMode; /*!< Enable/Disable USART SPI Slave Mode. This parameter can be a value 148 of @ref USARTEx_Slave_Mode */ 149 150 uint32_t FifoMode; /*!< Specifies if the FIFO mode will be used. This parameter can be a value 151 of @ref USARTEx_FIFO_mode. */ 152 153 void (*RxISR)(struct __USART_HandleTypeDef *husart); /*!< Function pointer on Rx IRQ handler */ 154 155 void (*TxISR)(struct __USART_HandleTypeDef *husart); /*!< Function pointer on Tx IRQ handler */ 156 157 #if defined(HAL_DMA_MODULE_ENABLED) 158 DMA_HandleTypeDef *hdmatx; /*!< USART Tx DMA Handle parameters */ 159 160 DMA_HandleTypeDef *hdmarx; /*!< USART Rx DMA Handle parameters */ 161 162 #endif /* HAL_DMA_MODULE_ENABLED */ 163 HAL_LockTypeDef Lock; /*!< Locking object */ 164 165 __IO HAL_USART_StateTypeDef State; /*!< USART communication state */ 166 167 __IO uint32_t ErrorCode; /*!< USART Error code */ 168 169 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1) 170 void (* TxHalfCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Half Complete Callback */ 171 void (* TxCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Complete Callback */ 172 void (* RxHalfCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Rx Half Complete Callback */ 173 void (* RxCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Rx Complete Callback */ 174 void (* TxRxCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Rx Complete Callback */ 175 void (* ErrorCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Error Callback */ 176 void (* AbortCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Abort Complete Callback */ 177 void (* RxFifoFullCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Rx Fifo Full Callback */ 178 void (* TxFifoEmptyCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Fifo Empty Callback */ 179 180 void (* MspInitCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Msp Init callback */ 181 void (* MspDeInitCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Msp DeInit callback */ 182 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */ 183 184 } USART_HandleTypeDef; 185 186 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1) 187 /** 188 * @brief HAL USART Callback ID enumeration definition 189 */ 190 typedef enum 191 { 192 HAL_USART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< USART Tx Half Complete Callback ID */ 193 HAL_USART_TX_COMPLETE_CB_ID = 0x01U, /*!< USART Tx Complete Callback ID */ 194 HAL_USART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< USART Rx Half Complete Callback ID */ 195 HAL_USART_RX_COMPLETE_CB_ID = 0x03U, /*!< USART Rx Complete Callback ID */ 196 HAL_USART_TX_RX_COMPLETE_CB_ID = 0x04U, /*!< USART Tx Rx Complete Callback ID */ 197 HAL_USART_ERROR_CB_ID = 0x05U, /*!< USART Error Callback ID */ 198 HAL_USART_ABORT_COMPLETE_CB_ID = 0x06U, /*!< USART Abort Complete Callback ID */ 199 HAL_USART_RX_FIFO_FULL_CB_ID = 0x07U, /*!< USART Rx Fifo Full Callback ID */ 200 HAL_USART_TX_FIFO_EMPTY_CB_ID = 0x08U, /*!< USART Tx Fifo Empty Callback ID */ 201 202 HAL_USART_MSPINIT_CB_ID = 0x09U, /*!< USART MspInit callback ID */ 203 HAL_USART_MSPDEINIT_CB_ID = 0x0AU /*!< USART MspDeInit callback ID */ 204 205 } HAL_USART_CallbackIDTypeDef; 206 207 /** 208 * @brief HAL USART Callback pointer definition 209 */ 210 typedef void (*pUSART_CallbackTypeDef)(USART_HandleTypeDef *husart); /*!< pointer to an USART callback function */ 211 212 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */ 213 214 /** 215 * @} 216 */ 217 218 /* Exported constants --------------------------------------------------------*/ 219 /** @defgroup USART_Exported_Constants USART Exported Constants 220 * @{ 221 */ 222 223 /** @defgroup USART_Error_Definition USART Error Definition 224 * @{ 225 */ 226 #define HAL_USART_ERROR_NONE (0x00000000U) /*!< No error */ 227 #define HAL_USART_ERROR_PE (0x00000001U) /*!< Parity error */ 228 #define HAL_USART_ERROR_NE (0x00000002U) /*!< Noise error */ 229 #define HAL_USART_ERROR_FE (0x00000004U) /*!< Frame error */ 230 #define HAL_USART_ERROR_ORE (0x00000008U) /*!< Overrun error */ 231 #if defined(HAL_DMA_MODULE_ENABLED) 232 #define HAL_USART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 233 #endif /* HAL_DMA_MODULE_ENABLED */ 234 #define HAL_USART_ERROR_UDR (0x00000020U) /*!< SPI slave underrun error */ 235 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1) 236 #define HAL_USART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */ 237 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */ 238 #define HAL_USART_ERROR_RTO (0x00000080U) /*!< Receiver Timeout error */ 239 /** 240 * @} 241 */ 242 243 /** @defgroup USART_Stop_Bits USART Number of Stop Bits 244 * @{ 245 */ 246 #define USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< USART frame with 0.5 stop bit */ 247 #define USART_STOPBITS_1 0x00000000U /*!< USART frame with 1 stop bit */ 248 #define USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< USART frame with 1.5 stop bits */ 249 #define USART_STOPBITS_2 USART_CR2_STOP_1 /*!< USART frame with 2 stop bits */ 250 /** 251 * @} 252 */ 253 254 /** @defgroup USART_Parity USART Parity 255 * @{ 256 */ 257 #define USART_PARITY_NONE 0x00000000U /*!< No parity */ 258 #define USART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 259 #define USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 260 /** 261 * @} 262 */ 263 264 /** @defgroup USART_Mode USART Mode 265 * @{ 266 */ 267 #define USART_MODE_RX USART_CR1_RE /*!< RX mode */ 268 #define USART_MODE_TX USART_CR1_TE /*!< TX mode */ 269 #define USART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 270 /** 271 * @} 272 */ 273 274 /** @defgroup USART_Clock USART Clock 275 * @{ 276 */ 277 #define USART_CLOCK_DISABLE 0x00000000U /*!< USART clock disable */ 278 #define USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< USART clock enable */ 279 /** 280 * @} 281 */ 282 283 /** @defgroup USART_Clock_Polarity USART Clock Polarity 284 * @{ 285 */ 286 #define USART_POLARITY_LOW 0x00000000U /*!< Driver enable signal is active high */ 287 #define USART_POLARITY_HIGH USART_CR2_CPOL /*!< Driver enable signal is active low */ 288 /** 289 * @} 290 */ 291 292 /** @defgroup USART_Clock_Phase USART Clock Phase 293 * @{ 294 */ 295 #define USART_PHASE_1EDGE 0x00000000U /*!< USART frame phase on first clock transition */ 296 #define USART_PHASE_2EDGE USART_CR2_CPHA /*!< USART frame phase on second clock transition */ 297 /** 298 * @} 299 */ 300 301 /** @defgroup USART_Last_Bit USART Last Bit 302 * @{ 303 */ 304 #define USART_LASTBIT_DISABLE 0x00000000U /*!< USART frame last data bit clock pulse not output to SCLK pin */ 305 #define USART_LASTBIT_ENABLE USART_CR2_LBCL /*!< USART frame last data bit clock pulse output to SCLK pin */ 306 /** 307 * @} 308 */ 309 310 /** @defgroup USART_ClockPrescaler USART Clock Prescaler 311 * @{ 312 */ 313 #define USART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 314 #define USART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 315 #define USART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 316 #define USART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 317 #define USART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 318 #define USART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 319 #define USART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 320 #define USART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 321 #define USART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 322 #define USART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 323 #define USART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 324 #define USART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 325 326 /** 327 * @} 328 */ 329 330 /** @defgroup USART_Request_Parameters USART Request Parameters 331 * @{ 332 */ 333 #define USART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 334 #define USART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 335 /** 336 * @} 337 */ 338 339 /** @defgroup USART_Flags USART Flags 340 * Elements values convention: 0xXXXX 341 * - 0xXXXX : Flag mask in the ISR register 342 * @{ 343 */ 344 #define USART_FLAG_TXFT USART_ISR_TXFT /*!< USART TXFIFO threshold flag */ 345 #define USART_FLAG_RXFT USART_ISR_RXFT /*!< USART RXFIFO threshold flag */ 346 #define USART_FLAG_RXFF USART_ISR_RXFF /*!< USART RXFIFO Full flag */ 347 #define USART_FLAG_TXFE USART_ISR_TXFE /*!< USART TXFIFO Empty flag */ 348 #define USART_FLAG_REACK USART_ISR_REACK /*!< USART receive enable acknowledge flag */ 349 #define USART_FLAG_TEACK USART_ISR_TEACK /*!< USART transmit enable acknowledge flag */ 350 #define USART_FLAG_BUSY USART_ISR_BUSY /*!< USART busy flag */ 351 #define USART_FLAG_UDR USART_ISR_UDR /*!< SPI slave underrun error flag */ 352 #define USART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< USART transmit data register empty */ 353 #define USART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< USART TXFIFO not full */ 354 #define USART_FLAG_RTOF USART_ISR_RTOF /*!< USART receiver timeout flag */ 355 #define USART_FLAG_TC USART_ISR_TC /*!< USART transmission complete */ 356 #define USART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< USART read data register not empty */ 357 #define USART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< USART RXFIFO not empty */ 358 #define USART_FLAG_IDLE USART_ISR_IDLE /*!< USART idle flag */ 359 #define USART_FLAG_ORE USART_ISR_ORE /*!< USART overrun error */ 360 #define USART_FLAG_NE USART_ISR_NE /*!< USART noise error */ 361 #define USART_FLAG_FE USART_ISR_FE /*!< USART frame error */ 362 #define USART_FLAG_PE USART_ISR_PE /*!< USART parity error */ 363 /** 364 * @} 365 */ 366 367 /** @defgroup USART_Interrupt_definition USART Interrupts Definition 368 * Elements values convention: 0000ZZZZ0XXYYYYYb 369 * - YYYYY : Interrupt source position in the XX register (5bits) 370 * - XX : Interrupt source register (2bits) 371 * - 01: CR1 register 372 * - 10: CR2 register 373 * - 11: CR3 register 374 * - ZZZZ : Flag position in the ISR register(4bits) 375 * @{ 376 */ 377 378 #define USART_IT_PE 0x0028U /*!< USART parity error interruption */ 379 #define USART_IT_TXE 0x0727U /*!< USART transmit data register empty interruption */ 380 #define USART_IT_TXFNF 0x0727U /*!< USART TX FIFO not full interruption */ 381 #define USART_IT_TC 0x0626U /*!< USART transmission complete interruption */ 382 #define USART_IT_RXNE 0x0525U /*!< USART read data register not empty interruption */ 383 #define USART_IT_RXFNE 0x0525U /*!< USART RXFIFO not empty interruption */ 384 #define USART_IT_IDLE 0x0424U /*!< USART idle interruption */ 385 #define USART_IT_ERR 0x0060U /*!< USART error interruption */ 386 #define USART_IT_ORE 0x0300U /*!< USART overrun error interruption */ 387 #define USART_IT_NE 0x0200U /*!< USART noise error interruption */ 388 #define USART_IT_FE 0x0100U /*!< USART frame error interruption */ 389 #define USART_IT_RXFF 0x183FU /*!< USART RXFIFO full interruption */ 390 #define USART_IT_TXFE 0x173EU /*!< USART TXFIFO empty interruption */ 391 #define USART_IT_RXFT 0x1A7CU /*!< USART RXFIFO threshold reached interruption */ 392 #define USART_IT_TXFT 0x1B77U /*!< USART TXFIFO threshold reached interruption */ 393 394 /** 395 * @} 396 */ 397 398 /** @defgroup USART_IT_CLEAR_Flags USART Interruption Clear Flags 399 * @{ 400 */ 401 #define USART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 402 #define USART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 403 #define USART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 404 #define USART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */ 405 #define USART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 406 #define USART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 407 #define USART_CLEAR_UDRF USART_ICR_UDRCF /*!< SPI slave underrun error Clear Flag */ 408 #define USART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO Empty Clear Flag */ 409 #define USART_CLEAR_RTOF USART_ICR_RTOCF /*!< USART receiver timeout clear flag */ 410 /** 411 * @} 412 */ 413 414 /** @defgroup USART_Interruption_Mask USART Interruption Flags Mask 415 * @{ 416 */ 417 #define USART_IT_MASK 0x001FU /*!< USART interruptions flags mask */ 418 #define USART_CR_MASK 0x00E0U /*!< USART control register mask */ 419 #define USART_CR_POS 5U /*!< USART control register position */ 420 #define USART_ISR_MASK 0x1F00U /*!< USART ISR register mask */ 421 #define USART_ISR_POS 8U /*!< USART ISR register position */ 422 /** 423 * @} 424 */ 425 426 /** 427 * @} 428 */ 429 430 /* Exported macros -----------------------------------------------------------*/ 431 /** @defgroup USART_Exported_Macros USART Exported Macros 432 * @{ 433 */ 434 435 /** @brief Reset USART handle state. 436 * @param __HANDLE__ USART handle. 437 * @retval None 438 */ 439 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1) 440 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 441 (__HANDLE__)->State = HAL_USART_STATE_RESET; \ 442 (__HANDLE__)->MspInitCallback = NULL; \ 443 (__HANDLE__)->MspDeInitCallback = NULL; \ 444 } while(0U) 445 #else 446 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET) 447 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */ 448 449 /** @brief Check whether the specified USART flag is set or not. 450 * @param __HANDLE__ specifies the USART Handle 451 * @param __FLAG__ specifies the flag to check. 452 * This parameter can be one of the following values: 453 * @arg @ref USART_FLAG_TXFT TXFIFO threshold flag 454 * @arg @ref USART_FLAG_RXFT RXFIFO threshold flag 455 * @arg @ref USART_FLAG_RXFF RXFIFO Full flag 456 * @arg @ref USART_FLAG_TXFE TXFIFO Empty flag 457 * @arg @ref USART_FLAG_REACK Receive enable acknowledge flag 458 * @arg @ref USART_FLAG_TEACK Transmit enable acknowledge flag 459 * @arg @ref USART_FLAG_BUSY Busy flag 460 * @arg @ref USART_FLAG_UDR SPI slave underrun error flag 461 * @arg @ref USART_FLAG_TXE Transmit data register empty flag 462 * @arg @ref USART_FLAG_TXFNF TXFIFO not full flag 463 * @arg @ref USART_FLAG_TC Transmission Complete flag 464 * @arg @ref USART_FLAG_RXNE Receive data register not empty flag 465 * @arg @ref USART_FLAG_RXFNE RXFIFO not empty flag 466 * @arg @ref USART_FLAG_RTOF Receiver Timeout flag 467 * @arg @ref USART_FLAG_IDLE Idle Line detection flag 468 * @arg @ref USART_FLAG_ORE OverRun Error flag 469 * @arg @ref USART_FLAG_NE Noise Error flag 470 * @arg @ref USART_FLAG_FE Framing Error flag 471 * @arg @ref USART_FLAG_PE Parity Error flag 472 * @retval The new state of __FLAG__ (TRUE or FALSE). 473 */ 474 #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 475 476 /** @brief Clear the specified USART pending flag. 477 * @param __HANDLE__ specifies the USART Handle. 478 * @param __FLAG__ specifies the flag to check. 479 * This parameter can be any combination of the following values: 480 * @arg @ref USART_CLEAR_PEF Parity Error Clear Flag 481 * @arg @ref USART_CLEAR_FEF Framing Error Clear Flag 482 * @arg @ref USART_CLEAR_NEF Noise detected Clear Flag 483 * @arg @ref USART_CLEAR_OREF Overrun Error Clear Flag 484 * @arg @ref USART_CLEAR_IDLEF IDLE line detected Clear Flag 485 * @arg @ref USART_CLEAR_TXFECF TXFIFO empty clear Flag 486 * @arg @ref USART_CLEAR_TCF Transmission Complete Clear Flag 487 * @arg @ref USART_CLEAR_RTOF Receiver Timeout clear flag 488 * @arg @ref USART_CLEAR_UDRF SPI slave underrun error Clear Flag 489 * @retval None 490 */ 491 #define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 492 493 /** @brief Clear the USART PE pending flag. 494 * @param __HANDLE__ specifies the USART Handle. 495 * @retval None 496 */ 497 #define __HAL_USART_CLEAR_PEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_PEF) 498 499 /** @brief Clear the USART FE pending flag. 500 * @param __HANDLE__ specifies the USART Handle. 501 * @retval None 502 */ 503 #define __HAL_USART_CLEAR_FEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_FEF) 504 505 /** @brief Clear the USART NE pending flag. 506 * @param __HANDLE__ specifies the USART Handle. 507 * @retval None 508 */ 509 #define __HAL_USART_CLEAR_NEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_NEF) 510 511 /** @brief Clear the USART ORE pending flag. 512 * @param __HANDLE__ specifies the USART Handle. 513 * @retval None 514 */ 515 #define __HAL_USART_CLEAR_OREFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_OREF) 516 517 /** @brief Clear the USART IDLE pending flag. 518 * @param __HANDLE__ specifies the USART Handle. 519 * @retval None 520 */ 521 #define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_IDLEF) 522 523 /** @brief Clear the USART TX FIFO empty clear flag. 524 * @param __HANDLE__ specifies the USART Handle. 525 * @retval None 526 */ 527 #define __HAL_USART_CLEAR_TXFECF(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_TXFECF) 528 529 /** @brief Clear SPI slave underrun error flag. 530 * @param __HANDLE__ specifies the USART Handle. 531 * @retval None 532 */ 533 #define __HAL_USART_CLEAR_UDRFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_UDRF) 534 535 /** @brief Enable the specified USART interrupt. 536 * @param __HANDLE__ specifies the USART Handle. 537 * @param __INTERRUPT__ specifies the USART interrupt source to enable. 538 * This parameter can be one of the following values: 539 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt 540 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt 541 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt 542 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt 543 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt 544 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt 545 * @arg @ref USART_IT_TC Transmission complete interrupt 546 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt 547 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt 548 * @arg @ref USART_IT_IDLE Idle line detection interrupt 549 * @arg @ref USART_IT_PE Parity Error interrupt 550 * @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error) 551 * @retval None 552 */ 553 #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__)\ 554 (((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 1U)?\ 555 ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 556 ((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 2U)?\ 557 ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 558 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 559 560 /** @brief Disable the specified USART interrupt. 561 * @param __HANDLE__ specifies the USART Handle. 562 * @param __INTERRUPT__ specifies the USART interrupt source to disable. 563 * This parameter can be one of the following values: 564 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt 565 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt 566 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt 567 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt 568 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt 569 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt 570 * @arg @ref USART_IT_TC Transmission complete interrupt 571 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt 572 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt 573 * @arg @ref USART_IT_IDLE Idle line detection interrupt 574 * @arg @ref USART_IT_PE Parity Error interrupt 575 * @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error) 576 * @retval None 577 */ 578 #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__)\ 579 (((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 1U)?\ 580 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 581 ((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 2U)?\ 582 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 583 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 584 585 /** @brief Check whether the specified USART interrupt has occurred or not. 586 * @param __HANDLE__ specifies the USART Handle. 587 * @param __INTERRUPT__ specifies the USART interrupt source to check. 588 * This parameter can be one of the following values: 589 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt 590 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt 591 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt 592 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt 593 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt 594 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt 595 * @arg @ref USART_IT_TC Transmission complete interrupt 596 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt 597 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt 598 * @arg @ref USART_IT_IDLE Idle line detection interrupt 599 * @arg @ref USART_IT_ORE OverRun Error interrupt 600 * @arg @ref USART_IT_NE Noise Error interrupt 601 * @arg @ref USART_IT_FE Framing Error interrupt 602 * @arg @ref USART_IT_PE Parity Error interrupt 603 * @retval The new state of __INTERRUPT__ (SET or RESET). 604 */ 605 #define __HAL_USART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 606 & (0x01U << (((__INTERRUPT__) & USART_ISR_MASK)>>\ 607 USART_ISR_POS))) != 0U) ? SET : RESET) 608 609 /** @brief Check whether the specified USART interrupt source is enabled or not. 610 * @param __HANDLE__ specifies the USART Handle. 611 * @param __INTERRUPT__ specifies the USART interrupt source to check. 612 * This parameter can be one of the following values: 613 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt 614 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt 615 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt 616 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt 617 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt 618 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt 619 * @arg @ref USART_IT_TC Transmission complete interrupt 620 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt 621 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt 622 * @arg @ref USART_IT_IDLE Idle line detection interrupt 623 * @arg @ref USART_IT_ORE OverRun Error interrupt 624 * @arg @ref USART_IT_NE Noise Error interrupt 625 * @arg @ref USART_IT_FE Framing Error interrupt 626 * @arg @ref USART_IT_PE Parity Error interrupt 627 * @retval The new state of __INTERRUPT__ (SET or RESET). 628 */ 629 #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 0x05U) == 0x01U) ?\ 630 (__HANDLE__)->Instance->CR1 : \ 631 (((((uint8_t)(__INTERRUPT__)) >> 0x05U) == 0x02U) ?\ 632 (__HANDLE__)->Instance->CR2 : \ 633 (__HANDLE__)->Instance->CR3)) & (0x01U <<\ 634 (((uint16_t)(__INTERRUPT__)) &\ 635 USART_IT_MASK))) != 0U) ? SET : RESET) 636 637 /** @brief Clear the specified USART ISR flag, in setting the proper ICR register flag. 638 * @param __HANDLE__ specifies the USART Handle. 639 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 640 * to clear the corresponding interrupt. 641 * This parameter can be one of the following values: 642 * @arg @ref USART_CLEAR_PEF Parity Error Clear Flag 643 * @arg @ref USART_CLEAR_FEF Framing Error Clear Flag 644 * @arg @ref USART_CLEAR_NEF Noise detected Clear Flag 645 * @arg @ref USART_CLEAR_OREF Overrun Error Clear Flag 646 * @arg @ref USART_CLEAR_IDLEF IDLE line detected Clear Flag 647 * @arg @ref USART_CLEAR_RTOF Receiver timeout clear flag 648 * @arg @ref USART_CLEAR_TXFECF TXFIFO empty clear Flag 649 * @arg @ref USART_CLEAR_TCF Transmission Complete Clear Flag 650 * @retval None 651 */ 652 #define __HAL_USART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 653 654 /** @brief Set a specific USART request flag. 655 * @param __HANDLE__ specifies the USART Handle. 656 * @param __REQ__ specifies the request flag to set. 657 * This parameter can be one of the following values: 658 * @arg @ref USART_RXDATA_FLUSH_REQUEST Receive Data flush Request 659 * @arg @ref USART_TXDATA_FLUSH_REQUEST Transmit data flush Request 660 * 661 * @retval None 662 */ 663 #define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 664 665 /** @brief Enable the USART one bit sample method. 666 * @param __HANDLE__ specifies the USART Handle. 667 * @retval None 668 */ 669 #define __HAL_USART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 670 671 /** @brief Disable the USART one bit sample method. 672 * @param __HANDLE__ specifies the USART Handle. 673 * @retval None 674 */ 675 #define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 676 677 /** @brief Enable USART. 678 * @param __HANDLE__ specifies the USART Handle. 679 * @retval None 680 */ 681 #define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 682 683 /** @brief Disable USART. 684 * @param __HANDLE__ specifies the USART Handle. 685 * @retval None 686 */ 687 #define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 688 689 /** 690 * @} 691 */ 692 693 /* Private macros --------------------------------------------------------*/ 694 /** @defgroup USART_Private_Macros USART Private Macros 695 * @{ 696 */ 697 698 /** @brief Get USART clock division factor from clock prescaler value. 699 * @param __CLOCKPRESCALER__ USART prescaler value. 700 * @retval USART clock division factor 701 */ 702 #define USART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 703 (((__CLOCKPRESCALER__) == USART_PRESCALER_DIV1) ? 1U : \ 704 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV2) ? 2U : \ 705 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV4) ? 4U : \ 706 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV6) ? 6U : \ 707 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV8) ? 8U : \ 708 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV10) ? 10U : \ 709 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV12) ? 12U : \ 710 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV16) ? 16U : \ 711 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV32) ? 32U : \ 712 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV64) ? 64U : \ 713 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV128) ? 128U : 256U) 714 715 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 716 * @param __PCLK__ USART clock. 717 * @param __BAUD__ Baud rate set by the user. 718 * @param __CLOCKPRESCALER__ USART prescaler value. 719 * @retval Division result 720 */ 721 #define USART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__)\ 722 (((((__PCLK__)/USART_GET_DIV_FACTOR(__CLOCKPRESCALER__))*2U)\ 723 + ((__BAUD__)/2U)) / (__BAUD__)) 724 725 /** @brief Report the USART clock source. 726 * @param __HANDLE__ specifies the USART Handle. 727 * @param __CLOCKSOURCE__ output variable. 728 * @retval the USART clocking source, written in __CLOCKSOURCE__. 729 */ 730 #if (defined(STM32H573xx) || defined(STM32H563xx) || defined(STM32H562xx)) 731 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 732 do { \ 733 if((__HANDLE__)->Instance == USART1) \ 734 { \ 735 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 736 { \ 737 case RCC_USART1CLKSOURCE_PCLK2: \ 738 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \ 739 break; \ 740 case RCC_USART1CLKSOURCE_CSI: \ 741 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 742 break; \ 743 case RCC_USART1CLKSOURCE_HSI: \ 744 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 745 break; \ 746 case RCC_USART1CLKSOURCE_LSE: \ 747 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 748 break; \ 749 case RCC_USART1CLKSOURCE_PLL2Q: \ 750 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2Q; \ 751 break; \ 752 case RCC_USART1CLKSOURCE_PLL3Q: \ 753 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3Q; \ 754 break; \ 755 default: \ 756 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 757 break; \ 758 } \ 759 } \ 760 else if((__HANDLE__)->Instance == USART2) \ 761 { \ 762 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 763 { \ 764 case RCC_USART2CLKSOURCE_PCLK1: \ 765 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 766 break; \ 767 case RCC_USART2CLKSOURCE_CSI: \ 768 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 769 break; \ 770 case RCC_USART2CLKSOURCE_HSI: \ 771 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 772 break; \ 773 case RCC_USART2CLKSOURCE_LSE: \ 774 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 775 break; \ 776 case RCC_USART2CLKSOURCE_PLL2Q: \ 777 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2Q; \ 778 break; \ 779 case RCC_USART2CLKSOURCE_PLL3Q: \ 780 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3Q; \ 781 break; \ 782 default: \ 783 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 784 break; \ 785 } \ 786 } \ 787 else if((__HANDLE__)->Instance == USART3) \ 788 { \ 789 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 790 { \ 791 case RCC_USART3CLKSOURCE_PCLK1: \ 792 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 793 break; \ 794 case RCC_USART3CLKSOURCE_CSI: \ 795 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 796 break; \ 797 case RCC_USART3CLKSOURCE_HSI: \ 798 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 799 break; \ 800 case RCC_USART3CLKSOURCE_LSE: \ 801 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 802 break; \ 803 case RCC_USART3CLKSOURCE_PLL2Q: \ 804 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2Q; \ 805 break; \ 806 case RCC_USART3CLKSOURCE_PLL3Q: \ 807 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3Q; \ 808 break; \ 809 default: \ 810 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 811 break; \ 812 } \ 813 } \ 814 else if((__HANDLE__)->Instance == USART6) \ 815 { \ 816 switch(__HAL_RCC_GET_USART6_SOURCE()) \ 817 { \ 818 case RCC_USART6CLKSOURCE_PCLK1: \ 819 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 820 break; \ 821 case RCC_USART6CLKSOURCE_CSI: \ 822 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 823 break; \ 824 case RCC_USART6CLKSOURCE_HSI: \ 825 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 826 break; \ 827 case RCC_USART6CLKSOURCE_LSE: \ 828 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 829 break; \ 830 case RCC_USART6CLKSOURCE_PLL2Q: \ 831 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2Q; \ 832 break; \ 833 case RCC_USART6CLKSOURCE_PLL3Q: \ 834 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3Q; \ 835 break; \ 836 default: \ 837 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 838 break; \ 839 } \ 840 } \ 841 else if((__HANDLE__)->Instance == USART10) \ 842 { \ 843 switch(__HAL_RCC_GET_USART10_SOURCE()) \ 844 { \ 845 case RCC_USART10CLKSOURCE_PCLK1: \ 846 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 847 break; \ 848 case RCC_USART10CLKSOURCE_CSI: \ 849 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 850 break; \ 851 case RCC_USART10CLKSOURCE_HSI: \ 852 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 853 break; \ 854 case RCC_USART10CLKSOURCE_LSE: \ 855 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 856 break; \ 857 case RCC_USART10CLKSOURCE_PLL2Q: \ 858 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2Q; \ 859 break; \ 860 case RCC_USART10CLKSOURCE_PLL3Q: \ 861 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3Q; \ 862 break; \ 863 default: \ 864 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 865 break; \ 866 } \ 867 } \ 868 else if((__HANDLE__)->Instance == USART11) \ 869 { \ 870 switch(__HAL_RCC_GET_USART11_SOURCE()) \ 871 { \ 872 case RCC_USART11CLKSOURCE_PCLK1: \ 873 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 874 break; \ 875 case RCC_USART11CLKSOURCE_CSI: \ 876 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 877 break; \ 878 case RCC_USART11CLKSOURCE_HSI: \ 879 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 880 break; \ 881 case RCC_USART11CLKSOURCE_LSE: \ 882 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 883 break; \ 884 case RCC_USART11CLKSOURCE_PLL2Q: \ 885 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2Q; \ 886 break; \ 887 case RCC_USART11CLKSOURCE_PLL3Q: \ 888 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3Q; \ 889 break; \ 890 default: \ 891 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 892 break; \ 893 } \ 894 } \ 895 else \ 896 { \ 897 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 898 } \ 899 } while(0U) 900 #elif (defined(STM32H523xx) || defined(STM32H533xx)) 901 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 902 do { \ 903 if((__HANDLE__)->Instance == USART1) \ 904 { \ 905 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 906 { \ 907 case RCC_USART1CLKSOURCE_PCLK2: \ 908 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \ 909 break; \ 910 case RCC_USART1CLKSOURCE_CSI: \ 911 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 912 break; \ 913 case RCC_USART1CLKSOURCE_HSI: \ 914 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 915 break; \ 916 case RCC_USART1CLKSOURCE_LSE: \ 917 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 918 break; \ 919 case RCC_USART1CLKSOURCE_PLL2Q: \ 920 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2Q; \ 921 break; \ 922 case RCC_USART1CLKSOURCE_PLL3Q: \ 923 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3Q; \ 924 break; \ 925 default: \ 926 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 927 break; \ 928 } \ 929 } \ 930 else if((__HANDLE__)->Instance == USART2) \ 931 { \ 932 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 933 { \ 934 case RCC_USART2CLKSOURCE_PCLK1: \ 935 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 936 break; \ 937 case RCC_USART2CLKSOURCE_CSI: \ 938 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 939 break; \ 940 case RCC_USART2CLKSOURCE_HSI: \ 941 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 942 break; \ 943 case RCC_USART2CLKSOURCE_LSE: \ 944 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 945 break; \ 946 case RCC_USART2CLKSOURCE_PLL2Q: \ 947 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2Q; \ 948 break; \ 949 case RCC_USART2CLKSOURCE_PLL3Q: \ 950 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3Q; \ 951 break; \ 952 default: \ 953 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 954 break; \ 955 } \ 956 } \ 957 else if((__HANDLE__)->Instance == USART3) \ 958 { \ 959 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 960 { \ 961 case RCC_USART3CLKSOURCE_PCLK1: \ 962 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 963 break; \ 964 case RCC_USART3CLKSOURCE_CSI: \ 965 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 966 break; \ 967 case RCC_USART3CLKSOURCE_HSI: \ 968 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 969 break; \ 970 case RCC_USART3CLKSOURCE_LSE: \ 971 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 972 break; \ 973 case RCC_USART3CLKSOURCE_PLL2Q: \ 974 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2Q; \ 975 break; \ 976 case RCC_USART3CLKSOURCE_PLL3Q: \ 977 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3Q; \ 978 break; \ 979 default: \ 980 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 981 break; \ 982 } \ 983 } \ 984 else if((__HANDLE__)->Instance == USART6) \ 985 { \ 986 switch(__HAL_RCC_GET_USART6_SOURCE()) \ 987 { \ 988 case RCC_USART6CLKSOURCE_PCLK1: \ 989 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 990 break; \ 991 case RCC_USART6CLKSOURCE_CSI: \ 992 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 993 break; \ 994 case RCC_USART6CLKSOURCE_HSI: \ 995 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 996 break; \ 997 case RCC_USART6CLKSOURCE_LSE: \ 998 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 999 break; \ 1000 case RCC_USART6CLKSOURCE_PLL2Q: \ 1001 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2Q; \ 1002 break; \ 1003 case RCC_USART6CLKSOURCE_PLL3Q: \ 1004 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3Q; \ 1005 break; \ 1006 default: \ 1007 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 1008 break; \ 1009 } \ 1010 } \ 1011 else \ 1012 { \ 1013 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 1014 } \ 1015 } while(0U) 1016 #else 1017 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 1018 do { \ 1019 if((__HANDLE__)->Instance == USART1) \ 1020 { \ 1021 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 1022 { \ 1023 case RCC_USART1CLKSOURCE_PCLK2: \ 1024 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \ 1025 break; \ 1026 case RCC_USART1CLKSOURCE_CSI: \ 1027 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 1028 break; \ 1029 case RCC_USART1CLKSOURCE_HSI: \ 1030 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 1031 break; \ 1032 case RCC_USART1CLKSOURCE_LSE: \ 1033 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 1034 break; \ 1035 case RCC_USART1CLKSOURCE_PLL2Q: \ 1036 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2Q; \ 1037 break; \ 1038 default: \ 1039 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 1040 break; \ 1041 } \ 1042 } \ 1043 else if((__HANDLE__)->Instance == USART2) \ 1044 { \ 1045 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 1046 { \ 1047 case RCC_USART2CLKSOURCE_PCLK1: \ 1048 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 1049 break; \ 1050 case RCC_USART2CLKSOURCE_CSI: \ 1051 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 1052 break; \ 1053 case RCC_USART2CLKSOURCE_HSI: \ 1054 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 1055 break; \ 1056 case RCC_USART2CLKSOURCE_LSE: \ 1057 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 1058 break; \ 1059 case RCC_USART2CLKSOURCE_PLL2Q: \ 1060 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2Q; \ 1061 break; \ 1062 default: \ 1063 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 1064 break; \ 1065 } \ 1066 } \ 1067 else if((__HANDLE__)->Instance == USART3) \ 1068 { \ 1069 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 1070 { \ 1071 case RCC_USART3CLKSOURCE_PCLK1: \ 1072 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 1073 break; \ 1074 case RCC_USART3CLKSOURCE_CSI: \ 1075 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 1076 break; \ 1077 case RCC_USART3CLKSOURCE_HSI: \ 1078 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 1079 break; \ 1080 case RCC_USART3CLKSOURCE_LSE: \ 1081 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 1082 break; \ 1083 case RCC_USART3CLKSOURCE_PLL2Q: \ 1084 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2Q; \ 1085 break; \ 1086 default: \ 1087 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 1088 break; \ 1089 } \ 1090 } \ 1091 else \ 1092 { \ 1093 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 1094 } \ 1095 } while(0U) 1096 1097 #endif /* (defined(STM32H573xx) || defined(STM32H563xx) || defined(STM32H562xx) */ 1098 1099 /** @brief Check USART Baud rate. 1100 * @param __BAUDRATE__ Baudrate specified by the user. 1101 * The maximum Baud Rate is derived from the maximum clock on H5 (i.e. 250 MHz) 1102 * divided by the smallest oversampling used on the USART (i.e. 8) 1103 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) */ 1104 #define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 20000000U) 1105 1106 /** 1107 * @brief Ensure that USART frame number of stop bits is valid. 1108 * @param __STOPBITS__ USART frame number of stop bits. 1109 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1110 */ 1111 #define IS_USART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == USART_STOPBITS_0_5) || \ 1112 ((__STOPBITS__) == USART_STOPBITS_1) || \ 1113 ((__STOPBITS__) == USART_STOPBITS_1_5) || \ 1114 ((__STOPBITS__) == USART_STOPBITS_2)) 1115 1116 /** 1117 * @brief Ensure that USART frame parity is valid. 1118 * @param __PARITY__ USART frame parity. 1119 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1120 */ 1121 #define IS_USART_PARITY(__PARITY__) (((__PARITY__) == USART_PARITY_NONE) || \ 1122 ((__PARITY__) == USART_PARITY_EVEN) || \ 1123 ((__PARITY__) == USART_PARITY_ODD)) 1124 1125 /** 1126 * @brief Ensure that USART communication mode is valid. 1127 * @param __MODE__ USART communication mode. 1128 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1129 */ 1130 #define IS_USART_MODE(__MODE__) ((((__MODE__) & 0xFFFFFFF3U) == 0x00U) && ((__MODE__) != 0x00U)) 1131 1132 /** 1133 * @brief Ensure that USART clock state is valid. 1134 * @param __CLOCK__ USART clock state. 1135 * @retval SET (__CLOCK__ is valid) or RESET (__CLOCK__ is invalid) 1136 */ 1137 #define IS_USART_CLOCK(__CLOCK__) (((__CLOCK__) == USART_CLOCK_DISABLE) || \ 1138 ((__CLOCK__) == USART_CLOCK_ENABLE)) 1139 1140 /** 1141 * @brief Ensure that USART frame polarity is valid. 1142 * @param __CPOL__ USART frame polarity. 1143 * @retval SET (__CPOL__ is valid) or RESET (__CPOL__ is invalid) 1144 */ 1145 #define IS_USART_POLARITY(__CPOL__) (((__CPOL__) == USART_POLARITY_LOW) || ((__CPOL__) == USART_POLARITY_HIGH)) 1146 1147 /** 1148 * @brief Ensure that USART frame phase is valid. 1149 * @param __CPHA__ USART frame phase. 1150 * @retval SET (__CPHA__ is valid) or RESET (__CPHA__ is invalid) 1151 */ 1152 #define IS_USART_PHASE(__CPHA__) (((__CPHA__) == USART_PHASE_1EDGE) || ((__CPHA__) == USART_PHASE_2EDGE)) 1153 1154 /** 1155 * @brief Ensure that USART frame last bit clock pulse setting is valid. 1156 * @param __LASTBIT__ USART frame last bit clock pulse setting. 1157 * @retval SET (__LASTBIT__ is valid) or RESET (__LASTBIT__ is invalid) 1158 */ 1159 #define IS_USART_LASTBIT(__LASTBIT__) (((__LASTBIT__) == USART_LASTBIT_DISABLE) || \ 1160 ((__LASTBIT__) == USART_LASTBIT_ENABLE)) 1161 1162 /** 1163 * @brief Ensure that USART request parameter is valid. 1164 * @param __PARAM__ USART request parameter. 1165 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1166 */ 1167 #define IS_USART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == USART_RXDATA_FLUSH_REQUEST) || \ 1168 ((__PARAM__) == USART_TXDATA_FLUSH_REQUEST)) 1169 1170 /** 1171 * @brief Ensure that USART Prescaler is valid. 1172 * @param __CLOCKPRESCALER__ USART Prescaler value. 1173 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 1174 */ 1175 #define IS_USART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == USART_PRESCALER_DIV1) || \ 1176 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV2) || \ 1177 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV4) || \ 1178 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV6) || \ 1179 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV8) || \ 1180 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV10) || \ 1181 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV12) || \ 1182 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV16) || \ 1183 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV32) || \ 1184 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV64) || \ 1185 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV128) || \ 1186 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV256)) 1187 1188 /** 1189 * @} 1190 */ 1191 1192 /* Include USART HAL Extended module */ 1193 #include "stm32h5xx_hal_usart_ex.h" 1194 1195 /* Exported functions --------------------------------------------------------*/ 1196 /** @addtogroup USART_Exported_Functions USART Exported Functions 1197 * @{ 1198 */ 1199 1200 /** @addtogroup USART_Exported_Functions_Group1 Initialization and de-initialization functions 1201 * @{ 1202 */ 1203 1204 /* Initialization and de-initialization functions ****************************/ 1205 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart); 1206 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart); 1207 void HAL_USART_MspInit(USART_HandleTypeDef *husart); 1208 void HAL_USART_MspDeInit(USART_HandleTypeDef *husart); 1209 1210 /* Callbacks Register/UnRegister functions ***********************************/ 1211 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1) 1212 HAL_StatusTypeDef HAL_USART_RegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID, 1213 pUSART_CallbackTypeDef pCallback); 1214 HAL_StatusTypeDef HAL_USART_UnRegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID); 1215 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */ 1216 1217 /** 1218 * @} 1219 */ 1220 1221 /** @addtogroup USART_Exported_Functions_Group2 IO operation functions 1222 * @{ 1223 */ 1224 1225 /* IO operation functions *****************************************************/ 1226 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size, 1227 uint32_t Timeout); 1228 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); 1229 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData, 1230 uint16_t Size, uint32_t Timeout); 1231 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size); 1232 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); 1233 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData, 1234 uint16_t Size); 1235 #if defined(HAL_DMA_MODULE_ENABLED) 1236 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size); 1237 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); 1238 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData, 1239 uint16_t Size); 1240 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart); 1241 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart); 1242 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart); 1243 #endif /* HAL_DMA_MODULE_ENABLED */ 1244 /* Transfer Abort functions */ 1245 HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart); 1246 HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart); 1247 1248 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart); 1249 void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart); 1250 void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart); 1251 void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart); 1252 void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart); 1253 void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart); 1254 void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart); 1255 void HAL_USART_AbortCpltCallback(USART_HandleTypeDef *husart); 1256 1257 /** 1258 * @} 1259 */ 1260 1261 /** @addtogroup USART_Exported_Functions_Group4 Peripheral State and Error functions 1262 * @{ 1263 */ 1264 1265 /* Peripheral State and Error functions ***************************************/ 1266 HAL_USART_StateTypeDef HAL_USART_GetState(const USART_HandleTypeDef *husart); 1267 uint32_t HAL_USART_GetError(const USART_HandleTypeDef *husart); 1268 1269 /** 1270 * @} 1271 */ 1272 1273 /** 1274 * @} 1275 */ 1276 1277 /** 1278 * @} 1279 */ 1280 1281 /** 1282 * @} 1283 */ 1284 1285 #ifdef __cplusplus 1286 } 1287 #endif 1288 1289 #endif /* STM32H5xx_HAL_USART_H */ 1290
