1 /** 2 ****************************************************************************** 3 * @file stm32h5xx_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2023 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H5xx_HAL_UART_H 21 #define STM32H5xx_HAL_UART_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h5xx_hal_def.h" 29 30 /** @addtogroup STM32H5xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UART 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UART_Exported_Types UART Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART Init Structure definition 45 */ 46 typedef struct 47 { 48 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 49 The baud rate register is computed using the following formula: 50 LPUART: 51 ======= 52 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) 53 where lpuart_ker_ck_pres is the UART input clock divided by a prescaler 54 UART: 55 ===== 56 - If oversampling is 16 or in LIN mode, 57 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) 58 - If oversampling is 8, 59 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / 60 ((huart->Init.BaudRate)))[15:4] 61 Baud Rate Register[3] = 0 62 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / 63 ((huart->Init.BaudRate)))[3:0]) >> 1 64 where uart_ker_ck_pres is the UART input clock divided by a prescaler */ 65 66 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 67 This parameter can be a value of @ref UARTEx_Word_Length. */ 68 69 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 70 This parameter can be a value of @ref UART_Stop_Bits. */ 71 72 uint32_t Parity; /*!< Specifies the parity mode. 73 This parameter can be a value of @ref UART_Parity 74 @note When parity is enabled, the computed parity is inserted 75 at the MSB position of the transmitted data (9th bit when 76 the word length is set to 9 data bits; 8th bit when the 77 word length is set to 8 data bits). */ 78 79 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 80 This parameter can be a value of @ref UART_Mode. */ 81 82 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 83 or disabled. 84 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 85 86 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, 87 to achieve higher speed (up to f_PCLK/8). 88 This parameter can be a value of @ref UART_Over_Sampling. */ 89 90 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 91 Selecting the single sample method increases the receiver tolerance to clock 92 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 93 94 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. 95 This parameter can be a value of @ref UART_ClockPrescaler. */ 96 97 } UART_InitTypeDef; 98 99 /** 100 * @brief UART Advanced Features initialization structure definition 101 */ 102 typedef struct 103 { 104 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 105 Advanced Features may be initialized at the same time . 106 This parameter can be a value of 107 @ref UART_Advanced_Features_Initialization_Type. */ 108 109 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 110 This parameter can be a value of @ref UART_Tx_Inv. */ 111 112 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 113 This parameter can be a value of @ref UART_Rx_Inv. */ 114 115 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 116 vs negative/inverted logic). 117 This parameter can be a value of @ref UART_Data_Inv. */ 118 119 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 120 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 121 122 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 123 This parameter can be a value of @ref UART_Overrun_Disable. */ 124 125 #if defined(HAL_DMA_MODULE_ENABLED) 126 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 127 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 128 129 #endif /* HAL_DMA_MODULE_ENABLED */ 130 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 131 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 132 133 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 134 detection is carried out. 135 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 136 137 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 138 This parameter can be a value of @ref UART_MSB_First. */ 139 } UART_AdvFeatureInitTypeDef; 140 141 /** 142 * @brief HAL UART State definition 143 * @note HAL UART State value is a combination of 2 different substates: 144 * gState and RxState (see @ref UART_State_Definition). 145 * - gState contains UART state information related to global Handle management 146 * and also information related to Tx operations. 147 * gState value coding follow below described bitmap : 148 * b7-b6 Error information 149 * 00 : No Error 150 * 01 : (Not Used) 151 * 10 : Timeout 152 * 11 : Error 153 * b5 Peripheral initialization status 154 * 0 : Reset (Peripheral not initialized) 155 * 1 : Init done (Peripheral initialized. HAL UART Init function already called) 156 * b4-b3 (not used) 157 * xx : Should be set to 00 158 * b2 Intrinsic process state 159 * 0 : Ready 160 * 1 : Busy (Peripheral busy with some configuration or internal operations) 161 * b1 (not used) 162 * x : Should be set to 0 163 * b0 Tx state 164 * 0 : Ready (no Tx operation ongoing) 165 * 1 : Busy (Tx operation ongoing) 166 * - RxState contains information related to Rx operations. 167 * RxState value coding follow below described bitmap : 168 * b7-b6 (not used) 169 * xx : Should be set to 00 170 * b5 Peripheral initialization status 171 * 0 : Reset (Peripheral not initialized) 172 * 1 : Init done (Peripheral initialized) 173 * b4-b2 (not used) 174 * xxx : Should be set to 000 175 * b1 Rx state 176 * 0 : Ready (no Rx operation ongoing) 177 * 1 : Busy (Rx operation ongoing) 178 * b0 (not used) 179 * x : Should be set to 0. 180 */ 181 typedef uint32_t HAL_UART_StateTypeDef; 182 183 /** 184 * @brief UART clock sources definition 185 */ 186 typedef enum 187 { 188 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 189 UART_CLOCKSOURCE_PLL2Q = 0x01U, /*!< PLL2Q clock source */ 190 UART_CLOCKSOURCE_PLL3Q = 0x02U, /*!< PLL3Q clock source */ 191 UART_CLOCKSOURCE_HSI = 0x04U, /*!< HSI clock source */ 192 UART_CLOCKSOURCE_CSI = 0x08U, /*!< CSI clock source */ 193 UART_CLOCKSOURCE_LSE = 0x10U, /*!< LSE clock source */ 194 UART_CLOCKSOURCE_UNDEFINED = 0x20U /*!< Undefined clock source */ 195 } UART_ClockSourceTypeDef; 196 197 /** 198 * @brief HAL UART Reception type definition 199 * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. 200 * This parameter can be a value of @ref UART_Reception_Type_Values : 201 * HAL_UART_RECEPTION_STANDARD = 0x00U, 202 * HAL_UART_RECEPTION_TOIDLE = 0x01U, 203 * HAL_UART_RECEPTION_TORTO = 0x02U, 204 * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U, 205 */ 206 typedef uint32_t HAL_UART_RxTypeTypeDef; 207 208 /** 209 * @brief HAL UART Rx Event type definition 210 * @note HAL UART Rx Event type value aims to identify which type of Event has occurred 211 * leading to call of the RxEvent callback. 212 * This parameter can be a value of @ref UART_RxEvent_Type_Values : 213 * HAL_UART_RXEVENT_TC = 0x00U, 214 * HAL_UART_RXEVENT_HT = 0x01U, 215 * HAL_UART_RXEVENT_IDLE = 0x02U, 216 */ 217 typedef uint32_t HAL_UART_RxEventTypeTypeDef; 218 219 /** 220 * @brief UART handle Structure definition 221 */ 222 typedef struct __UART_HandleTypeDef 223 { 224 USART_TypeDef *Instance; /*!< UART registers base address */ 225 226 UART_InitTypeDef Init; /*!< UART communication parameters */ 227 228 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 229 230 const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 231 232 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 233 234 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 235 236 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 237 238 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 239 240 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 241 242 uint16_t Mask; /*!< UART Rx RDR register mask */ 243 244 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. 245 This parameter can be a value of @ref UARTEx_FIFO_mode. */ 246 247 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 248 249 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 250 251 __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ 252 253 __IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */ 254 255 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 256 257 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 258 259 #if defined(HAL_DMA_MODULE_ENABLED) 260 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 261 262 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 263 264 #endif /* HAL_DMA_MODULE_ENABLED */ 265 HAL_LockTypeDef Lock; /*!< Locking object */ 266 267 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 268 and also related to Tx operations. This parameter 269 can be a value of @ref HAL_UART_StateTypeDef */ 270 271 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. This 272 parameter can be a value of @ref HAL_UART_StateTypeDef */ 273 274 __IO uint32_t ErrorCode; /*!< UART Error code */ 275 276 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 277 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 278 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 279 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 280 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 281 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 282 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 283 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 284 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 285 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 286 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ 287 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ 288 void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ 289 290 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 291 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 292 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 293 294 } UART_HandleTypeDef; 295 296 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 297 /** 298 * @brief HAL UART Callback ID enumeration definition 299 */ 300 typedef enum 301 { 302 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 303 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 304 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 305 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 306 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 307 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 308 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 309 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 310 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 311 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ 312 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ 313 314 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 315 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 316 317 } HAL_UART_CallbackIDTypeDef; 318 319 /** 320 * @brief HAL UART Callback pointer definition 321 */ 322 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 323 typedef void (*pUART_RxEventCallbackTypeDef) 324 (struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ 325 326 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 327 328 /** 329 * @} 330 */ 331 332 /* Exported constants --------------------------------------------------------*/ 333 /** @defgroup UART_Exported_Constants UART Exported Constants 334 * @{ 335 */ 336 337 /** @defgroup UART_State_Definition UART State Code Definition 338 * @{ 339 */ 340 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 341 Value is allowed for gState and RxState */ 342 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 343 Value is allowed for gState and RxState */ 344 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 345 Value is allowed for gState only */ 346 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 347 Value is allowed for gState only */ 348 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 349 Value is allowed for RxState only */ 350 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 351 Not to be used for neither gState nor RxState.Value is result 352 of combination (Or) between gState and RxState values */ 353 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 354 Value is allowed for gState only */ 355 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 356 Value is allowed for gState only */ 357 /** 358 * @} 359 */ 360 361 /** @defgroup UART_Error_Definition UART Error Definition 362 * @{ 363 */ 364 #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */ 365 #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */ 366 #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */ 367 #define HAL_UART_ERROR_FE (0x00000004U) /*!< Frame error */ 368 #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */ 369 #if defined(HAL_DMA_MODULE_ENABLED) 370 #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 371 #endif /* HAL_DMA_MODULE_ENABLED */ 372 #define HAL_UART_ERROR_RTO (0x00000020U) /*!< Receiver Timeout error */ 373 374 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 375 #define HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */ 376 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 377 /** 378 * @} 379 */ 380 381 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 382 * @{ 383 */ 384 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 385 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 386 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 387 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 388 /** 389 * @} 390 */ 391 392 /** @defgroup UART_Parity UART Parity 393 * @{ 394 */ 395 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 396 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 397 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 398 /** 399 * @} 400 */ 401 402 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 403 * @{ 404 */ 405 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 406 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 407 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 408 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 409 /** 410 * @} 411 */ 412 413 /** @defgroup UART_Mode UART Transfer Mode 414 * @{ 415 */ 416 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 417 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 418 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 419 /** 420 * @} 421 */ 422 423 /** @defgroup UART_State UART State 424 * @{ 425 */ 426 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 427 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 428 /** 429 * @} 430 */ 431 432 /** @defgroup UART_Over_Sampling UART Over Sampling 433 * @{ 434 */ 435 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 436 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 437 /** 438 * @} 439 */ 440 441 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 442 * @{ 443 */ 444 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 445 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 446 /** 447 * @} 448 */ 449 450 /** @defgroup UART_ClockPrescaler UART Clock Prescaler 451 * @{ 452 */ 453 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 454 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 455 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 456 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 457 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 458 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 459 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 460 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 461 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 462 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 463 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 464 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 465 /** 466 * @} 467 */ 468 469 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 470 * @{ 471 */ 472 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection 473 on start bit */ 474 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection 475 on falling edge */ 476 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection 477 on 0x7F frame detection */ 478 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection 479 on 0x55 frame detection */ 480 /** 481 * @} 482 */ 483 484 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout 485 * @{ 486 */ 487 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ 488 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ 489 /** 490 * @} 491 */ 492 493 /** @defgroup UART_LIN UART Local Interconnection Network mode 494 * @{ 495 */ 496 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 497 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 498 /** 499 * @} 500 */ 501 502 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 503 * @{ 504 */ 505 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 506 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 507 /** 508 * @} 509 */ 510 511 #if defined(HAL_DMA_MODULE_ENABLED) 512 /** @defgroup UART_DMA_Tx UART DMA Tx 513 * @{ 514 */ 515 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 516 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 517 /** 518 * @} 519 */ 520 521 /** @defgroup UART_DMA_Rx UART DMA Rx 522 * @{ 523 */ 524 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 525 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 526 /** 527 * @} 528 */ 529 #endif /* HAL_DMA_MODULE_ENABLED */ 530 531 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 532 * @{ 533 */ 534 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 535 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 536 /** 537 * @} 538 */ 539 540 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 541 * @{ 542 */ 543 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 544 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 545 /** 546 * @} 547 */ 548 549 /** @defgroup UART_Request_Parameters UART Request Parameters 550 * @{ 551 */ 552 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 553 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 554 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 555 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 556 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 557 /** 558 * @} 559 */ 560 561 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 562 * @{ 563 */ 564 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 565 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 566 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 567 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 568 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 569 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 570 #if defined(HAL_DMA_MODULE_ENABLED) 571 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 572 #endif /* HAL_DMA_MODULE_ENABLED */ 573 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 574 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 575 /** 576 * @} 577 */ 578 579 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 580 * @{ 581 */ 582 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 583 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 584 /** 585 * @} 586 */ 587 588 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 589 * @{ 590 */ 591 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 592 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 593 /** 594 * @} 595 */ 596 597 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 598 * @{ 599 */ 600 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 601 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 602 /** 603 * @} 604 */ 605 606 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 607 * @{ 608 */ 609 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 610 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 611 /** 612 * @} 613 */ 614 615 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 616 * @{ 617 */ 618 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 619 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 620 /** 621 * @} 622 */ 623 624 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 625 * @{ 626 */ 627 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 628 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 629 /** 630 * @} 631 */ 632 633 #if defined(HAL_DMA_MODULE_ENABLED) 634 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 635 * @{ 636 */ 637 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 638 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 639 /** 640 * @} 641 */ 642 #endif /* HAL_DMA_MODULE_ENABLED */ 643 644 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 645 * @{ 646 */ 647 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received 648 first disable */ 649 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received 650 first enable */ 651 /** 652 * @} 653 */ 654 655 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 656 * @{ 657 */ 658 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 659 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 660 /** 661 * @} 662 */ 663 664 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 665 * @{ 666 */ 667 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 668 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 669 /** 670 * @} 671 */ 672 673 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 674 * @{ 675 */ 676 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 677 /** 678 * @} 679 */ 680 681 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 682 * @{ 683 */ 684 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 685 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 686 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register 687 not empty or RXFIFO is not empty */ 688 /** 689 * @} 690 */ 691 692 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 693 * @{ 694 */ 695 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 696 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 697 /** 698 * @} 699 */ 700 701 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 702 * @{ 703 */ 704 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB 705 position in CR1 register */ 706 /** 707 * @} 708 */ 709 710 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 711 * @{ 712 */ 713 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB 714 position in CR1 register */ 715 /** 716 * @} 717 */ 718 719 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 720 * @{ 721 */ 722 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 723 /** 724 * @} 725 */ 726 727 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 728 * @{ 729 */ 730 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 731 /** 732 * @} 733 */ 734 735 /** @defgroup UART_Flags UART Status Flags 736 * Elements values convention: 0xXXXX 737 * - 0xXXXX : Flag mask in the ISR register 738 * @{ 739 */ 740 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ 741 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ 742 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ 743 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ 744 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 745 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 746 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 747 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 748 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 749 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 750 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 751 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 752 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 753 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 754 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 755 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 756 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 757 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ 758 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ 759 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 760 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ 761 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ 762 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 763 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 764 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 765 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 766 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 767 /** 768 * @} 769 */ 770 771 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 772 * Elements values convention: 000ZZZZZ0XXYYYYYb 773 * - YYYYY : Interrupt source position in the XX register (5bits) 774 * - XX : Interrupt source register (2bits) 775 * - 01: CR1 register 776 * - 10: CR2 register 777 * - 11: CR3 register 778 * - ZZZZZ : Flag position in the ISR register(5bits) 779 * Elements values convention: 000000000XXYYYYYb 780 * - YYYYY : Interrupt source position in the XX register (5bits) 781 * - XX : Interrupt source register (2bits) 782 * - 01: CR1 register 783 * - 10: CR2 register 784 * - 11: CR3 register 785 * Elements values convention: 0000ZZZZ00000000b 786 * - ZZZZ : Flag position in the ISR register(4bits) 787 * @{ 788 */ 789 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 790 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 791 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ 792 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 793 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 794 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ 795 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 796 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 797 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 798 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 799 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 800 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ 801 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ 802 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ 803 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ 804 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ 805 806 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 807 808 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 809 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 810 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 811 /** 812 * @} 813 */ 814 815 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 816 * @{ 817 */ 818 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 819 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 820 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 821 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 822 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 823 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ 824 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 825 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 826 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 827 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 828 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 829 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ 830 /** 831 * @} 832 */ 833 834 /** @defgroup UART_Reception_Type_Values UART Reception type values 835 * @{ 836 */ 837 #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ 838 #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ 839 #define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */ 840 #define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */ 841 /** 842 * @} 843 */ 844 845 /** @defgroup UART_RxEvent_Type_Values UART RxEvent type values 846 * @{ 847 */ 848 #define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */ 849 #define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */ 850 #define HAL_UART_RXEVENT_IDLE (0x00000002U) /*!< RxEvent linked to IDLE event */ 851 /** 852 * @} 853 */ 854 855 /** 856 * @} 857 */ 858 859 /* Exported macros -----------------------------------------------------------*/ 860 /** @defgroup UART_Exported_Macros UART Exported Macros 861 * @{ 862 */ 863 864 /** @brief Reset UART handle states. 865 * @param __HANDLE__ UART handle. 866 * @retval None 867 */ 868 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 869 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 870 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 871 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 872 (__HANDLE__)->MspInitCallback = NULL; \ 873 (__HANDLE__)->MspDeInitCallback = NULL; \ 874 } while(0U) 875 #else 876 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 877 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 878 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 879 } while(0U) 880 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 881 882 /** @brief Flush the UART Data registers. 883 * @param __HANDLE__ specifies the UART Handle. 884 * @retval None 885 */ 886 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 887 do{ \ 888 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 889 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 890 } while(0U) 891 892 /** @brief Clear the specified UART pending flag. 893 * @param __HANDLE__ specifies the UART Handle. 894 * @param __FLAG__ specifies the flag to check. 895 * This parameter can be any combination of the following values: 896 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 897 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 898 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 899 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 900 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 901 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag 902 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 903 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag 904 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 905 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 906 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 907 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 908 * @retval None 909 */ 910 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 911 912 /** @brief Clear the UART PE pending flag. 913 * @param __HANDLE__ specifies the UART Handle. 914 * @retval None 915 */ 916 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 917 918 /** @brief Clear the UART FE pending flag. 919 * @param __HANDLE__ specifies the UART Handle. 920 * @retval None 921 */ 922 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 923 924 /** @brief Clear the UART NE pending flag. 925 * @param __HANDLE__ specifies the UART Handle. 926 * @retval None 927 */ 928 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 929 930 /** @brief Clear the UART ORE pending flag. 931 * @param __HANDLE__ specifies the UART Handle. 932 * @retval None 933 */ 934 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 935 936 /** @brief Clear the UART IDLE pending flag. 937 * @param __HANDLE__ specifies the UART Handle. 938 * @retval None 939 */ 940 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 941 942 /** @brief Clear the UART TX FIFO empty clear flag. 943 * @param __HANDLE__ specifies the UART Handle. 944 * @retval None 945 */ 946 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) 947 948 /** @brief Check whether the specified UART flag is set or not. 949 * @param __HANDLE__ specifies the UART Handle. 950 * @param __FLAG__ specifies the flag to check. 951 * This parameter can be one of the following values: 952 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag 953 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag 954 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag 955 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag 956 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 957 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 958 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 959 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 960 * @arg @ref UART_FLAG_SBKF Send Break flag 961 * @arg @ref UART_FLAG_CMF Character match flag 962 * @arg @ref UART_FLAG_BUSY Busy flag 963 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 964 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 965 * @arg @ref UART_FLAG_CTS CTS Change flag 966 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 967 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 968 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag 969 * @arg @ref UART_FLAG_TC Transmission Complete flag 970 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 971 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag 972 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag 973 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 974 * @arg @ref UART_FLAG_ORE Overrun Error flag 975 * @arg @ref UART_FLAG_NE Noise Error flag 976 * @arg @ref UART_FLAG_FE Framing Error flag 977 * @arg @ref UART_FLAG_PE Parity Error flag 978 * @retval The new state of __FLAG__ (TRUE or FALSE). 979 */ 980 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 981 982 /** @brief Enable the specified UART interrupt. 983 * @param __HANDLE__ specifies the UART Handle. 984 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 985 * This parameter can be one of the following values: 986 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 987 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 988 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 989 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 990 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 991 * @arg @ref UART_IT_CM Character match interrupt 992 * @arg @ref UART_IT_CTS CTS change interrupt 993 * @arg @ref UART_IT_LBD LIN Break detection interrupt 994 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 995 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 996 * @arg @ref UART_IT_TC Transmission complete interrupt 997 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 998 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 999 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1000 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1001 * @arg @ref UART_IT_PE Parity Error interrupt 1002 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 1003 * @retval None 1004 */ 1005 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1006 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1007 ((__HANDLE__)->Instance->CR1 |= (1U <<\ 1008 ((__INTERRUPT__) & UART_IT_MASK))): \ 1009 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1010 ((__HANDLE__)->Instance->CR2 |= (1U <<\ 1011 ((__INTERRUPT__) & UART_IT_MASK))): \ 1012 ((__HANDLE__)->Instance->CR3 |= (1U <<\ 1013 ((__INTERRUPT__) & UART_IT_MASK)))) 1014 1015 /** @brief Disable the specified UART interrupt. 1016 * @param __HANDLE__ specifies the UART Handle. 1017 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 1018 * This parameter can be one of the following values: 1019 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1020 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1021 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1022 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1023 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1024 * @arg @ref UART_IT_CM Character match interrupt 1025 * @arg @ref UART_IT_CTS CTS change interrupt 1026 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1027 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1028 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1029 * @arg @ref UART_IT_TC Transmission complete interrupt 1030 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1031 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1032 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1033 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1034 * @arg @ref UART_IT_PE Parity Error interrupt 1035 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1036 * @retval None 1037 */ 1038 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1039 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1040 ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\ 1041 ((__INTERRUPT__) & UART_IT_MASK))): \ 1042 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1043 ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\ 1044 ((__INTERRUPT__) & UART_IT_MASK))): \ 1045 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\ 1046 ((__INTERRUPT__) & UART_IT_MASK)))) 1047 1048 /** @brief Check whether the specified UART interrupt has occurred or not. 1049 * @param __HANDLE__ specifies the UART Handle. 1050 * @param __INTERRUPT__ specifies the UART interrupt to check. 1051 * This parameter can be one of the following values: 1052 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1053 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1054 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1055 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1056 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1057 * @arg @ref UART_IT_CM Character match interrupt 1058 * @arg @ref UART_IT_CTS CTS change interrupt 1059 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1060 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1061 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1062 * @arg @ref UART_IT_TC Transmission complete interrupt 1063 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1064 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1065 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1066 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1067 * @arg @ref UART_IT_PE Parity Error interrupt 1068 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1069 * @retval The new state of __INTERRUPT__ (SET or RESET). 1070 */ 1071 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 1072 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 1073 1074 /** @brief Check whether the specified UART interrupt source is enabled or not. 1075 * @param __HANDLE__ specifies the UART Handle. 1076 * @param __INTERRUPT__ specifies the UART interrupt source to check. 1077 * This parameter can be one of the following values: 1078 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1079 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1080 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1081 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1082 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1083 * @arg @ref UART_IT_CM Character match interrupt 1084 * @arg @ref UART_IT_CTS CTS change interrupt 1085 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1086 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1087 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1088 * @arg @ref UART_IT_TC Transmission complete interrupt 1089 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1090 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1091 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1092 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1093 * @arg @ref UART_IT_PE Parity Error interrupt 1094 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1095 * @retval The new state of __INTERRUPT__ (SET or RESET). 1096 */ 1097 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\ 1098 (__HANDLE__)->Instance->CR1 : \ 1099 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\ 1100 (__HANDLE__)->Instance->CR2 : \ 1101 (__HANDLE__)->Instance->CR3)) & (1U <<\ 1102 (((uint16_t)(__INTERRUPT__)) &\ 1103 UART_IT_MASK))) != RESET) ? SET : RESET) 1104 1105 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1106 * @param __HANDLE__ specifies the UART Handle. 1107 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1108 * to clear the corresponding interrupt 1109 * This parameter can be one of the following values: 1110 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1111 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1112 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1113 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1114 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1115 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag 1116 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag 1117 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1118 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1119 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1120 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1121 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1122 * @retval None 1123 */ 1124 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1125 1126 /** @brief Set a specific UART request flag. 1127 * @param __HANDLE__ specifies the UART Handle. 1128 * @param __REQ__ specifies the request flag to set 1129 * This parameter can be one of the following values: 1130 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1131 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1132 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1133 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1134 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1135 * @retval None 1136 */ 1137 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 1138 1139 /** @brief Enable the UART one bit sample method. 1140 * @param __HANDLE__ specifies the UART Handle. 1141 * @retval None 1142 */ 1143 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1144 1145 /** @brief Disable the UART one bit sample method. 1146 * @param __HANDLE__ specifies the UART Handle. 1147 * @retval None 1148 */ 1149 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1150 1151 /** @brief Enable UART. 1152 * @param __HANDLE__ specifies the UART Handle. 1153 * @retval None 1154 */ 1155 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1156 1157 /** @brief Disable UART. 1158 * @param __HANDLE__ specifies the UART Handle. 1159 * @retval None 1160 */ 1161 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1162 1163 /** @brief Enable CTS flow control. 1164 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1165 * without need to call HAL_UART_Init() function. 1166 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1167 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1168 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1169 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1170 * - macro could only be called when corresponding UART instance is disabled 1171 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1172 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1173 * @param __HANDLE__ specifies the UART Handle. 1174 * @retval None 1175 */ 1176 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1177 do{ \ 1178 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1179 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1180 } while(0U) 1181 1182 /** @brief Disable CTS flow control. 1183 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1184 * without need to call HAL_UART_Init() function. 1185 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1186 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1187 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1188 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1189 * - macro could only be called when corresponding UART instance is disabled 1190 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1191 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1192 * @param __HANDLE__ specifies the UART Handle. 1193 * @retval None 1194 */ 1195 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1196 do{ \ 1197 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1198 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1199 } while(0U) 1200 1201 /** @brief Enable RTS flow control. 1202 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1203 * without need to call HAL_UART_Init() function. 1204 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1205 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1206 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1207 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1208 * - macro could only be called when corresponding UART instance is disabled 1209 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1210 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1211 * @param __HANDLE__ specifies the UART Handle. 1212 * @retval None 1213 */ 1214 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1215 do{ \ 1216 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1217 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1218 } while(0U) 1219 1220 /** @brief Disable RTS flow control. 1221 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1222 * without need to call HAL_UART_Init() function. 1223 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1224 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1225 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1226 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1227 * - macro could only be called when corresponding UART instance is disabled 1228 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1229 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1230 * @param __HANDLE__ specifies the UART Handle. 1231 * @retval None 1232 */ 1233 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1234 do{ \ 1235 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1236 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1237 } while(0U) 1238 /** 1239 * @} 1240 */ 1241 1242 /* Private macros --------------------------------------------------------*/ 1243 /** @defgroup UART_Private_Macros UART Private Macros 1244 * @{ 1245 */ 1246 /** @brief Get UART clock division factor from clock prescaler value. 1247 * @param __CLOCKPRESCALER__ UART prescaler value. 1248 * @retval UART clock division factor 1249 */ 1250 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 1251 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ 1252 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ 1253 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ 1254 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ 1255 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ 1256 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ 1257 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ 1258 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ 1259 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ 1260 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ 1261 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : 256U) 1262 1263 /** @brief BRR division operation to set BRR register with LPUART. 1264 * @param __PCLK__ LPUART clock. 1265 * @param __BAUD__ Baud rate set by the user. 1266 * @param __CLOCKPRESCALER__ UART prescaler value. 1267 * @retval Division result 1268 */ 1269 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1270 ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)+ \ 1271 (uint32_t)((__BAUD__)/2U)) / (__BAUD__)) \ 1272 ) 1273 1274 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1275 * @param __PCLK__ UART clock. 1276 * @param __BAUD__ Baud rate set by the user. 1277 * @param __CLOCKPRESCALER__ UART prescaler value. 1278 * @retval Division result 1279 */ 1280 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1281 (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1282 1283 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1284 * @param __PCLK__ UART clock. 1285 * @param __BAUD__ Baud rate set by the user. 1286 * @param __CLOCKPRESCALER__ UART prescaler value. 1287 * @retval Division result 1288 */ 1289 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1290 ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2U)) / (__BAUD__)) 1291 1292 /** @brief Check whether or not UART instance is Low Power UART. 1293 * @param __HANDLE__ specifies the UART Handle. 1294 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 1295 */ 1296 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) 1297 1298 /** @brief Check UART Baud rate. 1299 * @param __BAUDRATE__ Baudrate specified by the user. 1300 * The maximum Baud Rate is derived from the maximum clock on H5 (i.e. 250 MHz) 1301 * divided by the smallest oversampling used on the USART (i.e. 8) 1302 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1303 */ 1304 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 20000000U) 1305 1306 /** @brief Check UART assertion time. 1307 * @param __TIME__ 5-bit value assertion time. 1308 * @retval Test result (TRUE or FALSE). 1309 */ 1310 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1311 1312 /** @brief Check UART deassertion time. 1313 * @param __TIME__ 5-bit value deassertion time. 1314 * @retval Test result (TRUE or FALSE). 1315 */ 1316 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1317 1318 /** 1319 * @brief Ensure that UART frame number of stop bits is valid. 1320 * @param __STOPBITS__ UART frame number of stop bits. 1321 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1322 */ 1323 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1324 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1325 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1326 ((__STOPBITS__) == UART_STOPBITS_2)) 1327 1328 /** 1329 * @brief Ensure that LPUART frame number of stop bits is valid. 1330 * @param __STOPBITS__ LPUART frame number of stop bits. 1331 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1332 */ 1333 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 1334 ((__STOPBITS__) == UART_STOPBITS_2)) 1335 1336 /** 1337 * @brief Ensure that UART frame parity is valid. 1338 * @param __PARITY__ UART frame parity. 1339 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1340 */ 1341 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1342 ((__PARITY__) == UART_PARITY_EVEN) || \ 1343 ((__PARITY__) == UART_PARITY_ODD)) 1344 1345 /** 1346 * @brief Ensure that UART hardware flow control is valid. 1347 * @param __CONTROL__ UART hardware flow control. 1348 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1349 */ 1350 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1351 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1352 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1353 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1354 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1355 1356 /** 1357 * @brief Ensure that UART communication mode is valid. 1358 * @param __MODE__ UART communication mode. 1359 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1360 */ 1361 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1362 1363 /** 1364 * @brief Ensure that UART state is valid. 1365 * @param __STATE__ UART state. 1366 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1367 */ 1368 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1369 ((__STATE__) == UART_STATE_ENABLE)) 1370 1371 /** 1372 * @brief Ensure that UART oversampling is valid. 1373 * @param __SAMPLING__ UART oversampling. 1374 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1375 */ 1376 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1377 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1378 1379 /** 1380 * @brief Ensure that UART frame sampling is valid. 1381 * @param __ONEBIT__ UART frame sampling. 1382 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1383 */ 1384 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1385 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1386 1387 /** 1388 * @brief Ensure that UART auto Baud rate detection mode is valid. 1389 * @param __MODE__ UART auto Baud rate detection mode. 1390 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1391 */ 1392 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1393 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1394 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1395 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1396 1397 /** 1398 * @brief Ensure that UART receiver timeout setting is valid. 1399 * @param __TIMEOUT__ UART receiver timeout setting. 1400 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1401 */ 1402 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1403 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1404 1405 /** @brief Check the receiver timeout value. 1406 * @note The maximum UART receiver timeout value is 0xFFFFFF. 1407 * @param __TIMEOUTVALUE__ receiver timeout value. 1408 * @retval Test result (TRUE or FALSE) 1409 */ 1410 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) 1411 1412 /** 1413 * @brief Ensure that UART LIN state is valid. 1414 * @param __LIN__ UART LIN state. 1415 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1416 */ 1417 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1418 ((__LIN__) == UART_LIN_ENABLE)) 1419 1420 /** 1421 * @brief Ensure that UART LIN break detection length is valid. 1422 * @param __LENGTH__ UART LIN break detection length. 1423 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1424 */ 1425 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1426 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1427 1428 #if defined(HAL_DMA_MODULE_ENABLED) 1429 /** 1430 * @brief Ensure that UART DMA TX state is valid. 1431 * @param __DMATX__ UART DMA TX state. 1432 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1433 */ 1434 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1435 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1436 1437 /** 1438 * @brief Ensure that UART DMA RX state is valid. 1439 * @param __DMARX__ UART DMA RX state. 1440 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1441 */ 1442 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1443 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1444 1445 #endif /* HAL_DMA_MODULE_ENABLED */ 1446 /** 1447 * @brief Ensure that UART half-duplex state is valid. 1448 * @param __HDSEL__ UART half-duplex state. 1449 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1450 */ 1451 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1452 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1453 1454 /** 1455 * @brief Ensure that UART wake-up method is valid. 1456 * @param __WAKEUP__ UART wake-up method . 1457 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1458 */ 1459 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1460 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1461 1462 /** 1463 * @brief Ensure that UART request parameter is valid. 1464 * @param __PARAM__ UART request parameter. 1465 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1466 */ 1467 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1468 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1469 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1470 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1471 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1472 1473 /** 1474 * @brief Ensure that UART advanced features initialization is valid. 1475 * @param __INIT__ UART advanced features initialization. 1476 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1477 */ 1478 #if defined(HAL_DMA_MODULE_ENABLED) 1479 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1480 UART_ADVFEATURE_TXINVERT_INIT | \ 1481 UART_ADVFEATURE_RXINVERT_INIT | \ 1482 UART_ADVFEATURE_DATAINVERT_INIT | \ 1483 UART_ADVFEATURE_SWAP_INIT | \ 1484 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1485 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1486 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1487 UART_ADVFEATURE_MSBFIRST_INIT)) 1488 #else 1489 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1490 UART_ADVFEATURE_TXINVERT_INIT | \ 1491 UART_ADVFEATURE_RXINVERT_INIT | \ 1492 UART_ADVFEATURE_DATAINVERT_INIT | \ 1493 UART_ADVFEATURE_SWAP_INIT | \ 1494 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1495 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1496 UART_ADVFEATURE_MSBFIRST_INIT)) 1497 #endif /* HAL_DMA_MODULE_ENABLED */ 1498 1499 /** 1500 * @brief Ensure that UART frame TX inversion setting is valid. 1501 * @param __TXINV__ UART frame TX inversion setting. 1502 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1503 */ 1504 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1505 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1506 1507 /** 1508 * @brief Ensure that UART frame RX inversion setting is valid. 1509 * @param __RXINV__ UART frame RX inversion setting. 1510 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1511 */ 1512 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1513 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1514 1515 /** 1516 * @brief Ensure that UART frame data inversion setting is valid. 1517 * @param __DATAINV__ UART frame data inversion setting. 1518 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1519 */ 1520 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1521 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1522 1523 /** 1524 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1525 * @param __SWAP__ UART frame RX/TX pins swap setting. 1526 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1527 */ 1528 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1529 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1530 1531 /** 1532 * @brief Ensure that UART frame overrun setting is valid. 1533 * @param __OVERRUN__ UART frame overrun setting. 1534 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1535 */ 1536 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1537 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1538 1539 /** 1540 * @brief Ensure that UART auto Baud rate state is valid. 1541 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1542 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1543 */ 1544 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \ 1545 UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1546 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1547 1548 #if defined(HAL_DMA_MODULE_ENABLED) 1549 /** 1550 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1551 * @param __DMA__ UART DMA enabling or disabling on error setting. 1552 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1553 */ 1554 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1555 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1556 #endif /* HAL_DMA_MODULE_ENABLED */ 1557 1558 /** 1559 * @brief Ensure that UART frame MSB first setting is valid. 1560 * @param __MSBFIRST__ UART frame MSB first setting. 1561 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1562 */ 1563 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1564 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1565 1566 /** 1567 * @brief Ensure that UART stop mode state is valid. 1568 * @param __STOPMODE__ UART stop mode state. 1569 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1570 */ 1571 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1572 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1573 1574 /** 1575 * @brief Ensure that UART mute mode state is valid. 1576 * @param __MUTE__ UART mute mode state. 1577 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1578 */ 1579 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1580 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1581 1582 /** 1583 * @brief Ensure that UART wake-up selection is valid. 1584 * @param __WAKE__ UART wake-up selection. 1585 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1586 */ 1587 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1588 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1589 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1590 1591 /** 1592 * @brief Ensure that UART driver enable polarity is valid. 1593 * @param __POLARITY__ UART driver enable polarity. 1594 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1595 */ 1596 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1597 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1598 1599 /** 1600 * @brief Ensure that UART Prescaler is valid. 1601 * @param __CLOCKPRESCALER__ UART Prescaler value. 1602 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 1603 */ 1604 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ 1605 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ 1606 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ 1607 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ 1608 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ 1609 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ 1610 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ 1611 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ 1612 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ 1613 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ 1614 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ 1615 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) 1616 1617 /** 1618 * @} 1619 */ 1620 1621 /* Include UART HAL Extended module */ 1622 #include "stm32h5xx_hal_uart_ex.h" 1623 1624 /* Exported functions --------------------------------------------------------*/ 1625 /** @addtogroup UART_Exported_Functions UART Exported Functions 1626 * @{ 1627 */ 1628 1629 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1630 * @{ 1631 */ 1632 1633 /* Initialization and de-initialization functions ****************************/ 1634 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1635 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1636 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1637 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1638 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1639 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1640 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1641 1642 /* Callbacks Register/UnRegister functions ***********************************/ 1643 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1644 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, 1645 pUART_CallbackTypeDef pCallback); 1646 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1647 1648 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); 1649 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); 1650 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1651 1652 /** 1653 * @} 1654 */ 1655 1656 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1657 * @{ 1658 */ 1659 1660 /* IO operation functions *****************************************************/ 1661 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); 1662 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1663 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1664 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1665 #if defined(HAL_DMA_MODULE_ENABLED) 1666 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1667 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1668 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1669 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1670 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1671 #endif /* HAL_DMA_MODULE_ENABLED */ 1672 /* Transfer Abort functions */ 1673 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1674 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1675 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1676 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1677 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1678 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1679 1680 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1681 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1682 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1683 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1684 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1685 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1686 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1687 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1688 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1689 1690 void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); 1691 1692 /** 1693 * @} 1694 */ 1695 1696 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1697 * @{ 1698 */ 1699 1700 /* Peripheral Control functions ************************************************/ 1701 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); 1702 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); 1703 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); 1704 1705 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1706 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1707 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1708 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1709 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1710 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1711 1712 /** 1713 * @} 1714 */ 1715 1716 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1717 * @{ 1718 */ 1719 1720 /* Peripheral State and Errors functions **************************************************/ 1721 HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart); 1722 uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart); 1723 1724 /** 1725 * @} 1726 */ 1727 1728 /** 1729 * @} 1730 */ 1731 1732 /* Private functions -----------------------------------------------------------*/ 1733 /** @addtogroup UART_Private_Functions UART Private Functions 1734 * @{ 1735 */ 1736 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1737 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 1738 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1739 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1740 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1741 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, 1742 uint32_t Tickstart, uint32_t Timeout); 1743 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1744 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1745 #if defined(HAL_DMA_MODULE_ENABLED) 1746 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1747 #endif /* HAL_DMA_MODULE_ENABLED */ 1748 1749 /** 1750 * @} 1751 */ 1752 1753 /* Private variables -----------------------------------------------------------*/ 1754 /** @defgroup UART_Private_variables UART Private variables 1755 * @{ 1756 */ 1757 /* Prescaler Table used in BRR computation macros. 1758 Declared as extern here to allow use of private UART macros, outside of HAL UART functions */ 1759 extern const uint16_t UARTPrescTable[12]; 1760 /** 1761 * @} 1762 */ 1763 1764 /** 1765 * @} 1766 */ 1767 1768 /** 1769 * @} 1770 */ 1771 1772 #ifdef __cplusplus 1773 } 1774 #endif 1775 1776 #endif /* STM32H5xx_HAL_UART_H */ 1777
