1 /** 2 ****************************************************************************** 3 * @file stm32h5xx_hal_pssi.h 4 * @author MCD Application Team 5 * @brief Header file of PSSI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2023 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H5xx_HAL_PSSI_H 21 #define STM32H5xx_HAL_PSSI_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h5xx_hal_def.h" 29 30 /** @addtogroup STM32H5xx_HAL_Driver 31 * @{ 32 */ 33 #if defined(PSSI) 34 35 #ifndef USE_HAL_PSSI_REGISTER_CALLBACKS 36 /* For backward compatibility, if USE_HAL_PSSI_REGISTER_CALLBACKS not defined, define it to 1*/ 37 #define USE_HAL_PSSI_REGISTER_CALLBACKS 0U 38 #endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */ 39 40 /** @addtogroup PSSI PSSI 41 * @brief PSSI HAL module driver 42 * @{ 43 */ 44 45 /* Exported types ------------------------------------------------------------*/ 46 /** @defgroup PSSI_Exported_Types PSSI Exported Types 47 * @{ 48 */ 49 50 51 /** 52 * @brief PSSI Init structure definition 53 */ 54 typedef struct 55 { 56 uint32_t DataWidth; /* !< Configures the data width. 57 This parameter can be a value of @ref PSSI_DATA_WIDTH. */ 58 uint32_t BusWidth; /* !< Configures the parallel bus width. 59 This parameter can be a value of @ref PSSI_BUS_WIDTH. */ 60 uint32_t ControlSignal; /* !< Configures Data enable and Data ready. 61 This parameter can be a value of @ref ControlSignal_Configuration. */ 62 uint32_t ClockPolarity; /* !< Configures the PSSI Input Clock polarity. 63 This parameter can be a value of @ref Clock_Polarity. */ 64 uint32_t DataEnablePolarity; /* !< Configures the PSSI Data Enable polarity. 65 This parameter can be a value of @ref Data_Enable_Polarity. */ 66 uint32_t ReadyPolarity; /* !< Configures the PSSI Ready polarity. 67 This parameter can be a value of @ref Ready_Polarity. */ 68 69 } PSSI_InitTypeDef; 70 71 72 /** 73 * @brief HAL PSSI State structures definition 74 */ 75 typedef enum 76 { 77 HAL_PSSI_STATE_RESET = 0x00U, /* !< PSSI not yet initialized or disabled */ 78 HAL_PSSI_STATE_READY = 0x01U, /* !< Peripheral initialized and ready for use */ 79 HAL_PSSI_STATE_BUSY = 0x02U, /* !< An internal process is ongoing */ 80 HAL_PSSI_STATE_BUSY_TX = 0x03U, /* !< Transmit process is ongoing */ 81 HAL_PSSI_STATE_BUSY_RX = 0x04U, /* !< Receive process is ongoing */ 82 HAL_PSSI_STATE_TIMEOUT = 0x05U, /* !< Timeout state */ 83 HAL_PSSI_STATE_ERROR = 0x06U, /* !< PSSI state error */ 84 HAL_PSSI_STATE_ABORT = 0x07U, /* !< PSSI process is aborted */ 85 86 } HAL_PSSI_StateTypeDef; 87 88 /** 89 * @brief PSSI handle Structure definition 90 */ 91 #if (USE_HAL_PSSI_REGISTER_CALLBACKS == 1) 92 typedef struct __PSSI_HandleTypeDef 93 #else 94 typedef struct 95 #endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */ 96 { 97 PSSI_TypeDef *Instance; /*!< PSSI register base address. */ 98 PSSI_InitTypeDef Init; /*!< PSSI Initialization Structure. */ 99 uint32_t *pBuffPtr; /*!< PSSI Data buffer. */ 100 uint32_t XferCount; /*!< PSSI transfer count */ 101 uint32_t XferSize; /*!< PSSI transfer size */ 102 #if defined(HAL_DMA_MODULE_ENABLED) 103 DMA_HandleTypeDef *hdmatx; /*!< PSSI Tx DMA Handle parameters */ 104 DMA_HandleTypeDef *hdmarx; /*!< PSSI Rx DMA Handle parameters */ 105 #endif /*HAL_DMA_MODULE_ENABLED*/ 106 107 #if (USE_HAL_PSSI_REGISTER_CALLBACKS == 1) 108 void (* TxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback. */ 109 void (* RxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback. */ 110 void (* ErrorCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback. */ 111 void (* AbortCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer error callback. */ 112 113 void (* MspInitCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI Msp Init callback. */ 114 void (* MspDeInitCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI Msp DeInit callback. */ 115 #endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */ 116 117 HAL_LockTypeDef Lock; /*!< PSSI lock. */ 118 __IO HAL_PSSI_StateTypeDef State; /*!< PSSI transfer state. */ 119 __IO uint32_t ErrorCode; /*!< PSSI error code. */ 120 121 } PSSI_HandleTypeDef; 122 123 #if (USE_HAL_PSSI_REGISTER_CALLBACKS == 1) 124 /** 125 * @brief HAL PSSI Callback pointer definition 126 */ 127 typedef void (*pPSSI_CallbackTypeDef)(PSSI_HandleTypeDef *hpssi); /*!< Pointer to a PSSI common callback function */ 128 129 /** 130 * @brief HAL PSSI Callback ID enumeration definition 131 */ 132 typedef enum 133 { 134 HAL_PSSI_TX_COMPLETE_CB_ID = 0x00U, /*!< PSSI Tx Transfer completed callback ID */ 135 HAL_PSSI_RX_COMPLETE_CB_ID = 0x01U, /*!< PSSI Rx Transfer completed callback ID */ 136 HAL_PSSI_ERROR_CB_ID = 0x03U, /*!< PSSI Error callback ID */ 137 HAL_PSSI_ABORT_CB_ID = 0x04U, /*!< PSSI Abort callback ID */ 138 139 HAL_PSSI_MSPINIT_CB_ID = 0x05U, /*!< PSSI Msp Init callback ID */ 140 HAL_PSSI_MSPDEINIT_CB_ID = 0x06U /*!< PSSI Msp DeInit callback ID */ 141 142 } HAL_PSSI_CallbackIDTypeDef; 143 #endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */ 144 145 /** 146 * @} 147 */ 148 149 /* Exported constants --------------------------------------------------------*/ 150 /** @defgroup PSSI_Exported_Constants PSSI Exported Constants 151 * @{ 152 */ 153 154 /** @defgroup PSSI_Error_Code PSSI Error Code 155 * @{ 156 */ 157 #define HAL_PSSI_ERROR_NONE 0x00000000U /*!< No error */ 158 #define HAL_PSSI_ERROR_NOT_SUPPORTED 0x00000001U /*!< Not supported operation */ 159 #define HAL_PSSI_ERROR_UNDER_RUN 0x00000002U /*!< FIFO Under-run error */ 160 #define HAL_PSSI_ERROR_OVER_RUN 0x00000004U /*!< FIFO Over-run error */ 161 #define HAL_PSSI_ERROR_DMA 0x00000008U /*!< Dma error */ 162 #define HAL_PSSI_ERROR_TIMEOUT 0x00000010U /*!< Timeout error */ 163 #if (USE_HAL_PSSI_REGISTER_CALLBACKS == 1) 164 #define HAL_PSSI_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid callback error */ 165 #endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */ 166 167 /** 168 * @} 169 */ 170 171 /** @defgroup PSSI_DATA_WIDTH PSSI Data Width 172 * @{ 173 */ 174 175 #define HAL_PSSI_8BITS 0x00000000U /*!< 8 Bits */ 176 #define HAL_PSSI_16BITS 0x00000001U /*!< 16 Bits */ 177 #define HAL_PSSI_32BITS 0x00000002U /*!< 32 Bits */ 178 /** 179 * @} 180 */ 181 182 /** @defgroup PSSI_BUS_WIDTH PSSI Bus Width 183 * @{ 184 */ 185 186 #define HAL_PSSI_8LINES 0x00000000U /*!< 8 data lines */ 187 #define HAL_PSSI_16LINES PSSI_CR_EDM /*!< 16 data lines */ 188 /** 189 * @} 190 */ 191 /** @defgroup PSSI_MODE PSSI mode 192 * @{ 193 */ 194 #define HAL_PSSI_UNIDIRECTIONAL 0x00000000U /*!< Uni-directional mode */ 195 #define HAL_PSSI_BIDIRECTIONAL 0x00000001U /*!< Bi-directional mode */ 196 /** 197 * @} 198 */ 199 200 /** @defgroup ControlSignal_Configuration ControlSignal Configuration 201 * @{ 202 */ 203 #define HAL_PSSI_DE_RDY_DISABLE (0x0U << PSSI_CR_DERDYCFG_Pos) /*!< Neither DE nor RDY are enabled */ 204 #define HAL_PSSI_RDY_ENABLE (0x1U << PSSI_CR_DERDYCFG_Pos) /*!< Only RDY enabled */ 205 #define HAL_PSSI_DE_ENABLE (0x2U << PSSI_CR_DERDYCFG_Pos) /*!< Only DE enabled */ 206 #define HAL_PSSI_DE_RDY_ALT_ENABLE (0x3U << PSSI_CR_DERDYCFG_Pos) /*!< Both RDY and DE alternate functions enabled */ 207 #define HAL_PSSI_MAP_RDY_BIDIR_ENABLE (0x4U << PSSI_CR_DERDYCFG_Pos) /*!< Bi-directional on RDY pin */ 208 #define HAL_PSSI_RDY_MAP_ENABLE (0x5U << PSSI_CR_DERDYCFG_Pos) /*!< Only RDY enabled, mapped to DE pin */ 209 #define HAL_PSSI_DE_MAP_ENABLE (0x6U << PSSI_CR_DERDYCFG_Pos) /*!< Only DE enabled, mapped to RDY pin */ 210 #define HAL_PSSI_MAP_DE_BIDIR_ENABLE (0x7U << PSSI_CR_DERDYCFG_Pos) /*!< Bi-directional on DE pin */ 211 212 /** 213 * @} 214 */ 215 216 217 /** @defgroup Data_Enable_Polarity Data Enable Polarity 218 * @{ 219 */ 220 #define HAL_PSSI_DEPOL_ACTIVE_LOW 0x0U /*!< Active Low */ 221 #define HAL_PSSI_DEPOL_ACTIVE_HIGH PSSI_CR_DEPOL /*!< Active High */ 222 /** 223 * @} 224 */ 225 /** @defgroup Ready_Polarity Ready Polarity 226 * @{ 227 */ 228 #define HAL_PSSI_RDYPOL_ACTIVE_LOW 0x0U /*!< Active Low */ 229 #define HAL_PSSI_RDYPOL_ACTIVE_HIGH PSSI_CR_RDYPOL /*!< Active High */ 230 /** 231 * @} 232 */ 233 234 /** @defgroup Clock_Polarity Clock Polarity 235 * @{ 236 */ 237 #define HAL_PSSI_FALLING_EDGE 0x0U /*!< Fallling Edge */ 238 #define HAL_PSSI_RISING_EDGE 0x1U /*!< Rising Edge */ 239 /** 240 * @} 241 */ 242 243 244 /** @defgroup PSSI_DEFINITION PSSI definitions 245 * @{ 246 */ 247 248 #define PSSI_MAX_NBYTE_SIZE 0x10000U /* 64 KB */ 249 #define PSSI_TIMEOUT_TRANSMIT 0x0000FFFFU /*!< Timeout Value */ 250 251 #define PSSI_CR_OUTEN_INPUT 0x00000000U /*!< Input Mode */ 252 #define PSSI_CR_OUTEN_OUTPUT PSSI_CR_OUTEN /*!< Output Mode */ 253 254 #define PSSI_CR_DMA_ENABLE PSSI_CR_DMAEN /*!< DMA Mode Enable */ 255 #define PSSI_CR_DMA_DISABLE (~PSSI_CR_DMAEN) /*!< DMA Mode Disable*/ 256 257 #define PSSI_CR_16BITS PSSI_CR_EDM /*!< 16 Lines Mode */ 258 #define PSSI_CR_8BITS (~PSSI_CR_EDM) /*!< 8 Lines Mode */ 259 260 #define PSSI_FLAG_RTT1B PSSI_SR_RTT1B /*!< 1 Byte Fifo Flag */ 261 #define PSSI_FLAG_RTT4B PSSI_SR_RTT4B /*!< 4 Bytes Fifo Flag*/ 262 263 264 /** 265 * @} 266 */ 267 268 /** @defgroup PSSI_Interrupts PSSI Interrupts 269 * @{ 270 */ 271 272 #define PSSI_FLAG_OVR_RIS PSSI_RIS_OVR_RIS /*!< Overrun, Underrun errors flag */ 273 #define PSSI_FLAG_MASK PSSI_RIS_OVR_RIS_Msk /*!< Overrun, Underrun errors Mask */ 274 #define PSSI_FLAG_OVR_MIS PSSI_MIS_OVR_MIS /*!< Overrun, Underrun masked errors flag */ 275 /** 276 * @} 277 */ 278 279 280 /** 281 * @} 282 */ 283 /* Exported macros ------------------------------------------------------------*/ 284 /** @defgroup PSSI_Exported_Macros PSSI Exported Macros 285 * @{ 286 */ 287 288 /** @brief Reset PSSI handle state 289 * @param __HANDLE__ specifies the PSSI handle. 290 * @retval None 291 */ 292 #if (USE_HAL_PSSI_REGISTER_CALLBACKS == 1) 293 #define HAL_PSSI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 294 (__HANDLE__)->State = HAL_PSSI_STATE_RESET;\ 295 (__HANDLE__)->MspInitCallback = NULL; \ 296 (__HANDLE__)->MspDeInitCallback = NULL; \ 297 }while(0) 298 #else 299 #define HAL_PSSI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_PSSI_STATE_RESET) 300 #endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */ 301 302 303 /** 304 * @brief Enable the PSSI. 305 * @param __HANDLE__ PSSI handle 306 * @retval None. 307 */ 308 #define HAL_PSSI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= PSSI_CR_ENABLE) 309 /** 310 * @brief Disable the PSSI. 311 * @param __HANDLE__ PSSI handle 312 * @retval None. 313 */ 314 #define HAL_PSSI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (~PSSI_CR_ENABLE)) 315 316 /* PSSI pripheral STATUS */ 317 /** 318 * @brief Get the PSSI pending flags. 319 * @param __HANDLE__ PSSI handle 320 * @param __FLAG__ flag to check. 321 * This parameter can be any combination of the following values: 322 * @arg PSSI_FLAG_RTT1B: FIFO is ready to transfer one byte 323 * @arg PSSI_FLAG_RTT4B: FIFO is ready to transfer four bytes 324 * @retval The state of FLAG. 325 */ 326 327 #define HAL_PSSI_GET_STATUS(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR & (__FLAG__)) 328 329 330 /* Interrupt & Flag management */ 331 /** 332 * @brief Get the PSSI pending flags. 333 * @param __HANDLE__ PSSI handle 334 * @param __FLAG__ flag to check. 335 * This parameter can be any combination of the following values: 336 * @arg PSSI_FLAG_OVR_RIS: Data Buffer overrun/underrun error flag 337 * @retval The state of FLAG. 338 */ 339 #define HAL_PSSI_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->RIS & (__FLAG__)) 340 341 /** 342 * @brief Clear the PSSI pending flags. 343 * @param __HANDLE__ PSSI handle 344 * @param __FLAG__ specifies the flag to clear. 345 * This parameter can be any combination of the following values: 346 * @arg PSSI_FLAG_OVR_RIS: Data Buffer overrun/underrun error flag 347 * @retval None 348 */ 349 #define HAL_PSSI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 350 351 /** 352 * @brief Enable the specified PSSI interrupts. 353 * @param __HANDLE__ PSSI handle 354 * @param __INTERRUPT__ specifies the PSSI interrupt sources to be enabled. 355 * This parameter can be any combination of the following values: 356 * @arg PSSI_FLAG_OVR_RIS: Configuration error mask 357 * @retval None 358 */ 359 #define HAL_PSSI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) 360 361 /** 362 * @brief Disable the specified PSSI interrupts. 363 * @param __HANDLE__ PSSI handle 364 * @param __INTERRUPT__ specifies the PSSI interrupt sources to be disabled. 365 * This parameter can be any combination of the following values: 366 * @arg PSSI_IT_OVR_IE: Configuration error mask 367 * @retval None 368 */ 369 #define HAL_PSSI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__)) 370 371 /** 372 * @brief Check whether the specified PSSI interrupt source is enabled or not. 373 * @param __HANDLE__ PSSI handle 374 * @param __INTERRUPT__ specifies the PSSI interrupt source to check. 375 * This parameter can be one of the following values: 376 * @arg PSSI_IT_OVR_IE: Data Buffer overrun/underrun error interrupt mask 377 * @retval The state of INTERRUPT source. 378 */ 379 #define HAL_PSSI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__)) 380 381 382 /** 383 * @brief Check whether the PSSI Control signal is valid. 384 * @param __CONTROL__ Control signals configuration 385 * @retval Valid or not. 386 */ 387 388 #define IS_PSSI_CONTROL_SIGNAL(__CONTROL__) (((__CONTROL__) == HAL_PSSI_DE_RDY_DISABLE ) || \ 389 ((__CONTROL__) == HAL_PSSI_RDY_ENABLE ) || \ 390 ((__CONTROL__) == HAL_PSSI_DE_ENABLE ) || \ 391 ((__CONTROL__) == HAL_PSSI_DE_RDY_ALT_ENABLE ) || \ 392 ((__CONTROL__) == HAL_PSSI_MAP_RDY_BIDIR_ENABLE ) || \ 393 ((__CONTROL__) == HAL_PSSI_RDY_MAP_ENABLE ) || \ 394 ((__CONTROL__) == HAL_PSSI_DE_MAP_ENABLE ) || \ 395 ((__CONTROL__) == HAL_PSSI_MAP_DE_BIDIR_ENABLE )) 396 397 398 /** 399 * @brief Check whether the PSSI Bus Width is valid. 400 * @param __BUSWIDTH__ PSSI Bush width 401 * @retval Valid or not. 402 */ 403 404 #define IS_PSSI_BUSWIDTH(__BUSWIDTH__) (((__BUSWIDTH__) == HAL_PSSI_8LINES ) || \ 405 ((__BUSWIDTH__) == HAL_PSSI_16LINES )) 406 407 /** 408 409 * @brief Check whether the PSSI Clock Polarity is valid. 410 * @param __CLOCKPOL__ PSSI Clock Polarity 411 * @retval Valid or not. 412 */ 413 414 #define IS_PSSI_CLOCK_POLARITY(__CLOCKPOL__) (((__CLOCKPOL__) == HAL_PSSI_FALLING_EDGE ) || \ 415 ((__CLOCKPOL__) == HAL_PSSI_RISING_EDGE )) 416 417 418 /** 419 * @brief Check whether the PSSI Data Enable Polarity is valid. 420 * @param __DEPOL__ PSSI DE Polarity 421 * @retval Valid or not. 422 */ 423 424 #define IS_PSSI_DE_POLARITY(__DEPOL__) (((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_LOW ) || \ 425 ((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_HIGH )) 426 427 /** 428 * @brief Check whether the PSSI Ready Polarity is valid. 429 * @param __RDYPOL__ PSSI RDY Polarity 430 * @retval Valid or not. 431 */ 432 433 #define IS_PSSI_RDY_POLARITY(__RDYPOL__) (((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_LOW ) || \ 434 ((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_HIGH )) 435 436 /** 437 * @} 438 */ 439 440 441 /* Exported functions --------------------------------------------------------*/ 442 /** @addtogroup PSSI_Exported_Functions PSSI Exported Functions 443 * @{ 444 */ 445 446 /** @addtogroup PSSI_Exported_Functions_Group1 Initialization and de-initialization functions 447 * @{ 448 */ 449 450 /* Initialization and de-initialization functions *******************************/ 451 HAL_StatusTypeDef HAL_PSSI_Init(PSSI_HandleTypeDef *hpssi); 452 HAL_StatusTypeDef HAL_PSSI_DeInit(PSSI_HandleTypeDef *hpssi); 453 void HAL_PSSI_MspInit(PSSI_HandleTypeDef *hpssi); 454 void HAL_PSSI_MspDeInit(PSSI_HandleTypeDef *hpssi); 455 /* Callbacks Register/UnRegister functions ***********************************/ 456 #if (USE_HAL_PSSI_REGISTER_CALLBACKS == 1) 457 HAL_StatusTypeDef HAL_PSSI_RegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID, 458 pPSSI_CallbackTypeDef pCallback); 459 HAL_StatusTypeDef HAL_PSSI_UnRegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID); 460 #endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */ 461 462 /** 463 * @} 464 */ 465 466 467 /** @addtogroup PSSI_Exported_Functions_Group2 Input and Output operation functions 468 * @{ 469 */ 470 471 /* IO operation functions *******************************************************/ 472 HAL_StatusTypeDef HAL_PSSI_Transmit(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout); 473 HAL_StatusTypeDef HAL_PSSI_Receive(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout); 474 #if defined(HAL_DMA_MODULE_ENABLED) 475 HAL_StatusTypeDef HAL_PSSI_Transmit_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size); 476 HAL_StatusTypeDef HAL_PSSI_Receive_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size); 477 HAL_StatusTypeDef HAL_PSSI_Abort_DMA(PSSI_HandleTypeDef *hpssi); 478 #endif /*HAL_DMA_MODULE_ENABLED*/ 479 480 /** 481 * @} 482 */ 483 484 /** @addtogroup PSSI_Exported_Functions_Group3 Peripheral State and Error functions 485 * @{ 486 */ 487 488 /* Peripheral State functions ***************************************************/ 489 HAL_PSSI_StateTypeDef HAL_PSSI_GetState(const PSSI_HandleTypeDef *hpssi); 490 uint32_t HAL_PSSI_GetError(const PSSI_HandleTypeDef *hpssi); 491 492 /** 493 * @} 494 */ 495 496 /** @addtogroup PSSI_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks 497 * @{ 498 */ 499 500 void HAL_PSSI_IRQHandler(PSSI_HandleTypeDef *hpssi); 501 void HAL_PSSI_TxCpltCallback(PSSI_HandleTypeDef *hpssi); 502 void HAL_PSSI_RxCpltCallback(PSSI_HandleTypeDef *hpssi); 503 void HAL_PSSI_ErrorCallback(PSSI_HandleTypeDef *hpssi); 504 void HAL_PSSI_AbortCpltCallback(PSSI_HandleTypeDef *hpssi); 505 506 /** 507 * @} 508 */ 509 510 511 /** 512 * @} 513 */ 514 515 /* Private constants ---------------------------------------------------------*/ 516 517 518 /* Private macros ------------------------------------------------------------*/ 519 520 521 /** 522 * @} 523 */ 524 #endif /* PSSI */ 525 526 /** 527 * @} 528 */ 529 530 531 #ifdef __cplusplus 532 } 533 #endif 534 535 #endif /* STM32H5xx_HAL_PSSI_H */ 536
