1 /** 2 ****************************************************************************** 3 * @file stm32g4xx_hal_opamp.h 4 * @author MCD Application Team 5 * @brief Header file of OPAMP HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32G4xx_HAL_OPAMP_H 21 #define STM32G4xx_HAL_OPAMP_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32g4xx_hal_def.h" 29 30 /** @addtogroup STM32G4xx_HAL_Driver 31 * @{ 32 */ 33 34 #if defined (OPAMP1) || defined (OPAMP2) || defined (OPAMP3) || defined (OPAMP4) || defined (OPAMP5) || defined (OPAMP6) 35 36 /** @addtogroup OPAMP 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 /** @defgroup OPAMP_Exported_Types OPAMP Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief OPAMP Init structure definition 47 */ 48 49 typedef struct 50 { 51 uint32_t PowerMode; /*!< Specifies the power mode Normal or High Speed. 52 This parameter must be a value of @ref OPAMP_PowerMode */ 53 54 uint32_t Mode; /*!< Specifies the OPAMP mode 55 This parameter must be a value of @ref OPAMP_Mode 56 mode is either Standalone, Follower or PGA */ 57 58 uint32_t InvertingInput; /*!< Specifies the inverting input in Standalone & Pga modes 59 - In Standalone mode: i.e when mode is OPAMP_STANDALONE_MODE 60 This parameter must be a value of @ref OPAMP_InvertingInput 61 InvertingInput is either VINM0 or VINM1 62 - In PGA mode: i.e when mode is OPAMP_PGA_MODE 63 & in Follower mode i.e when mode is OPAMP_FOLLOWER_MODE 64 This parameter is Not Applicable */ 65 66 uint32_t NonInvertingInput; /*!< Specifies the non inverting input of the opamp: 67 This parameter must be a value of @ref OPAMP_NonInvertingInput 68 NonInvertingInput is either VINP0, VINP1, VINP2 or VINP3 */ 69 70 FunctionalState InternalOutput; /*!< Specifies the configuration of the internal output from OPAMP to ADC. 71 This parameter can be ENABLE or DISABLE 72 Note: When this output is enabled, regular output to I/O is disabled */ 73 74 uint32_t TimerControlledMuxmode; /*!< Specifies if the Timer controlled Mux mode is enabled or disabled 75 This parameter must be a single value of @ref OPAMP_TimerControlledMuxmode 76 or a combination of them to build a more complex switch scheme by 77 using different timers */ 78 79 uint32_t InvertingInputSecondary; /*!< Specifies the inverting input (secondary) of the opamp when 80 TimerControlledMuxmode is enabled 81 i.e. when TimerControlledMuxmode is OPAMP_TIMERCONTROLLEDMUXMODE_ENABLE 82 - In Standalone mode: i.e when mode is OPAMP_STANDALONE_MODE 83 This parameter must be a value of @ref OPAMP_InvertingInputSecondary 84 InvertingInputSecondary is either VINM0 or VINM1 85 - In PGA mode: i.e when mode is OPAMP_PGA_MODE 86 & in Follower mode i.e when mode is OPAMP_FOLLOWER_MODE 87 This parameter must be a value of @ref OPAMP_InvertingInputSecondary 88 and is used to choose secondary mode (PGA or follower) */ 89 90 uint32_t NonInvertingInputSecondary; /*!< Specifies the non inverting input (secondary) of the opamp when 91 TimerControlledMuxmode is enabled 92 i.e. when TimerControlledMuxmode is OPAMP_TIMERCONTROLLEDMUXMODE_ENABLE 93 This parameter must be a value of @ref OPAMP_NonInvertingInputSecondary 94 NonInvertingInput is either VINP0, VINP1, VINP2 or VINP3 */ 95 96 uint32_t PgaConnect; /*!< Specifies the inverting pin in PGA mode 97 i.e. when mode is OPAMP_PGA_MODE 98 This parameter must be a value of @ref OPAMP_PgaConnect 99 Either: not connected, connected to VINM0 100 In this last case, VINM0 can then be used to input signal (negative gain case 101 with or without bias on VINPx) or to input bias (positive gain case with bias) */ 102 103 uint32_t PgaGain; /*!< Specifies the gain in PGA mode 104 i.e. when mode is OPAMP_PGA_MODE. 105 This parameter must be a value of @ref OPAMP_PgaGain 106 (2, 4, 8, 16, 32 or 64) for positive gain & (-1, -3 ,-7, -15, -31 or -63) for negative gain */ 107 108 uint32_t UserTrimming; /*!< Specifies the trimming mode 109 This parameter must be a value of @ref OPAMP_UserTrimming 110 UserTrimming is either factory or user trimming */ 111 112 uint32_t TrimmingValueP; /*!< Specifies the offset trimming value (PMOS) 113 i.e. when UserTrimming is OPAMP_TRIMMING_USER. 114 This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ 115 116 uint32_t TrimmingValueN; /*!< Specifies the offset trimming value (NMOS) 117 i.e. when UserTrimming is OPAMP_TRIMMING_USER. 118 This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ 119 120 } OPAMP_InitTypeDef; 121 122 /** 123 * @brief HAL State structures definition 124 */ 125 126 typedef enum 127 { 128 HAL_OPAMP_STATE_RESET = 0x00000000UL, /*!< OPAMP is not yet Initialized */ 129 130 HAL_OPAMP_STATE_READY = 0x00000001UL, /*!< OPAMP is initialized and ready for use */ 131 HAL_OPAMP_STATE_CALIBBUSY = 0x00000002UL, /*!< OPAMP is enabled in auto calibration mode */ 132 133 HAL_OPAMP_STATE_BUSY = 0x00000004UL, /*!< OPAMP is enabled and running in normal mode */ 134 HAL_OPAMP_STATE_BUSYLOCKED = 0x00000005UL, /*!< OPAMP control register is locked 135 only system reset allows reconfiguring the opamp. */ 136 137 } HAL_OPAMP_StateTypeDef; 138 139 /** 140 * @brief OPAMP Handle Structure definition 141 */ 142 #if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1) 143 typedef struct __OPAMP_HandleTypeDef 144 #else 145 typedef struct 146 #endif 147 { 148 OPAMP_TypeDef *Instance; /*!< OPAMP instance's registers base address */ 149 OPAMP_InitTypeDef Init; /*!< OPAMP required parameters */ 150 HAL_StatusTypeDef Status; /*!< OPAMP peripheral status */ 151 HAL_LockTypeDef Lock; /*!< Locking object */ 152 __IO HAL_OPAMP_StateTypeDef State; /*!< OPAMP communication state */ 153 154 #if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1) 155 void (* MspInitCallback)(struct __OPAMP_HandleTypeDef *hopamp); 156 void (* MspDeInitCallback)(struct __OPAMP_HandleTypeDef *hopamp); 157 #endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */ 158 159 } OPAMP_HandleTypeDef; 160 161 /** 162 * @brief OPAMP_TrimmingValueTypeDef definition 163 */ 164 165 typedef uint32_t OPAMP_TrimmingValueTypeDef; 166 /** 167 * @} 168 */ 169 170 #if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1) 171 /** 172 * @brief HAL OPAMP Callback ID enumeration definition 173 */ 174 typedef enum 175 { 176 HAL_OPAMP_MSPINIT_CB_ID = 0x01UL, /*!< OPAMP MspInit Callback ID */ 177 HAL_OPAMP_MSPDEINIT_CB_ID = 0x02UL, /*!< OPAMP MspDeInit Callback ID */ 178 HAL_OPAMP_ALL_CB_ID = 0x03UL /*!< OPAMP All ID */ 179 } HAL_OPAMP_CallbackIDTypeDef; 180 181 /** 182 * @brief HAL OPAMP Callback pointer definition 183 */ 184 typedef void (*pOPAMP_CallbackTypeDef)(OPAMP_HandleTypeDef *hopamp); 185 #endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */ 186 187 188 /* Exported constants --------------------------------------------------------*/ 189 /** @defgroup OPAMP_Exported_Constants OPAMP Exported Constants 190 * @{ 191 */ 192 /** @defgroup OPAMP_Mode OPAMP Mode 193 * @{ 194 */ 195 #define OPAMP_STANDALONE_MODE (0x00000000UL) /*!< standalone mode */ 196 #define OPAMP_PGA_MODE OPAMP_CSR_VMSEL_1 /*!< PGA mode */ 197 #define OPAMP_FOLLOWER_MODE OPAMP_CSR_VMSEL /*!< follower mode */ 198 /** 199 * @} 200 */ 201 202 /** @defgroup OPAMP_NonInvertingInput OPAMP Non Inverting Input 203 * @{ 204 */ 205 #define OPAMP_NONINVERTINGINPUT_IO0 (0x00000000UL) /*!< Non inverting input connected to I/O VINP0 206 (PA1 for OPAMP1, PA7 for OPAMP2, PB0 for OPAMP3, PB13 for OPAMP4, PB14 for OPAMP5, PB12 for OPAMP6) 207 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 208 #define OPAMP_NONINVERTINGINPUT_IO1 OPAMP_CSR_VPSEL_0 /*!< Non inverting input connected to I/O VINP1 209 (PA3 for OPAMP1, PB14 for OPAMP2, PB13 for OPAMP3, PD11 for OPAMP4, PD12 for OPAMP5, PD9 for OPAMP6) 210 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 211 #define OPAMP_NONINVERTINGINPUT_IO2 OPAMP_CSR_VPSEL_1 /*!< Non inverting input connected to I/O VINP2 212 (PA7 for OPAMP1, PB0 for OPAMP2, PA1 for OPAMP3, PB11 for OPAMP4, PC3 for OPAMP5, PB13 for OPAMP6) 213 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 214 #define OPAMP_NONINVERTINGINPUT_IO3 OPAMP_CSR_VPSEL /*!< Non inverting input connected to I/O VINP3 215 (PD14 for OPAMP2) */ 216 #define OPAMP_NONINVERTINGINPUT_DAC OPAMP_CSR_VPSEL /*!< Non inverting input connected internally to DAC channel 217 (DAC3_CH1 for OPAMP1, DAC3_CH2 for OPAMP3, DAC4_CH1 for OPAMP4, DAC4_CH2 for OPAMP5, DAC3_CH1 for OPAMP6) 218 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 219 /** 220 * @} 221 */ 222 223 /** @defgroup OPAMP_InvertingInput OPAMP Inverting Input 224 * @{ 225 */ 226 #define OPAMP_INVERTINGINPUT_IO0 (0x00000000UL) /*!< Inverting input connected to I/O VINM0 227 (PA3 for OPAMP1, PA5 for OPAMP2, PB2 for OPAMP3, PB10 for OPAMP4, PB15 for OPAMP5, PA1 for OPAMP6) 228 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 229 #define OPAMP_INVERTINGINPUT_IO1 OPAMP_CSR_VMSEL_0 /*!< Inverting input connected to I/0 VINM1 230 (PC5 for OPAMP1, PC5 for OPAMP2, PB10 for OPAMP3, PB8 for OPAMP4, PA3 for OPAMP5, PB1 for OPAMP6) 231 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 232 /** 233 * @} 234 */ 235 236 /** @defgroup OPAMP_TimerControlledMuxmode OPAMP Timer Controlled Mux mode 237 * @note The switch can be controlled either by a single timer or a combination of them, 238 * in this case application has to 'ORed' the values below 239 * ex OPAMP_TIMERCONTROLLEDMUXMODE_TIM1_CH6 | OPAMP_TIMERCONTROLLEDMUXMODE_TIM20_CH6 240 * @{ 241 */ 242 #define OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE (0x00000000UL) /*!< Timer controlled Mux mode disabled */ 243 #define OPAMP_TIMERCONTROLLEDMUXMODE_TIM1_CH6 OPAMP_TCMR_T1CMEN /*!< Timer controlled Mux mode enabled using TIM1 OC6 */ 244 #define OPAMP_TIMERCONTROLLEDMUXMODE_TIM8_CH6 OPAMP_TCMR_T8CMEN /*!< Timer controlled Mux mode enabled using TIM8 OC6 */ 245 #if defined(TIM20) 246 #define OPAMP_TIMERCONTROLLEDMUXMODE_TIM20_CH6 OPAMP_TCMR_T20CMEN /*!< Timer controlled Mux mode enabled using TIM20 OC6 247 Note: On this STM32 series, TIM20 is not available on all devices. Refer to device datasheet for more details */ 248 #endif 249 /** 250 * @} 251 */ 252 253 /** @defgroup OPAMP_NonInvertingInputSecondary OPAMP Non Inverting Input Secondary 254 * @{ 255 */ 256 #define OPAMP_SEC_NONINVERTINGINPUT_IO0 (0x00000000UL) /*!< Secondary non inverting input connected to I/O VINP0 257 (PA1 for OPAMP1, PA7 for OPAMP2, PB0 for OPAMP3, PB13 for OPAMP4, PB14 for OPAMP5, PB12 for OPAMP6) 258 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 259 #define OPAMP_SEC_NONINVERTINGINPUT_IO1 OPAMP_TCMR_VPSSEL_0 /*!< Secondary non inverting input connected to I/O VINP1 260 (PA3 for OPAMP1, PB14 for OPAMP2, PB13 for OPAMP3, PD11 for OPAMP4, PD12 for OPAMP5, PD9 for OPAMP6) 261 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 262 #define OPAMP_SEC_NONINVERTINGINPUT_IO2 OPAMP_TCMR_VPSSEL_1 /*!< Secondary non inverting input connected to I/O VINP2 263 (PA7 for OPAMP1, PB0 for OPAMP2, PA1 for OPAMP3, PB11 for OPAMP4, PC3 for OPAMP5, PB13 for OPAMP6) 264 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 265 #define OPAMP_SEC_NONINVERTINGINPUT_IO3 OPAMP_TCMR_VPSSEL /*!< Secondary non inverting input connected to I/O VINP3 266 (PD14 for OPAMP2) */ 267 #define OPAMP_SEC_NONINVERTINGINPUT_DAC OPAMP_TCMR_VPSSEL /*!< Secondary non inverting input connected internally to DAC channel 268 (DAC3_CH1 for OPAMP1, DAC3_CH2 for OPAMP3, DAC4_CH1 for OPAMP4, DAC4_CH2 for OPAMP5, DAC3_CH1 for OPAMP6) 269 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 270 /** 271 * @} 272 */ 273 274 /** @defgroup OPAMP_InvertingInputSecondary OPAMP Inverting Input Secondary 275 * @{ 276 */ 277 #define OPAMP_SEC_INVERTINGINPUT_IO0 (0x00000000UL) /*!< OPAMP secondary mode is standalone mode - Only applicable if @ref OPAMP_STANDALONE_MODE 278 has been configured by call to @ref HAL_OPAMP_Init(). 279 Secondary inverting input connected to I/O VINM0 280 (PA3 for OPAMP1, PA5 for OPAMP2, PB2 for OPAMP3, PB10 for OPAMP4, PB15 for OPAMP5, PA1 for OPAMP6) 281 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 282 #define OPAMP_SEC_INVERTINGINPUT_IO1 OPAMP_TCMR_VMSSEL /*!< OPAMP secondary mode is standalone mode - Only applicable if @ref OPAMP_STANDALONE_MODE 283 has been configured by call to @ref HAL_OPAMP_Init(). 284 Secondary inverting input connected to I/0 VINM1 285 (PC5 for OPAMP1, PC5 for OPAMP2, PB10 for OPAMP3, PB8 for OPAMP4, PA3 for OPAMP5, PB1 for OPAMP6) 286 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 287 #define OPAMP_SEC_INVERTINGINPUT_PGA (0x00000000UL) /*!< OPAMP secondary mode is PGA mode - Only applicable if configured mode through call to @ref HAL_OPAMP_Init() 288 is @ref OPAMP_PGA_MODE or @ref OPAMP_FOLLOWER_MODE. 289 OPAMP secondary inverting input is: 290 - Not connected if configured mode is @ref OPAMP_FOLLOWER_MODE 291 - Not connected if configured mode is @ref OPAMP_PGA_MODE and PGA connect mode is @ref OPAMP_PGA_CONNECT_INVERTINGINPUT_NO 292 - Connected to VINM0 and possibly VINM1 if any of the other modes as been configured 293 (see @ref OPAMP_PgaConnect description for more details on PGA connection modes) */ 294 #define OPAMP_SEC_INVERTINGINPUT_FOLLOWER OPAMP_TCMR_VMSSEL /*!< OPAMP secondary mode is Follower mode - Only applicable if configured mode through call to @ref HAL_OPAMP_Init() 295 is @ref OPAMP_PGA_MODE or @ref OPAMP_FOLLOWER_MODE. 296 OPAMP secondary inverting input is not connected. */ 297 /** 298 * @} 299 */ 300 301 /** @defgroup OPAMP_PgaConnect OPAMP Pga Connect 302 * @{ 303 */ 304 #define OPAMP_PGA_CONNECT_INVERTINGINPUT_NO (0x00000000UL) /*!< In PGA mode, the inverting input is not connected */ 305 #define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 OPAMP_CSR_PGGAIN_4 /*!< In PGA mode, the inverting input is connected to VINM0 for filtering */ 306 #define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS OPAMP_CSR_PGGAIN_3 /*!< In PGA mode, the inverting input is connected to VINM0 307 - Input signal on VINM0, bias on VINPx: negative gain 308 - Bias on VINM0, input signal on VINPx: positive gain */ 309 #define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_IO1_BIAS (OPAMP_CSR_PGGAIN_4|OPAMP_CSR_PGGAIN_3) /*!< In PGA mode, the inverting input is connected to VINM0 310 - Input signal on VINM0, bias on VINPx: negative gain 311 - Bias on VINM0, input signal on VINPx: positive gain 312 And VINM1 is connected too for filtering */ 313 /** 314 * @} 315 */ 316 317 /** @defgroup OPAMP_PgaGain OPAMP Pga Gain 318 * @note Gain sign: 319 * - is positive if the @ref OPAMP_PgaConnect configuration is 320 * @ref OPAMP_PGA_CONNECT_INVERTINGINPUT_NO or OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 321 * - may be positive or negative if the @ref OPAMP_PgaConnect configuration is 322 * @ref OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS or OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_IO1_BIAS 323 * see @ref OPAMP_PgaConnect for more details 324 * @{ 325 */ 326 #define OPAMP_PGA_GAIN_2_OR_MINUS_1 (0x00000000UL) /*!< PGA gain could be 2 or -1 */ 327 #define OPAMP_PGA_GAIN_4_OR_MINUS_3 ( OPAMP_CSR_PGGAIN_0) /*!< PGA gain could be 4 or -3 */ 328 #define OPAMP_PGA_GAIN_8_OR_MINUS_7 ( OPAMP_CSR_PGGAIN_1 ) /*!< PGA gain could be 8 or -7 */ 329 #define OPAMP_PGA_GAIN_16_OR_MINUS_15 ( OPAMP_CSR_PGGAIN_1 | OPAMP_CSR_PGGAIN_0) /*!< PGA gain could be 16 or -15 */ 330 #define OPAMP_PGA_GAIN_32_OR_MINUS_31 (OPAMP_CSR_PGGAIN_2 ) /*!< PGA gain could be 32 or -31 */ 331 #define OPAMP_PGA_GAIN_64_OR_MINUS_63 (OPAMP_CSR_PGGAIN_2 | OPAMP_CSR_PGGAIN_0) /*!< PGA gain could be 64 or -63 */ 332 /** 333 * @} 334 */ 335 336 /** @defgroup OPAMP_PowerMode OPAMP PowerMode 337 * @{ 338 */ 339 #define OPAMP_POWERMODE_NORMALSPEED (0x00000000UL) /*!< Output in normal mode */ 340 #define OPAMP_POWERMODE_HIGHSPEED OPAMP_CSR_HIGHSPEEDEN /*!< Output in highspeed mode */ 341 /** 342 * @} 343 */ 344 345 /** @defgroup OPAMP_UserTrimming OPAMP User Trimming 346 * @{ 347 */ 348 #define OPAMP_TRIMMING_FACTORY (0x00000000UL) /*!< Factory trimming */ 349 #define OPAMP_TRIMMING_USER OPAMP_CSR_USERTRIM /*!< User trimming */ 350 /** 351 * @} 352 */ 353 354 /** @defgroup OPAMP_FactoryTrimming OPAMP Factory Trimming 355 * @{ 356 */ 357 #define OPAMP_FACTORYTRIMMING_DUMMY (0xFFFFFFFFUL) /*!< Dummy trimming value */ 358 359 #define OPAMP_FACTORYTRIMMING_N (0x00000000UL) /*!< Offset trimming N */ 360 #define OPAMP_FACTORYTRIMMING_P (0x00000001UL) /*!< Offset trimming P */ 361 /** 362 * @} 363 */ 364 365 /** @defgroup OPAMP_VREF OPAMP VREF 366 * @{ 367 */ 368 #define OPAMP_VREF_3VDDA (0x00000000UL) /*!< OPAMP Vref = 3.3% VDDA */ 369 #define OPAMP_VREF_10VDDA OPAMP_CSR_CALSEL_0 /*!< OPAMP Vref = 10% VDDA */ 370 #define OPAMP_VREF_50VDDA OPAMP_CSR_CALSEL_1 /*!< OPAMP Vref = 50% VDDA */ 371 #define OPAMP_VREF_90VDDA OPAMP_CSR_CALSEL /*!< OPAMP Vref = 90% VDDA */ 372 /** 373 * @} 374 */ 375 376 /** 377 * @} 378 */ 379 380 381 /* Private constants ---------------------------------------------------------*/ 382 /** @defgroup OPAMP_Private_Constants OPAMP Private Constants 383 * @brief OPAMP Private constants and defines 384 * @{ 385 */ 386 /** @defgroup OPAMP_Input OPAMP Input 387 * @{ 388 */ 389 #define OPAMP_INPUT_INVERTING ( 24UL) /*!< Inverting input */ 390 #define OPAMP_INPUT_NONINVERTING ( 19UL) /*!< Non inverting input */ 391 392 #define IS_OPAMP_INPUT(INPUT) (((INPUT) == OPAMP_INPUT_INVERTING) || \ 393 ((INPUT) == OPAMP_INPUT_NONINVERTING)) 394 /** 395 * @} 396 */ 397 398 /** 399 * @} 400 */ 401 402 403 /* Private macro -------------------------------------------------------------*/ 404 405 /** @defgroup OPAMP_Private_Macros OPAMP Private Macros 406 * @{ 407 */ 408 409 #define IS_OPAMP_FUNCTIONAL_NORMALMODE(INPUT) (((INPUT) == OPAMP_STANDALONE_MODE) || \ 410 ((INPUT) == OPAMP_PGA_MODE) || \ 411 ((INPUT) == OPAMP_FOLLOWER_MODE)) 412 413 #define IS_OPAMP_NONINVERTING_INPUT(INPUT) (((INPUT) == OPAMP_NONINVERTINGINPUT_IO0) || \ 414 ((INPUT) == OPAMP_NONINVERTINGINPUT_IO1) || \ 415 ((INPUT) == OPAMP_NONINVERTINGINPUT_IO2) || \ 416 ((INPUT) == OPAMP_NONINVERTINGINPUT_IO3) || \ 417 ((INPUT) == OPAMP_NONINVERTINGINPUT_DAC)) 418 419 #define IS_OPAMP_INVERTING_INPUT(INPUT) (((INPUT) == OPAMP_INVERTINGINPUT_IO0) || \ 420 ((INPUT) == OPAMP_INVERTINGINPUT_IO1)) 421 422 #if defined(TIM20) 423 #define IS_OPAMP_TIMERCONTROLLED_MUXMODE(MUXMODE) \ 424 ((MUXMODE) <= (OPAMP_TIMERCONTROLLEDMUXMODE_TIM1_CH6 | \ 425 OPAMP_TIMERCONTROLLEDMUXMODE_TIM8_CH6 | \ 426 OPAMP_TIMERCONTROLLEDMUXMODE_TIM20_CH6)) 427 #else 428 #define IS_OPAMP_TIMERCONTROLLED_MUXMODE(MUXMODE) \ 429 ((MUXMODE) <= (OPAMP_TIMERCONTROLLEDMUXMODE_TIM1_CH6 | \ 430 OPAMP_TIMERCONTROLLEDMUXMODE_TIM8_CH6)) 431 #endif 432 433 #define IS_OPAMP_SEC_NONINVERTING_INPUT(INPUT) (((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_IO0) || \ 434 ((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_IO1) || \ 435 ((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_IO2) || \ 436 ((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_IO3) || \ 437 ((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_DAC)) 438 439 #define IS_OPAMP_SEC_INVERTING_INPUT(INPUT) (((INPUT) == OPAMP_SEC_INVERTINGINPUT_IO0) || \ 440 ((INPUT) == OPAMP_SEC_INVERTINGINPUT_IO1) || \ 441 ((INPUT) == OPAMP_SEC_INVERTINGINPUT_PGA) || \ 442 ((INPUT) == OPAMP_SEC_INVERTINGINPUT_FOLLOWER)) 443 444 #define IS_OPAMP_PGACONNECT(CONNECT) (((CONNECT) == OPAMP_PGA_CONNECT_INVERTINGINPUT_NO) || \ 445 ((CONNECT) == OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0) || \ 446 ((CONNECT) == OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS) || \ 447 ((CONNECT) == OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_IO1_BIAS)) 448 449 #define IS_OPAMP_PGA_GAIN(GAIN) (((GAIN) == OPAMP_PGA_GAIN_2_OR_MINUS_1) || \ 450 ((GAIN) == OPAMP_PGA_GAIN_4_OR_MINUS_3) || \ 451 ((GAIN) == OPAMP_PGA_GAIN_8_OR_MINUS_7) || \ 452 ((GAIN) == OPAMP_PGA_GAIN_16_OR_MINUS_15) || \ 453 ((GAIN) == OPAMP_PGA_GAIN_32_OR_MINUS_31) || \ 454 ((GAIN) == OPAMP_PGA_GAIN_64_OR_MINUS_63)) 455 456 #define IS_OPAMP_POWERMODE(POWERMODE) (((POWERMODE) == OPAMP_POWERMODE_NORMALSPEED) || \ 457 ((POWERMODE) == OPAMP_POWERMODE_HIGHSPEED) ) 458 459 #define IS_OPAMP_TRIMMING(TRIMMING) (((TRIMMING) == OPAMP_TRIMMING_FACTORY) || \ 460 ((TRIMMING) == OPAMP_TRIMMING_USER)) 461 462 #define IS_OPAMP_FACTORYTRIMMING(TRIMMING) (((TRIMMING) == OPAMP_FACTORYTRIMMING_N) || \ 463 ((TRIMMING) == OPAMP_FACTORYTRIMMING_P)) 464 465 #define IS_OPAMP_TRIMMINGVALUE(TRIMMINGVALUE) ((TRIMMINGVALUE) <= 0x1FUL) 466 467 #define IS_OPAMP_VREF(VREF) (((VREF) == OPAMP_VREF_3VDDA) || \ 468 ((VREF) == OPAMP_VREF_10VDDA) || \ 469 ((VREF) == OPAMP_VREF_50VDDA) || \ 470 ((VREF) == OPAMP_VREF_90VDDA)) 471 /** 472 * @} 473 */ 474 475 476 /* Exported macros -----------------------------------------------------------*/ 477 /** @defgroup OPAMP_Exported_Macros OPAMP Exported Macros 478 * @{ 479 */ 480 481 /** @brief Reset OPAMP handle state 482 * @param __HANDLE__ OPAMP handle. 483 * @retval None 484 */ 485 #define __HAL_OPAMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_OPAMP_STATE_RESET) 486 487 /** 488 * @} 489 */ 490 491 /* Include OPAMP HAL Extended module */ 492 #include "stm32g4xx_hal_opamp_ex.h" 493 494 /* Exported functions --------------------------------------------------------*/ 495 /** @defgroup OPAMP_Exported_Functions OPAMP Exported Functions 496 * @{ 497 */ 498 499 /** @defgroup OPAMP_Exported_Functions_Group1 Initialization and de-initialization functions 500 * @{ 501 */ 502 503 /* Initialization/de-initialization functions **********************************/ 504 HAL_StatusTypeDef HAL_OPAMP_Init(OPAMP_HandleTypeDef *hopamp); 505 HAL_StatusTypeDef HAL_OPAMP_DeInit(OPAMP_HandleTypeDef *hopamp); 506 void HAL_OPAMP_MspInit(OPAMP_HandleTypeDef *hopamp); 507 void HAL_OPAMP_MspDeInit(OPAMP_HandleTypeDef *hopamp); 508 /** 509 * @} 510 */ 511 512 513 /** @defgroup OPAMP_Exported_Functions_Group2 Input and Output operation functions 514 * @{ 515 */ 516 517 /* I/O operation functions *****************************************************/ 518 HAL_StatusTypeDef HAL_OPAMP_Start(OPAMP_HandleTypeDef *hopamp); 519 HAL_StatusTypeDef HAL_OPAMP_Stop(OPAMP_HandleTypeDef *hopamp); 520 HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef *hopamp); 521 522 /** 523 * @} 524 */ 525 526 /** @defgroup OPAMP_Exported_Functions_Group3 Peripheral Control functions 527 * @{ 528 */ 529 530 /* Peripheral Control functions ************************************************/ 531 #if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1) 532 /* OPAMP callback registering/unregistering */ 533 HAL_StatusTypeDef HAL_OPAMP_RegisterCallback(OPAMP_HandleTypeDef *hopamp, HAL_OPAMP_CallbackIDTypeDef CallbackId, 534 pOPAMP_CallbackTypeDef pCallback); 535 HAL_StatusTypeDef HAL_OPAMP_UnRegisterCallback(OPAMP_HandleTypeDef *hopamp, HAL_OPAMP_CallbackIDTypeDef CallbackId); 536 #endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */ 537 538 HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef *hopamp); 539 HAL_StatusTypeDef HAL_OPAMP_LockTimerMux(OPAMP_HandleTypeDef *hopamp); 540 541 /** 542 * @} 543 */ 544 545 /** @defgroup OPAMP_Exported_Functions_Group4 Peripheral State functions 546 * @{ 547 */ 548 549 /* Peripheral State functions **************************************************/ 550 HAL_OPAMP_StateTypeDef HAL_OPAMP_GetState(OPAMP_HandleTypeDef *hopamp); 551 OPAMP_TrimmingValueTypeDef HAL_OPAMP_GetTrimOffset(OPAMP_HandleTypeDef *hopamp, uint32_t trimmingoffset); 552 553 /** 554 * @} 555 */ 556 557 /** 558 * @} 559 */ 560 561 /** 562 * @} 563 */ 564 565 #endif /* OPAMP1 || OPAMP2 || OPAMP3 || OPAMP4 || OPAMP5 || OPAMP6 */ 566 567 /** 568 * @} 569 */ 570 571 #ifdef __cplusplus 572 } 573 #endif 574 575 #endif /* STM32G4xx_HAL_OPAMP_H */ 576
