1 /**
2 ******************************************************************************
3 * @file system_stm32f7xx.c
4 * @author MCD Application Team
5 * @brief CMSIS Cortex-M7 Device Peripheral Access Layer System Source File.
6 *
7 * This file provides two functions and one global variable to be called from
8 * user application:
9 * - SystemInit(): This function is called at startup just after reset and
10 * before branch to main program. This call is made inside
11 * the "startup_stm32f7xx.s" file.
12 *
13 * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
14 * by the user application to setup the SysTick
15 * timer or configure other parameters.
16 *
17 * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
18 * be called whenever the core clock is changed
19 * during program execution.
20 *
21 *
22 ******************************************************************************
23 * @attention
24 *
25 * Copyright (c) 2016 STMicroelectronics.
26 * All rights reserved.
27 *
28 * This software is licensed under terms that can be found in the LICENSE file
29 * in the root directory of this software component.
30 * If no LICENSE file comes with this software, it is provided AS-IS.
31 *
32 ******************************************************************************
33 */
34
35 /** @addtogroup CMSIS
36 * @{
37 */
38
39 /** @addtogroup stm32f7xx_system
40 * @{
41 */
42
43 /** @addtogroup STM32F7xx_System_Private_Includes
44 * @{
45 */
46
47 #include "stm32f7xx.h"
48
49 #if !defined (HSE_VALUE)
50 #define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
51 #endif /* HSE_VALUE */
52
53 #if !defined (HSI_VALUE)
54 #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
55 #endif /* HSI_VALUE */
56
57 /**
58 * @}
59 */
60
61 /** @addtogroup STM32F7xx_System_Private_TypesDefinitions
62 * @{
63 */
64
65 /**
66 * @}
67 */
68
69 /** @addtogroup STM32F7xx_System_Private_Defines
70 * @{
71 */
72
73 /************************* Miscellaneous Configuration ************************/
74
75 /* Note: Following vector table addresses must be defined in line with linker
76 configuration. */
77 /*!< Uncomment the following line if you need to relocate the vector table
78 anywhere in Flash or Sram, else the vector table is kept at the automatic
79 remap of boot address selected */
80 /* #define USER_VECT_TAB_ADDRESS */
81
82 #if defined(USER_VECT_TAB_ADDRESS)
83 /*!< Uncomment the following line if you need to relocate your vector Table
84 in Sram else user remap will be done in Flash. */
85 /* #define VECT_TAB_SRAM */
86 #if defined(VECT_TAB_SRAM)
87 #define VECT_TAB_BASE_ADDRESS RAMDTCM_BASE /*!< Vector Table base address field.
88 This value must be a multiple of 0x200. */
89 #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
90 This value must be a multiple of 0x200. */
91 #else
92 #define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
93 This value must be a multiple of 0x200. */
94 #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
95 This value must be a multiple of 0x200. */
96 #endif /* VECT_TAB_SRAM */
97 #endif /* USER_VECT_TAB_ADDRESS */
98 /******************************************************************************/
99
100 /**
101 * @}
102 */
103
104 /** @addtogroup STM32F7xx_System_Private_Macros
105 * @{
106 */
107
108 /**
109 * @}
110 */
111
112 /** @addtogroup STM32F7xx_System_Private_Variables
113 * @{
114 */
115
116 /* This variable is updated in three ways:
117 1) by calling CMSIS function SystemCoreClockUpdate()
118 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
119 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
120 Note: If you use this function to configure the system clock; then there
121 is no need to call the 2 first functions listed above, since SystemCoreClock
122 variable is updated automatically.
123 */
124 uint32_t SystemCoreClock = 16000000;
125 const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
126 const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
127
128 /**
129 * @}
130 */
131
132 /** @addtogroup STM32F7xx_System_Private_FunctionPrototypes
133 * @{
134 */
135
136 /**
137 * @}
138 */
139
140 /** @addtogroup STM32F7xx_System_Private_Functions
141 * @{
142 */
143
144 /**
145 * @brief Setup the microcontroller system
146 * Initialize the Embedded Flash Interface, the PLL and update the
147 * SystemFrequency variable.
148 * @param None
149 * @retval None
150 */
SystemInit(void)151 void SystemInit(void)
152 {
153 /* FPU settings ------------------------------------------------------------*/
154 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
155 SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
156 #endif
157
158 /* Configure the Vector Table location -------------------------------------*/
159 #if defined(USER_VECT_TAB_ADDRESS)
160 SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
161 #endif /* USER_VECT_TAB_ADDRESS */
162 }
163
164 /**
165 * @brief Update SystemCoreClock variable according to Clock Register Values.
166 * The SystemCoreClock variable contains the core clock (HCLK), it can
167 * be used by the user application to setup the SysTick timer or configure
168 * other parameters.
169 *
170 * @note Each time the core clock (HCLK) changes, this function must be called
171 * to update SystemCoreClock variable value. Otherwise, any configuration
172 * based on this variable will be incorrect.
173 *
174 * @note - The system frequency computed by this function is not the real
175 * frequency in the chip. It is calculated based on the predefined
176 * constant and the selected clock source:
177 *
178 * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
179 *
180 * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
181 *
182 * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
183 * or HSI_VALUE(*) multiplied/divided by the PLL factors.
184 *
185 * (*) HSI_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value
186 * 16 MHz) but the real value may vary depending on the variations
187 * in voltage and temperature.
188 *
189 * (**) HSE_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value
190 * 25 MHz), user has to ensure that HSE_VALUE is same as the real
191 * frequency of the crystal used. Otherwise, this function may
192 * have wrong result.
193 *
194 * - The result of this function could be not correct when using fractional
195 * value for HSE crystal.
196 *
197 * @param None
198 * @retval None
199 */
SystemCoreClockUpdate(void)200 void SystemCoreClockUpdate(void)
201 {
202 uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
203
204 /* Get SYSCLK source -------------------------------------------------------*/
205 tmp = RCC->CFGR & RCC_CFGR_SWS;
206
207 switch (tmp)
208 {
209 case 0x00: /* HSI used as system clock source */
210 SystemCoreClock = HSI_VALUE;
211 break;
212 case 0x04: /* HSE used as system clock source */
213 SystemCoreClock = HSE_VALUE;
214 break;
215 case 0x08: /* PLL used as system clock source */
216
217 /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
218 SYSCLK = PLL_VCO / PLL_P
219 */
220 pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
221 pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
222
223 if (pllsource != 0)
224 {
225 /* HSE used as PLL clock source */
226 pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
227 }
228 else
229 {
230 /* HSI used as PLL clock source */
231 pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
232 }
233
234 pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
235 SystemCoreClock = pllvco/pllp;
236 break;
237 default:
238 SystemCoreClock = HSI_VALUE;
239 break;
240 }
241 /* Compute HCLK frequency --------------------------------------------------*/
242 /* Get HCLK prescaler */
243 tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
244 /* HCLK frequency */
245 SystemCoreClock >>= tmp;
246 }
247
248 /**
249 * @}
250 */
251
252 /**
253 * @}
254 */
255
256 /**
257 * @}
258 */
259 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
260
