1 /** 2 ****************************************************************************** 3 * @file stm32f0xx_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32F0xx_HAL_UART_H 21 #define STM32F0xx_HAL_UART_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32f0xx_hal_def.h" 29 30 /** @addtogroup STM32F0xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UART 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UART_Exported_Types UART Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART Init Structure definition 45 */ 46 typedef struct 47 { 48 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 49 The baud rate register is computed using the following formula: 50 - If oversampling is 16 or in LIN mode, 51 Baud Rate Register = ((uart_ker_ck) / ((huart->Init.BaudRate))) 52 - If oversampling is 8, 53 Baud Rate Register[15:4] = ((2 * uart_ker_ck) / 54 ((huart->Init.BaudRate)))[15:4] 55 Baud Rate Register[3] = 0 56 Baud Rate Register[2:0] = (((2 * uart_ker_ck) / 57 ((huart->Init.BaudRate)))[3:0]) >> 1 58 where uart_ker_ck is the UART input clock */ 59 60 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 61 This parameter can be a value of @ref UARTEx_Word_Length. */ 62 63 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 64 This parameter can be a value of @ref UART_Stop_Bits. */ 65 66 uint32_t Parity; /*!< Specifies the parity mode. 67 This parameter can be a value of @ref UART_Parity 68 @note When parity is enabled, the computed parity is inserted 69 at the MSB position of the transmitted data (9th bit when 70 the word length is set to 9 data bits; 8th bit when the 71 word length is set to 8 data bits). */ 72 73 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 74 This parameter can be a value of @ref UART_Mode. */ 75 76 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 77 or disabled. 78 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 79 80 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, 81 to achieve higher speed (up to f_PCLK/8). 82 This parameter can be a value of @ref UART_Over_Sampling. */ 83 84 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 85 Selecting the single sample method increases the receiver tolerance to clock 86 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 87 88 89 } UART_InitTypeDef; 90 91 /** 92 * @brief UART Advanced Features initialization structure definition 93 */ 94 typedef struct 95 { 96 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 97 Advanced Features may be initialized at the same time . 98 This parameter can be a value of 99 @ref UART_Advanced_Features_Initialization_Type. */ 100 101 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 102 This parameter can be a value of @ref UART_Tx_Inv. */ 103 104 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 105 This parameter can be a value of @ref UART_Rx_Inv. */ 106 107 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 108 vs negative/inverted logic). 109 This parameter can be a value of @ref UART_Data_Inv. */ 110 111 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 112 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 113 114 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 115 This parameter can be a value of @ref UART_Overrun_Disable. */ 116 117 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 118 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 119 120 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 121 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 122 123 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 124 detection is carried out. 125 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 126 127 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 128 This parameter can be a value of @ref UART_MSB_First. */ 129 } UART_AdvFeatureInitTypeDef; 130 131 /** 132 * @brief HAL UART State definition 133 * @note HAL UART State value is a combination of 2 different substates: 134 * gState and RxState (see @ref UART_State_Definition). 135 * - gState contains UART state information related to global Handle management 136 * and also information related to Tx operations. 137 * gState value coding follow below described bitmap : 138 * b7-b6 Error information 139 * 00 : No Error 140 * 01 : (Not Used) 141 * 10 : Timeout 142 * 11 : Error 143 * b5 Peripheral initialization status 144 * 0 : Reset (Peripheral not initialized) 145 * 1 : Init done (Peripheral initialized. HAL UART Init function already called) 146 * b4-b3 (not used) 147 * xx : Should be set to 00 148 * b2 Intrinsic process state 149 * 0 : Ready 150 * 1 : Busy (Peripheral busy with some configuration or internal operations) 151 * b1 (not used) 152 * x : Should be set to 0 153 * b0 Tx state 154 * 0 : Ready (no Tx operation ongoing) 155 * 1 : Busy (Tx operation ongoing) 156 * - RxState contains information related to Rx operations. 157 * RxState value coding follow below described bitmap : 158 * b7-b6 (not used) 159 * xx : Should be set to 00 160 * b5 Peripheral initialization status 161 * 0 : Reset (Peripheral not initialized) 162 * 1 : Init done (Peripheral initialized) 163 * b4-b2 (not used) 164 * xxx : Should be set to 000 165 * b1 Rx state 166 * 0 : Ready (no Rx operation ongoing) 167 * 1 : Busy (Rx operation ongoing) 168 * b0 (not used) 169 * x : Should be set to 0. 170 */ 171 typedef uint32_t HAL_UART_StateTypeDef; 172 173 /** 174 * @brief UART clock sources definition 175 */ 176 typedef enum 177 { 178 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 179 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ 180 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ 181 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ 182 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ 183 } UART_ClockSourceTypeDef; 184 185 /** 186 * @brief HAL UART Reception type definition 187 * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. 188 * This parameter can be a value of @ref UART_Reception_Type_Values : 189 * HAL_UART_RECEPTION_STANDARD = 0x00U, 190 * HAL_UART_RECEPTION_TOIDLE = 0x01U, 191 * HAL_UART_RECEPTION_TORTO = 0x02U, 192 * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U, 193 */ 194 typedef uint32_t HAL_UART_RxTypeTypeDef; 195 196 /** 197 * @brief HAL UART Rx Event type definition 198 * @note HAL UART Rx Event type value aims to identify which type of Event has occurred 199 * leading to call of the RxEvent callback. 200 * This parameter can be a value of @ref UART_RxEvent_Type_Values : 201 * HAL_UART_RXEVENT_TC = 0x00U, 202 * HAL_UART_RXEVENT_HT = 0x01U, 203 * HAL_UART_RXEVENT_IDLE = 0x02U, 204 */ 205 typedef uint32_t HAL_UART_RxEventTypeTypeDef; 206 207 /** 208 * @brief UART handle Structure definition 209 */ 210 typedef struct __UART_HandleTypeDef 211 { 212 USART_TypeDef *Instance; /*!< UART registers base address */ 213 214 UART_InitTypeDef Init; /*!< UART communication parameters */ 215 216 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 217 218 const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 219 220 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 221 222 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 223 224 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 225 226 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 227 228 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 229 230 uint16_t Mask; /*!< UART Rx RDR register mask */ 231 232 __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ 233 234 __IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */ 235 236 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 237 238 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 239 240 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 241 242 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 243 244 HAL_LockTypeDef Lock; /*!< Locking object */ 245 246 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 247 and also related to Tx operations. This parameter 248 can be a value of @ref HAL_UART_StateTypeDef */ 249 250 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. This 251 parameter can be a value of @ref HAL_UART_StateTypeDef */ 252 253 __IO uint32_t ErrorCode; /*!< UART Error code */ 254 255 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 256 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 257 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 258 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 259 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 260 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 261 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 262 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 263 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 264 #if defined(USART_CR1_UESM) 265 #if defined(USART_CR3_WUFIE) 266 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 267 #endif /* USART_CR3_WUFIE */ 268 #endif /* USART_CR1_UESM */ 269 void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ 270 271 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 272 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 273 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 274 275 } UART_HandleTypeDef; 276 277 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 278 /** 279 * @brief HAL UART Callback ID enumeration definition 280 */ 281 typedef enum 282 { 283 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 284 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 285 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 286 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 287 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 288 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 289 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 290 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 291 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 292 293 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 294 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 295 296 } HAL_UART_CallbackIDTypeDef; 297 298 /** 299 * @brief HAL UART Callback pointer definition 300 */ 301 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 302 typedef void (*pUART_RxEventCallbackTypeDef) 303 (struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ 304 305 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 306 307 /** 308 * @} 309 */ 310 311 /* Exported constants --------------------------------------------------------*/ 312 /** @defgroup UART_Exported_Constants UART Exported Constants 313 * @{ 314 */ 315 316 /** @defgroup UART_State_Definition UART State Code Definition 317 * @{ 318 */ 319 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 320 Value is allowed for gState and RxState */ 321 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 322 Value is allowed for gState and RxState */ 323 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 324 Value is allowed for gState only */ 325 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 326 Value is allowed for gState only */ 327 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 328 Value is allowed for RxState only */ 329 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 330 Not to be used for neither gState nor RxState.Value is result 331 of combination (Or) between gState and RxState values */ 332 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 333 Value is allowed for gState only */ 334 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 335 Value is allowed for gState only */ 336 /** 337 * @} 338 */ 339 340 /** @defgroup UART_Error_Definition UART Error Definition 341 * @{ 342 */ 343 #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */ 344 #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */ 345 #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */ 346 #define HAL_UART_ERROR_FE (0x00000004U) /*!< Frame error */ 347 #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */ 348 #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 349 #define HAL_UART_ERROR_RTO (0x00000020U) /*!< Receiver Timeout error */ 350 351 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 352 #define HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */ 353 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 354 /** 355 * @} 356 */ 357 358 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 359 * @{ 360 */ 361 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 362 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 363 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 364 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 365 /** 366 * @} 367 */ 368 369 /** @defgroup UART_Parity UART Parity 370 * @{ 371 */ 372 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 373 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 374 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 375 /** 376 * @} 377 */ 378 379 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 380 * @{ 381 */ 382 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 383 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 384 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 385 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 386 /** 387 * @} 388 */ 389 390 /** @defgroup UART_Mode UART Transfer Mode 391 * @{ 392 */ 393 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 394 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 395 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 396 /** 397 * @} 398 */ 399 400 /** @defgroup UART_State UART State 401 * @{ 402 */ 403 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 404 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 405 /** 406 * @} 407 */ 408 409 /** @defgroup UART_Over_Sampling UART Over Sampling 410 * @{ 411 */ 412 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 413 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 414 /** 415 * @} 416 */ 417 418 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 419 * @{ 420 */ 421 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 422 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 423 /** 424 * @} 425 */ 426 427 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 428 * @{ 429 */ 430 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection 431 on start bit */ 432 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection 433 on falling edge */ 434 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection 435 on 0x7F frame detection */ 436 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection 437 on 0x55 frame detection */ 438 /** 439 * @} 440 */ 441 442 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout 443 * @{ 444 */ 445 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ 446 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ 447 /** 448 * @} 449 */ 450 451 /** @defgroup UART_LIN UART Local Interconnection Network mode 452 * @{ 453 */ 454 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 455 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 456 /** 457 * @} 458 */ 459 460 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 461 * @{ 462 */ 463 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 464 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 465 /** 466 * @} 467 */ 468 469 /** @defgroup UART_DMA_Tx UART DMA Tx 470 * @{ 471 */ 472 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 473 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 474 /** 475 * @} 476 */ 477 478 /** @defgroup UART_DMA_Rx UART DMA Rx 479 * @{ 480 */ 481 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 482 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 483 /** 484 * @} 485 */ 486 487 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 488 * @{ 489 */ 490 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 491 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 492 /** 493 * @} 494 */ 495 496 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 497 * @{ 498 */ 499 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 500 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 501 /** 502 * @} 503 */ 504 505 /** @defgroup UART_Request_Parameters UART Request Parameters 506 * @{ 507 */ 508 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 509 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 510 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 511 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 512 #if defined(USART_RQR_TXFRQ) 513 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 514 #endif /* USART_RQR_TXFRQ */ 515 /** 516 * @} 517 */ 518 519 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 520 * @{ 521 */ 522 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 523 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 524 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 525 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 526 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 527 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 528 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 529 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 530 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 531 /** 532 * @} 533 */ 534 535 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 536 * @{ 537 */ 538 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 539 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 540 /** 541 * @} 542 */ 543 544 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 545 * @{ 546 */ 547 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 548 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 549 /** 550 * @} 551 */ 552 553 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 554 * @{ 555 */ 556 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 557 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 558 /** 559 * @} 560 */ 561 562 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 563 * @{ 564 */ 565 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 566 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 567 /** 568 * @} 569 */ 570 571 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 572 * @{ 573 */ 574 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 575 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 576 /** 577 * @} 578 */ 579 580 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 581 * @{ 582 */ 583 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 584 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 585 /** 586 * @} 587 */ 588 589 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 590 * @{ 591 */ 592 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 593 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 594 /** 595 * @} 596 */ 597 598 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 599 * @{ 600 */ 601 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received 602 first disable */ 603 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received 604 first enable */ 605 /** 606 * @} 607 */ 608 #if defined(USART_CR1_UESM) 609 610 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 611 * @{ 612 */ 613 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 614 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 615 /** 616 * @} 617 */ 618 #endif /* USART_CR1_UESM */ 619 620 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 621 * @{ 622 */ 623 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 624 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 625 /** 626 * @} 627 */ 628 629 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 630 * @{ 631 */ 632 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 633 /** 634 * @} 635 */ 636 #if defined(USART_CR1_UESM) 637 638 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 639 * @{ 640 */ 641 #if defined(USART_CR3_WUS) 642 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 643 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 644 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register 645 not empty or RXFIFO is not empty */ 646 #else 647 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 648 #define UART_WAKEUP_ON_READDATA_NONEMPTY 0x00000001U /*!< UART wake-up on receive data register 649 not empty or RXFIFO is not empty */ 650 #endif /* USART_CR3_WUS */ 651 /** 652 * @} 653 */ 654 #endif /* USART_CR1_UESM */ 655 656 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 657 * @{ 658 */ 659 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 660 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 661 /** 662 * @} 663 */ 664 665 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 666 * @{ 667 */ 668 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB 669 position in CR1 register */ 670 /** 671 * @} 672 */ 673 674 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 675 * @{ 676 */ 677 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB 678 position in CR1 register */ 679 /** 680 * @} 681 */ 682 683 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 684 * @{ 685 */ 686 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 687 /** 688 * @} 689 */ 690 691 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 692 * @{ 693 */ 694 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 695 /** 696 * @} 697 */ 698 699 /** @defgroup UART_Flags UART Status Flags 700 * Elements values convention: 0xXXXX 701 * - 0xXXXX : Flag mask in the ISR register 702 * @{ 703 */ 704 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 705 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 706 #if defined(USART_CR1_UESM) 707 #if defined(USART_CR3_WUFIE) 708 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 709 #endif /* USART_CR3_WUFIE */ 710 #endif /* USART_CR1_UESM */ 711 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 712 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 713 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 714 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 715 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 716 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 717 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 718 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 719 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 720 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 721 #define UART_FLAG_TXE USART_ISR_TXE /*!< UART transmit data register empty */ 722 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 723 #define UART_FLAG_RXNE USART_ISR_RXNE /*!< UART read data register not empty */ 724 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 725 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 726 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 727 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 728 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 729 /** 730 * @} 731 */ 732 733 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 734 * Elements values convention: 000ZZZZZ0XXYYYYYb 735 * - YYYYY : Interrupt source position in the XX register (5bits) 736 * - XX : Interrupt source register (2bits) 737 * - 01: CR1 register 738 * - 10: CR2 register 739 * - 11: CR3 register 740 * - ZZZZZ : Flag position in the ISR register(5bits) 741 * Elements values convention: 000000000XXYYYYYb 742 * - YYYYY : Interrupt source position in the XX register (5bits) 743 * - XX : Interrupt source register (2bits) 744 * - 01: CR1 register 745 * - 10: CR2 register 746 * - 11: CR3 register 747 * Elements values convention: 0000ZZZZ00000000b 748 * - ZZZZ : Flag position in the ISR register(4bits) 749 * @{ 750 */ 751 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 752 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 753 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 754 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 755 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 756 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 757 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 758 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 759 #if defined(USART_CR1_UESM) 760 #if defined(USART_CR3_WUFIE) 761 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 762 #endif /* USART_CR3_WUFIE */ 763 #endif /* USART_CR1_UESM */ 764 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ 765 766 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 767 768 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 769 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 770 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 771 /** 772 * @} 773 */ 774 775 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 776 * @{ 777 */ 778 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 779 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 780 #define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise Error detected Clear Flag */ 781 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 782 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 783 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 784 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 785 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 786 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 787 #if defined(USART_CR1_UESM) 788 #if defined(USART_CR3_WUFIE) 789 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 790 #endif /* USART_CR3_WUFIE */ 791 #endif /* USART_CR1_UESM */ 792 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ 793 /** 794 * @} 795 */ 796 797 /** @defgroup UART_Reception_Type_Values UART Reception type values 798 * @{ 799 */ 800 #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ 801 #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ 802 #define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */ 803 #define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */ 804 /** 805 * @} 806 */ 807 808 /** @defgroup UART_RxEvent_Type_Values UART RxEvent type values 809 * @{ 810 */ 811 #define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */ 812 #define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */ 813 #define HAL_UART_RXEVENT_IDLE (0x00000002U) /*!< RxEvent linked to IDLE event */ 814 /** 815 * @} 816 */ 817 818 /** 819 * @} 820 */ 821 822 /* Exported macros -----------------------------------------------------------*/ 823 /** @defgroup UART_Exported_Macros UART Exported Macros 824 * @{ 825 */ 826 827 /** @brief Reset UART handle states. 828 * @param __HANDLE__ UART handle. 829 * @retval None 830 */ 831 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 832 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 833 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 834 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 835 (__HANDLE__)->MspInitCallback = NULL; \ 836 (__HANDLE__)->MspDeInitCallback = NULL; \ 837 } while(0U) 838 #else 839 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 840 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 841 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 842 } while(0U) 843 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 844 845 /** @brief Flush the UART Data registers. 846 * @param __HANDLE__ specifies the UART Handle. 847 * @retval None 848 */ 849 #if defined(USART_RQR_TXFRQ) 850 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 851 do{ \ 852 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 853 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 854 } while(0U) 855 #else 856 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 857 do{ \ 858 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 859 } while(0U) 860 #endif /* USART_RQR_TXFRQ */ 861 862 /** @brief Clear the specified UART pending flag. 863 * @param __HANDLE__ specifies the UART Handle. 864 * @param __FLAG__ specifies the flag to check. 865 * This parameter can be any combination of the following values: 866 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 867 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 868 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 869 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 870 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 871 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 872 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag 873 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 874 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 875 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 876 #if defined(USART_CR1_UESM) 877 #if defined(USART_CR3_WUFIE) 878 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 879 #endif 880 #endif 881 * @retval None 882 */ 883 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 884 885 /** @brief Clear the UART PE pending flag. 886 * @param __HANDLE__ specifies the UART Handle. 887 * @retval None 888 */ 889 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 890 891 /** @brief Clear the UART FE pending flag. 892 * @param __HANDLE__ specifies the UART Handle. 893 * @retval None 894 */ 895 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 896 897 /** @brief Clear the UART NE pending flag. 898 * @param __HANDLE__ specifies the UART Handle. 899 * @retval None 900 */ 901 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 902 903 /** @brief Clear the UART ORE pending flag. 904 * @param __HANDLE__ specifies the UART Handle. 905 * @retval None 906 */ 907 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 908 909 /** @brief Clear the UART IDLE pending flag. 910 * @param __HANDLE__ specifies the UART Handle. 911 * @retval None 912 */ 913 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 914 915 916 /** @brief Check whether the specified UART flag is set or not. 917 * @param __HANDLE__ specifies the UART Handle. 918 * @param __FLAG__ specifies the flag to check. 919 * This parameter can be one of the following values: 920 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 921 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 922 #if defined(USART_CR1_UESM) 923 #if defined(USART_CR3_WUFIE) 924 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 925 #endif 926 #endif 927 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 928 * @arg @ref UART_FLAG_SBKF Send Break flag 929 * @arg @ref UART_FLAG_CMF Character match flag 930 * @arg @ref UART_FLAG_BUSY Busy flag 931 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 932 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 933 * @arg @ref UART_FLAG_CTS CTS Change flag 934 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 935 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 936 * @arg @ref UART_FLAG_TC Transmission Complete flag 937 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 938 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag 939 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 940 * @arg @ref UART_FLAG_ORE Overrun Error flag 941 * @arg @ref UART_FLAG_NE Noise Error flag 942 * @arg @ref UART_FLAG_FE Framing Error flag 943 * @arg @ref UART_FLAG_PE Parity Error flag 944 * @retval The new state of __FLAG__ (TRUE or FALSE). 945 */ 946 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 947 948 /** @brief Enable the specified UART interrupt. 949 * @param __HANDLE__ specifies the UART Handle. 950 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 951 * This parameter can be one of the following values: 952 #if defined(USART_CR1_UESM) 953 #if defined(USART_CR3_WUFIE) 954 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 955 #endif 956 #endif 957 * @arg @ref UART_IT_CM Character match interrupt 958 * @arg @ref UART_IT_CTS CTS change interrupt 959 * @arg @ref UART_IT_LBD LIN Break detection interrupt 960 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 961 * @arg @ref UART_IT_TC Transmission complete interrupt 962 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 963 * @arg @ref UART_IT_RTO Receive Timeout interrupt 964 * @arg @ref UART_IT_IDLE Idle line detection interrupt 965 * @arg @ref UART_IT_PE Parity Error interrupt 966 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 967 * @retval None 968 */ 969 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (\ 970 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 971 ((__HANDLE__)->Instance->CR1 |= (1U <<\ 972 ((__INTERRUPT__) & UART_IT_MASK))): \ 973 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 974 ((__HANDLE__)->Instance->CR2 |= (1U <<\ 975 ((__INTERRUPT__) & UART_IT_MASK))): \ 976 ((__HANDLE__)->Instance->CR3 |= (1U <<\ 977 ((__INTERRUPT__) & UART_IT_MASK)))) 978 979 /** @brief Disable the specified UART interrupt. 980 * @param __HANDLE__ specifies the UART Handle. 981 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 982 * This parameter can be one of the following values: 983 #if defined(USART_CR1_UESM) 984 #if defined(USART_CR3_WUFIE) 985 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 986 #endif 987 #endif 988 * @arg @ref UART_IT_CM Character match interrupt 989 * @arg @ref UART_IT_CTS CTS change interrupt 990 * @arg @ref UART_IT_LBD LIN Break detection interrupt 991 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 992 * @arg @ref UART_IT_TC Transmission complete interrupt 993 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 994 * @arg @ref UART_IT_RTO Receive Timeout interrupt 995 * @arg @ref UART_IT_IDLE Idle line detection interrupt 996 * @arg @ref UART_IT_PE Parity Error interrupt 997 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 998 * @retval None 999 */ 1000 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1001 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1002 ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\ 1003 ((__INTERRUPT__) & UART_IT_MASK))): \ 1004 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1005 ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\ 1006 ((__INTERRUPT__) & UART_IT_MASK))): \ 1007 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\ 1008 ((__INTERRUPT__) & UART_IT_MASK)))) 1009 1010 /** @brief Check whether the specified UART interrupt has occurred or not. 1011 * @param __HANDLE__ specifies the UART Handle. 1012 * @param __INTERRUPT__ specifies the UART interrupt to check. 1013 * This parameter can be one of the following values: 1014 #if defined(USART_CR1_UESM) 1015 #if defined(USART_CR3_WUFIE) 1016 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1017 #endif 1018 #endif 1019 * @arg @ref UART_IT_CM Character match interrupt 1020 * @arg @ref UART_IT_CTS CTS change interrupt 1021 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1022 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1023 * @arg @ref UART_IT_TC Transmission complete interrupt 1024 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1025 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1026 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1027 * @arg @ref UART_IT_PE Parity Error interrupt 1028 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1029 * @retval The new state of __INTERRUPT__ (SET or RESET). 1030 */ 1031 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 1032 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 1033 1034 /** @brief Check whether the specified UART interrupt source is enabled or not. 1035 * @param __HANDLE__ specifies the UART Handle. 1036 * @param __INTERRUPT__ specifies the UART interrupt source to check. 1037 * This parameter can be one of the following values: 1038 #if defined(USART_CR1_UESM) 1039 #if defined(USART_CR3_WUFIE) 1040 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1041 #endif 1042 #endif 1043 * @arg @ref UART_IT_CM Character match interrupt 1044 * @arg @ref UART_IT_CTS CTS change interrupt 1045 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1046 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1047 * @arg @ref UART_IT_TC Transmission complete interrupt 1048 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1049 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1050 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1051 * @arg @ref UART_IT_PE Parity Error interrupt 1052 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1053 * @retval The new state of __INTERRUPT__ (SET or RESET). 1054 */ 1055 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\ 1056 (__HANDLE__)->Instance->CR1 : \ 1057 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\ 1058 (__HANDLE__)->Instance->CR2 : \ 1059 (__HANDLE__)->Instance->CR3)) & (1U <<\ 1060 (((uint16_t)(__INTERRUPT__)) &\ 1061 UART_IT_MASK))) != RESET) ? SET : RESET) 1062 1063 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1064 * @param __HANDLE__ specifies the UART Handle. 1065 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1066 * to clear the corresponding interrupt 1067 * This parameter can be one of the following values: 1068 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1069 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1070 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1071 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1072 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1073 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag 1074 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1075 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1076 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1077 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1078 #if defined(USART_CR1_UESM) 1079 #if defined(USART_CR3_WUFIE) 1080 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1081 #endif 1082 #endif 1083 * @retval None 1084 */ 1085 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1086 1087 /** @brief Set a specific UART request flag. 1088 * @param __HANDLE__ specifies the UART Handle. 1089 * @param __REQ__ specifies the request flag to set 1090 * This parameter can be one of the following values: 1091 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1092 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1093 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1094 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1095 #if defined(USART_RQR_TXFRQ) 1096 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1097 #endif 1098 * @retval None 1099 */ 1100 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 1101 1102 /** @brief Enable the UART one bit sample method. 1103 * @param __HANDLE__ specifies the UART Handle. 1104 * @retval None 1105 */ 1106 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1107 1108 /** @brief Disable the UART one bit sample method. 1109 * @param __HANDLE__ specifies the UART Handle. 1110 * @retval None 1111 */ 1112 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1113 1114 /** @brief Enable UART. 1115 * @param __HANDLE__ specifies the UART Handle. 1116 * @retval None 1117 */ 1118 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1119 1120 /** @brief Disable UART. 1121 * @param __HANDLE__ specifies the UART Handle. 1122 * @retval None 1123 */ 1124 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1125 1126 /** @brief Enable CTS flow control. 1127 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1128 * without need to call HAL_UART_Init() function. 1129 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1130 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1131 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1132 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1133 * - macro could only be called when corresponding UART instance is disabled 1134 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1135 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1136 * @param __HANDLE__ specifies the UART Handle. 1137 * @retval None 1138 */ 1139 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1140 do{ \ 1141 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1142 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1143 } while(0U) 1144 1145 /** @brief Disable CTS flow control. 1146 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1147 * without need to call HAL_UART_Init() function. 1148 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1149 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1150 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1151 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1152 * - macro could only be called when corresponding UART instance is disabled 1153 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1154 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1155 * @param __HANDLE__ specifies the UART Handle. 1156 * @retval None 1157 */ 1158 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1159 do{ \ 1160 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1161 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1162 } while(0U) 1163 1164 /** @brief Enable RTS flow control. 1165 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1166 * without need to call HAL_UART_Init() function. 1167 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1168 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1169 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1170 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1171 * - macro could only be called when corresponding UART instance is disabled 1172 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1173 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1174 * @param __HANDLE__ specifies the UART Handle. 1175 * @retval None 1176 */ 1177 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1178 do{ \ 1179 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1180 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1181 } while(0U) 1182 1183 /** @brief Disable RTS flow control. 1184 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1185 * without need to call HAL_UART_Init() function. 1186 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1187 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1188 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1189 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1190 * - macro could only be called when corresponding UART instance is disabled 1191 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1192 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1193 * @param __HANDLE__ specifies the UART Handle. 1194 * @retval None 1195 */ 1196 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1197 do{ \ 1198 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1199 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1200 } while(0U) 1201 /** 1202 * @} 1203 */ 1204 1205 /* Private macros --------------------------------------------------------*/ 1206 /** @defgroup UART_Private_Macros UART Private Macros 1207 * @{ 1208 */ 1209 1210 1211 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1212 * @param __PCLK__ UART clock. 1213 * @param __BAUD__ Baud rate set by the user. 1214 * @retval Division result 1215 */ 1216 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1217 1218 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1219 * @param __PCLK__ UART clock. 1220 * @param __BAUD__ Baud rate set by the user. 1221 * @retval Division result 1222 */ 1223 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__)) 1224 1225 1226 /** @brief Check UART Baud rate. 1227 * @param __BAUDRATE__ Baudrate specified by the user. 1228 * The maximum Baud Rate is derived from the maximum clock on F0 (i.e. 48 MHz) 1229 * divided by the smallest oversampling used on the USART (i.e. 8) 1230 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1231 */ 1232 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 6000001U) 1233 1234 /** @brief Check UART assertion time. 1235 * @param __TIME__ 5-bit value assertion time. 1236 * @retval Test result (TRUE or FALSE). 1237 */ 1238 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1239 1240 /** @brief Check UART deassertion time. 1241 * @param __TIME__ 5-bit value deassertion time. 1242 * @retval Test result (TRUE or FALSE). 1243 */ 1244 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1245 1246 /** 1247 * @brief Ensure that UART frame number of stop bits is valid. 1248 * @param __STOPBITS__ UART frame number of stop bits. 1249 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1250 */ 1251 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1252 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1253 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1254 ((__STOPBITS__) == UART_STOPBITS_2)) 1255 1256 1257 /** 1258 * @brief Ensure that UART frame parity is valid. 1259 * @param __PARITY__ UART frame parity. 1260 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1261 */ 1262 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1263 ((__PARITY__) == UART_PARITY_EVEN) || \ 1264 ((__PARITY__) == UART_PARITY_ODD)) 1265 1266 /** 1267 * @brief Ensure that UART hardware flow control is valid. 1268 * @param __CONTROL__ UART hardware flow control. 1269 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1270 */ 1271 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1272 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1273 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1274 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1275 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1276 1277 /** 1278 * @brief Ensure that UART communication mode is valid. 1279 * @param __MODE__ UART communication mode. 1280 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1281 */ 1282 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1283 1284 /** 1285 * @brief Ensure that UART state is valid. 1286 * @param __STATE__ UART state. 1287 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1288 */ 1289 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1290 ((__STATE__) == UART_STATE_ENABLE)) 1291 1292 /** 1293 * @brief Ensure that UART oversampling is valid. 1294 * @param __SAMPLING__ UART oversampling. 1295 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1296 */ 1297 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1298 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1299 1300 /** 1301 * @brief Ensure that UART frame sampling is valid. 1302 * @param __ONEBIT__ UART frame sampling. 1303 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1304 */ 1305 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1306 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1307 1308 /** 1309 * @brief Ensure that UART auto Baud rate detection mode is valid. 1310 * @param __MODE__ UART auto Baud rate detection mode. 1311 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1312 */ 1313 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1314 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1315 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1316 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1317 1318 /** 1319 * @brief Ensure that UART receiver timeout setting is valid. 1320 * @param __TIMEOUT__ UART receiver timeout setting. 1321 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1322 */ 1323 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1324 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1325 1326 /** @brief Check the receiver timeout value. 1327 * @note The maximum UART receiver timeout value is 0xFFFFFF. 1328 * @param __TIMEOUTVALUE__ receiver timeout value. 1329 * @retval Test result (TRUE or FALSE) 1330 */ 1331 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) 1332 1333 /** 1334 * @brief Ensure that UART LIN state is valid. 1335 * @param __LIN__ UART LIN state. 1336 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1337 */ 1338 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1339 ((__LIN__) == UART_LIN_ENABLE)) 1340 1341 /** 1342 * @brief Ensure that UART LIN break detection length is valid. 1343 * @param __LENGTH__ UART LIN break detection length. 1344 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1345 */ 1346 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1347 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1348 1349 /** 1350 * @brief Ensure that UART DMA TX state is valid. 1351 * @param __DMATX__ UART DMA TX state. 1352 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1353 */ 1354 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1355 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1356 1357 /** 1358 * @brief Ensure that UART DMA RX state is valid. 1359 * @param __DMARX__ UART DMA RX state. 1360 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1361 */ 1362 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1363 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1364 1365 /** 1366 * @brief Ensure that UART half-duplex state is valid. 1367 * @param __HDSEL__ UART half-duplex state. 1368 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1369 */ 1370 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1371 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1372 1373 /** 1374 * @brief Ensure that UART wake-up method is valid. 1375 * @param __WAKEUP__ UART wake-up method . 1376 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1377 */ 1378 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1379 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1380 1381 /** 1382 * @brief Ensure that UART request parameter is valid. 1383 * @param __PARAM__ UART request parameter. 1384 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1385 */ 1386 #if defined(USART_RQR_TXFRQ) 1387 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1388 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1389 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1390 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1391 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1392 #else 1393 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1394 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1395 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1396 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST)) 1397 #endif /* USART_RQR_TXFRQ */ 1398 1399 /** 1400 * @brief Ensure that UART advanced features initialization is valid. 1401 * @param __INIT__ UART advanced features initialization. 1402 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1403 */ 1404 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1405 UART_ADVFEATURE_TXINVERT_INIT | \ 1406 UART_ADVFEATURE_RXINVERT_INIT | \ 1407 UART_ADVFEATURE_DATAINVERT_INIT | \ 1408 UART_ADVFEATURE_SWAP_INIT | \ 1409 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1410 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1411 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1412 UART_ADVFEATURE_MSBFIRST_INIT)) 1413 1414 /** 1415 * @brief Ensure that UART frame TX inversion setting is valid. 1416 * @param __TXINV__ UART frame TX inversion setting. 1417 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1418 */ 1419 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1420 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1421 1422 /** 1423 * @brief Ensure that UART frame RX inversion setting is valid. 1424 * @param __RXINV__ UART frame RX inversion setting. 1425 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1426 */ 1427 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1428 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1429 1430 /** 1431 * @brief Ensure that UART frame data inversion setting is valid. 1432 * @param __DATAINV__ UART frame data inversion setting. 1433 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1434 */ 1435 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1436 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1437 1438 /** 1439 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1440 * @param __SWAP__ UART frame RX/TX pins swap setting. 1441 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1442 */ 1443 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1444 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1445 1446 /** 1447 * @brief Ensure that UART frame overrun setting is valid. 1448 * @param __OVERRUN__ UART frame overrun setting. 1449 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1450 */ 1451 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1452 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1453 1454 /** 1455 * @brief Ensure that UART auto Baud rate state is valid. 1456 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1457 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1458 */ 1459 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \ 1460 UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1461 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1462 1463 /** 1464 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1465 * @param __DMA__ UART DMA enabling or disabling on error setting. 1466 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1467 */ 1468 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1469 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1470 1471 /** 1472 * @brief Ensure that UART frame MSB first setting is valid. 1473 * @param __MSBFIRST__ UART frame MSB first setting. 1474 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1475 */ 1476 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1477 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1478 1479 #if defined(USART_CR1_UESM) 1480 /** 1481 * @brief Ensure that UART stop mode state is valid. 1482 * @param __STOPMODE__ UART stop mode state. 1483 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1484 */ 1485 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1486 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1487 1488 #endif /* USART_CR1_UESM */ 1489 /** 1490 * @brief Ensure that UART mute mode state is valid. 1491 * @param __MUTE__ UART mute mode state. 1492 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1493 */ 1494 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1495 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1496 #if defined(USART_CR1_UESM) 1497 1498 /** 1499 * @brief Ensure that UART wake-up selection is valid. 1500 * @param __WAKE__ UART wake-up selection. 1501 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1502 */ 1503 #if defined(USART_CR3_WUFIE) 1504 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1505 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1506 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1507 #else 1508 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1509 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1510 #endif /* USART_CR3_WUFIE */ 1511 #endif /* USART_CR1_UESM */ 1512 1513 /** 1514 * @brief Ensure that UART driver enable polarity is valid. 1515 * @param __POLARITY__ UART driver enable polarity. 1516 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1517 */ 1518 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1519 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1520 1521 1522 /** 1523 * @} 1524 */ 1525 1526 /* Include UART HAL Extended module */ 1527 #include "stm32f0xx_hal_uart_ex.h" 1528 1529 /* Exported functions --------------------------------------------------------*/ 1530 /** @addtogroup UART_Exported_Functions UART Exported Functions 1531 * @{ 1532 */ 1533 1534 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1535 * @{ 1536 */ 1537 1538 /* Initialization and de-initialization functions ****************************/ 1539 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1540 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1541 #if defined(USART_CR2_LINEN) 1542 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1543 #endif /* USART_CR2_LINEN */ 1544 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1545 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1546 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1547 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1548 1549 /* Callbacks Register/UnRegister functions ***********************************/ 1550 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1551 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, 1552 pUART_CallbackTypeDef pCallback); 1553 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1554 1555 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); 1556 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); 1557 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1558 1559 /** 1560 * @} 1561 */ 1562 1563 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1564 * @{ 1565 */ 1566 1567 /* IO operation functions *****************************************************/ 1568 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); 1569 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1570 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1571 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1572 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1573 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1574 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1575 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1576 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1577 /* Transfer Abort functions */ 1578 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1579 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1580 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1581 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1582 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1583 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1584 1585 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1586 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1587 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1588 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1589 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1590 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1591 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1592 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1593 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1594 1595 void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); 1596 1597 /** 1598 * @} 1599 */ 1600 1601 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1602 * @{ 1603 */ 1604 1605 /* Peripheral Control functions ************************************************/ 1606 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); 1607 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); 1608 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); 1609 1610 #if defined(USART_CR2_LINEN) 1611 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1612 #endif /* USART_CR2_LINEN */ 1613 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1614 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1615 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1616 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1617 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1618 1619 /** 1620 * @} 1621 */ 1622 1623 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1624 * @{ 1625 */ 1626 1627 /* Peripheral State and Errors functions **************************************************/ 1628 HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart); 1629 uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart); 1630 1631 /** 1632 * @} 1633 */ 1634 1635 /** 1636 * @} 1637 */ 1638 1639 /* Private functions -----------------------------------------------------------*/ 1640 /** @addtogroup UART_Private_Functions UART Private Functions 1641 * @{ 1642 */ 1643 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1644 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 1645 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1646 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1647 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1648 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, 1649 uint32_t Tickstart, uint32_t Timeout); 1650 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1651 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1652 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1653 1654 /** 1655 * @} 1656 */ 1657 1658 /* Private variables -----------------------------------------------------------*/ 1659 /** 1660 * @} 1661 */ 1662 1663 /** 1664 * @} 1665 */ 1666 1667 #ifdef __cplusplus 1668 } 1669 #endif 1670 1671 #endif /* STM32F0xx_HAL_UART_H */ 1672 1673
