1 /**
2   ******************************************************************************
3   * @file    system_stm32wbaxx_ns.c
4   * @author  MCD Application Team
5   * @brief   CMSIS Cortex-M33 Device Peripheral Access Layer System Source File
6   *          to be used in non-secure application when the system implements
7   *          the TrustZone-M security.
8   *
9   ******************************************************************************
10   * @attention
11   *
12   * Copyright (c) 2022 STMicroelectronics.
13   * All rights reserved.
14   *
15   * This software is licensed under terms that can be found in the LICENSE file
16   * in the root directory of this software component.
17   * If no LICENSE file comes with this software, it is provided AS-IS.
18   *
19   ******************************************************************************
20   *   This file provides two functions and one global variable to be called from
21   *   user application:
22   *      - SystemInit(): This function is called at non-secure startup before
23   *                      branch to non-secure main program.
24   *                      This call is made inside the "startup_stm32wbaxx.s" file.
25   *
26   *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
27   *                                  by the user application to setup the SysTick
28   *                                  timer or configure other parameters.
29   *
30   *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
31   *                                 be called whenever the core clock is changed
32   *                                 during program execution.
33   *
34   *   After each device reset the HSI (16 MHz) is used as system clock source.
35   *   Then SystemInit() function is called, in "startup_stm32wbaxx.s" file, to
36   *   configure the system clock before to branch to main secure program.
37   *   Later, when non-secure SystemInit() function is called, in "startup_stm32wbaxx.s"
38   *   file, the system clock may have been updated from reset value by the main
39   *   secure program.
40   *
41   ******************************************************************************
42   */
43 
44 /** @addtogroup CMSIS
45   * @{
46   */
47 
48 /** @addtogroup STM32WBAxx_system
49   * @{
50   */
51 
52 /** @addtogroup STM32WBAxx_System_Private_Includes
53   * @{
54   */
55 
56 #include "stm32wbaxx.h"
57 
58 /**
59   * @}
60   */
61 
62 /** @addtogroup STM32WBAxx_System_Private_TypesDefinitions
63   * @{
64   */
65 
66 /**
67   * @}
68   */
69 
70 /** @addtogroup STM32WBAxx_System_Private_Defines
71   * @{
72   */
73 #if !defined (HSE_VALUE)
74 #define HSE_VALUE     (32000000U) /*!< Value of the External oscillator in Hz */
75 #endif /* HSE_VALUE */
76 
77 #if !defined (HSI_VALUE)
78 #define HSI_VALUE     (16000000U) /*!< Value of the Internal oscillator in Hz*/
79 #endif /* HSI_VALUE */
80 
81 /* Note: Following vector table addresses must be defined in line with linker
82          configuration. */
83 /*!< Uncomment the following line if you need to relocate the vector table
84      anywhere in Flash or Sram, else the vector table is kept at the automatic
85      remap of boot address selected */
86 /* #define USER_VECT_TAB_ADDRESS */
87 
88 #if defined(USER_VECT_TAB_ADDRESS)
89 /*!< Uncomment the following line if you need to relocate your vector Table
90      in Sram else user remap will be done in Flash. */
91 /* #define VECT_TAB_SRAM */
92 #if defined(VECT_TAB_SRAM)
93 #define VECT_TAB_BASE_ADDRESS   SRAM2_BASE                 /*!< Vector Table base address field.
94                                                                 This value must be a multiple of 0x200. */
95 #define VECT_TAB_OFFSET         0x00000000U                /*!< Vector Table base offset field.
96                                                                 This value must be a multiple of 0x200. */
97 #else
98 #define VECT_TAB_BASE_ADDRESS   (FLASH_BASE + 0x00080000U) /*!< Vector Table base address field.
99                                                                 This value must be a multiple of 0x200. */
100 #define VECT_TAB_OFFSET         0x00000000U                /*!< Vector Table base offset field.
101                                                                 This value must be a multiple of 0x200. */
102 #endif /* VECT_TAB_SRAM */
103 #endif /* USER_VECT_TAB_ADDRESS */
104 
105 /******************************************************************************/
106 
107 /**
108   * @}
109   */
110 
111 /** @addtogroup STM32WBAxx_System_Private_Macros
112   * @{
113   */
114 
115 /**
116   * @}
117   */
118 
119 /** @addtogroup STM32WBAxx_System_Private_Variables
120   * @{
121   */
122   /* The SystemCoreClock variable is updated in three ways:
123       1) by calling CMSIS function SystemCoreClockUpdate()
124       2) by calling HAL API function HAL_RCC_GetHCLKFreq()
125       3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
126          Note: If you use this function to configure the system clock; then there
127                is no need to call the 2 first functions listed above, since SystemCoreClock
128                variable is updated automatically.
129   */
130   uint32_t SystemCoreClock = 16000000U; /* The HSI16 is used as system clock source after startup from reset, configured at 16 MHz. */
131 
132   const uint8_t AHBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
133   const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
134   const uint8_t AHB5PrescTable[8] = {1U, 1U, 1U, 1U, 2U, 3U, 4U, 6U};
135 /**
136   * @}
137   */
138 
139 /** @addtogroup STM32WBAxx_System_Private_FunctionPrototypes
140   * @{
141   */
142 
143 /**
144   * @}
145   */
146 
147 /** @addtogroup STM32WBAxx_System_Private_Functions
148   * @{
149   */
150 
151 /**
152   * @brief  Setup the microcontroller system.
153   * @param  None
154   * @retval None
155   */
156 
SystemInit(void)157 void SystemInit(void)
158 {
159   /* FPU settings ------------------------------------------------------------*/
160 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
161   SCB->CPACR |= ((3UL << 20U)|(3UL << 22U));  /* set CP10 and CP11 Full Access */
162 #endif
163 
164   /* Configure the Vector Table location -------------------------------------*/
165 #if defined(USER_VECT_TAB_ADDRESS)
166   SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation */
167 #endif /* USER_VECT_TAB_ADDRESS */
168 
169   /* Non-secure main application shall call SystemCoreClockUpdate() to update */
170   /* the SystemCoreClock variable to insure non-secure application relies on  */
171   /* the initial clock reference set by secure application.                   */
172 }
173 
174 /**
175   * @brief  Update SystemCoreClock variable according to Clock Register Values.
176   *         The SystemCoreClock variable contains the core clock (HCLK), it can
177   *         be used by the user application to setup the SysTick timer or configure
178   *         other parameters.
179   *
180   * @note   From the non-secure application, the SystemCoreClock value is
181   *         retrieved from the secure domain via a Non-Secure Callable function
182   *         since the RCC peripheral may be protected with security attributes
183   *         that prevent to compute the SystemCoreClock variable from the RCC
184   *         peripheral registers.
185   *
186   * @note   Each time the core clock (HCLK) changes, this function must be called
187   *         to update SystemCoreClock variable value. Otherwise, any configuration
188   *         based on this variable will be incorrect.
189   *
190   * @note   - The system frequency computed by this function is not the real
191   *           frequency in the chip. It is calculated based on the predefined
192   *           constant and the selected clock source:
193   *
194   *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
195   *
196   *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
197   *
198   *           - If SYSCLK source is PLL1, SystemCoreClock will contain the HSE_VALUE(***)
199   *             or HSI_VALUE(*)  multiplied/divided by the PLL1 factors.
200   *
201   *         (**) HSI_VALUE is a constant defined in STM32WBAxx_hal.h file (default value
202   *              16 MHz) but the real value may vary depending on the variations
203   *              in voltage and temperature.
204   *
205   *         (***) HSE_VALUE is a constant defined in STM32WBAxx_hal.h file (default value
206   *              32 MHz), user has to ensure that HSE_VALUE is same as the real
207   *              frequency of the crystal used. Otherwise, this function may
208   *              have wrong result.
209   *
210   *         - The result of this function could be not correct when using fractional
211   *           value for HSE crystal.
212   *
213   * @param  None
214   * @retval None
215   */
SystemCoreClockUpdate(void)216 void SystemCoreClockUpdate(void)
217 {
218   /* Get the SystemCoreClock value from the secure domain */
219   SystemCoreClock = SECURE_SystemCoreClockUpdate();
220 }
221 
222 
223 /**
224   * @}
225   */
226 
227 /**
228   * @}
229   */
230 
231 /**
232   * @}
233   */
234