1 /** 2 ****************************************************************************** 3 * @file stm32u5xx_hal_mmc.h 4 * @author MCD Application Team 5 * @brief Header file of MMC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2021 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32U5xx_HAL_MMC_H 21 #define STM32U5xx_HAL_MMC_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32u5xx_ll_sdmmc.h" 29 30 /** @addtogroup STM32U5xx_HAL_Driver 31 * @{ 32 */ 33 #if defined (SDMMC1) || defined (SDMMC2) 34 35 /** @addtogroup MMC 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup MMC_Exported_Types MMC Exported Types 41 * @{ 42 */ 43 44 /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure 45 * @{ 46 */ 47 typedef enum 48 { 49 HAL_MMC_STATE_RESET = ((uint32_t)0x00000000U), /*!< MMC not yet initialized or disabled */ 50 HAL_MMC_STATE_READY = ((uint32_t)0x00000001U), /*!< MMC initialized and ready for use */ 51 HAL_MMC_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< MMC Timeout state */ 52 HAL_MMC_STATE_BUSY = ((uint32_t)0x00000003U), /*!< MMC process ongoing */ 53 HAL_MMC_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< MMC Programming State */ 54 HAL_MMC_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< MMC Receinving State */ 55 HAL_MMC_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< MMC Transfer State */ 56 HAL_MMC_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< MMC is in error state */ 57 } HAL_MMC_StateTypeDef; 58 /** 59 * @} 60 */ 61 62 /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure 63 * @{ 64 */ 65 typedef uint32_t HAL_MMC_CardStateTypeDef; 66 67 #define HAL_MMC_CARD_IDLE 0x00000000U /*!< Card is in idle state (can't be checked by CMD13) */ 68 #define HAL_MMC_CARD_READY 0x00000001U /*!< Card state is ready (can't be checked by CMD13) */ 69 #define HAL_MMC_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state (can't be checked by CMD13) */ 70 #define HAL_MMC_CARD_STANDBY 0x00000003U /*!< Card is in standby state */ 71 #define HAL_MMC_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */ 72 #define HAL_MMC_CARD_SENDING 0x00000005U /*!< Card is sending an operation */ 73 #define HAL_MMC_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */ 74 #define HAL_MMC_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */ 75 #define HAL_MMC_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */ 76 #define HAL_MMC_CARD_BUSTEST 0x00000009U /*!< Card is in bus test state */ 77 #define HAL_MMC_CARD_SLEEP 0x0000000AU /*!< Card is in sleep state (can't be checked by CMD13) */ 78 #define HAL_MMC_CARD_ERROR 0x000000FFU /*!< Card response Error (can't be checked by CMD13) */ 79 /** 80 * @} 81 */ 82 83 /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition 84 * @{ 85 */ 86 #define MMC_InitTypeDef SDMMC_InitTypeDef 87 #define MMC_TypeDef SDMMC_TypeDef 88 89 /** 90 * @brief MMC Card Information Structure definition 91 */ 92 typedef struct 93 { 94 uint32_t CardType; /*!< Specifies the card Type */ 95 96 uint32_t Class; /*!< Specifies the class of the card class */ 97 98 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ 99 100 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ 101 102 uint32_t BlockSize; /*!< Specifies one block size in bytes */ 103 104 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ 105 106 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ 107 108 } HAL_MMC_CardInfoTypeDef; 109 110 /** 111 * @brief MMC handle Structure definition 112 */ 113 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 114 typedef struct __MMC_HandleTypeDef 115 #else 116 typedef struct 117 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 118 { 119 MMC_TypeDef *Instance; /*!< MMC registers base address */ 120 121 MMC_InitTypeDef Init; /*!< MMC required parameters */ 122 123 HAL_LockTypeDef Lock; /*!< MMC locking object */ 124 125 const uint8_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */ 126 127 uint32_t TxXferSize; /*!< MMC Tx Transfer size */ 128 129 uint8_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */ 130 131 uint32_t RxXferSize; /*!< MMC Rx Transfer size */ 132 133 __IO uint32_t Context; /*!< MMC transfer context */ 134 135 __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */ 136 137 __IO uint32_t ErrorCode; /*!< MMC Card Error codes */ 138 139 __IO uint16_t RPMBErrorCode; /*!< MMC RPMB Area Error codes */ 140 141 HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */ 142 143 uint32_t CSD[4U]; /*!< MMC card specific data table */ 144 145 uint32_t CID[4U]; /*!< MMC card identification number table */ 146 147 uint32_t Ext_CSD[128]; 148 149 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 150 void (* TxCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 151 void (* RxCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 152 void (* ErrorCallback)(struct __MMC_HandleTypeDef *hmmc); 153 void (* AbortCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 154 void (* Read_DMALnkLstBufCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 155 void (* Write_DMALnkLstBufCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 156 157 void (* MspInitCallback)(struct __MMC_HandleTypeDef *hmmc); 158 void (* MspDeInitCallback)(struct __MMC_HandleTypeDef *hmmc); 159 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 160 } MMC_HandleTypeDef; 161 162 163 /** 164 * @} 165 */ 166 167 /** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register 168 * @{ 169 */ 170 typedef struct 171 { 172 __IO uint8_t CSDStruct; /*!< CSD structure */ 173 __IO uint8_t SysSpecVersion; /*!< System specification version */ 174 __IO uint8_t Reserved1; /*!< Reserved */ 175 __IO uint8_t TAAC; /*!< Data read access time 1 */ 176 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ 177 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ 178 __IO uint16_t CardComdClasses; /*!< Card command classes */ 179 __IO uint8_t RdBlockLen; /*!< Max. read data block length */ 180 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ 181 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ 182 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ 183 __IO uint8_t DSRImpl; /*!< DSR implemented */ 184 __IO uint8_t Reserved2; /*!< Reserved */ 185 __IO uint32_t DeviceSize; /*!< Device Size */ 186 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ 187 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ 188 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ 189 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ 190 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ 191 __IO uint8_t EraseGrSize; /*!< Erase group size */ 192 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ 193 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ 194 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ 195 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ 196 __IO uint8_t WrSpeedFact; /*!< Write speed factor */ 197 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ 198 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ 199 __IO uint8_t Reserved3; /*!< Reserved */ 200 __IO uint8_t ContentProtectAppli; /*!< Content protection application */ 201 __IO uint8_t FileFormatGroup; /*!< File format group */ 202 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ 203 __IO uint8_t PermWrProtect; /*!< Permanent write protection */ 204 __IO uint8_t TempWrProtect; /*!< Temporary write protection */ 205 __IO uint8_t FileFormat; /*!< File format */ 206 __IO uint8_t ECC; /*!< ECC code */ 207 __IO uint8_t CSD_CRC; /*!< CSD CRC */ 208 __IO uint8_t Reserved4; /*!< Always 1 */ 209 210 } HAL_MMC_CardCSDTypeDef; 211 /** 212 * @} 213 */ 214 215 /** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register 216 * @{ 217 */ 218 typedef struct 219 { 220 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ 221 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ 222 __IO uint32_t ProdName1; /*!< Product Name part1 */ 223 __IO uint8_t ProdName2; /*!< Product Name part2 */ 224 __IO uint8_t ProdRev; /*!< Product Revision */ 225 __IO uint32_t ProdSN; /*!< Product Serial Number */ 226 __IO uint8_t Reserved1; /*!< Reserved1 */ 227 __IO uint16_t ManufactDate; /*!< Manufacturing Date */ 228 __IO uint8_t CID_CRC; /*!< CID CRC */ 229 __IO uint8_t Reserved2; /*!< Always 1 */ 230 231 } HAL_MMC_CardCIDTypeDef; 232 /** 233 * @} 234 */ 235 236 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 237 /** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition 238 * @{ 239 */ 240 typedef enum 241 { 242 HAL_MMC_TX_CPLT_CB_ID = 0x00U, /*!< MMC Tx Complete Callback ID */ 243 HAL_MMC_RX_CPLT_CB_ID = 0x01U, /*!< MMC Rx Complete Callback ID */ 244 HAL_MMC_ERROR_CB_ID = 0x02U, /*!< MMC Error Callback ID */ 245 HAL_MMC_ABORT_CB_ID = 0x03U, /*!< MMC Abort Callback ID */ 246 HAL_MMC_READ_DMA_LNKLST_BUF_CPLT_CB_ID = 0x04U, /*!< MMC DMA Rx Linked List Node buffer Callback ID */ 247 HAL_MMC_WRITE_DMA_LNKLST_BUF_CPLT_CB_ID = 0x05U, /*!< MMC DMA Tx Linked List Node buffer Callback ID */ 248 249 HAL_MMC_MSP_INIT_CB_ID = 0x10U, /*!< MMC MspInit Callback ID */ 250 HAL_MMC_MSP_DEINIT_CB_ID = 0x11U /*!< MMC MspDeInit Callback ID */ 251 } HAL_MMC_CallbackIDTypeDef; 252 /** 253 * @} 254 */ 255 256 /** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition 257 * @{ 258 */ 259 typedef void (*pMMC_CallbackTypeDef)(MMC_HandleTypeDef *hmmc); 260 /** 261 * @} 262 */ 263 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 264 /** 265 * @} 266 */ 267 268 /* Exported constants --------------------------------------------------------*/ 269 /** @defgroup MMC_Exported_Constants Exported Constants 270 * @{ 271 */ 272 273 #define MMC_BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */ 274 275 /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition 276 * @{ 277 */ 278 #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ 279 #define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ 280 #define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ 281 #define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ 282 #define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ 283 #define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ 284 #define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ 285 #define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ 286 #define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the */ 287 /*!< number of transferred bytes does not match the block length */ 288 #define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ 289 #define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ 290 #define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ 291 #define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock */ 292 /*!< command or if there was an attempt to access a locked card */ 293 #define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ 294 #define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ 295 #define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ 296 #define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ 297 #define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ 298 #define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ 299 #define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ 300 #define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ 301 #define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ 302 #define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ 303 #define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out */ 304 /*!< of erase sequence command was received */ 305 #define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ 306 #define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ 307 #define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ 308 #define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ 309 #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ 310 #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ 311 #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ 312 #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ 313 #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ 314 /*!< response results after operating with RPMB partition */ 315 #define HAL_MMC_ERROR_RPMB_OPERATION_OK 0x0000U /*!< Operation OK */ 316 #define HAL_MMC_ERROR_RPMB_GENERAL_FAILURE 0x0001U /*!< General failure */ 317 #define HAL_MMC_ERROR_RPMB_AUTHENTICATION_FAILURE 0x0002U /*!< Authentication failure */ 318 #define HAL_MMC_ERROR_RPMB_COUNTER_FAILURE 0x0003U /*!< Counter failure */ 319 #define HAL_MMC_ERROR_RPMB_ADDRESS_FAILURE 0x0004U /*!< Address failure */ 320 #define HAL_MMC_ERROR_RPMB_WRITE_FAILURE 0x0005U /*!< Write failure */ 321 #define HAL_MMC_ERROR_RPMB_READ_FAILURE 0x0006U /*!< Read failure */ 322 #define HAL_MMC_ERROR_RPMB_KEY_NOT_YET_PROG 0x0007U /*!< Authentication Key not yet programmed */ 323 #define HAL_MMC_ERROR_RPMB_COUNTER_EXPIRED 0x0080U /*!< Write Counter has expired i.e. reached its max value */ 324 325 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 326 #define HAL_MMC_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ 327 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 328 /** 329 * @} 330 */ 331 332 /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration 333 * @{ 334 */ 335 #define MMC_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */ 336 #define MMC_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */ 337 #define MMC_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */ 338 #define MMC_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */ 339 #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */ 340 #define MMC_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */ 341 #define MMC_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */ 342 343 /** 344 * @} 345 */ 346 347 /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode 348 * @{ 349 */ 350 /** 351 * @brief 352 */ 353 #define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< High voltage in byte mode */ 354 #define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< Dual voltage in byte mode */ 355 #define MMC_LOW_VOLTAGE_RANGE 0x80000080U /*!< Low voltage in byte mode */ 356 #define EMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< High voltage in sector mode */ 357 #define EMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< Dual voltage in sector mode */ 358 #define EMMC_LOW_VOLTAGE_RANGE 0xC0000080U /*!< Low voltage in sector mode */ 359 #define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U 360 /** 361 * @} 362 */ 363 364 /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards 365 * @{ 366 */ 367 #define MMC_LOW_CAPACITY_CARD ((uint32_t)0x00000000U) /*!< MMC Card Capacity <=2Gbytes */ 368 #define MMC_HIGH_CAPACITY_CARD ((uint32_t)0x00000001U) /*!< MMC Card Capacity >2Gbytes and <2Tbytes */ 369 370 /** 371 * @} 372 */ 373 374 /** @defgroup MMC_Exported_Constansts_Group5 MMC Erase Type 375 * @{ 376 */ 377 #define HAL_MMC_ERASE 0x00000000U /*!< Erase the erase groups identified by CMD35 & 36 */ 378 #define HAL_MMC_TRIM 0x00000001U /*!< Erase the write blocks identified by CMD35 & 36 */ 379 #define HAL_MMC_DISCARD 0x00000003U /*!< Discard the write blocks identified by CMD35 & 36 */ 380 #define HAL_MMC_SECURE_ERASE 0x80000000U /*!< Perform a secure purge according SRT on the erase groups identified by CMD35 & 36 */ 381 #define HAL_MMC_SECURE_TRIM_STEP1 0x80000001U /*!< Mark the write blocks identified by CMD35 & 36 for secure erase */ 382 #define HAL_MMC_SECURE_TRIM_STEP2 0x80008000U /*!< Perform a secure purge according SRT on the write blocks previously identified */ 383 384 #define IS_MMC_ERASE_TYPE(TYPE) (((TYPE) == HAL_MMC_ERASE) || \ 385 ((TYPE) == HAL_MMC_TRIM) || \ 386 ((TYPE) == HAL_MMC_DISCARD) || \ 387 ((TYPE) == HAL_MMC_SECURE_ERASE) || \ 388 ((TYPE) == HAL_MMC_SECURE_TRIM_STEP1) || \ 389 ((TYPE) == HAL_MMC_SECURE_TRIM_STEP2)) 390 /** 391 * @} 392 */ 393 394 /** @defgroup MMC_Exported_Constansts_Group6 MMC Secure Removal Type 395 * @{ 396 */ 397 #define HAL_MMC_SRT_ERASE 0x00000001U /*!< Information removed by an erase */ 398 #define HAL_MMC_SRT_WRITE_CHAR_ERASE 0x00000002U /*!< Information removed by an overwriting with a character followed by an erase */ 399 #define HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM 0x00000004U /*!< Information removed by an overwriting with a character, its complement then a random character */ 400 #define HAL_MMC_SRT_VENDOR_DEFINED 0x00000008U /*!< Information removed using a vendor defined */ 401 402 403 #define IS_MMC_SRT_TYPE(TYPE) (((TYPE) == HAL_MMC_SRT_ERASE) || \ 404 ((TYPE) == HAL_MMC_SRT_WRITE_CHAR_ERASE) || \ 405 ((TYPE) == HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM) || \ 406 ((TYPE) == HAL_MMC_SRT_VENDOR_DEFINED)) 407 /** 408 * @} 409 */ 410 411 /** @defgroup MMC_Exported_Constansts_Group7 MMC Partitions types 412 * @{ 413 */ 414 typedef uint32_t HAL_MMC_PartitionTypeDef; 415 416 #define HAL_MMC_USER_AREA_PARTITION 0x00000000U /*!< User area partition */ 417 #define HAL_MMC_BOOT_PARTITION1 0x00000100U /*!< Boot partition 1 */ 418 #define HAL_MMC_BOOT_PARTITION2 0x00000200U /*!< Boot partition 2 */ 419 #define HAL_MMC_RPMB_PARTITION 0x00000300U /*!< RPMB partition */ 420 /** 421 * @} 422 */ 423 424 /** 425 * @} 426 */ 427 428 /* Exported macro ------------------------------------------------------------*/ 429 /** @defgroup MMC_Exported_macros MMC Exported Macros 430 * @brief macros to handle interrupts and specific clock configurations 431 * @{ 432 */ 433 /** @brief Reset MMC handle state. 434 * @param __HANDLE__ MMC Handle. 435 * @retval None 436 */ 437 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 438 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) do { \ 439 (__HANDLE__)->State = HAL_MMC_STATE_RESET; \ 440 (__HANDLE__)->MspInitCallback = NULL; \ 441 (__HANDLE__)->MspDeInitCallback = NULL; \ 442 } while(0) 443 #else 444 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_MMC_STATE_RESET) 445 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 446 447 /** 448 * @brief Enable the MMC device interrupt. 449 * @param __HANDLE__ MMC Handle. 450 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled. 451 * This parameter can be one or a combination of the following values: 452 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 453 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 454 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 455 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 456 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 457 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 458 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 459 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 460 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 461 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 462 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 463 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 464 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 465 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 466 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 467 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 468 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 469 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 470 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 471 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 472 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 473 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 474 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 475 * @retval None 476 */ 477 #define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 478 479 /** 480 * @brief Disable the MMC device interrupt. 481 * @param __HANDLE__ MMC Handle. 482 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled. 483 * This parameter can be one or a combination of the following values: 484 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 485 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 486 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 487 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 488 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 489 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 490 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 491 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 492 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 493 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 494 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 495 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 496 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 497 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 498 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 499 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 500 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 501 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 502 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 503 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 504 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 505 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 506 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 507 * @retval None 508 */ 509 #define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 510 511 /** 512 * @brief Check whether the specified MMC flag is set or not. 513 * @param __HANDLE__ MMC Handle. 514 * @param __FLAG__ specifies the flag to check. 515 * This parameter can be one of the following values: 516 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 517 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 518 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 519 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 520 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 521 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 522 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 523 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 524 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 525 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 526 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 527 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 528 * @arg SDMMC_FLAG_DPSMACT: Data path state machine active 529 * @arg SDMMC_FLAG_CPSMACT: Command path state machine active 530 * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty 531 * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full 532 * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full 533 * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full 534 * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty 535 * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty 536 * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy) 537 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 538 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 539 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 540 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 541 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 542 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 543 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 544 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 545 * @retval The new state of MMC FLAG (SET or RESET). 546 */ 547 #define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) 548 549 /** 550 * @brief Clear the MMC's pending flags. 551 * @param __HANDLE__ MMC Handle. 552 * @param __FLAG__ specifies the flag to clear. 553 * This parameter can be one or a combination of the following values: 554 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 555 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 556 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 557 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 558 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 559 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 560 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 561 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 562 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 563 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 564 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 565 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 566 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 567 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 568 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 569 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 570 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 571 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 572 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 573 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 574 * @retval None 575 */ 576 #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) 577 578 /** 579 * @brief Check whether the specified MMC interrupt has occurred or not. 580 * @param __HANDLE__ MMC Handle. 581 * @param __INTERRUPT__ specifies the SDMMC interrupt source to check. 582 * This parameter can be one of the following values: 583 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 584 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 585 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 586 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 587 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 588 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 589 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 590 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 591 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 592 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 593 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 594 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 595 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 596 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 597 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 598 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 599 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 600 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 601 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 602 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 603 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 604 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 605 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 606 * @retval The new state of MMC IT (SET or RESET). 607 */ 608 #define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 609 610 /** 611 * @brief Clear the MMC's interrupt pending bits. 612 * @param __HANDLE__ MMC Handle. 613 * @param __INTERRUPT__ specifies the interrupt pending bit to clear. 614 * This parameter can be one or a combination of the following values: 615 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 616 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 617 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 618 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 619 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 620 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 621 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 622 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 623 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 624 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 625 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 626 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 627 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 628 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 629 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 630 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 631 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 632 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 633 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 634 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 635 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 636 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 637 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 638 * @retval None 639 */ 640 #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 641 642 /** 643 * @} 644 */ 645 646 /* Include MMC HAL Extension module */ 647 #include "stm32u5xx_hal_mmc_ex.h" 648 649 /* Exported functions --------------------------------------------------------*/ 650 /** @defgroup MMC_Exported_Functions MMC Exported Functions 651 * @{ 652 */ 653 654 /** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions 655 * @{ 656 */ 657 HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc); 658 HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc); 659 HAL_StatusTypeDef HAL_MMC_DeInit(MMC_HandleTypeDef *hmmc); 660 void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc); 661 void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc); 662 663 /** 664 * @} 665 */ 666 667 /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions 668 * @{ 669 */ 670 /* Blocking mode: Polling */ 671 HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, 672 uint32_t NumberOfBlocks, 673 uint32_t Timeout); 674 HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd, 675 uint32_t NumberOfBlocks, uint32_t Timeout); 676 HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd); 677 /* Non-Blocking mode: IT */ 678 HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, 679 uint32_t NumberOfBlocks); 680 HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd, 681 uint32_t NumberOfBlocks); 682 /* Non-Blocking mode: DMA */ 683 HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, 684 uint32_t NumberOfBlocks); 685 HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd, 686 uint32_t NumberOfBlocks); 687 688 void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc); 689 690 /* Callback in non blocking modes (DMA) */ 691 void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc); 692 void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc); 693 void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc); 694 void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc); 695 696 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 697 /* MMC callback registering/unregistering */ 698 HAL_StatusTypeDef HAL_MMC_RegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, 699 pMMC_CallbackTypeDef pCallback); 700 HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId); 701 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 702 /** 703 * @} 704 */ 705 706 /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions 707 * @{ 708 */ 709 HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode); 710 HAL_StatusTypeDef HAL_MMC_ConfigSpeedBusOperation(MMC_HandleTypeDef *hmmc, uint32_t SpeedMode); 711 HAL_StatusTypeDef HAL_MMC_SwitchPartition(MMC_HandleTypeDef *hmmc, HAL_MMC_PartitionTypeDef Partition); 712 /** 713 * @} 714 */ 715 716 /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions 717 * @{ 718 */ 719 HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc); 720 HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID); 721 HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD); 722 HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo); 723 HAL_StatusTypeDef HAL_MMC_GetCardExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pExtCSD, uint32_t Timeout); 724 /** 725 * @} 726 */ 727 728 /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions 729 * @{ 730 */ 731 HAL_MMC_StateTypeDef HAL_MMC_GetState(const MMC_HandleTypeDef *hmmc); 732 uint32_t HAL_MMC_GetError(const MMC_HandleTypeDef *hmmc); 733 uint32_t HAL_MMC_GetRPMBError(const MMC_HandleTypeDef *hmmc); 734 /** 735 * @} 736 */ 737 738 /** @defgroup MMC_Exported_Functions_Group6 Peripheral Abort management 739 * @{ 740 */ 741 HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc); 742 HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc); 743 /** 744 * @} 745 */ 746 747 /** @defgroup MMC_Exported_Functions_Group7 Peripheral Erase management 748 * @{ 749 */ 750 HAL_StatusTypeDef HAL_MMC_EraseSequence(MMC_HandleTypeDef *hmmc, uint32_t EraseType, uint32_t BlockStartAdd, 751 uint32_t BlockEndAdd); 752 HAL_StatusTypeDef HAL_MMC_Sanitize(MMC_HandleTypeDef *hmmc); 753 HAL_StatusTypeDef HAL_MMC_ConfigSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t SRTMode); 754 HAL_StatusTypeDef HAL_MMC_GetSupportedSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t *SupportedSRT); 755 /** 756 * @} 757 */ 758 759 /** @defgroup MMC_Exported_Functions_Group8 Peripheral Sleep management 760 * @{ 761 */ 762 HAL_StatusTypeDef HAL_MMC_SleepDevice(MMC_HandleTypeDef *hmmc); 763 HAL_StatusTypeDef HAL_MMC_AwakeDevice(MMC_HandleTypeDef *hmmc); 764 /** 765 * @} 766 */ 767 768 /** @defgroup MMC_Exported_Functions_Group9 Replay Protected Memory Block management 769 * @{ 770 */ 771 HAL_StatusTypeDef HAL_MMC_RPMB_ProgramAuthenticationKey(MMC_HandleTypeDef *hmmc, const uint8_t *pKey, uint32_t Timeout); 772 HAL_StatusTypeDef HAL_MMC_RPMB_ProgramAuthenticationKey_IT(MMC_HandleTypeDef *hmmc, const uint8_t *pKey, 773 uint32_t Timeout); 774 uint32_t HAL_MMC_RPMB_GetWriteCounter(MMC_HandleTypeDef *hmmc, uint8_t *pNonce, uint32_t Timeout); 775 uint32_t HAL_MMC_RPMB_GetWriteCounter_IT(MMC_HandleTypeDef *hmmc, uint8_t *pNonce); 776 HAL_StatusTypeDef HAL_MMC_RPMB_WriteBlocks(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint16_t BlockAdd, 777 uint16_t NumberOfBlocks, const uint8_t *pMAC, uint32_t Timeout); 778 HAL_StatusTypeDef HAL_MMC_RPMB_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint16_t BlockAdd, 779 uint16_t NumberOfBlocks, const uint8_t *pMAC); 780 HAL_StatusTypeDef HAL_MMC_RPMB_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint16_t BlockAdd, 781 uint16_t NumberOfBlocks, const uint8_t *pNonce, uint8_t *pMAC, 782 uint32_t Timeout); 783 HAL_StatusTypeDef HAL_MMC_RPMB_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint16_t BlockAdd, 784 uint16_t NumberOfBlocks, const uint8_t *pNonce, uint8_t *pMAC); 785 786 /** 787 * @} 788 */ 789 790 /* Private types -------------------------------------------------------------*/ 791 /** @defgroup MMC_Private_Types MMC Private Types 792 * @{ 793 */ 794 795 /** 796 * @} 797 */ 798 799 /* Private defines -----------------------------------------------------------*/ 800 /** @defgroup MMC_Private_Defines MMC Private Defines 801 * @{ 802 */ 803 #define MMC_EXT_CSD_DATA_SEC_SIZE_INDEX 61 804 #define MMC_EXT_CSD_DATA_SEC_SIZE_POS 8 805 /** 806 * @} 807 */ 808 809 /* Private variables ---------------------------------------------------------*/ 810 /** @defgroup MMC_Private_Variables MMC Private Variables 811 * @{ 812 */ 813 814 /** 815 * @} 816 */ 817 818 /* Private constants ---------------------------------------------------------*/ 819 /** @defgroup MMC_Private_Constants MMC Private Constants 820 * @{ 821 */ 822 823 /** 824 * @} 825 */ 826 827 /* Private macros ------------------------------------------------------------*/ 828 /** @defgroup MMC_Private_Macros MMC Private Macros 829 * @{ 830 */ 831 832 /** 833 * @} 834 */ 835 836 /* Private functions prototypes ----------------------------------------------*/ 837 /** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes 838 * @{ 839 */ 840 841 /** 842 * @} 843 */ 844 845 /* Private functions ---------------------------------------------------------*/ 846 /** @defgroup MMC_Private_Functions MMC Private Functions 847 * @{ 848 */ 849 850 /** 851 * @} 852 */ 853 854 855 /** 856 * @} 857 */ 858 859 /** 860 * @} 861 */ 862 #endif /* SDMMC1 || SDMMC2 */ 863 864 /** 865 * @} 866 */ 867 868 #ifdef __cplusplus 869 } 870 #endif 871 872 873 #endif /* STM32U5xx_HAL_MMC_H */ 874
