1 /** 2 ****************************************************************************** 3 * @file stm32mp1xx_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32MP1xx_HAL_UART_H 21 #define STM32MP1xx_HAL_UART_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32mp1xx_hal_def.h" 29 30 /** @addtogroup STM32MP1xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UART 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UART_Exported_Types UART Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART Init Structure definition 45 */ 46 typedef struct 47 { 48 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 49 The baud rate register is computed using the following formula: 50 - If oversampling is 16 or in LIN mode, 51 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) 52 - If oversampling is 8, 53 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[15:4] 54 Baud Rate Register[3] = 0 55 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[3:0]) >> 1 56 where uart_ker_ck_pres is the UART input clock divided by a prescaler */ 57 58 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 59 This parameter can be a value of @ref UARTEx_Word_Length. */ 60 61 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 62 This parameter can be a value of @ref UART_Stop_Bits. */ 63 64 uint32_t Parity; /*!< Specifies the parity mode. 65 This parameter can be a value of @ref UART_Parity 66 @note When parity is enabled, the computed parity is inserted 67 at the MSB position of the transmitted data (9th bit when 68 the word length is set to 9 data bits; 8th bit when the 69 word length is set to 8 data bits). */ 70 71 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 72 This parameter can be a value of @ref UART_Mode. */ 73 74 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 75 or disabled. 76 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 77 78 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8). 79 This parameter can be a value of @ref UART_Over_Sampling. */ 80 81 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 82 Selecting the single sample method increases the receiver tolerance to clock 83 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 84 85 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. 86 This parameter can be a value of @ref UART_ClockPrescaler. */ 87 88 } UART_InitTypeDef; 89 90 /** 91 * @brief UART Advanced Features initialization structure definition 92 */ 93 typedef struct 94 { 95 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 96 Advanced Features may be initialized at the same time . 97 This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */ 98 99 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 100 This parameter can be a value of @ref UART_Tx_Inv. */ 101 102 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 103 This parameter can be a value of @ref UART_Rx_Inv. */ 104 105 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 106 vs negative/inverted logic). 107 This parameter can be a value of @ref UART_Data_Inv. */ 108 109 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 110 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 111 112 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 113 This parameter can be a value of @ref UART_Overrun_Disable. */ 114 115 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 116 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 117 118 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 119 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 120 121 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 122 detection is carried out. 123 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 124 125 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 126 This parameter can be a value of @ref UART_MSB_First. */ 127 } UART_AdvFeatureInitTypeDef; 128 129 /** 130 * @brief HAL UART State definition 131 * @note HAL UART State value is a combination of 2 different substates: gState and RxState (see @ref UART_State_Definition). 132 * - gState contains UART state information related to global Handle management 133 * and also information related to Tx operations. 134 * gState value coding follow below described bitmap : 135 * b7-b6 Error information 136 * 00 : No Error 137 * 01 : (Not Used) 138 * 10 : Timeout 139 * 11 : Error 140 * b5 Peripheral initialization status 141 * 0 : Reset (Peripheral not initialized) 142 * 1 : Init done (Peripheral not initialized. HAL UART Init function already called) 143 * b4-b3 (not used) 144 * xx : Should be set to 00 145 * b2 Intrinsic process state 146 * 0 : Ready 147 * 1 : Busy (Peripheral busy with some configuration or internal operations) 148 * b1 (not used) 149 * x : Should be set to 0 150 * b0 Tx state 151 * 0 : Ready (no Tx operation ongoing) 152 * 1 : Busy (Tx operation ongoing) 153 * - RxState contains information related to Rx operations. 154 * RxState value coding follow below described bitmap : 155 * b7-b6 (not used) 156 * xx : Should be set to 00 157 * b5 Peripheral initialization status 158 * 0 : Reset (Peripheral not initialized) 159 * 1 : Init done (Peripheral not initialized) 160 * b4-b2 (not used) 161 * xxx : Should be set to 000 162 * b1 Rx state 163 * 0 : Ready (no Rx operation ongoing) 164 * 1 : Busy (Rx operation ongoing) 165 * b0 (not used) 166 * x : Should be set to 0. 167 */ 168 typedef uint32_t HAL_UART_StateTypeDef; 169 170 /** 171 * @brief UART clock sources definition 172 */ 173 typedef enum 174 { 175 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 176 UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ 177 UART_CLOCKSOURCE_PCLK5 = 0x02U, /*!< PCLK5 clock source (only used by UART1) */ 178 UART_CLOCKSOURCE_PLL3Q = 0x04U, /*!< PLL3Q clock source (only used by UART1) */ 179 UART_CLOCKSOURCE_PLL4Q = 0x08U, /*!< PLL4Q clock source */ 180 UART_CLOCKSOURCE_HSI = 0x10U, /*!< HSI clock source */ 181 UART_CLOCKSOURCE_CSI = 0x20U, /*!< CSI clock source */ 182 UART_CLOCKSOURCE_HSE = 0x40U, /*!< HSE clock source */ 183 UART_CLOCKSOURCE_UNDEFINED = 0x80U /*!< Undefined clock source */ 184 } UART_ClockSourceTypeDef; 185 186 /** 187 * @brief UART handle Structure definition 188 */ 189 typedef struct __UART_HandleTypeDef 190 { 191 USART_TypeDef *Instance; /*!< UART registers base address */ 192 193 UART_InitTypeDef Init; /*!< UART communication parameters */ 194 195 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 196 197 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 198 199 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 200 201 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 202 203 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 204 205 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 206 207 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 208 209 uint16_t Mask; /*!< UART Rx RDR register mask */ 210 211 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. 212 This parameter can be a value of @ref UARTEx_FIFO_mode. */ 213 214 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 215 216 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 217 218 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 219 220 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 221 222 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 223 224 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 225 226 #ifdef HAL_MDMA_MODULE_ENABLED 227 MDMA_HandleTypeDef *hmdmatx; /*!< UART Tx MDMA Handle parameters */ 228 229 MDMA_HandleTypeDef *hmdmarx; /*!< UART Rx MDMA Handle parameters */ 230 #endif /* HAL_MDMA_MODULE_ENABLED */ 231 232 HAL_LockTypeDef Lock; /*!< Locking object */ 233 234 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 235 and also related to Tx operations. 236 This parameter can be a value of @ref HAL_UART_StateTypeDef */ 237 238 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. 239 This parameter can be a value of @ref HAL_UART_StateTypeDef */ 240 241 __IO uint32_t ErrorCode; /*!< UART Error code */ 242 243 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 244 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 245 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 246 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 247 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 248 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 249 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 250 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 251 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 252 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 253 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ 254 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ 255 256 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 257 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 258 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 259 260 } UART_HandleTypeDef; 261 262 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 263 /** 264 * @brief HAL UART Callback ID enumeration definition 265 */ 266 typedef enum 267 { 268 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 269 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 270 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 271 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 272 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 273 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 274 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 275 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 276 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 277 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ 278 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ 279 280 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 281 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 282 283 } HAL_UART_CallbackIDTypeDef; 284 285 /** 286 * @brief HAL UART Callback pointer definition 287 */ 288 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 289 290 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 291 292 /** 293 * @} 294 */ 295 296 /* Exported constants --------------------------------------------------------*/ 297 /** @defgroup UART_Exported_Constants UART Exported Constants 298 * @{ 299 */ 300 301 /** @defgroup UART_State_Definition UART State Code Definition 302 * @{ 303 */ 304 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 305 Value is allowed for gState and RxState */ 306 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 307 Value is allowed for gState and RxState */ 308 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 309 Value is allowed for gState only */ 310 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 311 Value is allowed for gState only */ 312 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 313 Value is allowed for RxState only */ 314 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 315 Not to be used for neither gState nor RxState. 316 Value is result of combination (Or) between gState and RxState values */ 317 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 318 Value is allowed for gState only */ 319 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 320 Value is allowed for gState only */ 321 /** 322 * @} 323 */ 324 325 /** @defgroup UART_Error_Definition UART Error Definition 326 * @{ 327 */ 328 #define HAL_UART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ 329 #define HAL_UART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */ 330 #define HAL_UART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */ 331 #define HAL_UART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */ 332 #define HAL_UART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */ 333 #define HAL_UART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */ 334 #define HAL_UART_ERROR_RTO ((uint32_t)0x00000020U) /*!< Receiver Timeout error */ 335 336 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 337 #define HAL_UART_ERROR_INVALID_CALLBACK ((uint32_t)0x00000040U) /*!< Invalid Callback error */ 338 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 339 /** 340 * @} 341 */ 342 343 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 344 * @{ 345 */ 346 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 347 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 348 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 349 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 350 /** 351 * @} 352 */ 353 354 /** @defgroup UART_Parity UART Parity 355 * @{ 356 */ 357 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 358 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 359 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 360 /** 361 * @} 362 */ 363 364 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 365 * @{ 366 */ 367 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 368 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 369 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 370 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 371 /** 372 * @} 373 */ 374 375 /** @defgroup UART_Mode UART Transfer Mode 376 * @{ 377 */ 378 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 379 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 380 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 381 /** 382 * @} 383 */ 384 385 /** @defgroup UART_State UART State 386 * @{ 387 */ 388 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 389 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 390 /** 391 * @} 392 */ 393 394 /** @defgroup UART_Over_Sampling UART Over Sampling 395 * @{ 396 */ 397 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 398 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 399 /** 400 * @} 401 */ 402 403 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 404 * @{ 405 */ 406 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 407 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 408 /** 409 * @} 410 */ 411 412 /** @defgroup UART_ClockPrescaler UART Clock Prescaler 413 * @{ 414 */ 415 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 416 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 417 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 418 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 419 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 420 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 421 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 422 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 423 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 424 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 425 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 426 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 427 /** 428 * @} 429 */ 430 431 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 432 * @{ 433 */ 434 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection on start bit */ 435 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection on falling edge */ 436 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection on 0x7F frame detection */ 437 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection on 0x55 frame detection */ 438 /** 439 * @} 440 */ 441 442 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout 443 * @{ 444 */ 445 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ 446 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ 447 /** 448 * @} 449 */ 450 451 /** @defgroup UART_LIN UART Local Interconnection Network mode 452 * @{ 453 */ 454 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 455 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 456 /** 457 * @} 458 */ 459 460 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 461 * @{ 462 */ 463 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 464 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 465 /** 466 * @} 467 */ 468 469 /** @defgroup UART_DMA_Tx UART DMA Tx 470 * @{ 471 */ 472 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 473 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 474 /** 475 * @} 476 */ 477 478 /** @defgroup UART_DMA_Rx UART DMA Rx 479 * @{ 480 */ 481 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 482 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 483 /** 484 * @} 485 */ 486 487 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 488 * @{ 489 */ 490 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 491 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 492 /** 493 * @} 494 */ 495 496 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 497 * @{ 498 */ 499 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 500 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 501 /** 502 * @} 503 */ 504 505 /** @defgroup UART_Request_Parameters UART Request Parameters 506 * @{ 507 */ 508 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 509 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 510 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 511 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 512 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 513 /** 514 * @} 515 */ 516 517 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 518 * @{ 519 */ 520 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 521 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 522 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 523 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 524 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 525 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 526 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 527 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 528 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 529 /** 530 * @} 531 */ 532 533 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 534 * @{ 535 */ 536 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 537 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 538 /** 539 * @} 540 */ 541 542 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 543 * @{ 544 */ 545 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 546 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 547 /** 548 * @} 549 */ 550 551 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 552 * @{ 553 */ 554 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 555 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 556 /** 557 * @} 558 */ 559 560 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 561 * @{ 562 */ 563 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 564 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 565 /** 566 * @} 567 */ 568 569 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 570 * @{ 571 */ 572 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 573 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 574 /** 575 * @} 576 */ 577 578 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 579 * @{ 580 */ 581 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 582 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 583 /** 584 * @} 585 */ 586 587 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 588 * @{ 589 */ 590 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 591 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 592 /** 593 * @} 594 */ 595 596 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 597 * @{ 598 */ 599 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received first disable */ 600 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received first enable */ 601 /** 602 * @} 603 */ 604 605 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 606 * @{ 607 */ 608 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 609 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 610 /** 611 * @} 612 */ 613 614 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 615 * @{ 616 */ 617 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 618 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 619 /** 620 * @} 621 */ 622 623 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 624 * @{ 625 */ 626 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 627 /** 628 * @} 629 */ 630 631 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 632 * @{ 633 */ 634 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 635 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 636 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register not empty or RXFIFO is not empty */ 637 /** 638 * @} 639 */ 640 641 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 642 * @{ 643 */ 644 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 645 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 646 /** 647 * @} 648 */ 649 650 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 651 * @{ 652 */ 653 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB position in CR1 register */ 654 /** 655 * @} 656 */ 657 658 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 659 * @{ 660 */ 661 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB position in CR1 register */ 662 /** 663 * @} 664 */ 665 666 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 667 * @{ 668 */ 669 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 670 /** 671 * @} 672 */ 673 674 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 675 * @{ 676 */ 677 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 678 /** 679 * @} 680 */ 681 682 /** @defgroup UART_Flags UART Status Flags 683 * Elements values convention: 0xXXXX 684 * - 0xXXXX : Flag mask in the ISR register 685 * @{ 686 */ 687 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ 688 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ 689 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ 690 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ 691 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 692 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 693 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 694 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 695 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 696 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 697 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 698 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 699 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 700 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 701 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 702 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 703 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 704 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ 705 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ 706 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 707 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ 708 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ 709 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 710 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 711 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 712 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 713 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 714 /** 715 * @} 716 */ 717 718 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 719 * Elements values convention: 000ZZZZZ0XXYYYYYb 720 * - YYYYY : Interrupt source position in the XX register (5bits) 721 * - XX : Interrupt source register (2bits) 722 * - 01: CR1 register 723 * - 10: CR2 register 724 * - 11: CR3 register 725 * - ZZZZZ : Flag position in the ISR register(5bits) 726 * Elements values convention: 000000000XXYYYYYb 727 * - YYYYY : Interrupt source position in the XX register (5bits) 728 * - XX : Interrupt source register (2bits) 729 * - 01: CR1 register 730 * - 10: CR2 register 731 * - 11: CR3 register 732 * Elements values convention: 0000ZZZZ00000000b 733 * - ZZZZ : Flag position in the ISR register(4bits) 734 * @{ 735 */ 736 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 737 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 738 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ 739 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 740 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 741 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ 742 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 743 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 744 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 745 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 746 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 747 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ 748 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ 749 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ 750 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ 751 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ 752 753 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 754 755 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 756 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 757 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 758 /** 759 * @} 760 */ 761 762 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 763 * @{ 764 */ 765 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 766 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 767 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 768 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 769 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 770 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ 771 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 772 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 773 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 774 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 775 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 776 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ 777 /** 778 * @} 779 */ 780 781 782 /** 783 * @} 784 */ 785 786 /* Exported macros -----------------------------------------------------------*/ 787 /** @defgroup UART_Exported_Macros UART Exported Macros 788 * @{ 789 */ 790 791 /** @brief Reset UART handle states. 792 * @param __HANDLE__ UART handle. 793 * @retval None 794 */ 795 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 796 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 797 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 798 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 799 (__HANDLE__)->MspInitCallback = NULL; \ 800 (__HANDLE__)->MspDeInitCallback = NULL; \ 801 } while(0U) 802 #else 803 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 804 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 805 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 806 } while(0U) 807 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 808 809 /** @brief Flush the UART Data registers. 810 * @param __HANDLE__ specifies the UART Handle. 811 * @retval None 812 */ 813 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 814 do{ \ 815 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 816 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 817 } while(0U) 818 819 /** @brief Clear the specified UART pending flag. 820 * @param __HANDLE__ specifies the UART Handle. 821 * @param __FLAG__ specifies the flag to check. 822 * This parameter can be any combination of the following values: 823 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 824 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 825 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 826 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 827 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 828 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag 829 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 830 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag 831 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 832 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 833 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 834 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 835 * @retval None 836 */ 837 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 838 839 /** @brief Clear the UART PE pending flag. 840 * @param __HANDLE__ specifies the UART Handle. 841 * @retval None 842 */ 843 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 844 845 /** @brief Clear the UART FE pending flag. 846 * @param __HANDLE__ specifies the UART Handle. 847 * @retval None 848 */ 849 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 850 851 /** @brief Clear the UART NE pending flag. 852 * @param __HANDLE__ specifies the UART Handle. 853 * @retval None 854 */ 855 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 856 857 /** @brief Clear the UART ORE pending flag. 858 * @param __HANDLE__ specifies the UART Handle. 859 * @retval None 860 */ 861 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 862 863 /** @brief Clear the UART IDLE pending flag. 864 * @param __HANDLE__ specifies the UART Handle. 865 * @retval None 866 */ 867 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 868 869 /** @brief Clear the UART TX FIFO empty clear flag. 870 * @param __HANDLE__ specifies the UART Handle. 871 * @retval None 872 */ 873 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) 874 875 /** @brief Check whether the specified UART flag is set or not. 876 * @param __HANDLE__ specifies the UART Handle. 877 * @param __FLAG__ specifies the flag to check. 878 * This parameter can be one of the following values: 879 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag 880 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag 881 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag 882 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag 883 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 884 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 885 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 886 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 887 * @arg @ref UART_FLAG_SBKF Send Break flag 888 * @arg @ref UART_FLAG_CMF Character match flag 889 * @arg @ref UART_FLAG_BUSY Busy flag 890 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 891 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 892 * @arg @ref UART_FLAG_CTS CTS Change flag 893 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 894 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 895 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag 896 * @arg @ref UART_FLAG_TC Transmission Complete flag 897 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 898 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag 899 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag 900 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 901 * @arg @ref UART_FLAG_ORE Overrun Error flag 902 * @arg @ref UART_FLAG_NE Noise Error flag 903 * @arg @ref UART_FLAG_FE Framing Error flag 904 * @arg @ref UART_FLAG_PE Parity Error flag 905 * @retval The new state of __FLAG__ (TRUE or FALSE). 906 */ 907 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 908 909 /** @brief Enable the specified UART interrupt. 910 * @param __HANDLE__ specifies the UART Handle. 911 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 912 * This parameter can be one of the following values: 913 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 914 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 915 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 916 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 917 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 918 * @arg @ref UART_IT_CM Character match interrupt 919 * @arg @ref UART_IT_CTS CTS change interrupt 920 * @arg @ref UART_IT_LBD LIN Break detection interrupt 921 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 922 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 923 * @arg @ref UART_IT_TC Transmission complete interrupt 924 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 925 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 926 * @arg @ref UART_IT_RTO Receive Timeout interrupt 927 * @arg @ref UART_IT_IDLE Idle line detection interrupt 928 * @arg @ref UART_IT_PE Parity Error interrupt 929 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 930 * @retval None 931 */ 932 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 933 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 934 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK)))) 935 936 937 /** @brief Disable the specified UART interrupt. 938 * @param __HANDLE__ specifies the UART Handle. 939 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 940 * This parameter can be one of the following values: 941 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 942 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 943 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 944 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 945 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 946 * @arg @ref UART_IT_CM Character match interrupt 947 * @arg @ref UART_IT_CTS CTS change interrupt 948 * @arg @ref UART_IT_LBD LIN Break detection interrupt 949 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 950 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 951 * @arg @ref UART_IT_TC Transmission complete interrupt 952 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 953 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 954 * @arg @ref UART_IT_RTO Receive Timeout interrupt 955 * @arg @ref UART_IT_IDLE Idle line detection interrupt 956 * @arg @ref UART_IT_PE Parity Error interrupt 957 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 958 * @retval None 959 */ 960 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 961 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 962 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK)))) 963 964 /** @brief Check whether the specified UART interrupt has occurred or not. 965 * @param __HANDLE__ specifies the UART Handle. 966 * @param __INTERRUPT__ specifies the UART interrupt to check. 967 * This parameter can be one of the following values: 968 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 969 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 970 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 971 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 972 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 973 * @arg @ref UART_IT_CM Character match interrupt 974 * @arg @ref UART_IT_CTS CTS change interrupt 975 * @arg @ref UART_IT_LBD LIN Break detection interrupt 976 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 977 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 978 * @arg @ref UART_IT_TC Transmission complete interrupt 979 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 980 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 981 * @arg @ref UART_IT_RTO Receive Timeout interrupt 982 * @arg @ref UART_IT_IDLE Idle line detection interrupt 983 * @arg @ref UART_IT_PE Parity Error interrupt 984 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 985 * @retval The new state of __INTERRUPT__ (SET or RESET). 986 */ 987 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 988 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 989 990 /** @brief Check whether the specified UART interrupt source is enabled or not. 991 * @param __HANDLE__ specifies the UART Handle. 992 * @param __INTERRUPT__ specifies the UART interrupt source to check. 993 * This parameter can be one of the following values: 994 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 995 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 996 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 997 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 998 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 999 * @arg @ref UART_IT_CM Character match interrupt 1000 * @arg @ref UART_IT_CTS CTS change interrupt 1001 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1002 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1003 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1004 * @arg @ref UART_IT_TC Transmission complete interrupt 1005 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1006 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1007 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1008 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1009 * @arg @ref UART_IT_PE Parity Error interrupt 1010 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1011 * @retval The new state of __INTERRUPT__ (SET or RESET). 1012 */ 1013 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ? (__HANDLE__)->Instance->CR1 : \ 1014 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ? (__HANDLE__)->Instance->CR2 : \ 1015 (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__INTERRUPT__)) & UART_IT_MASK))) != RESET) ? SET : RESET) 1016 1017 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1018 * @param __HANDLE__ specifies the UART Handle. 1019 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1020 * to clear the corresponding interrupt 1021 * This parameter can be one of the following values: 1022 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1023 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1024 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1025 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1026 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1027 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag 1028 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag 1029 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1030 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1031 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1032 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1033 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1034 * @retval None 1035 */ 1036 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1037 1038 /** @brief Set a specific UART request flag. 1039 * @param __HANDLE__ specifies the UART Handle. 1040 * @param __REQ__ specifies the request flag to set 1041 * This parameter can be one of the following values: 1042 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1043 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1044 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1045 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1046 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1047 * @retval None 1048 */ 1049 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 1050 1051 /** @brief Enable the UART one bit sample method. 1052 * @param __HANDLE__ specifies the UART Handle. 1053 * @retval None 1054 */ 1055 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1056 1057 /** @brief Disable the UART one bit sample method. 1058 * @param __HANDLE__ specifies the UART Handle. 1059 * @retval None 1060 */ 1061 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1062 1063 /** @brief Enable UART. 1064 * @param __HANDLE__ specifies the UART Handle. 1065 * @retval None 1066 */ 1067 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1068 1069 /** @brief Disable UART. 1070 * @param __HANDLE__ specifies the UART Handle. 1071 * @retval None 1072 */ 1073 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1074 1075 /** @brief Enable CTS flow control. 1076 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1077 * without need to call HAL_UART_Init() function. 1078 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1079 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1080 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1081 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1082 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1083 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1084 * @param __HANDLE__ specifies the UART Handle. 1085 * @retval None 1086 */ 1087 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1088 do{ \ 1089 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1090 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1091 } while(0U) 1092 1093 /** @brief Disable CTS flow control. 1094 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1095 * without need to call HAL_UART_Init() function. 1096 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1097 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1098 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1099 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1100 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1101 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1102 * @param __HANDLE__ specifies the UART Handle. 1103 * @retval None 1104 */ 1105 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1106 do{ \ 1107 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1108 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1109 } while(0U) 1110 1111 /** @brief Enable RTS flow control. 1112 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1113 * without need to call HAL_UART_Init() function. 1114 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1115 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1116 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1117 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1118 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1119 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1120 * @param __HANDLE__ specifies the UART Handle. 1121 * @retval None 1122 */ 1123 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1124 do{ \ 1125 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1126 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1127 } while(0U) 1128 1129 /** @brief Disable RTS flow control. 1130 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1131 * without need to call HAL_UART_Init() function. 1132 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1133 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1134 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1135 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1136 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1137 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1138 * @param __HANDLE__ specifies the UART Handle. 1139 * @retval None 1140 */ 1141 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1142 do{ \ 1143 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1144 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1145 } while(0U) 1146 /** 1147 * @} 1148 */ 1149 1150 /* Private macros --------------------------------------------------------*/ 1151 /** @defgroup UART_Private_Macros UART Private Macros 1152 * @{ 1153 */ 1154 /** @brief Get UART clok division factor from clock prescaler value. 1155 * @param __CLOCKPRESCALER__ UART prescaler value. 1156 * @retval UART clock division factor 1157 */ 1158 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 1159 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ 1160 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ 1161 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ 1162 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ 1163 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ 1164 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ 1165 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ 1166 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ 1167 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ 1168 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ 1169 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \ 1170 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U) 1171 1172 1173 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1174 * @param __PCLK__ UART clock. 1175 * @param __BAUD__ Baud rate set by the user. 1176 * @param __CLOCKPRESCALER__ UART prescaler value. 1177 * @retval Division result 1178 */ 1179 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) (((((__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__)))*2U)\ 1180 + ((__BAUD__)/2U)) / (__BAUD__)) 1181 1182 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1183 * @param __PCLK__ UART clock. 1184 * @param __BAUD__ Baud rate set by the user. 1185 * @param __CLOCKPRESCALER__ UART prescaler value. 1186 * @retval Division result 1187 */ 1188 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__)))\ 1189 + ((__BAUD__)/2U)) / (__BAUD__)) 1190 1191 1192 /** @brief Check UART Baud rate. 1193 * @param __BAUDRATE__ Baudrate specified by the user. 1194 * The maximum Baud Rate is derived from the maximum clock on MP1 (i.e. 100 MHz) 1195 * divided by the smallest oversampling used on the USART (i.e. 8) 1196 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1197 */ 1198 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 12500001U) 1199 1200 /** @brief Check UART assertion time. 1201 * @param __TIME__ 5-bit value assertion time. 1202 * @retval Test result (TRUE or FALSE). 1203 */ 1204 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1205 1206 /** @brief Check UART deassertion time. 1207 * @param __TIME__ 5-bit value deassertion time. 1208 * @retval Test result (TRUE or FALSE). 1209 */ 1210 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1211 1212 /** 1213 * @brief Ensure that UART frame number of stop bits is valid. 1214 * @param __STOPBITS__ UART frame number of stop bits. 1215 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1216 */ 1217 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1218 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1219 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1220 ((__STOPBITS__) == UART_STOPBITS_2)) 1221 1222 1223 /** 1224 * @brief Ensure that UART frame parity is valid. 1225 * @param __PARITY__ UART frame parity. 1226 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1227 */ 1228 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1229 ((__PARITY__) == UART_PARITY_EVEN) || \ 1230 ((__PARITY__) == UART_PARITY_ODD)) 1231 1232 /** 1233 * @brief Ensure that UART hardware flow control is valid. 1234 * @param __CONTROL__ UART hardware flow control. 1235 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1236 */ 1237 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1238 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1239 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1240 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1241 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1242 1243 /** 1244 * @brief Ensure that UART communication mode is valid. 1245 * @param __MODE__ UART communication mode. 1246 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1247 */ 1248 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1249 1250 /** 1251 * @brief Ensure that UART state is valid. 1252 * @param __STATE__ UART state. 1253 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1254 */ 1255 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1256 ((__STATE__) == UART_STATE_ENABLE)) 1257 1258 /** 1259 * @brief Ensure that UART oversampling is valid. 1260 * @param __SAMPLING__ UART oversampling. 1261 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1262 */ 1263 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1264 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1265 1266 /** 1267 * @brief Ensure that UART frame sampling is valid. 1268 * @param __ONEBIT__ UART frame sampling. 1269 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1270 */ 1271 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1272 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1273 1274 /** 1275 * @brief Ensure that UART auto Baud rate detection mode is valid. 1276 * @param __MODE__ UART auto Baud rate detection mode. 1277 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1278 */ 1279 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1280 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1281 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1282 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1283 1284 /** 1285 * @brief Ensure that UART receiver timeout setting is valid. 1286 * @param __TIMEOUT__ UART receiver timeout setting. 1287 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1288 */ 1289 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1290 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1291 1292 /** @brief Check the receiver timeout value. 1293 * @note The maximum UART receiver timeout value is 0xFFFFFF. 1294 * @param __TIMEOUTVALUE__ receiver timeout value. 1295 * @retval Test result (TRUE or FALSE) 1296 */ 1297 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) 1298 1299 /** 1300 * @brief Ensure that UART LIN state is valid. 1301 * @param __LIN__ UART LIN state. 1302 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1303 */ 1304 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1305 ((__LIN__) == UART_LIN_ENABLE)) 1306 1307 /** 1308 * @brief Ensure that UART LIN break detection length is valid. 1309 * @param __LENGTH__ UART LIN break detection length. 1310 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1311 */ 1312 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1313 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1314 1315 /** 1316 * @brief Ensure that UART DMA TX state is valid. 1317 * @param __DMATX__ UART DMA TX state. 1318 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1319 */ 1320 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1321 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1322 1323 /** 1324 * @brief Ensure that UART DMA RX state is valid. 1325 * @param __DMARX__ UART DMA RX state. 1326 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1327 */ 1328 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1329 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1330 1331 /** 1332 * @brief Ensure that UART half-duplex state is valid. 1333 * @param __HDSEL__ UART half-duplex state. 1334 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1335 */ 1336 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1337 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1338 1339 /** 1340 * @brief Ensure that UART wake-up method is valid. 1341 * @param __WAKEUP__ UART wake-up method . 1342 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1343 */ 1344 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1345 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1346 1347 /** 1348 * @brief Ensure that UART request parameter is valid. 1349 * @param __PARAM__ UART request parameter. 1350 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1351 */ 1352 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1353 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1354 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1355 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1356 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1357 1358 /** 1359 * @brief Ensure that UART advanced features initialization is valid. 1360 * @param __INIT__ UART advanced features initialization. 1361 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1362 */ 1363 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1364 UART_ADVFEATURE_TXINVERT_INIT | \ 1365 UART_ADVFEATURE_RXINVERT_INIT | \ 1366 UART_ADVFEATURE_DATAINVERT_INIT | \ 1367 UART_ADVFEATURE_SWAP_INIT | \ 1368 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1369 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1370 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1371 UART_ADVFEATURE_MSBFIRST_INIT)) 1372 1373 /** 1374 * @brief Ensure that UART frame TX inversion setting is valid. 1375 * @param __TXINV__ UART frame TX inversion setting. 1376 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1377 */ 1378 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1379 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1380 1381 /** 1382 * @brief Ensure that UART frame RX inversion setting is valid. 1383 * @param __RXINV__ UART frame RX inversion setting. 1384 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1385 */ 1386 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1387 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1388 1389 /** 1390 * @brief Ensure that UART frame data inversion setting is valid. 1391 * @param __DATAINV__ UART frame data inversion setting. 1392 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1393 */ 1394 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1395 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1396 1397 /** 1398 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1399 * @param __SWAP__ UART frame RX/TX pins swap setting. 1400 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1401 */ 1402 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1403 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1404 1405 /** 1406 * @brief Ensure that UART frame overrun setting is valid. 1407 * @param __OVERRUN__ UART frame overrun setting. 1408 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1409 */ 1410 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1411 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1412 1413 /** 1414 * @brief Ensure that UART auto Baud rate state is valid. 1415 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1416 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1417 */ 1418 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1419 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1420 1421 /** 1422 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1423 * @param __DMA__ UART DMA enabling or disabling on error setting. 1424 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1425 */ 1426 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1427 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1428 1429 /** 1430 * @brief Ensure that UART frame MSB first setting is valid. 1431 * @param __MSBFIRST__ UART frame MSB first setting. 1432 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1433 */ 1434 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1435 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1436 1437 /** 1438 * @brief Ensure that UART stop mode state is valid. 1439 * @param __STOPMODE__ UART stop mode state. 1440 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1441 */ 1442 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1443 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1444 1445 /** 1446 * @brief Ensure that UART mute mode state is valid. 1447 * @param __MUTE__ UART mute mode state. 1448 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1449 */ 1450 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1451 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1452 1453 /** 1454 * @brief Ensure that UART wake-up selection is valid. 1455 * @param __WAKE__ UART wake-up selection. 1456 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1457 */ 1458 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1459 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1460 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1461 1462 /** 1463 * @brief Ensure that UART driver enable polarity is valid. 1464 * @param __POLARITY__ UART driver enable polarity. 1465 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1466 */ 1467 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1468 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1469 1470 /** 1471 * @brief Ensure that UART Prescaler is valid. 1472 * @param __CLOCKPRESCALER__ UART Prescaler value. 1473 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 1474 */ 1475 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ 1476 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ 1477 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ 1478 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ 1479 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ 1480 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ 1481 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ 1482 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ 1483 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ 1484 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ 1485 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ 1486 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) 1487 1488 /** 1489 * @} 1490 */ 1491 1492 /* Include UART HAL Extended module */ 1493 #include "stm32mp1xx_hal_uart_ex.h" 1494 1495 1496 /* Exported functions --------------------------------------------------------*/ 1497 /** @addtogroup UART_Exported_Functions UART Exported Functions 1498 * @{ 1499 */ 1500 1501 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1502 * @{ 1503 */ 1504 1505 /* Initialization and de-initialization functions ****************************/ 1506 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1507 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1508 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1509 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1510 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1511 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1512 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1513 1514 /* Callbacks Register/UnRegister functions ***********************************/ 1515 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1516 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, 1517 pUART_CallbackTypeDef pCallback); 1518 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1519 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1520 1521 /** 1522 * @} 1523 */ 1524 1525 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1526 * @{ 1527 */ 1528 1529 /* IO operation functions *****************************************************/ 1530 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1531 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1532 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1533 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1534 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1535 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1536 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1537 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1538 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1539 /* Transfer Abort functions */ 1540 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1541 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1542 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1543 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1544 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1545 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1546 1547 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1548 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1549 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1550 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1551 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1552 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1553 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1554 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1555 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1556 1557 /** 1558 * @} 1559 */ 1560 1561 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1562 * @{ 1563 */ 1564 1565 /* Peripheral Control functions ************************************************/ 1566 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); 1567 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); 1568 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); 1569 1570 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1571 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1572 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1573 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1574 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1575 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1576 1577 /** 1578 * @} 1579 */ 1580 1581 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1582 * @{ 1583 */ 1584 1585 /* Peripheral State and Errors functions **************************************************/ 1586 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); 1587 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); 1588 1589 /** 1590 * @} 1591 */ 1592 1593 /** 1594 * @} 1595 */ 1596 1597 /* Private functions -----------------------------------------------------------*/ 1598 /** @addtogroup UART_Private_Functions UART Private Functions 1599 * @{ 1600 */ 1601 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1602 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 1603 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1604 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1605 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1606 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, 1607 uint32_t Tickstart, uint32_t Timeout); 1608 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1609 1610 /** 1611 * @} 1612 */ 1613 1614 /** 1615 * @} 1616 */ 1617 1618 /** 1619 * @} 1620 */ 1621 1622 #ifdef __cplusplus 1623 } 1624 #endif 1625 1626 #endif /* STM32MP1xx_HAL_UART_H */ 1627
