1 /** 2 ****************************************************************************** 3 * @file stm32l5xx_hal_pwr.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file in 13 * the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 ****************************************************************************** 16 */ 17 18 /* Define to prevent recursive inclusion -------------------------------------*/ 19 #ifndef STM32L5xx_HAL_PWR_H 20 #define STM32L5xx_HAL_PWR_H 21 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 /* Includes ------------------------------------------------------------------*/ 27 #include "stm32l5xx_hal_def.h" 28 29 /** @addtogroup STM32L5xx_HAL_Driver 30 * @{ 31 */ 32 33 /** @addtogroup PWR 34 * @{ 35 */ 36 37 /* Exported types ------------------------------------------------------------*/ 38 39 /** @defgroup PWR_Exported_Types PWR Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief PWR PVD configuration structure definition 45 */ 46 typedef struct 47 { 48 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. 49 This parameter can be a value of @ref PWR_PVD_detection_level. */ 50 51 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 52 This parameter can be a value of @ref PWR_PVD_Mode. */ 53 } PWR_PVDTypeDef; 54 55 56 /** 57 * @} 58 */ 59 60 /* Exported constants --------------------------------------------------------*/ 61 62 /** @defgroup PWR_Exported_Constants PWR Exported Constants 63 * @{ 64 */ 65 66 67 /** @defgroup PWR_PVD_detection_level Programmable Voltage Detection levels 68 * @{ 69 */ 70 #define PWR_PVDLEVEL_0 PWR_CR2_PLS_LEV0 /*!< PVD threshold around 2.0 V */ 71 #define PWR_PVDLEVEL_1 PWR_CR2_PLS_LEV1 /*!< PVD threshold around 2.2 V */ 72 #define PWR_PVDLEVEL_2 PWR_CR2_PLS_LEV2 /*!< PVD threshold around 2.4 V */ 73 #define PWR_PVDLEVEL_3 PWR_CR2_PLS_LEV3 /*!< PVD threshold around 2.5 V */ 74 #define PWR_PVDLEVEL_4 PWR_CR2_PLS_LEV4 /*!< PVD threshold around 2.6 V */ 75 #define PWR_PVDLEVEL_5 PWR_CR2_PLS_LEV5 /*!< PVD threshold around 2.8 V */ 76 #define PWR_PVDLEVEL_6 PWR_CR2_PLS_LEV6 /*!< PVD threshold around 2.9 V */ 77 #define PWR_PVDLEVEL_7 PWR_CR2_PLS_LEV7 /*!< External input analog voltage (compared internally to VREFINT) */ 78 /** 79 * @} 80 */ 81 82 /** @defgroup PWR_PVD_Mode PWR PVD interrupt and event mode 83 * @{ 84 */ 85 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< Basic mode is used */ 86 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */ 87 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */ 88 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 89 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */ 90 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */ 91 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */ 92 /** 93 * @} 94 */ 95 96 97 98 99 /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR regulator mode 100 * @{ 101 */ 102 #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000) /*!< Regulator in main mode */ 103 #define PWR_LOWPOWERREGULATOR_ON PWR_CR1_LPR /*!< Regulator in low-power mode */ 104 /** 105 * @} 106 */ 107 108 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 109 * @{ 110 */ 111 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Sleep mode */ 112 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Sleep mode */ 113 /** 114 * @} 115 */ 116 117 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 118 * @{ 119 */ 120 #define PWR_STOPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Stop mode */ 121 #define PWR_STOPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Stop mode */ 122 /** 123 * @} 124 */ 125 126 127 /** @defgroup PWR_PVD_EXTI_LINE PWR PVD external interrupt line 128 * @{ 129 */ 130 #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ 131 /** 132 * @} 133 */ 134 135 /** @defgroup PWR_PVD_EVENT_LINE PWR PVD event line 136 * @{ 137 */ 138 #define PWR_EVENT_LINE_PVD ((uint32_t)0x00010000) /*!< Event line 16 Connected to the PVD Event Line */ 139 /** 140 * @} 141 */ 142 143 /** @defgroup PWR_items PWR items 144 * @brief PWR items to configure attributes on 145 * @{ 146 */ 147 #define PWR_LPM PWR_SECCFGR_LPMSEC /*!< Low power mode */ 148 #define PWR_WKUP PWR_SECCFGR_WUPSEC /*!< All wake-up pins */ 149 #define PWR_WKUP1 PWR_SECCFGR_WUP1SEC /*!< Wake-up pin 1 */ 150 #define PWR_WKUP2 PWR_SECCFGR_WUP2SEC /*!< Wake-up pin 2 */ 151 #define PWR_WKUP3 PWR_SECCFGR_WUP3SEC /*!< Wake-up pin 3 */ 152 #define PWR_WKUP4 PWR_SECCFGR_WUP4SEC /*!< Wake-up pin 4 */ 153 #define PWR_WKUP5 PWR_SECCFGR_WUP5SEC /*!< Wake-up pin 5 */ 154 #define PWR_VDM PWR_SECCFGR_VDMSEC /*!< Voltage Detection and Monitoring */ 155 #define PWR_VB PWR_SECCFGR_VBSEC /*!< VBAT */ 156 #define PWR_APC PWR_SECCFGR_APCSEC /*!< Pull-Up/Down Control */ 157 #define PWR_ALL (PWR_LPM|PWR_WKUP|PWR_WKUP1|PWR_WKUP2|PWR_WKUP3|PWR_WKUP4|PWR_WKUP5| \ 158 PWR_VDM|PWR_VB|PWR_APC) /*!< All of the above */ 159 /** 160 * @} 161 */ 162 163 /** @defgroup PWR_attributes PWR attributes 164 * @brief PWR secure/non-secure and privilege/non-privilege attributes 165 * @note secure and non-secure attributes are only available from secure state when the system 166 * implement the security (TZEN=1) 167 * @{ 168 */ 169 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 170 #define PWR_SEC (PWR_ATTR_SEC_MASK | 0x00000001U) /*!< Secure attribute */ 171 #define PWR_NSEC (PWR_ATTR_SEC_MASK | 0x00000000U) /*!< Non-secure attribute */ 172 #endif /* __ARM_FEATURE_CMSE */ 173 #define PWR_PRIV (PWR_ATTR_PRIV_MASK | 0x00000002U) /*!< Privilege attribute */ 174 #define PWR_NPRIV (PWR_ATTR_PRIV_MASK | 0x00000000U) /*!< Non-privilege attribute */ 175 /** 176 * @} 177 */ 178 179 /** 180 * @} 181 */ 182 183 /* Exported macros -----------------------------------------------------------*/ 184 /** @defgroup PWR_Exported_Macros PWR Exported Macros 185 * @{ 186 */ 187 188 /** @brief Check whether or not a specific PWR flag is set. 189 * @param __FLAG__ specifies the flag to check. 190 * This parameter can be one of the following values: 191 * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event 192 * was received from the WKUP pin 1. 193 * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event 194 * was received from the WKUP pin 2. 195 * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event 196 * was received from the WKUP pin 3. 197 * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event 198 * was received from the WKUP pin 4. 199 * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event 200 * was received from the WKUP pin 5. 201 * @arg @ref PWR_FLAG_SB StandBy Flag. Indicates that the system 202 * entered StandBy mode. 203 * @arg @ref PWR_FLAG_SMPS_BYPASS_RDY SMPS bypass ready flag. Indicates 204 * SMPS bypass mode now operational. 205 * @arg @ref PWR_FLAG_EXT_SMPS_RDY SMPS external SMPS ready flag. Indicates 206 * external SMPS switch can be closed. 207 * @arg @ref PWR_FLAG_REGLPS Low Power Regulator Started. Indicates whether or not the 208 * low-power regulator is ready. 209 * @arg @ref PWR_FLAG_REGLPF Low Power Regulator Flag. Indicates whether the 210 * regulator is ready in main mode or is in low-power mode. 211 * @arg @ref PWR_FLAG_VOSF Voltage Scaling Flag. Indicates whether the regulator is ready 212 * in the selected voltage range or is still changing to the required voltage level. 213 * @arg @ref PWR_FLAG_PVDO Power Voltage Detector Output. Indicates whether VDD voltage is 214 * below or above the selected PVD threshold. 215 * @arg @ref PWR_FLAG_PVMO1 Peripheral Voltage Monitoring Output 1. Indicates whether VDDUSB voltage is 216 * is below or above PVM1 threshold (applicable when USB feature is supported). 217 * @arg @ref PWR_FLAG_PVMO2 Peripheral Voltage Monitoring Output 2. Indicates whether VDDIO2 voltage is 218 * is below or above PVM2 threshold (applicable when VDDIO2 is present on device). 219 * @arg @ref PWR_FLAG_PVMO3 Peripheral Voltage Monitoring Output 3. Indicates whether VDDA voltage is 220 * is below or above PVM3 threshold. 221 * @arg @ref PWR_FLAG_PVMO4 Peripheral Voltage Monitoring Output 4. Indicates whether VDDA voltage is 222 * is below or above PVM4 threshold. 223 * 224 * @retval The new state of __FLAG__ (TRUE or FALSE). 225 */ 226 #define __HAL_PWR_GET_FLAG(__FLAG__) ( ((((uint8_t)(__FLAG__)) >> 5U) == 1) ?\ 227 (PWR->SR1 & (1U << ((__FLAG__) & 31U))) :\ 228 (PWR->SR2 & (1U << ((__FLAG__) & 31U))) ) 229 230 /** @brief Clear a specific PWR flag. 231 * @param __FLAG__ specifies the flag to clear. 232 * This parameter can be one of the following values: 233 * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event 234 * was received from the WKUP pin 1. 235 * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event 236 * was received from the WKUP pin 2. 237 * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event 238 * was received from the WKUP pin 3. 239 * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event 240 * was received from the WKUP pin 4. 241 * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event 242 * was received from the WKUP pin 5. 243 * @arg @ref PWR_FLAG_WU Encompasses all five Wake Up Flags. 244 * @arg @ref PWR_FLAG_SB Standby Flag. Indicates that the system 245 * entered Standby mode. 246 * @retval None 247 */ 248 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) ( (((uint8_t)(__FLAG__)) == PWR_FLAG_WU) ?\ 249 (PWR->SCR = (__FLAG__)) :\ 250 (PWR->SCR = (1U << ((__FLAG__) & 31U))) ) 251 /** 252 * @brief Enable the PVD Extended Interrupt Line. 253 * @retval None 254 */ 255 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) 256 257 /** 258 * @brief Disable the PVD Extended Interrupt Line. 259 * @retval None 260 */ 261 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) 262 263 /** 264 * @brief Enable the PVD Event Line. 265 * @retval None 266 */ 267 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EVENT_LINE_PVD) 268 269 /** 270 * @brief Disable the PVD Event Line. 271 * @retval None 272 */ 273 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EVENT_LINE_PVD) 274 275 /** 276 * @brief Enable the PVD Extended Interrupt Rising Trigger. 277 * @retval None 278 */ 279 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) 280 281 /** 282 * @brief Disable the PVD Extended Interrupt Rising Trigger. 283 * @retval None 284 */ 285 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) 286 287 /** 288 * @brief Enable the PVD Extended Interrupt Falling Trigger. 289 * @retval None 290 */ 291 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) 292 293 294 /** 295 * @brief Disable the PVD Extended Interrupt Falling Trigger. 296 * @retval None 297 */ 298 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) 299 300 301 /** 302 * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger. 303 * @retval None 304 */ 305 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ 306 do { \ 307 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \ 308 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \ 309 } while(0) 310 311 /** 312 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 313 * @retval None 314 */ 315 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ 316 do { \ 317 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \ 318 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \ 319 } while(0) 320 321 /** 322 * @brief Generate a Software interrupt on selected EXTI line. 323 * @retval None 324 */ 325 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_PVD) 326 327 /** 328 * @brief Check whether or not the PVD EXTI interrupt flag is set. 329 * @retval EXTI PVD Line Status. 330 */ 331 #define __HAL_PWR_PVD_EXTI_GET_FLAG() ((EXTI->RPR1 | EXTI->FPR1) & PWR_EXTI_LINE_PVD) 332 333 /** 334 * @brief Clear the PVD EXTI interrupt flag. 335 * @retval None 336 */ 337 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() \ 338 do { \ 339 WRITE_REG(EXTI->RPR1, PWR_EXTI_LINE_PVD); \ 340 WRITE_REG(EXTI->FPR1, PWR_EXTI_LINE_PVD); \ 341 } while(0) 342 343 /** 344 * @} 345 */ 346 347 /* Private constants -----------------------------------------------------*/ 348 /** @addtogroup PWR_Private_Constants PWR Private Constants 349 * @{ 350 */ 351 /* Defines for attributes */ 352 #define PWR_ATTR_SEC_MASK 0x100U 353 #define PWR_ATTR_PRIV_MASK 0x200U 354 /** 355 * @} 356 */ 357 358 /* Private macros --------------------------------------------------------*/ 359 /** @addtogroup PWR_Private_Macros PWR Private Macros 360 * @{ 361 */ 362 363 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ 364 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ 365 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ 366 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 367 368 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) ||\ 369 ((MODE) == PWR_PVD_MODE_IT_RISING) ||\ 370 ((MODE) == PWR_PVD_MODE_IT_FALLING) ||\ 371 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) ||\ 372 ((MODE) == PWR_PVD_MODE_EVENT_RISING) ||\ 373 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) ||\ 374 ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING)) 375 376 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 377 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 378 379 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) 380 381 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE) ) 382 383 #define IS_PWR_ITEMS_ATTRIBUTES(__ITEM__) ((((__ITEM__) & PWR_LPM) == PWR_LPM) || \ 384 (((__ITEM__) & PWR_WKUP) == PWR_WKUP) || \ 385 (((__ITEM__) & PWR_WKUP1) == PWR_WKUP1) || \ 386 (((__ITEM__) & PWR_WKUP2) == PWR_WKUP2) || \ 387 (((__ITEM__) & PWR_WKUP3) == PWR_WKUP3) || \ 388 (((__ITEM__) & PWR_WKUP4) == PWR_WKUP4) || \ 389 (((__ITEM__) & PWR_WKUP5) == PWR_WKUP5) || \ 390 (((__ITEM__) & PWR_VDM) == PWR_VDM) || \ 391 (((__ITEM__) & PWR_VB) == PWR_VB) || \ 392 (((__ITEM__) & PWR_APC) == PWR_APC) || \ 393 (((__ITEM__) & PWR_ALL) == PWR_ALL) || \ 394 (((__ITEM__) & ~(PWR_ALL)) == 0U)) 395 396 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 397 398 #define IS_PWR_ATTRIBUTES(__ATTRIBUTES__) (((((__ATTRIBUTES__) & PWR_SEC) == PWR_SEC) || \ 399 (((__ATTRIBUTES__) & PWR_NSEC) == PWR_NSEC) || \ 400 (((__ATTRIBUTES__) & PWR_PRIV) == PWR_PRIV) || \ 401 (((__ATTRIBUTES__) & PWR_NPRIV) == PWR_NPRIV)) && \ 402 (((__ATTRIBUTES__) & ~(PWR_SEC|PWR_NSEC|PWR_PRIV|PWR_NPRIV)) == 0U)) 403 404 #else 405 406 #define IS_PWR_ATTRIBUTES(__ATTRIBUTES__) (((((__ATTRIBUTES__) & PWR_PRIV) == PWR_PRIV) || \ 407 (((__ATTRIBUTES__) & PWR_NPRIV) == PWR_NPRIV)) && \ 408 (((__ATTRIBUTES__) & ~(PWR_PRIV|PWR_NPRIV)) == 0U)) 409 410 #endif /* __ARM_FEATURE_CMSE */ 411 412 /** 413 * @} 414 */ 415 416 /* Include PWR HAL Extended module */ 417 #include "stm32l5xx_hal_pwr_ex.h" 418 419 /* Exported functions --------------------------------------------------------*/ 420 421 /** @addtogroup PWR_Exported_Functions PWR Exported Functions 422 * @{ 423 */ 424 425 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 426 * @{ 427 */ 428 429 /* Initialization and de-initialization functions *******************************/ 430 void HAL_PWR_DeInit(void); 431 void HAL_PWR_EnableBkUpAccess(void); 432 void HAL_PWR_DisableBkUpAccess(void); 433 434 /** 435 * @} 436 */ 437 438 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions 439 * @{ 440 */ 441 442 /* Peripheral Control functions ************************************************/ 443 HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); 444 void HAL_PWR_EnablePVD(void); 445 void HAL_PWR_DisablePVD(void); 446 447 448 /* WakeUp pins configuration functions ****************************************/ 449 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity); 450 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 451 452 /* Low Power modes configuration functions ************************************/ 453 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 454 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 455 void HAL_PWR_EnterSTANDBYMode(void); 456 457 void HAL_PWR_EnableSleepOnExit(void); 458 void HAL_PWR_DisableSleepOnExit(void); 459 void HAL_PWR_EnableSEVOnPend(void); 460 void HAL_PWR_DisableSEVOnPend(void); 461 462 void HAL_PWR_PVDCallback(void); 463 464 465 /** 466 * @} 467 */ 468 469 /** @addtogroup RCC_Exported_Functions_Group3 Attributes management functions 470 * @{ 471 */ 472 473 /* Attributes management functions ******************************************/ 474 void HAL_PWR_ConfigAttributes(uint32_t Item, uint32_t Attributes); 475 HAL_StatusTypeDef HAL_PWR_GetConfigAttributes(uint32_t Item, uint32_t *pAttributes); 476 477 /** 478 * @} 479 */ 480 481 /** 482 * @} 483 */ 484 485 /** 486 * @} 487 */ 488 489 /** 490 * @} 491 */ 492 493 #ifdef __cplusplus 494 } 495 #endif 496 497 498 #endif /* STM32L5xx_HAL_PWR_H */ 499
