1 /**
2   ******************************************************************************
3   * @file    stm32l1xx.h
4   * @author  MCD Application Team
5   * @brief   CMSIS STM32L1xx Device Peripheral Access Layer Header File.
6   *
7   *          The file is the unique include file that the application programmer
8   *          is using in the C source code, usually in main.c. This file contains:
9   *            - Configuration section that allows to select:
10   *              - The STM32L1xx device used in the target application
11   *              - To use or not the peripheral's drivers in application code(i.e.
12   *                code will be based on direct access to peripheral's registers
13   *                rather than drivers API), this option is controlled by
14   *                "#define USE_HAL_DRIVER"
15   *
16   ******************************************************************************
17   * @attention
18   *
19   * Copyright (c) 2017-2021 STMicroelectronics.
20   * All rights reserved.
21   *
22   * This software is licensed under terms that can be found in the LICENSE file
23   * in the root directory of this software component.
24   * If no LICENSE file comes with this software, it is provided AS-IS.
25   *
26   ******************************************************************************
27   */
28 
29 /** @addtogroup CMSIS
30   * @{
31   */
32 
33 /** @addtogroup stm32l1xx
34   * @{
35   */
36 
37 #ifndef __STM32L1XX_H
38 #define __STM32L1XX_H
39 
40 #ifdef __cplusplus
41  extern "C" {
42 #endif /* __cplusplus */
43 
44 /** @addtogroup Library_configuration_section
45   * @{
46   */
47 
48 /**
49   * @brief STM32 Family
50   */
51 #if !defined (STM32L1)
52 #define STM32L1
53 #endif /* STM32L1 */
54 
55 
56 /* Uncomment the line below according to the target STM32L device used in your
57    application
58   */
59 
60 #if !defined (STM32L100xB) && !defined (STM32L100xBA) && !defined (STM32L100xC) && \
61     !defined (STM32L151xB) && !defined (STM32L151xBA) && !defined (STM32L151xC) && !defined (STM32L151xCA) && !defined (STM32L151xD) && !defined (STM32L151xDX) && !defined (STM32L151xE) && \
62     !defined (STM32L152xB) && !defined (STM32L152xBA) && !defined (STM32L152xC) && !defined (STM32L152xCA) && !defined (STM32L152xD) && !defined (STM32L152xDX) && !defined (STM32L152xE) && \
63     !defined (STM32L162xC) && !defined (STM32L162xCA) && !defined (STM32L162xD) && !defined (STM32L162xDX) && !defined (STM32L162xE)
64   /* #define STM32L100xB  */   /*!< STM32L100C6, STM32L100R and STM32L100RB Devices */
65   /* #define STM32L100xBA */   /*!< STM32L100C6-A, STM32L100R8-A and STM32L100RB-A Devices */
66   /* #define STM32L100xC  */   /*!< STM32L100RC Devices */
67   /* #define STM32L151xB  */   /*!< STM32L151C6, STM32L151R6, STM32L151C8, STM32L151R8, STM32L151V8, STM32L151CB, STM32L151RB and STM32L151VB */
68   /* #define STM32L151xBA */   /*!< STM32L151C6-A, STM32L151R6-A, STM32L151C8-A, STM32L151R8-A, STM32L151V8-A, STM32L151CB-A, STM32L151RB-A and STM32L151VB-A */
69   /* #define STM32L151xC  */   /*!< STM32L151CC, STM32L151UC, STM32L151RC and STM32L151VC */
70   /* #define STM32L151xCA */   /*!< STM32L151RC-A, STM32L151VC-A, STM32L151QC and STM32L151ZC */
71   /* #define STM32L151xD  */   /*!< STM32L151QD, STM32L151RD, STM32L151VD & STM32L151ZD */
72   /* #define STM32L151xDX */   /*!< STM32L151VD-X Devices */
73   /* #define STM32L151xE  */   /*!< STM32L151QE, STM32L151RE, STM32L151VE and STM32L151ZE */
74   /* #define STM32L152xB  */   /*!< STM32L152C6, STM32L152R6, STM32L152C8, STM32L152R8, STM32L152V8, STM32L152CB, STM32L152RB and STM32L152VB */
75   /* #define STM32L152xBA */   /*!< STM32L152C6-A, STM32L152R6-A, STM32L152C8-A, STM32L152R8-A, STM32L152V8-A, STM32L152CB-A, STM32L152RB-A and STM32L152VB-A */
76   /* #define STM32L152xC  */   /*!< STM32L152CC, STM32L152UC, STM32L152RC and STM32L152VC */
77   /* #define STM32L152xCA */   /*!< STM32L152RC-A, STM32L152VC-A, STM32L152QC and STM32L152ZC */
78   /* #define STM32L152xD  */   /*!< STM32L152QD, STM32L152RD, STM32L152VD and STM32L152ZD */
79   /* #define STM32L152xDX */   /*!< STM32L152VD-X Devices */
80   /* #define STM32L152xE  */   /*!< STM32L152QE, STM32L152RE, STM32L152VE and STM32L152ZE */
81   /* #define STM32L162xC  */   /*!< STM32L162RC and STM32L162VC */
82   /* #define STM32L162xCA */   /*!< STM32L162RC-A, STM32L162VC-A, STM32L162QC and STM32L162ZC */
83   /* #define STM32L162xD  */   /*!< STM32L162QD, STM32L162RD, STM32L162VD and STM32L162ZD */
84   /* #define STM32L162xDX */   /*!< STM32L162VD-X Devices */
85   /* #define STM32L162xE  */   /*!< STM32L162RE, STM32L162VE and STM32L162ZE */
86 #endif
87 
88 /*  Tip: To avoid modifying this file each time you need to switch between these
89         devices, you can define the device in your toolchain compiler preprocessor.
90   */
91 
92 #if !defined  (USE_HAL_DRIVER)
93 /**
94  * @brief Comment the line below if you will not use the peripherals drivers.
95    In this case, these drivers will not be included and the application code will
96    be based on direct access to peripherals registers
97    */
98   /*#define USE_HAL_DRIVER */
99 #endif /* USE_HAL_DRIVER */
100 
101 /**
102   * @brief CMSIS Device version number
103   */
104 #define __STM32L1xx_CMSIS_VERSION_MAIN   (0x02) /*!< [31:24] main version */
105 #define __STM32L1xx_CMSIS_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
106 #define __STM32L1xx_CMSIS_VERSION_SUB2   (0x03) /*!< [15:8]  sub2 version */
107 #define __STM32L1xx_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */
108 #define __STM32L1xx_CMSIS_VERSION        ((__STM32L1xx_CMSIS_VERSION_MAIN << 24)\
109                                          |(__STM32L1xx_CMSIS_VERSION_SUB1 << 16)\
110                                          |(__STM32L1xx_CMSIS_VERSION_SUB2 << 8 )\
111                                          |(__STM32L1xx_CMSIS_VERSION_RC))
112 
113 /**
114   * @}
115   */
116 
117 /** @addtogroup Device_Included
118   * @{
119   */
120 
121 #if defined(STM32L100xB)
122   #include "stm32l100xb.h"
123 #elif defined(STM32L100xBA)
124   #include "stm32l100xba.h"
125 #elif defined(STM32L100xC)
126   #include "stm32l100xc.h"
127 #elif defined(STM32L151xB)
128   #include "stm32l151xb.h"
129 #elif defined(STM32L151xBA)
130   #include "stm32l151xba.h"
131 #elif defined(STM32L151xC)
132   #include "stm32l151xc.h"
133 #elif defined(STM32L151xCA)
134   #include "stm32l151xca.h"
135 #elif defined(STM32L151xD)
136   #include "stm32l151xd.h"
137 #elif defined(STM32L151xDX)
138   #include "stm32l151xdx.h"
139 #elif defined(STM32L151xE)
140   #include "stm32l151xe.h"
141 #elif defined(STM32L152xB)
142   #include "stm32l152xb.h"
143 #elif defined(STM32L152xBA)
144   #include "stm32l152xba.h"
145 #elif defined(STM32L152xC)
146   #include "stm32l152xc.h"
147 #elif defined(STM32L152xCA)
148   #include "stm32l152xca.h"
149 #elif defined(STM32L152xD)
150   #include "stm32l152xd.h"
151 #elif defined(STM32L152xDX)
152   #include "stm32l152xdx.h"
153 #elif defined(STM32L152xE)
154   #include "stm32l152xe.h"
155 #elif defined(STM32L162xC)
156   #include "stm32l162xc.h"
157 #elif defined(STM32L162xCA)
158   #include "stm32l162xca.h"
159 #elif defined(STM32L162xD)
160   #include "stm32l162xd.h"
161 #elif defined(STM32L162xDX)
162   #include "stm32l162xdx.h"
163 #elif defined(STM32L162xE)
164   #include "stm32l162xe.h"
165 #else
166  #error "Please select first the target STM32L1xx device used in your application (in stm32l1xx.h file)"
167 #endif
168 
169 /**
170   * @}
171   */
172 
173 /** @addtogroup Exported_types
174   * @{
175   */
176 typedef enum
177 {
178   RESET = 0,
179   SET = !RESET
180 } FlagStatus, ITStatus;
181 
182 typedef enum
183 {
184   DISABLE = 0,
185   ENABLE = !DISABLE
186 } FunctionalState;
187 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
188 
189 typedef enum
190 {
191   SUCCESS = 0,
192   ERROR = !SUCCESS
193 } ErrorStatus;
194 
195 /**
196   * @}
197   */
198 
199 
200 /** @addtogroup Exported_macros
201   * @{
202   */
203 #define SET_BIT(REG, BIT)     ((REG) |= (BIT))
204 
205 #define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
206 
207 #define READ_BIT(REG, BIT)    ((REG) & (BIT))
208 
209 #define CLEAR_REG(REG)        ((REG) = (0x0))
210 
211 #define WRITE_REG(REG, VAL)   ((REG) = (VAL))
212 
213 #define READ_REG(REG)         ((REG))
214 
215 #define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
216 
217 /* Use of CMSIS compiler intrinsics for register exclusive access */
218 /* Atomic 32-bit register access macro to set one or several bits */
219 #define ATOMIC_SET_BIT(REG, BIT)                             \
220   do {                                                       \
221     uint32_t val;                                            \
222     do {                                                     \
223       val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT);       \
224     } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
225   } while(0)
226 
227 /* Atomic 32-bit register access macro to clear one or several bits */
228 #define ATOMIC_CLEAR_BIT(REG, BIT)                           \
229   do {                                                       \
230     uint32_t val;                                            \
231     do {                                                     \
232       val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT);      \
233     } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
234   } while(0)
235 
236 /* Atomic 32-bit register access macro to clear and set one or several bits */
237 #define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)                          \
238   do {                                                                     \
239     uint32_t val;                                                          \
240     do {                                                                   \
241       val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
242     } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U);               \
243   } while(0)
244 
245 /* Atomic 16-bit register access macro to set one or several bits */
246 #define ATOMIC_SETH_BIT(REG, BIT)                            \
247   do {                                                       \
248     uint16_t val;                                            \
249     do {                                                     \
250       val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT);       \
251     } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
252   } while(0)
253 
254 /* Atomic 16-bit register access macro to clear one or several bits */
255 #define ATOMIC_CLEARH_BIT(REG, BIT)                          \
256   do {                                                       \
257     uint16_t val;                                            \
258     do {                                                     \
259       val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT);      \
260     } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
261   } while(0)
262 
263 /* Atomic 16-bit register access macro to clear and set one or several bits */
264 #define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK)                         \
265   do {                                                                     \
266     uint16_t val;                                                          \
267     do {                                                                   \
268       val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
269     } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U);               \
270   } while(0)
271 
272 #define POSITION_VAL(VAL)     (__CLZ(__RBIT(VAL)))
273 
274 
275 /**
276   * @}
277   */
278 
279 #if defined (USE_HAL_DRIVER)
280  #include "stm32l1xx_hal.h"
281 #endif /* USE_HAL_DRIVER */
282 
283 
284 #ifdef __cplusplus
285 }
286 #endif /* __cplusplus */
287 
288 #endif /* __STM32L1xx_H */
289 /**
290   * @}
291   */
292 
293 /**
294   * @}
295   */
296 
297 
298 
299 
300