1 /**
2 ******************************************************************************
3 * @file stm32g4xx_hal_adc_ex.c
4 * @author MCD Application Team
5 * @brief This file provides firmware functions to manage the following
6 * functionalities of the Analog to Digital Converter (ADC)
7 * peripheral:
8 * + Peripheral Control functions
9 * Other functions (generic functions) are available in file
10 * "stm32g4xx_hal_adc.c".
11 *
12 ******************************************************************************
13 * @attention
14 *
15 * Copyright (c) 2019 STMicroelectronics.
16 * All rights reserved.
17 *
18 * This software is licensed under terms that can be found in the LICENSE file
19 * in the root directory of this software component.
20 * If no LICENSE file comes with this software, it is provided AS-IS.
21 *
22 ******************************************************************************
23 @verbatim
24 [..]
25 (@) Sections "ADC peripheral features" and "How to use this driver" are
26 available in file of generic functions "stm32g4xx_hal_adc.c".
27 [..]
28 @endverbatim
29 ******************************************************************************
30 */
31
32 /* Includes ------------------------------------------------------------------*/
33 #include "stm32g4xx_hal.h"
34
35 /** @addtogroup STM32G4xx_HAL_Driver
36 * @{
37 */
38
39 /** @defgroup ADCEx ADCEx
40 * @brief ADC Extended HAL module driver
41 * @{
42 */
43
44 #ifdef HAL_ADC_MODULE_ENABLED
45
46 /* Private typedef -----------------------------------------------------------*/
47 /* Private define ------------------------------------------------------------*/
48
49 /** @defgroup ADCEx_Private_Constants ADC Extended Private Constants
50 * @{
51 */
52
53 #define ADC_JSQR_FIELDS ((ADC_JSQR_JL | ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN |\
54 ADC_JSQR_JSQ1 | ADC_JSQR_JSQ2 |\
55 ADC_JSQR_JSQ3 | ADC_JSQR_JSQ4 )) /*!< ADC_JSQR fields of parameters that can
56 be updated anytime once the ADC is enabled */
57
58 /* Fixed timeout value for ADC calibration. */
59 /* Values defined to be higher than worst cases: low clock frequency, */
60 /* maximum prescalers. */
61 /* Ex of profile low frequency : f_ADC at f_CPU/3968 (minimum value */
62 /* considering both possible ADC clocking scheme: */
63 /* - ADC clock from synchronous clock with AHB prescaler 512, */
64 /* ADC prescaler 4. */
65 /* Ratio max = 512 *4 = 2048 */
66 /* - ADC clock from asynchronous clock (PLLP) with prescaler 256. */
67 /* Highest CPU clock PLL (PLLR). */
68 /* Ratio max = PLLRmax /PPLPmin * 256 = (VCO/2) / (VCO/31) * 256 */
69 /* = 3968 ) */
70 /* Calibration_time MAX = 81 / f_ADC */
71 /* = 81 / (f_CPU/3938) = 318978 CPU cycles */
72 #define ADC_CALIBRATION_TIMEOUT (318978UL) /*!< ADC calibration time-out value (unit: CPU cycles) */
73
74 /**
75 * @}
76 */
77
78 /* Private macro -------------------------------------------------------------*/
79 /* Private variables ---------------------------------------------------------*/
80 /* Private function prototypes -----------------------------------------------*/
81 /* Exported functions --------------------------------------------------------*/
82
83 /** @defgroup ADCEx_Exported_Functions ADC Extended Exported Functions
84 * @{
85 */
86
87 /** @defgroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions
88 * @brief Extended IO operation functions
89 *
90 @verbatim
91 ===============================================================================
92 ##### IO operation functions #####
93 ===============================================================================
94 [..] This section provides functions allowing to:
95
96 (+) Perform the ADC self-calibration for single or differential ending.
97 (+) Get calibration factors for single or differential ending.
98 (+) Set calibration factors for single or differential ending.
99
100 (+) Start conversion of ADC group injected.
101 (+) Stop conversion of ADC group injected.
102 (+) Poll for conversion complete on ADC group injected.
103 (+) Get result of ADC group injected channel conversion.
104 (+) Start conversion of ADC group injected and enable interruptions.
105 (+) Stop conversion of ADC group injected and disable interruptions.
106
107 (+) When multimode feature is available, start multimode and enable DMA transfer.
108 (+) Stop multimode and disable ADC DMA transfer.
109 (+) Get result of multimode conversion.
110
111 @endverbatim
112 * @{
113 */
114
115 /**
116 * @brief Perform an ADC automatic self-calibration
117 * Calibration prerequisite: ADC must be disabled (execute this
118 * function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
119 * @param hadc ADC handle
120 * @param SingleDiff Selection of single-ended or differential input
121 * This parameter can be one of the following values:
122 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
123 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
124 * @retval HAL status
125 */
HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef * hadc,uint32_t SingleDiff)126 HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef *hadc, uint32_t SingleDiff)
127 {
128 HAL_StatusTypeDef tmp_hal_status;
129 __IO uint32_t wait_loop_index = 0UL;
130
131 /* Check the parameters */
132 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
133 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
134
135 /* Process locked */
136 __HAL_LOCK(hadc);
137
138 /* Calibration prerequisite: ADC must be disabled. */
139
140 /* Disable the ADC (if not already disabled) */
141 tmp_hal_status = ADC_Disable(hadc);
142
143 /* Check if ADC is effectively disabled */
144 if (tmp_hal_status == HAL_OK)
145 {
146 /* Set ADC state */
147 ADC_STATE_CLR_SET(hadc->State,
148 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
149 HAL_ADC_STATE_BUSY_INTERNAL);
150
151 /* Start ADC calibration in mode single-ended or differential */
152 LL_ADC_StartCalibration(hadc->Instance, SingleDiff);
153
154 /* Wait for calibration completion */
155 while (LL_ADC_IsCalibrationOnGoing(hadc->Instance) != 0UL)
156 {
157 wait_loop_index++;
158 if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT)
159 {
160 /* Update ADC state machine to error */
161 ADC_STATE_CLR_SET(hadc->State,
162 HAL_ADC_STATE_BUSY_INTERNAL,
163 HAL_ADC_STATE_ERROR_INTERNAL);
164
165 /* Process unlocked */
166 __HAL_UNLOCK(hadc);
167
168 return HAL_ERROR;
169 }
170 }
171
172 /* Set ADC state */
173 ADC_STATE_CLR_SET(hadc->State,
174 HAL_ADC_STATE_BUSY_INTERNAL,
175 HAL_ADC_STATE_READY);
176 }
177 else
178 {
179 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
180
181 /* Note: No need to update variable "tmp_hal_status" here: already set */
182 /* to state "HAL_ERROR" by function disabling the ADC. */
183 }
184
185 /* Process unlocked */
186 __HAL_UNLOCK(hadc);
187
188 /* Return function status */
189 return tmp_hal_status;
190 }
191
192 /**
193 * @brief Get the calibration factor.
194 * @param hadc ADC handle.
195 * @param SingleDiff This parameter can be only:
196 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
197 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
198 * @retval Calibration value.
199 */
HAL_ADCEx_Calibration_GetValue(const ADC_HandleTypeDef * hadc,uint32_t SingleDiff)200 uint32_t HAL_ADCEx_Calibration_GetValue(const ADC_HandleTypeDef *hadc, uint32_t SingleDiff)
201 {
202 /* Check the parameters */
203 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
204 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
205
206 /* Return the selected ADC calibration value */
207 return LL_ADC_GetCalibrationFactor(hadc->Instance, SingleDiff);
208 }
209
210 /**
211 * @brief Set the calibration factor to overwrite automatic conversion result.
212 * ADC must be enabled and no conversion is ongoing.
213 * @param hadc ADC handle
214 * @param SingleDiff This parameter can be only:
215 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
216 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
217 * @param CalibrationFactor Calibration factor (coded on 7 bits maximum)
218 * @retval HAL state
219 */
HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef * hadc,uint32_t SingleDiff,uint32_t CalibrationFactor)220 HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff,
221 uint32_t CalibrationFactor)
222 {
223 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
224 uint32_t tmp_adc_is_conversion_on_going_regular;
225 uint32_t tmp_adc_is_conversion_on_going_injected;
226
227 /* Check the parameters */
228 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
229 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
230 assert_param(IS_ADC_CALFACT(CalibrationFactor));
231
232 /* Process locked */
233 __HAL_LOCK(hadc);
234
235 /* Verification of hardware constraints before modifying the calibration */
236 /* factors register: ADC must be enabled, no conversion on going. */
237 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
238 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
239
240 if ((LL_ADC_IsEnabled(hadc->Instance) != 0UL)
241 && (tmp_adc_is_conversion_on_going_regular == 0UL)
242 && (tmp_adc_is_conversion_on_going_injected == 0UL)
243 )
244 {
245 /* Set the selected ADC calibration value */
246 LL_ADC_SetCalibrationFactor(hadc->Instance, SingleDiff, CalibrationFactor);
247 }
248 else
249 {
250 /* Update ADC state machine */
251 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
252 /* Update ADC error code */
253 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
254
255 /* Update ADC state machine to error */
256 tmp_hal_status = HAL_ERROR;
257 }
258
259 /* Process unlocked */
260 __HAL_UNLOCK(hadc);
261
262 /* Return function status */
263 return tmp_hal_status;
264 }
265
266 /**
267 * @brief Enable ADC, start conversion of injected group.
268 * @note Interruptions enabled in this function: None.
269 * @note Case of multimode enabled when multimode feature is available:
270 * HAL_ADCEx_InjectedStart() API must be called for ADC slave first,
271 * then for ADC master.
272 * For ADC slave, ADC is enabled only (conversion is not started).
273 * For ADC master, ADC is enabled and multimode conversion is started.
274 * @param hadc ADC handle.
275 * @retval HAL status
276 */
HAL_ADCEx_InjectedStart(ADC_HandleTypeDef * hadc)277 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef *hadc)
278 {
279 HAL_StatusTypeDef tmp_hal_status;
280 uint32_t tmp_config_injected_queue;
281 #if defined(ADC_MULTIMODE_SUPPORT)
282 uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
283 #endif /* ADC_MULTIMODE_SUPPORT */
284
285 /* Check the parameters */
286 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
287
288 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL)
289 {
290 return HAL_BUSY;
291 }
292 else
293 {
294 /* In case of software trigger detection enabled, JQDIS must be set
295 (which can be done only if ADSTART and JADSTART are both cleared).
296 If JQDIS is not set at that point, returns an error
297 - since software trigger detection is disabled. User needs to
298 resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS.
299 - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means
300 the queue is empty */
301 tmp_config_injected_queue = READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
302
303 if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == 0UL)
304 && (tmp_config_injected_queue == 0UL)
305 )
306 {
307 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
308 return HAL_ERROR;
309 }
310
311 /* Process locked */
312 __HAL_LOCK(hadc);
313
314 /* Enable the ADC peripheral */
315 tmp_hal_status = ADC_Enable(hadc);
316
317 /* Start conversion if ADC is effectively enabled */
318 if (tmp_hal_status == HAL_OK)
319 {
320 /* Check if a regular conversion is ongoing */
321 if ((hadc->State & HAL_ADC_STATE_REG_BUSY) != 0UL)
322 {
323 /* Reset ADC error code field related to injected conversions only */
324 CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF);
325 }
326 else
327 {
328 /* Set ADC error code to none */
329 ADC_CLEAR_ERRORCODE(hadc);
330 }
331
332 /* Set ADC state */
333 /* - Clear state bitfield related to injected group conversion results */
334 /* - Set state bitfield related to injected operation */
335 ADC_STATE_CLR_SET(hadc->State,
336 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
337 HAL_ADC_STATE_INJ_BUSY);
338
339 #if defined(ADC_MULTIMODE_SUPPORT)
340 /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
341 - if ADC instance is master or if multimode feature is not available
342 - if multimode setting is disabled (ADC instance slave in independent mode) */
343 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
344 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
345 )
346 {
347 CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
348 }
349 #endif /* ADC_MULTIMODE_SUPPORT */
350
351 /* Clear ADC group injected group conversion flag */
352 /* (To ensure of no unknown state from potential previous ADC operations) */
353 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
354
355 /* Process unlocked */
356 /* Unlock before starting ADC conversions: in case of potential */
357 /* interruption, to let the process to ADC IRQ Handler. */
358 __HAL_UNLOCK(hadc);
359
360 /* Enable conversion of injected group, if automatic injected conversion */
361 /* is disabled. */
362 /* If software start has been selected, conversion starts immediately. */
363 /* If external trigger has been selected, conversion will start at next */
364 /* trigger event. */
365 /* Case of multimode enabled (when multimode feature is available): */
366 /* if ADC is slave, */
367 /* - ADC is enabled only (conversion is not started), */
368 /* - if multimode only concerns regular conversion, ADC is enabled */
369 /* and conversion is started. */
370 /* If ADC is master or independent, */
371 /* - ADC is enabled and conversion is started. */
372 #if defined(ADC_MULTIMODE_SUPPORT)
373 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
374 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
375 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
376 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
377 )
378 {
379 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
380 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
381 {
382 LL_ADC_INJ_StartConversion(hadc->Instance);
383 }
384 }
385 else
386 {
387 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
388 SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
389 }
390 #else
391 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
392 {
393 /* Start ADC group injected conversion */
394 LL_ADC_INJ_StartConversion(hadc->Instance);
395 }
396 #endif /* ADC_MULTIMODE_SUPPORT */
397
398 }
399 else
400 {
401 /* Process unlocked */
402 __HAL_UNLOCK(hadc);
403 }
404
405 /* Return function status */
406 return tmp_hal_status;
407 }
408 }
409
410 /**
411 * @brief Stop conversion of injected channels. Disable ADC peripheral if
412 * no regular conversion is on going.
413 * @note If ADC must be disabled and if conversion is on going on
414 * regular group, function HAL_ADC_Stop must be used to stop both
415 * injected and regular groups, and disable the ADC.
416 * @note If injected group mode auto-injection is enabled,
417 * function HAL_ADC_Stop must be used.
418 * @note In case of multimode enabled (when multimode feature is available),
419 * HAL_ADCEx_InjectedStop() must be called for ADC master first, then for ADC slave.
420 * For ADC master, conversion is stopped and ADC is disabled.
421 * For ADC slave, ADC is disabled only (conversion stop of ADC master
422 * has already stopped conversion of ADC slave).
423 * @param hadc ADC handle.
424 * @retval HAL status
425 */
HAL_ADCEx_InjectedStop(ADC_HandleTypeDef * hadc)426 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef *hadc)
427 {
428 HAL_StatusTypeDef tmp_hal_status;
429
430 /* Check the parameters */
431 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
432
433 /* Process locked */
434 __HAL_LOCK(hadc);
435
436 /* 1. Stop potential conversion on going on injected group only. */
437 tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP);
438
439 /* Disable ADC peripheral if injected conversions are effectively stopped */
440 /* and if no conversion on regular group is on-going */
441 if (tmp_hal_status == HAL_OK)
442 {
443 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
444 {
445 /* 2. Disable the ADC peripheral */
446 tmp_hal_status = ADC_Disable(hadc);
447
448 /* Check if ADC is effectively disabled */
449 if (tmp_hal_status == HAL_OK)
450 {
451 /* Set ADC state */
452 ADC_STATE_CLR_SET(hadc->State,
453 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
454 HAL_ADC_STATE_READY);
455 }
456 }
457 /* Conversion on injected group is stopped, but ADC not disabled since */
458 /* conversion on regular group is still running. */
459 else
460 {
461 /* Set ADC state */
462 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
463 }
464 }
465
466 /* Process unlocked */
467 __HAL_UNLOCK(hadc);
468
469 /* Return function status */
470 return tmp_hal_status;
471 }
472
473 /**
474 * @brief Wait for injected group conversion to be completed.
475 * @param hadc ADC handle
476 * @param Timeout Timeout value in millisecond.
477 * @note Depending on hadc->Init.EOCSelection, JEOS or JEOC is
478 * checked and cleared depending on AUTDLY bit status.
479 * @retval HAL status
480 */
HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef * hadc,uint32_t Timeout)481 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout)
482 {
483 uint32_t tickstart;
484 uint32_t tmp_flag_end;
485 uint32_t tmp_adc_inj_is_trigger_source_sw_start;
486 uint32_t tmp_adc_reg_is_trigger_source_sw_start;
487 uint32_t tmp_cfgr;
488 #if defined(ADC_MULTIMODE_SUPPORT)
489 const ADC_TypeDef *tmpADC_Master;
490 uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
491 #endif /* ADC_MULTIMODE_SUPPORT */
492
493 /* Check the parameters */
494 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
495
496 /* If end of sequence selected */
497 if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
498 {
499 tmp_flag_end = ADC_FLAG_JEOS;
500 }
501 else /* end of conversion selected */
502 {
503 tmp_flag_end = ADC_FLAG_JEOC;
504 }
505
506 /* Get timeout */
507 tickstart = HAL_GetTick();
508
509 /* Wait until End of Conversion or Sequence flag is raised */
510 while ((hadc->Instance->ISR & tmp_flag_end) == 0UL)
511 {
512 /* Check if timeout is disabled (set to infinite wait) */
513 if (Timeout != HAL_MAX_DELAY)
514 {
515 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL))
516 {
517 /* New check to avoid false timeout detection in case of preemption */
518 if ((hadc->Instance->ISR & tmp_flag_end) == 0UL)
519 {
520 /* Update ADC state machine to timeout */
521 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
522
523 /* Process unlocked */
524 __HAL_UNLOCK(hadc);
525
526 return HAL_TIMEOUT;
527 }
528 }
529 }
530 }
531
532 /* Retrieve ADC configuration */
533 tmp_adc_inj_is_trigger_source_sw_start = LL_ADC_INJ_IsTriggerSourceSWStart(hadc->Instance);
534 tmp_adc_reg_is_trigger_source_sw_start = LL_ADC_REG_IsTriggerSourceSWStart(hadc->Instance);
535 /* Get relevant register CFGR in ADC instance of ADC master or slave */
536 /* in function of multimode state (for devices with multimode */
537 /* available). */
538 #if defined(ADC_MULTIMODE_SUPPORT)
539 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
540 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
541 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
542 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
543 )
544 {
545 tmp_cfgr = READ_REG(hadc->Instance->CFGR);
546 }
547 else
548 {
549 tmpADC_Master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance);
550 tmp_cfgr = READ_REG(tmpADC_Master->CFGR);
551 }
552 #else
553 tmp_cfgr = READ_REG(hadc->Instance->CFGR);
554 #endif /* ADC_MULTIMODE_SUPPORT */
555
556 /* Update ADC state machine */
557 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
558
559 /* Determine whether any further conversion upcoming on group injected */
560 /* by external trigger or by automatic injected conversion */
561 /* from group regular. */
562 if ((tmp_adc_inj_is_trigger_source_sw_start != 0UL) ||
563 ((READ_BIT(tmp_cfgr, ADC_CFGR_JAUTO) == 0UL) &&
564 ((tmp_adc_reg_is_trigger_source_sw_start != 0UL) &&
565 (READ_BIT(tmp_cfgr, ADC_CFGR_CONT) == 0UL))))
566 {
567 /* Check whether end of sequence is reached */
568 if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS))
569 {
570 /* Particular case if injected contexts queue is enabled: */
571 /* when the last context has been fully processed, JSQR is reset */
572 /* by the hardware. Even if no injected conversion is planned to come */
573 /* (queue empty, triggers are ignored), it can start again */
574 /* immediately after setting a new context (JADSTART is still set). */
575 /* Therefore, state of HAL ADC injected group is kept to busy. */
576 if (READ_BIT(tmp_cfgr, ADC_CFGR_JQM) == 0UL)
577 {
578 /* Set ADC state */
579 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
580
581 if ((hadc->State & HAL_ADC_STATE_REG_BUSY) == 0UL)
582 {
583 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
584 }
585 }
586 }
587 }
588
589 /* Clear polled flag */
590 if (tmp_flag_end == ADC_FLAG_JEOS)
591 {
592 /* Clear end of sequence JEOS flag of injected group if low power feature */
593 /* "LowPowerAutoWait " is disabled, to not interfere with this feature. */
594 /* For injected groups, no new conversion will start before JEOS is */
595 /* cleared. */
596 if (READ_BIT(tmp_cfgr, ADC_CFGR_AUTDLY) == 0UL)
597 {
598 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
599 }
600 }
601 else
602 {
603 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
604 }
605
606 /* Return API HAL status */
607 return HAL_OK;
608 }
609
610 /**
611 * @brief Enable ADC, start conversion of injected group with interruption.
612 * @note Interruptions enabled in this function according to initialization
613 * setting : JEOC (end of conversion) or JEOS (end of sequence)
614 * @note Case of multimode enabled (when multimode feature is enabled):
615 * HAL_ADCEx_InjectedStart_IT() API must be called for ADC slave first,
616 * then for ADC master.
617 * For ADC slave, ADC is enabled only (conversion is not started).
618 * For ADC master, ADC is enabled and multimode conversion is started.
619 * @param hadc ADC handle.
620 * @retval HAL status.
621 */
HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef * hadc)622 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef *hadc)
623 {
624 HAL_StatusTypeDef tmp_hal_status;
625 uint32_t tmp_config_injected_queue;
626 #if defined(ADC_MULTIMODE_SUPPORT)
627 uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
628 #endif /* ADC_MULTIMODE_SUPPORT */
629
630 /* Check the parameters */
631 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
632
633 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL)
634 {
635 return HAL_BUSY;
636 }
637 else
638 {
639 /* In case of software trigger detection enabled, JQDIS must be set
640 (which can be done only if ADSTART and JADSTART are both cleared).
641 If JQDIS is not set at that point, returns an error
642 - since software trigger detection is disabled. User needs to
643 resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS.
644 - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means
645 the queue is empty */
646 tmp_config_injected_queue = READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
647
648 if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == 0UL)
649 && (tmp_config_injected_queue == 0UL)
650 )
651 {
652 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
653 return HAL_ERROR;
654 }
655
656 /* Process locked */
657 __HAL_LOCK(hadc);
658
659 /* Enable the ADC peripheral */
660 tmp_hal_status = ADC_Enable(hadc);
661
662 /* Start conversion if ADC is effectively enabled */
663 if (tmp_hal_status == HAL_OK)
664 {
665 /* Check if a regular conversion is ongoing */
666 if ((hadc->State & HAL_ADC_STATE_REG_BUSY) != 0UL)
667 {
668 /* Reset ADC error code field related to injected conversions only */
669 CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF);
670 }
671 else
672 {
673 /* Set ADC error code to none */
674 ADC_CLEAR_ERRORCODE(hadc);
675 }
676
677 /* Set ADC state */
678 /* - Clear state bitfield related to injected group conversion results */
679 /* - Set state bitfield related to injected operation */
680 ADC_STATE_CLR_SET(hadc->State,
681 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
682 HAL_ADC_STATE_INJ_BUSY);
683
684 #if defined(ADC_MULTIMODE_SUPPORT)
685 /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
686 - if ADC instance is master or if multimode feature is not available
687 - if multimode setting is disabled (ADC instance slave in independent mode) */
688 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
689 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
690 )
691 {
692 CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
693 }
694 #endif /* ADC_MULTIMODE_SUPPORT */
695
696 /* Clear ADC group injected group conversion flag */
697 /* (To ensure of no unknown state from potential previous ADC operations) */
698 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
699
700 /* Process unlocked */
701 /* Unlock before starting ADC conversions: in case of potential */
702 /* interruption, to let the process to ADC IRQ Handler. */
703 __HAL_UNLOCK(hadc);
704
705 /* Enable ADC Injected context queue overflow interrupt if this feature */
706 /* is enabled. */
707 if ((hadc->Instance->CFGR & ADC_CFGR_JQM) != 0UL)
708 {
709 __HAL_ADC_ENABLE_IT(hadc, ADC_FLAG_JQOVF);
710 }
711
712 /* Enable ADC end of conversion interrupt */
713 switch (hadc->Init.EOCSelection)
714 {
715 case ADC_EOC_SEQ_CONV:
716 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
717 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS);
718 break;
719 /* case ADC_EOC_SINGLE_CONV */
720 default:
721 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS);
722 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
723 break;
724 }
725
726 /* Enable conversion of injected group, if automatic injected conversion */
727 /* is disabled. */
728 /* If software start has been selected, conversion starts immediately. */
729 /* If external trigger has been selected, conversion will start at next */
730 /* trigger event. */
731 /* Case of multimode enabled (when multimode feature is available): */
732 /* if ADC is slave, */
733 /* - ADC is enabled only (conversion is not started), */
734 /* - if multimode only concerns regular conversion, ADC is enabled */
735 /* and conversion is started. */
736 /* If ADC is master or independent, */
737 /* - ADC is enabled and conversion is started. */
738 #if defined(ADC_MULTIMODE_SUPPORT)
739 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
740 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
741 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
742 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
743 )
744 {
745 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
746 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
747 {
748 LL_ADC_INJ_StartConversion(hadc->Instance);
749 }
750 }
751 else
752 {
753 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
754 SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
755 }
756 #else
757 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
758 {
759 /* Start ADC group injected conversion */
760 LL_ADC_INJ_StartConversion(hadc->Instance);
761 }
762 #endif /* ADC_MULTIMODE_SUPPORT */
763
764 }
765 else
766 {
767 /* Process unlocked */
768 __HAL_UNLOCK(hadc);
769 }
770
771 /* Return function status */
772 return tmp_hal_status;
773 }
774 }
775
776 /**
777 * @brief Stop conversion of injected channels, disable interruption of
778 * end-of-conversion. Disable ADC peripheral if no regular conversion
779 * is on going.
780 * @note If ADC must be disabled and if conversion is on going on
781 * regular group, function HAL_ADC_Stop must be used to stop both
782 * injected and regular groups, and disable the ADC.
783 * @note If injected group mode auto-injection is enabled,
784 * function HAL_ADC_Stop must be used.
785 * @note Case of multimode enabled (when multimode feature is available):
786 * HAL_ADCEx_InjectedStop_IT() API must be called for ADC master first,
787 * then for ADC slave.
788 * For ADC master, conversion is stopped and ADC is disabled.
789 * For ADC slave, ADC is disabled only (conversion stop of ADC master
790 * has already stopped conversion of ADC slave).
791 * @note In case of auto-injection mode, HAL_ADC_Stop() must be used.
792 * @param hadc ADC handle
793 * @retval HAL status
794 */
HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef * hadc)795 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef *hadc)
796 {
797 HAL_StatusTypeDef tmp_hal_status;
798
799 /* Check the parameters */
800 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
801
802 /* Process locked */
803 __HAL_LOCK(hadc);
804
805 /* 1. Stop potential conversion on going on injected group only. */
806 tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP);
807
808 /* Disable ADC peripheral if injected conversions are effectively stopped */
809 /* and if no conversion on the other group (regular group) is intended to */
810 /* continue. */
811 if (tmp_hal_status == HAL_OK)
812 {
813 /* Disable ADC end of conversion interrupt for injected channels */
814 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_JEOC | ADC_IT_JEOS | ADC_FLAG_JQOVF));
815
816 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
817 {
818 /* 2. Disable the ADC peripheral */
819 tmp_hal_status = ADC_Disable(hadc);
820
821 /* Check if ADC is effectively disabled */
822 if (tmp_hal_status == HAL_OK)
823 {
824 /* Set ADC state */
825 ADC_STATE_CLR_SET(hadc->State,
826 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
827 HAL_ADC_STATE_READY);
828 }
829 }
830 /* Conversion on injected group is stopped, but ADC not disabled since */
831 /* conversion on regular group is still running. */
832 else
833 {
834 /* Set ADC state */
835 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
836 }
837 }
838
839 /* Process unlocked */
840 __HAL_UNLOCK(hadc);
841
842 /* Return function status */
843 return tmp_hal_status;
844 }
845
846 #if defined(ADC_MULTIMODE_SUPPORT)
847 /**
848 * @brief Enable ADC, start MultiMode conversion and transfer regular results through DMA.
849 * @note Multimode must have been previously configured using
850 * HAL_ADCEx_MultiModeConfigChannel() function.
851 * Interruptions enabled in this function:
852 * overrun, DMA half transfer, DMA transfer complete.
853 * Each of these interruptions has its dedicated callback function.
854 * @note State field of Slave ADC handle is not updated in this configuration:
855 * user should not rely on it for information related to Slave regular
856 * conversions.
857 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
858 * @param pData Destination Buffer address.
859 * @param Length Length of data to be transferred from ADC peripheral to memory (in bytes).
860 * @retval HAL status
861 */
HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef * hadc,uint32_t * pData,uint32_t Length)862 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length)
863 {
864 HAL_StatusTypeDef tmp_hal_status;
865 ADC_HandleTypeDef tmp_hadc_slave;
866 ADC_Common_TypeDef *tmpADC_Common;
867
868 /* Check the parameters */
869 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
870 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
871 assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
872 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
873
874 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) != 0UL)
875 {
876 return HAL_BUSY;
877 }
878 else
879 {
880 /* Process locked */
881 __HAL_LOCK(hadc);
882
883 /* Temporary handle minimum initialization */
884 __HAL_ADC_RESET_HANDLE_STATE(&tmp_hadc_slave);
885 ADC_CLEAR_ERRORCODE(&tmp_hadc_slave);
886
887 /* Set a temporary handle of the ADC slave associated to the ADC master */
888 ADC_MULTI_SLAVE(hadc, &tmp_hadc_slave);
889
890 if (tmp_hadc_slave.Instance == NULL)
891 {
892 /* Set ADC state */
893 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
894
895 /* Process unlocked */
896 __HAL_UNLOCK(hadc);
897
898 return HAL_ERROR;
899 }
900
901 /* Enable the ADC peripherals: master and slave (in case if not already */
902 /* enabled previously) */
903 tmp_hal_status = ADC_Enable(hadc);
904 if (tmp_hal_status == HAL_OK)
905 {
906 tmp_hal_status = ADC_Enable(&tmp_hadc_slave);
907 }
908
909 /* Start multimode conversion of ADCs pair */
910 if (tmp_hal_status == HAL_OK)
911 {
912 /* Set ADC state */
913 ADC_STATE_CLR_SET(hadc->State,
914 (HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP),
915 HAL_ADC_STATE_REG_BUSY);
916
917 /* Set ADC error code to none */
918 ADC_CLEAR_ERRORCODE(hadc);
919
920 /* Set the DMA transfer complete callback */
921 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
922
923 /* Set the DMA half transfer complete callback */
924 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
925
926 /* Set the DMA error callback */
927 hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ;
928
929 /* Pointer to the common control register */
930 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
931
932 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
933 /* start (in case of SW start): */
934
935 /* Clear regular group conversion flag and overrun flag */
936 /* (To ensure of no unknown state from potential previous ADC operations) */
937 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
938
939 /* Process unlocked */
940 /* Unlock before starting ADC conversions: in case of potential */
941 /* interruption, to let the process to ADC IRQ Handler. */
942 __HAL_UNLOCK(hadc);
943
944 /* Enable ADC overrun interrupt */
945 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
946
947 /* Start the DMA channel */
948 tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t)pData, Length);
949
950 /* Enable conversion of regular group. */
951 /* If software start has been selected, conversion starts immediately. */
952 /* If external trigger has been selected, conversion will start at next */
953 /* trigger event. */
954 /* Start ADC group regular conversion */
955 LL_ADC_REG_StartConversion(hadc->Instance);
956 }
957 else
958 {
959 /* Process unlocked */
960 __HAL_UNLOCK(hadc);
961 }
962
963 /* Return function status */
964 return tmp_hal_status;
965 }
966 }
967
968 /**
969 * @brief Stop multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral.
970 * @note Multimode is kept enabled after this function. MultiMode DMA bits
971 * (MDMA and DMACFG bits of common CCR register) are maintained. To disable
972 * Multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be
973 * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can
974 * resort to HAL_ADCEx_DisableMultiMode() API.
975 * @note In case of DMA configured in circular mode, function
976 * HAL_ADC_Stop_DMA() must be called after this function with handle of
977 * ADC slave, to properly disable the DMA channel.
978 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
979 * @retval HAL status
980 */
HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef * hadc)981 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc)
982 {
983 HAL_StatusTypeDef tmp_hal_status;
984 uint32_t tickstart;
985 ADC_HandleTypeDef tmp_hadc_slave;
986 uint32_t tmp_hadc_slave_conversion_on_going;
987 HAL_StatusTypeDef tmp_hadc_slave_disable_status;
988
989 /* Check the parameters */
990 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
991
992 /* Process locked */
993 __HAL_LOCK(hadc);
994
995 /* 1. Stop potential multimode conversion on going, on regular and injected groups */
996 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP);
997
998 /* Disable ADC peripheral if conversions are effectively stopped */
999 if (tmp_hal_status == HAL_OK)
1000 {
1001 /* Temporary handle minimum initialization */
1002 __HAL_ADC_RESET_HANDLE_STATE(&tmp_hadc_slave);
1003 ADC_CLEAR_ERRORCODE(&tmp_hadc_slave);
1004
1005 /* Set a temporary handle of the ADC slave associated to the ADC master */
1006 ADC_MULTI_SLAVE(hadc, &tmp_hadc_slave);
1007
1008 if (tmp_hadc_slave.Instance == NULL)
1009 {
1010 /* Update ADC state machine to error */
1011 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1012
1013 /* Process unlocked */
1014 __HAL_UNLOCK(hadc);
1015
1016 return HAL_ERROR;
1017 }
1018
1019 /* Procedure to disable the ADC peripheral: wait for conversions */
1020 /* effectively stopped (ADC master and ADC slave), then disable ADC */
1021
1022 /* 1. Wait for ADC conversion completion for ADC master and ADC slave */
1023 tickstart = HAL_GetTick();
1024
1025 tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Instance);
1026 while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1027 || (tmp_hadc_slave_conversion_on_going == 1UL)
1028 )
1029 {
1030 if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
1031 {
1032 /* New check to avoid false timeout detection in case of preemption */
1033 tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Instance);
1034 if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1035 || (tmp_hadc_slave_conversion_on_going == 1UL)
1036 )
1037 {
1038 /* Update ADC state machine to error */
1039 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
1040
1041 /* Process unlocked */
1042 __HAL_UNLOCK(hadc);
1043
1044 return HAL_ERROR;
1045 }
1046 }
1047
1048 tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Instance);
1049 }
1050
1051 /* Disable the DMA channel (in case of DMA in circular mode or stop */
1052 /* while DMA transfer is on going) */
1053 /* Note: DMA channel of ADC slave should be stopped after this function */
1054 /* with HAL_ADC_Stop_DMA() API. */
1055 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1056
1057 /* Check if DMA channel effectively disabled */
1058 if (tmp_hal_status == HAL_ERROR)
1059 {
1060 /* Update ADC state machine to error */
1061 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1062 }
1063
1064 /* Disable ADC overrun interrupt */
1065 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1066
1067 /* 2. Disable the ADC peripherals: master and slave */
1068 /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */
1069 /* memory a potential failing status. */
1070 if (tmp_hal_status == HAL_OK)
1071 {
1072 tmp_hadc_slave_disable_status = ADC_Disable(&tmp_hadc_slave);
1073 if ((ADC_Disable(hadc) == HAL_OK) &&
1074 (tmp_hadc_slave_disable_status == HAL_OK))
1075 {
1076 tmp_hal_status = HAL_OK;
1077 }
1078 }
1079 else
1080 {
1081 /* In case of error, attempt to disable ADC master and slave without status assert */
1082 (void) ADC_Disable(hadc);
1083 (void) ADC_Disable(&tmp_hadc_slave);
1084 }
1085
1086 /* Set ADC state (ADC master) */
1087 ADC_STATE_CLR_SET(hadc->State,
1088 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
1089 HAL_ADC_STATE_READY);
1090 }
1091
1092 /* Process unlocked */
1093 __HAL_UNLOCK(hadc);
1094
1095 /* Return function status */
1096 return tmp_hal_status;
1097 }
1098
1099 /**
1100 * @brief Return the last ADC Master and Slave regular conversions results when in multimode configuration.
1101 * @param hadc ADC handle of ADC Master (handle of ADC Slave must not be used)
1102 * @retval The converted data values.
1103 */
HAL_ADCEx_MultiModeGetValue(const ADC_HandleTypeDef * hadc)1104 uint32_t HAL_ADCEx_MultiModeGetValue(const ADC_HandleTypeDef *hadc)
1105 {
1106 const ADC_Common_TypeDef *tmpADC_Common;
1107
1108 /* Check the parameters */
1109 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1110
1111 /* Prevent unused argument(s) compilation warning if no assert_param check */
1112 /* and possible no usage in __LL_ADC_COMMON_INSTANCE() below */
1113 UNUSED(hadc);
1114
1115 /* Pointer to the common control register */
1116 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
1117
1118 /* Return the multi mode conversion value */
1119 return tmpADC_Common->CDR;
1120 }
1121 #endif /* ADC_MULTIMODE_SUPPORT */
1122
1123 /**
1124 * @brief Get ADC injected group conversion result.
1125 * @note Reading register JDRx automatically clears ADC flag JEOC
1126 * (ADC group injected end of unitary conversion).
1127 * @note This function does not clear ADC flag JEOS
1128 * (ADC group injected end of sequence conversion)
1129 * Occurrence of flag JEOS rising:
1130 * - If sequencer is composed of 1 rank, flag JEOS is equivalent
1131 * to flag JEOC.
1132 * - If sequencer is composed of several ranks, during the scan
1133 * sequence flag JEOC only is raised, at the end of the scan sequence
1134 * both flags JEOC and EOS are raised.
1135 * Flag JEOS must not be cleared by this function because
1136 * it would not be compliant with low power features
1137 * (feature low power auto-wait, not available on all STM32 series).
1138 * To clear this flag, either use function:
1139 * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
1140 * model polling: @ref HAL_ADCEx_InjectedPollForConversion()
1141 * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
1142 * @param hadc ADC handle
1143 * @param InjectedRank the converted ADC injected rank.
1144 * This parameter can be one of the following values:
1145 * @arg @ref ADC_INJECTED_RANK_1 ADC group injected rank 1
1146 * @arg @ref ADC_INJECTED_RANK_2 ADC group injected rank 2
1147 * @arg @ref ADC_INJECTED_RANK_3 ADC group injected rank 3
1148 * @arg @ref ADC_INJECTED_RANK_4 ADC group injected rank 4
1149 * @retval ADC group injected conversion data
1150 */
HAL_ADCEx_InjectedGetValue(const ADC_HandleTypeDef * hadc,uint32_t InjectedRank)1151 uint32_t HAL_ADCEx_InjectedGetValue(const ADC_HandleTypeDef *hadc, uint32_t InjectedRank)
1152 {
1153 uint32_t tmp_jdr;
1154
1155 /* Check the parameters */
1156 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1157 assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
1158
1159 /* Get ADC converted value */
1160 switch (InjectedRank)
1161 {
1162 case ADC_INJECTED_RANK_4:
1163 tmp_jdr = hadc->Instance->JDR4;
1164 break;
1165 case ADC_INJECTED_RANK_3:
1166 tmp_jdr = hadc->Instance->JDR3;
1167 break;
1168 case ADC_INJECTED_RANK_2:
1169 tmp_jdr = hadc->Instance->JDR2;
1170 break;
1171 case ADC_INJECTED_RANK_1:
1172 default:
1173 tmp_jdr = hadc->Instance->JDR1;
1174 break;
1175 }
1176
1177 /* Return ADC converted value */
1178 return tmp_jdr;
1179 }
1180
1181 /**
1182 * @brief Injected conversion complete callback in non-blocking mode.
1183 * @param hadc ADC handle
1184 * @retval None
1185 */
HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef * hadc)1186 __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef *hadc)
1187 {
1188 /* Prevent unused argument(s) compilation warning */
1189 UNUSED(hadc);
1190
1191 /* NOTE : This function should not be modified. When the callback is needed,
1192 function HAL_ADCEx_InjectedConvCpltCallback must be implemented in the user file.
1193 */
1194 }
1195
1196 /**
1197 * @brief Injected context queue overflow callback.
1198 * @note This callback is called if injected context queue is enabled
1199 (parameter "QueueInjectedContext" in injected channel configuration)
1200 and if a new injected context is set when queue is full (maximum 2
1201 contexts).
1202 * @param hadc ADC handle
1203 * @retval None
1204 */
HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef * hadc)1205 __weak void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef *hadc)
1206 {
1207 /* Prevent unused argument(s) compilation warning */
1208 UNUSED(hadc);
1209
1210 /* NOTE : This function should not be modified. When the callback is needed,
1211 function HAL_ADCEx_InjectedQueueOverflowCallback must be implemented in the user file.
1212 */
1213 }
1214
1215 /**
1216 * @brief Analog watchdog 2 callback in non-blocking mode.
1217 * @param hadc ADC handle
1218 * @retval None
1219 */
HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef * hadc)1220 __weak void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef *hadc)
1221 {
1222 /* Prevent unused argument(s) compilation warning */
1223 UNUSED(hadc);
1224
1225 /* NOTE : This function should not be modified. When the callback is needed,
1226 function HAL_ADCEx_LevelOutOfWindow2Callback must be implemented in the user file.
1227 */
1228 }
1229
1230 /**
1231 * @brief Analog watchdog 3 callback in non-blocking mode.
1232 * @param hadc ADC handle
1233 * @retval None
1234 */
HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef * hadc)1235 __weak void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef *hadc)
1236 {
1237 /* Prevent unused argument(s) compilation warning */
1238 UNUSED(hadc);
1239
1240 /* NOTE : This function should not be modified. When the callback is needed,
1241 function HAL_ADCEx_LevelOutOfWindow3Callback must be implemented in the user file.
1242 */
1243 }
1244
1245
1246 /**
1247 * @brief End Of Sampling callback in non-blocking mode.
1248 * @param hadc ADC handle
1249 * @retval None
1250 */
HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef * hadc)1251 __weak void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef *hadc)
1252 {
1253 /* Prevent unused argument(s) compilation warning */
1254 UNUSED(hadc);
1255
1256 /* NOTE : This function should not be modified. When the callback is needed,
1257 function HAL_ADCEx_EndOfSamplingCallback must be implemented in the user file.
1258 */
1259 }
1260
1261 /**
1262 * @brief Stop ADC conversion of regular group (and injected channels in
1263 * case of auto_injection mode), disable ADC peripheral if no
1264 * conversion is on going on injected group.
1265 * @param hadc ADC handle
1266 * @retval HAL status.
1267 */
HAL_ADCEx_RegularStop(ADC_HandleTypeDef * hadc)1268 HAL_StatusTypeDef HAL_ADCEx_RegularStop(ADC_HandleTypeDef *hadc)
1269 {
1270 HAL_StatusTypeDef tmp_hal_status;
1271
1272 /* Check the parameters */
1273 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1274
1275 /* Process locked */
1276 __HAL_LOCK(hadc);
1277
1278 /* 1. Stop potential regular conversion on going */
1279 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1280
1281 /* Disable ADC peripheral if regular conversions are effectively stopped
1282 and if no injected conversions are on-going */
1283 if (tmp_hal_status == HAL_OK)
1284 {
1285 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1286 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1287
1288 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1289 {
1290 /* 2. Disable the ADC peripheral */
1291 tmp_hal_status = ADC_Disable(hadc);
1292
1293 /* Check if ADC is effectively disabled */
1294 if (tmp_hal_status == HAL_OK)
1295 {
1296 /* Set ADC state */
1297 ADC_STATE_CLR_SET(hadc->State,
1298 HAL_ADC_STATE_INJ_BUSY,
1299 HAL_ADC_STATE_READY);
1300 }
1301 }
1302 /* Conversion on injected group is stopped, but ADC not disabled since */
1303 /* conversion on regular group is still running. */
1304 else
1305 {
1306 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1307 }
1308 }
1309
1310 /* Process unlocked */
1311 __HAL_UNLOCK(hadc);
1312
1313 /* Return function status */
1314 return tmp_hal_status;
1315 }
1316
1317
1318 /**
1319 * @brief Stop ADC conversion of ADC groups regular and injected,
1320 * disable interrution of end-of-conversion,
1321 * disable ADC peripheral if no conversion is on going
1322 * on injected group.
1323 * @param hadc ADC handle
1324 * @retval HAL status.
1325 */
HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef * hadc)1326 HAL_StatusTypeDef HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef *hadc)
1327 {
1328 HAL_StatusTypeDef tmp_hal_status;
1329
1330 /* Check the parameters */
1331 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1332
1333 /* Process locked */
1334 __HAL_LOCK(hadc);
1335
1336 /* 1. Stop potential regular conversion on going */
1337 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1338
1339 /* Disable ADC peripheral if conversions are effectively stopped
1340 and if no injected conversion is on-going */
1341 if (tmp_hal_status == HAL_OK)
1342 {
1343 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1344 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1345
1346 /* Disable all regular-related interrupts */
1347 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
1348
1349 /* 2. Disable ADC peripheral if no injected conversions are on-going */
1350 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1351 {
1352 tmp_hal_status = ADC_Disable(hadc);
1353 /* if no issue reported */
1354 if (tmp_hal_status == HAL_OK)
1355 {
1356 /* Set ADC state */
1357 ADC_STATE_CLR_SET(hadc->State,
1358 HAL_ADC_STATE_INJ_BUSY,
1359 HAL_ADC_STATE_READY);
1360 }
1361 }
1362 else
1363 {
1364 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1365 }
1366 }
1367
1368 /* Process unlocked */
1369 __HAL_UNLOCK(hadc);
1370
1371 /* Return function status */
1372 return tmp_hal_status;
1373 }
1374
1375 /**
1376 * @brief Stop ADC conversion of regular group (and injected group in
1377 * case of auto_injection mode), disable ADC DMA transfer, disable
1378 * ADC peripheral if no conversion is on going
1379 * on injected group.
1380 * @note HAL_ADCEx_RegularStop_DMA() function is dedicated to single-ADC mode only.
1381 * For multimode (when multimode feature is available),
1382 * HAL_ADCEx_RegularMultiModeStop_DMA() API must be used.
1383 * @param hadc ADC handle
1384 * @retval HAL status.
1385 */
HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef * hadc)1386 HAL_StatusTypeDef HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef *hadc)
1387 {
1388 HAL_StatusTypeDef tmp_hal_status;
1389
1390 /* Check the parameters */
1391 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1392
1393 /* Process locked */
1394 __HAL_LOCK(hadc);
1395
1396 /* 1. Stop potential regular conversion on going */
1397 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1398
1399 /* Disable ADC peripheral if conversions are effectively stopped
1400 and if no injected conversion is on-going */
1401 if (tmp_hal_status == HAL_OK)
1402 {
1403 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1404 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1405
1406 /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
1407 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN);
1408
1409 /* Disable the DMA channel (in case of DMA in circular mode or stop while */
1410 /* while DMA transfer is on going) */
1411 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1412
1413 /* Check if DMA channel effectively disabled */
1414 if (tmp_hal_status != HAL_OK)
1415 {
1416 /* Update ADC state machine to error */
1417 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1418 }
1419
1420 /* Disable ADC overrun interrupt */
1421 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1422
1423 /* 2. Disable the ADC peripheral */
1424 /* Update "tmp_hal_status" only if DMA channel disabling passed, */
1425 /* to keep in memory a potential failing status. */
1426 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1427 {
1428 if (tmp_hal_status == HAL_OK)
1429 {
1430 tmp_hal_status = ADC_Disable(hadc);
1431 }
1432 else
1433 {
1434 (void)ADC_Disable(hadc);
1435 }
1436
1437 /* Check if ADC is effectively disabled */
1438 if (tmp_hal_status == HAL_OK)
1439 {
1440 /* Set ADC state */
1441 ADC_STATE_CLR_SET(hadc->State,
1442 HAL_ADC_STATE_INJ_BUSY,
1443 HAL_ADC_STATE_READY);
1444 }
1445 }
1446 else
1447 {
1448 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1449 }
1450 }
1451
1452 /* Process unlocked */
1453 __HAL_UNLOCK(hadc);
1454
1455 /* Return function status */
1456 return tmp_hal_status;
1457 }
1458
1459 #if defined(ADC_MULTIMODE_SUPPORT)
1460 /**
1461 * @brief Stop DMA-based multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral if no injected
1462 * conversion is on-going.
1463 * @note Multimode is kept enabled after this function. Multimode DMA bits
1464 * (MDMA and DMACFG bits of common CCR register) are maintained. To disable
1465 * multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be
1466 * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can
1467 * resort to HAL_ADCEx_DisableMultiMode() API.
1468 * @note In case of DMA configured in circular mode, function
1469 * HAL_ADCEx_RegularStop_DMA() must be called after this function with handle of
1470 * ADC slave, to properly disable the DMA channel.
1471 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
1472 * @retval HAL status
1473 */
HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef * hadc)1474 HAL_StatusTypeDef HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef *hadc)
1475 {
1476 HAL_StatusTypeDef tmp_hal_status;
1477 uint32_t tickstart;
1478 ADC_HandleTypeDef tmp_hadc_slave;
1479 uint32_t tmp_hadc_slave_conversion_on_going;
1480
1481 /* Check the parameters */
1482 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1483
1484 /* Process locked */
1485 __HAL_LOCK(hadc);
1486
1487
1488 /* 1. Stop potential multimode conversion on going, on regular groups */
1489 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1490
1491 /* Disable ADC peripheral if conversions are effectively stopped */
1492 if (tmp_hal_status == HAL_OK)
1493 {
1494 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1495 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1496
1497 /* Temporary handle minimum initialization */
1498 __HAL_ADC_RESET_HANDLE_STATE(&tmp_hadc_slave);
1499 ADC_CLEAR_ERRORCODE(&tmp_hadc_slave);
1500
1501 /* Set a temporary handle of the ADC slave associated to the ADC master */
1502 ADC_MULTI_SLAVE(hadc, &tmp_hadc_slave);
1503
1504 if (tmp_hadc_slave.Instance == NULL)
1505 {
1506 /* Update ADC state machine to error */
1507 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1508
1509 /* Process unlocked */
1510 __HAL_UNLOCK(hadc);
1511
1512 return HAL_ERROR;
1513 }
1514
1515 /* Procedure to disable the ADC peripheral: wait for conversions */
1516 /* effectively stopped (ADC master and ADC slave), then disable ADC */
1517
1518 /* 1. Wait for ADC conversion completion for ADC master and ADC slave */
1519 tickstart = HAL_GetTick();
1520
1521 tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Instance);
1522 while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1523 || (tmp_hadc_slave_conversion_on_going == 1UL)
1524 )
1525 {
1526 if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
1527 {
1528 /* New check to avoid false timeout detection in case of preemption */
1529 tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Instance);
1530 if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1531 || (tmp_hadc_slave_conversion_on_going == 1UL)
1532 )
1533 {
1534 /* Update ADC state machine to error */
1535 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
1536
1537 /* Process unlocked */
1538 __HAL_UNLOCK(hadc);
1539
1540 return HAL_ERROR;
1541 }
1542 }
1543
1544 tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Instance);
1545 }
1546
1547 /* Disable the DMA channel (in case of DMA in circular mode or stop */
1548 /* while DMA transfer is on going) */
1549 /* Note: DMA channel of ADC slave should be stopped after this function */
1550 /* with HAL_ADCEx_RegularStop_DMA() API. */
1551 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1552
1553 /* Check if DMA channel effectively disabled */
1554 if (tmp_hal_status != HAL_OK)
1555 {
1556 /* Update ADC state machine to error */
1557 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1558 }
1559
1560 /* Disable ADC overrun interrupt */
1561 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1562
1563 /* 2. Disable the ADC peripherals: master and slave if no injected */
1564 /* conversion is on-going. */
1565 /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */
1566 /* memory a potential failing status. */
1567 if (tmp_hal_status == HAL_OK)
1568 {
1569 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1570 {
1571 tmp_hal_status = ADC_Disable(hadc);
1572 if (tmp_hal_status == HAL_OK)
1573 {
1574 if (LL_ADC_INJ_IsConversionOngoing((&tmp_hadc_slave)->Instance) == 0UL)
1575 {
1576 tmp_hal_status = ADC_Disable(&tmp_hadc_slave);
1577 }
1578 }
1579 }
1580
1581 if (tmp_hal_status == HAL_OK)
1582 {
1583 /* Both Master and Slave ADC's could be disabled. Update Master State */
1584 /* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */
1585 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY);
1586 }
1587 else
1588 {
1589 /* injected (Master or Slave) conversions are still on-going,
1590 no Master State change */
1591 }
1592 }
1593 }
1594
1595 /* Process unlocked */
1596 __HAL_UNLOCK(hadc);
1597
1598 /* Return function status */
1599 return tmp_hal_status;
1600 }
1601 #endif /* ADC_MULTIMODE_SUPPORT */
1602
1603 /**
1604 * @}
1605 */
1606
1607 /** @defgroup ADCEx_Exported_Functions_Group2 ADC Extended Peripheral Control functions
1608 * @brief ADC Extended Peripheral Control functions
1609 *
1610 @verbatim
1611 ===============================================================================
1612 ##### Peripheral Control functions #####
1613 ===============================================================================
1614 [..] This section provides functions allowing to:
1615 (+) Configure channels on injected group
1616 (+) Configure multimode when multimode feature is available
1617 (+) Enable or Disable Injected Queue
1618 (+) Disable ADC voltage regulator
1619 (+) Enter ADC deep-power-down mode
1620
1621 @endverbatim
1622 * @{
1623 */
1624
1625 /**
1626 * @brief Configure a channel to be assigned to ADC group injected.
1627 * @note Possibility to update parameters on the fly:
1628 * This function initializes injected group, following calls to this
1629 * function can be used to reconfigure some parameters of structure
1630 * "ADC_InjectionConfTypeDef" on the fly, without resetting the ADC.
1631 * The setting of these parameters is conditioned to ADC state:
1632 * Refer to comments of structure "ADC_InjectionConfTypeDef".
1633 * @note In case of usage of internal measurement channels:
1634 * Vbat/VrefInt/TempSensor.
1635 * These internal paths can be disabled using function
1636 * HAL_ADC_DeInit().
1637 * @note Caution: For Injected Context Queue use, a context must be fully
1638 * defined before start of injected conversion. All channels are configured
1639 * consecutively for the same ADC instance. Therefore, the number of calls to
1640 * HAL_ADCEx_InjectedConfigChannel() must be equal to the value of parameter
1641 * InjectedNbrOfConversion for each context.
1642 * - Example 1: If 1 context is intended to be used (or if there is no use of the
1643 * Injected Queue Context feature) and if the context contains 3 injected ranks
1644 * (InjectedNbrOfConversion = 3), HAL_ADCEx_InjectedConfigChannel() must be
1645 * called once for each channel (i.e. 3 times) before starting a conversion.
1646 * This function must not be called to configure a 4th injected channel:
1647 * it would start a new context into context queue.
1648 * - Example 2: If 2 contexts are intended to be used and each of them contains
1649 * 3 injected ranks (InjectedNbrOfConversion = 3),
1650 * HAL_ADCEx_InjectedConfigChannel() must be called once for each channel and
1651 * for each context (3 channels x 2 contexts = 6 calls). Conversion can
1652 * start once the 1st context is set, that is after the first three
1653 * HAL_ADCEx_InjectedConfigChannel() calls. The 2nd context can be set on the fly.
1654 * @param hadc ADC handle
1655 * @param pConfigInjected Structure of ADC injected group and ADC channel for
1656 * injected group.
1657 * @retval HAL status
1658 */
HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef * hadc,const ADC_InjectionConfTypeDef * pConfigInjected)1659 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef *hadc,
1660 const ADC_InjectionConfTypeDef *pConfigInjected)
1661 {
1662 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1663 uint32_t tmp_offset_shifted;
1664 uint32_t tmp_config_internal_channel;
1665 uint32_t tmp_adc_is_conversion_on_going_regular;
1666 uint32_t tmp_adc_is_conversion_on_going_injected;
1667 __IO uint32_t wait_loop_index = 0;
1668
1669 uint32_t tmp_jsqr_context_queue_being_built = 0U;
1670
1671 /* Check the parameters */
1672 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1673 assert_param(IS_ADC_SAMPLE_TIME(pConfigInjected->InjectedSamplingTime));
1674 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(pConfigInjected->InjectedSingleDiff));
1675 assert_param(IS_FUNCTIONAL_STATE(pConfigInjected->AutoInjectedConv));
1676 assert_param(IS_FUNCTIONAL_STATE(pConfigInjected->QueueInjectedContext));
1677 assert_param(IS_ADC_EXTTRIGINJEC_EDGE(pConfigInjected->ExternalTrigInjecConvEdge));
1678 assert_param(IS_ADC_EXTTRIGINJEC(hadc, pConfigInjected->ExternalTrigInjecConv));
1679 assert_param(IS_ADC_OFFSET_NUMBER(pConfigInjected->InjectedOffsetNumber));
1680 assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), pConfigInjected->InjectedOffset));
1681 assert_param(IS_ADC_OFFSET_SIGN(pConfigInjected->InjectedOffsetSign));
1682 assert_param(IS_FUNCTIONAL_STATE(pConfigInjected->InjectedOffsetSaturation));
1683 assert_param(IS_FUNCTIONAL_STATE(pConfigInjected->InjecOversamplingMode));
1684
1685 if (hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
1686 {
1687 assert_param(IS_ADC_INJECTED_RANK(pConfigInjected->InjectedRank));
1688 assert_param(IS_ADC_INJECTED_NB_CONV(pConfigInjected->InjectedNbrOfConversion));
1689 assert_param(IS_FUNCTIONAL_STATE(pConfigInjected->InjectedDiscontinuousConvMode));
1690 }
1691
1692
1693 /* if JOVSE is set, the value of the OFFSETy_EN bit in ADCx_OFRy register is
1694 ignored (considered as reset) */
1695 assert_param(!((pConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE)
1696 && (pConfigInjected->InjecOversamplingMode == ENABLE)));
1697
1698 /* JDISCEN and JAUTO bits can't be set at the same time */
1699 assert_param(!((pConfigInjected->InjectedDiscontinuousConvMode == ENABLE)
1700 && (pConfigInjected->AutoInjectedConv == ENABLE)));
1701
1702 /* DISCEN and JAUTO bits can't be set at the same time */
1703 assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (pConfigInjected->AutoInjectedConv == ENABLE)));
1704
1705 /* Verification of channel number */
1706 if (pConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED)
1707 {
1708 assert_param(IS_ADC_CHANNEL(hadc, pConfigInjected->InjectedChannel));
1709 }
1710 else
1711 {
1712 assert_param(IS_ADC_DIFF_CHANNEL(hadc, pConfigInjected->InjectedChannel));
1713 }
1714
1715 /* Process locked */
1716 __HAL_LOCK(hadc);
1717
1718 /* Configuration of injected group sequencer: */
1719 /* Hardware constraint: Must fully define injected context register JSQR */
1720 /* before make it entering into injected sequencer queue. */
1721 /* */
1722 /* - if scan mode is disabled: */
1723 /* * Injected channels sequence length is set to 0x00: 1 channel */
1724 /* converted (channel on injected rank 1) */
1725 /* Parameter "InjectedNbrOfConversion" is discarded. */
1726 /* * Injected context register JSQR setting is simple: register is fully */
1727 /* defined on one call of this function (for injected rank 1) and can */
1728 /* be entered into queue directly. */
1729 /* - if scan mode is enabled: */
1730 /* * Injected channels sequence length is set to parameter */
1731 /* "InjectedNbrOfConversion". */
1732 /* * Injected context register JSQR setting more complex: register is */
1733 /* fully defined over successive calls of this function, for each */
1734 /* injected channel rank. It is entered into queue only when all */
1735 /* injected ranks have been set. */
1736 /* Note: Scan mode is not present by hardware on this device, but used */
1737 /* by software for alignment over all STM32 devices. */
1738
1739 if ((hadc->Init.ScanConvMode == ADC_SCAN_DISABLE) ||
1740 (pConfigInjected->InjectedNbrOfConversion == 1U))
1741 {
1742 /* Configuration of context register JSQR: */
1743 /* - number of ranks in injected group sequencer: fixed to 1st rank */
1744 /* (scan mode disabled, only rank 1 used) */
1745 /* - external trigger to start conversion */
1746 /* - external trigger polarity */
1747 /* - channel set to rank 1 (scan mode disabled, only rank 1 can be used) */
1748
1749 if (pConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
1750 {
1751 /* Enable external trigger if trigger selection is different of */
1752 /* software start. */
1753 /* Note: This configuration keeps the hardware feature of parameter */
1754 /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
1755 /* software start. */
1756 if (pConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
1757 {
1758 tmp_jsqr_context_queue_being_built = (ADC_JSQR_RK(pConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1)
1759 | (pConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEXTSEL)
1760 | pConfigInjected->ExternalTrigInjecConvEdge
1761 );
1762 }
1763 else
1764 {
1765 tmp_jsqr_context_queue_being_built = (ADC_JSQR_RK(pConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1));
1766 }
1767
1768 MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, tmp_jsqr_context_queue_being_built);
1769 /* For debug and informative reasons, hadc handle saves JSQR setting */
1770 hadc->InjectionConfig.ContextQueue = tmp_jsqr_context_queue_being_built;
1771
1772 }
1773 }
1774 else
1775 {
1776 /* Case of scan mode enabled, several channels to set into injected group */
1777 /* sequencer. */
1778 /* */
1779 /* Procedure to define injected context register JSQR over successive */
1780 /* calls of this function, for each injected channel rank: */
1781 /* 1. Start new context and set parameters related to all injected */
1782 /* channels: injected sequence length and trigger. */
1783
1784 /* if hadc->InjectionConfig.ChannelCount is equal to 0, this is the first */
1785 /* call of the context under setting */
1786 if (hadc->InjectionConfig.ChannelCount == 0U)
1787 {
1788 /* Initialize number of channels that will be configured on the context */
1789 /* being built */
1790 hadc->InjectionConfig.ChannelCount = pConfigInjected->InjectedNbrOfConversion;
1791 /* Handle hadc saves the context under build up over each HAL_ADCEx_InjectedConfigChannel()
1792 call, this context will be written in JSQR register at the last call.
1793 At this point, the context is merely reset */
1794 hadc->InjectionConfig.ContextQueue = 0x00000000U;
1795
1796 /* Configuration of context register JSQR: */
1797 /* - number of ranks in injected group sequencer */
1798 /* - external trigger to start conversion */
1799 /* - external trigger polarity */
1800
1801 /* Enable external trigger if trigger selection is different of */
1802 /* software start. */
1803 /* Note: This configuration keeps the hardware feature of parameter */
1804 /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
1805 /* software start. */
1806 if (pConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
1807 {
1808 tmp_jsqr_context_queue_being_built = ((pConfigInjected->InjectedNbrOfConversion - 1U)
1809 | (pConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEXTSEL)
1810 | pConfigInjected->ExternalTrigInjecConvEdge
1811 );
1812 }
1813 else
1814 {
1815 tmp_jsqr_context_queue_being_built = ((pConfigInjected->InjectedNbrOfConversion - 1U));
1816 }
1817
1818 }
1819
1820 /* 2. Continue setting of context under definition with parameter */
1821 /* related to each channel: channel rank sequence */
1822 /* Clear the old JSQx bits for the selected rank */
1823 tmp_jsqr_context_queue_being_built &= ~ADC_JSQR_RK(ADC_SQR3_SQ10, pConfigInjected->InjectedRank);
1824
1825 /* Set the JSQx bits for the selected rank */
1826 tmp_jsqr_context_queue_being_built |= ADC_JSQR_RK(pConfigInjected->InjectedChannel, pConfigInjected->InjectedRank);
1827
1828 /* Decrease channel count */
1829 hadc->InjectionConfig.ChannelCount--;
1830
1831 /* 3. tmp_jsqr_context_queue_being_built is fully built for this HAL_ADCEx_InjectedConfigChannel()
1832 call, aggregate the setting to those already built during the previous
1833 HAL_ADCEx_InjectedConfigChannel() calls (for the same context of course) */
1834 hadc->InjectionConfig.ContextQueue |= tmp_jsqr_context_queue_being_built;
1835
1836 /* 4. End of context setting: if this is the last channel set, then write context
1837 into register JSQR and make it enter into queue */
1838 if (hadc->InjectionConfig.ChannelCount == 0U)
1839 {
1840 MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, hadc->InjectionConfig.ContextQueue);
1841 }
1842 }
1843
1844 /* Parameters update conditioned to ADC state: */
1845 /* Parameters that can be updated when ADC is disabled or enabled without */
1846 /* conversion on going on injected group: */
1847 /* - Injected context queue: Queue disable (active context is kept) or */
1848 /* enable (context decremented, up to 2 contexts queued) */
1849 /* - Injected discontinuous mode: can be enabled only if auto-injected */
1850 /* mode is disabled. */
1851 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1852 {
1853 /* If auto-injected mode is disabled: no constraint */
1854 if (pConfigInjected->AutoInjectedConv == DISABLE)
1855 {
1856 MODIFY_REG(hadc->Instance->CFGR,
1857 ADC_CFGR_JQM | ADC_CFGR_JDISCEN,
1858 ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)pConfigInjected->QueueInjectedContext) |
1859 ADC_CFGR_INJECT_DISCCONTINUOUS((uint32_t)pConfigInjected->InjectedDiscontinuousConvMode));
1860 }
1861 /* If auto-injected mode is enabled: Injected discontinuous setting is */
1862 /* discarded. */
1863 else
1864 {
1865 MODIFY_REG(hadc->Instance->CFGR,
1866 ADC_CFGR_JQM | ADC_CFGR_JDISCEN,
1867 ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)pConfigInjected->QueueInjectedContext));
1868 }
1869
1870 }
1871
1872 /* Parameters update conditioned to ADC state: */
1873 /* Parameters that can be updated when ADC is disabled or enabled without */
1874 /* conversion on going on regular and injected groups: */
1875 /* - Automatic injected conversion: can be enabled if injected group */
1876 /* external triggers are disabled. */
1877 /* - Channel sampling time */
1878 /* - Channel offset */
1879 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
1880 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
1881
1882 if ((tmp_adc_is_conversion_on_going_regular == 0UL)
1883 && (tmp_adc_is_conversion_on_going_injected == 0UL)
1884 )
1885 {
1886 /* If injected group external triggers are disabled (set to injected */
1887 /* software start): no constraint */
1888 if ((pConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
1889 || (pConfigInjected->ExternalTrigInjecConvEdge == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE))
1890 {
1891 if (pConfigInjected->AutoInjectedConv == ENABLE)
1892 {
1893 SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
1894 }
1895 else
1896 {
1897 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
1898 }
1899 }
1900 /* If Automatic injected conversion was intended to be set and could not */
1901 /* due to injected group external triggers enabled, error is reported. */
1902 else
1903 {
1904 if (pConfigInjected->AutoInjectedConv == ENABLE)
1905 {
1906 /* Update ADC state machine to error */
1907 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1908
1909 tmp_hal_status = HAL_ERROR;
1910 }
1911 else
1912 {
1913 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
1914 }
1915 }
1916
1917 if (pConfigInjected->InjecOversamplingMode == ENABLE)
1918 {
1919 assert_param(IS_ADC_OVERSAMPLING_RATIO(pConfigInjected->InjecOversampling.Ratio));
1920 assert_param(IS_ADC_RIGHT_BIT_SHIFT(pConfigInjected->InjecOversampling.RightBitShift));
1921
1922 /* JOVSE must be reset in case of triggered regular mode */
1923 assert_param(!(READ_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_TROVS)
1924 == (ADC_CFGR2_ROVSE | ADC_CFGR2_TROVS)));
1925
1926 /* Configuration of Injected Oversampler: */
1927 /* - Oversampling Ratio */
1928 /* - Right bit shift */
1929
1930 /* Enable OverSampling mode */
1931 MODIFY_REG(hadc->Instance->CFGR2,
1932 ADC_CFGR2_JOVSE |
1933 ADC_CFGR2_OVSR |
1934 ADC_CFGR2_OVSS,
1935 ADC_CFGR2_JOVSE |
1936 pConfigInjected->InjecOversampling.Ratio |
1937 pConfigInjected->InjecOversampling.RightBitShift
1938 );
1939 }
1940 else
1941 {
1942 /* Disable Regular OverSampling */
1943 CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_JOVSE);
1944 }
1945
1946 /* Manage specific case of sampling time 3.5 cycles replacing 2.5 cyles */
1947 if (pConfigInjected->InjectedSamplingTime == ADC_SAMPLETIME_3CYCLES_5)
1948 {
1949 /* Set sampling time of the selected ADC channel */
1950 LL_ADC_SetChannelSamplingTime(hadc->Instance, pConfigInjected->InjectedChannel, LL_ADC_SAMPLINGTIME_2CYCLES_5);
1951
1952 /* Set ADC sampling time common configuration */
1953 LL_ADC_SetSamplingTimeCommonConfig(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5);
1954 }
1955 else
1956 {
1957 /* Set sampling time of the selected ADC channel */
1958 LL_ADC_SetChannelSamplingTime(hadc->Instance, pConfigInjected->InjectedChannel,
1959 pConfigInjected->InjectedSamplingTime);
1960
1961 /* Set ADC sampling time common configuration */
1962 LL_ADC_SetSamplingTimeCommonConfig(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_DEFAULT);
1963 }
1964
1965 /* Configure the offset: offset enable/disable, channel, offset value */
1966
1967 /* Shift the offset with respect to the selected ADC resolution. */
1968 /* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
1969 tmp_offset_shifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, pConfigInjected->InjectedOffset);
1970
1971 if (pConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE)
1972 {
1973 /* Set ADC selected offset number */
1974 LL_ADC_SetOffset(hadc->Instance, pConfigInjected->InjectedOffsetNumber, pConfigInjected->InjectedChannel,
1975 tmp_offset_shifted);
1976
1977 /* Set ADC selected offset sign & saturation */
1978 LL_ADC_SetOffsetSign(hadc->Instance, pConfigInjected->InjectedOffsetNumber, pConfigInjected->InjectedOffsetSign);
1979 LL_ADC_SetOffsetSaturation(hadc->Instance, pConfigInjected->InjectedOffsetNumber,
1980 (pConfigInjected->InjectedOffsetSaturation == ENABLE) ?
1981 LL_ADC_OFFSET_SATURATION_ENABLE : LL_ADC_OFFSET_SATURATION_DISABLE);
1982 }
1983 else
1984 {
1985 /* Scan each offset register to check if the selected channel is targeted. */
1986 /* If this is the case, the corresponding offset number is disabled. */
1987 if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_1))
1988 == __LL_ADC_CHANNEL_TO_DECIMAL_NB(pConfigInjected->InjectedChannel))
1989 {
1990 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_1, LL_ADC_OFFSET_DISABLE);
1991 }
1992 if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_2))
1993 == __LL_ADC_CHANNEL_TO_DECIMAL_NB(pConfigInjected->InjectedChannel))
1994 {
1995 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_2, LL_ADC_OFFSET_DISABLE);
1996 }
1997 if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_3))
1998 == __LL_ADC_CHANNEL_TO_DECIMAL_NB(pConfigInjected->InjectedChannel))
1999 {
2000 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_3, LL_ADC_OFFSET_DISABLE);
2001 }
2002 if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_4))
2003 == __LL_ADC_CHANNEL_TO_DECIMAL_NB(pConfigInjected->InjectedChannel))
2004 {
2005 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_4, LL_ADC_OFFSET_DISABLE);
2006 }
2007 }
2008
2009 }
2010
2011 /* Parameters update conditioned to ADC state: */
2012 /* Parameters that can be updated only when ADC is disabled: */
2013 /* - Single or differential mode */
2014 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
2015 {
2016 /* Set mode single-ended or differential input of the selected ADC channel */
2017 LL_ADC_SetChannelSingleDiff(hadc->Instance, pConfigInjected->InjectedChannel, pConfigInjected->InjectedSingleDiff);
2018
2019 /* Configuration of differential mode */
2020 /* Note: ADC channel number masked with value "0x1F" to ensure shift value within 32 bits range */
2021 if (pConfigInjected->InjectedSingleDiff == ADC_DIFFERENTIAL_ENDED)
2022 {
2023 /* Set sampling time of the selected ADC channel */
2024 LL_ADC_SetChannelSamplingTime(hadc->Instance,
2025 (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL(
2026 (__LL_ADC_CHANNEL_TO_DECIMAL_NB(
2027 (uint32_t)pConfigInjected->InjectedChannel)
2028 + 1UL) & 0x1FUL)),
2029 pConfigInjected->InjectedSamplingTime);
2030 }
2031
2032 }
2033
2034 /* Management of internal measurement channels: Vbat/VrefInt/TempSensor */
2035 /* internal measurement paths enable: If internal channel selected, */
2036 /* enable dedicated internal buffers and path. */
2037 /* Note: these internal measurement paths can be disabled using */
2038 /* HAL_ADC_DeInit(). */
2039
2040 if (__LL_ADC_IS_CHANNEL_INTERNAL(pConfigInjected->InjectedChannel))
2041 {
2042 tmp_config_internal_channel = LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
2043
2044 /* If the requested internal measurement path has already been enabled, */
2045 /* bypass the configuration processing. */
2046 if (((pConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR_ADC1)
2047 || (pConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR_ADC5))
2048 && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL))
2049 {
2050 if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc))
2051 {
2052 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance),
2053 LL_ADC_PATH_INTERNAL_TEMPSENSOR | tmp_config_internal_channel);
2054
2055 /* Delay for temperature sensor stabilization time */
2056 /* Wait loop initialization and execution */
2057 /* Note: Variable divided by 2 to compensate partially */
2058 /* CPU processing cycles, scaling in us split to not */
2059 /* exceed 32 bits register capacity and handle low frequency. */
2060 wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_STAB_US / 10UL)
2061 * (((SystemCoreClock / (100000UL * 2UL)) + 1UL) + 1UL));
2062 while (wait_loop_index != 0UL)
2063 {
2064 wait_loop_index--;
2065 }
2066 }
2067 }
2068 else if ((pConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT)
2069 && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VBAT) == 0UL))
2070 {
2071 if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc))
2072 {
2073 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance),
2074 LL_ADC_PATH_INTERNAL_VBAT | tmp_config_internal_channel);
2075 }
2076 }
2077 else if ((pConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)
2078 && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VREFINT) == 0UL))
2079 {
2080 if (ADC_VREFINT_INSTANCE(hadc))
2081 {
2082 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance),
2083 LL_ADC_PATH_INTERNAL_VREFINT | tmp_config_internal_channel);
2084 }
2085 }
2086 else
2087 {
2088 /* nothing to do */
2089 }
2090 }
2091
2092 /* Process unlocked */
2093 __HAL_UNLOCK(hadc);
2094
2095 /* Return function status */
2096 return tmp_hal_status;
2097 }
2098
2099 #if defined(ADC_MULTIMODE_SUPPORT)
2100 /**
2101 * @brief Enable ADC multimode and configure multimode parameters
2102 * @note Possibility to update parameters on the fly:
2103 * This function initializes multimode parameters, following
2104 * calls to this function can be used to reconfigure some parameters
2105 * of structure "ADC_MultiModeTypeDef" on the fly, without resetting
2106 * the ADCs.
2107 * The setting of these parameters is conditioned to ADC state.
2108 * For parameters constraints, see comments of structure
2109 * "ADC_MultiModeTypeDef".
2110 * @note To move back configuration from multimode to single mode, ADC must
2111 * be reset (using function HAL_ADC_Init() ).
2112 * @param hadc Master ADC handle
2113 * @param pMultimode Structure of ADC multimode configuration
2114 * @retval HAL status
2115 */
HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef * hadc,const ADC_MultiModeTypeDef * pMultimode)2116 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, const ADC_MultiModeTypeDef *pMultimode)
2117 {
2118 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
2119 ADC_Common_TypeDef *tmpADC_Common;
2120 ADC_HandleTypeDef tmp_hadc_slave;
2121 uint32_t tmp_hadc_slave_conversion_on_going;
2122
2123 /* Check the parameters */
2124 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
2125 assert_param(IS_ADC_MULTIMODE(pMultimode->Mode));
2126 if (pMultimode->Mode != ADC_MODE_INDEPENDENT)
2127 {
2128 assert_param(IS_ADC_DMA_ACCESS_MULTIMODE(pMultimode->DMAAccessMode));
2129 assert_param(IS_ADC_SAMPLING_DELAY(pMultimode->TwoSamplingDelay));
2130 }
2131
2132 /* Process locked */
2133 __HAL_LOCK(hadc);
2134
2135 /* Temporary handle minimum initialization */
2136 __HAL_ADC_RESET_HANDLE_STATE(&tmp_hadc_slave);
2137 ADC_CLEAR_ERRORCODE(&tmp_hadc_slave);
2138
2139 ADC_MULTI_SLAVE(hadc, &tmp_hadc_slave);
2140
2141 if (tmp_hadc_slave.Instance == NULL)
2142 {
2143 /* Update ADC state machine to error */
2144 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2145
2146 /* Process unlocked */
2147 __HAL_UNLOCK(hadc);
2148
2149 return HAL_ERROR;
2150 }
2151
2152 /* Parameters update conditioned to ADC state: */
2153 /* Parameters that can be updated when ADC is disabled or enabled without */
2154 /* conversion on going on regular group: */
2155 /* - Multimode DMA configuration */
2156 /* - Multimode DMA mode */
2157 tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Instance);
2158 if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
2159 && (tmp_hadc_slave_conversion_on_going == 0UL))
2160 {
2161 /* Pointer to the common control register */
2162 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
2163
2164 /* If multimode is selected, configure all multimode parameters. */
2165 /* Otherwise, reset multimode parameters (can be used in case of */
2166 /* transition from multimode to independent mode). */
2167 if (pMultimode->Mode != ADC_MODE_INDEPENDENT)
2168 {
2169 MODIFY_REG(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG,
2170 pMultimode->DMAAccessMode |
2171 ADC_CCR_MULTI_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests));
2172
2173 /* Parameters that can be updated only when ADC is disabled: */
2174 /* - Multimode mode selection */
2175 /* - Multimode delay */
2176 /* Note: Delay range depends on selected resolution: */
2177 /* from 1 to 12 clock cycles for 12 bits */
2178 /* from 1 to 10 clock cycles for 10 bits, */
2179 /* from 1 to 8 clock cycles for 8 bits */
2180 /* from 1 to 6 clock cycles for 6 bits */
2181 /* If a higher delay is selected, it will be clipped to maximum delay */
2182 /* range */
2183 if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
2184 {
2185 MODIFY_REG(tmpADC_Common->CCR,
2186 ADC_CCR_DUAL |
2187 ADC_CCR_DELAY,
2188 pMultimode->Mode |
2189 pMultimode->TwoSamplingDelay
2190 );
2191 }
2192 }
2193 else /* ADC_MODE_INDEPENDENT */
2194 {
2195 CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG);
2196
2197 /* Parameters that can be updated only when ADC is disabled: */
2198 /* - Multimode mode selection */
2199 /* - Multimode delay */
2200 if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
2201 {
2202 CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_DUAL | ADC_CCR_DELAY);
2203 }
2204 }
2205 }
2206 /* If one of the ADC sharing the same common group is enabled, no update */
2207 /* could be done on neither of the multimode structure parameters. */
2208 else
2209 {
2210 /* Update ADC state machine to error */
2211 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2212
2213 tmp_hal_status = HAL_ERROR;
2214 }
2215
2216 /* Process unlocked */
2217 __HAL_UNLOCK(hadc);
2218
2219 /* Return function status */
2220 return tmp_hal_status;
2221 }
2222 #endif /* ADC_MULTIMODE_SUPPORT */
2223
2224 /**
2225 * @brief Enable Injected Queue
2226 * @note This function resets CFGR register JQDIS bit in order to enable the
2227 * Injected Queue. JQDIS can be written only when ADSTART and JDSTART
2228 * are both equal to 0 to ensure that no regular nor injected
2229 * conversion is ongoing.
2230 * @param hadc ADC handle
2231 * @retval HAL status
2232 */
HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef * hadc)2233 HAL_StatusTypeDef HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef *hadc)
2234 {
2235 HAL_StatusTypeDef tmp_hal_status;
2236 uint32_t tmp_adc_is_conversion_on_going_regular;
2237 uint32_t tmp_adc_is_conversion_on_going_injected;
2238
2239 /* Check the parameters */
2240 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2241
2242 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
2243 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
2244
2245 /* Parameter can be set only if no conversion is on-going */
2246 if ((tmp_adc_is_conversion_on_going_regular == 0UL)
2247 && (tmp_adc_is_conversion_on_going_injected == 0UL)
2248 )
2249 {
2250 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
2251
2252 /* Update state, clear previous result related to injected queue overflow */
2253 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF);
2254
2255 tmp_hal_status = HAL_OK;
2256 }
2257 else
2258 {
2259 tmp_hal_status = HAL_ERROR;
2260 }
2261
2262 return tmp_hal_status;
2263 }
2264
2265 /**
2266 * @brief Disable Injected Queue
2267 * @note This function sets CFGR register JQDIS bit in order to disable the
2268 * Injected Queue. JQDIS can be written only when ADSTART and JDSTART
2269 * are both equal to 0 to ensure that no regular nor injected
2270 * conversion is ongoing.
2271 * @param hadc ADC handle
2272 * @retval HAL status
2273 */
HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef * hadc)2274 HAL_StatusTypeDef HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef *hadc)
2275 {
2276 HAL_StatusTypeDef tmp_hal_status;
2277 uint32_t tmp_adc_is_conversion_on_going_regular;
2278 uint32_t tmp_adc_is_conversion_on_going_injected;
2279
2280 /* Check the parameters */
2281 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2282
2283 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
2284 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
2285
2286 /* Parameter can be set only if no conversion is on-going */
2287 if ((tmp_adc_is_conversion_on_going_regular == 0UL)
2288 && (tmp_adc_is_conversion_on_going_injected == 0UL)
2289 )
2290 {
2291 LL_ADC_INJ_SetQueueMode(hadc->Instance, LL_ADC_INJ_QUEUE_DISABLE);
2292 tmp_hal_status = HAL_OK;
2293 }
2294 else
2295 {
2296 tmp_hal_status = HAL_ERROR;
2297 }
2298
2299 return tmp_hal_status;
2300 }
2301
2302 /**
2303 * @brief Disable ADC voltage regulator.
2304 * @note Disabling voltage regulator allows to save power. This operation can
2305 * be carried out only when ADC is disabled.
2306 * @note To enable again the voltage regulator, the user is expected to
2307 * resort to HAL_ADC_Init() API.
2308 * @param hadc ADC handle
2309 * @retval HAL status
2310 */
HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef * hadc)2311 HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef *hadc)
2312 {
2313 HAL_StatusTypeDef tmp_hal_status;
2314
2315 /* Check the parameters */
2316 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2317
2318 /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */
2319 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
2320 {
2321 LL_ADC_DisableInternalRegulator(hadc->Instance);
2322 tmp_hal_status = HAL_OK;
2323 }
2324 else
2325 {
2326 tmp_hal_status = HAL_ERROR;
2327 }
2328
2329 return tmp_hal_status;
2330 }
2331
2332 /**
2333 * @brief Enter ADC deep-power-down mode
2334 * @note This mode is achieved in setting DEEPPWD bit and allows to save power
2335 * in reducing leakage currents. It is particularly interesting before
2336 * entering stop modes.
2337 * @note Setting DEEPPWD automatically clears ADVREGEN bit and disables the
2338 * ADC voltage regulator. This means that this API encompasses
2339 * HAL_ADCEx_DisableVoltageRegulator(). Additionally, the internal
2340 * calibration is lost.
2341 * @note To exit the ADC deep-power-down mode, the user is expected to
2342 * resort to HAL_ADC_Init() API as well as to relaunch a calibration
2343 * with HAL_ADCEx_Calibration_Start() API or to re-apply a previously
2344 * saved calibration factor.
2345 * @param hadc ADC handle
2346 * @retval HAL status
2347 */
HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef * hadc)2348 HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef *hadc)
2349 {
2350 HAL_StatusTypeDef tmp_hal_status;
2351
2352 /* Check the parameters */
2353 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2354
2355 /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */
2356 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
2357 {
2358 LL_ADC_EnableDeepPowerDown(hadc->Instance);
2359 tmp_hal_status = HAL_OK;
2360 }
2361 else
2362 {
2363 tmp_hal_status = HAL_ERROR;
2364 }
2365
2366 return tmp_hal_status;
2367 }
2368
2369 /**
2370 * @}
2371 */
2372
2373 /**
2374 * @}
2375 */
2376
2377 #endif /* HAL_ADC_MODULE_ENABLED */
2378 /**
2379 * @}
2380 */
2381
2382 /**
2383 * @}
2384 */
2385
