1 /** 2 ****************************************************************************** 3 * @file stm32g4xx_hal_uart_ex.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32G4xx_HAL_UART_EX_H 21 #define STM32G4xx_HAL_UART_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32g4xx_hal_def.h" 29 30 /** @addtogroup STM32G4xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UARTEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UARTEx_Exported_Types UARTEx Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART wake up from stop mode parameters 45 */ 46 typedef struct 47 { 48 uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF). 49 This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. 50 If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must 51 be filled up. */ 52 53 uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. 54 This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ 55 56 uint8_t Address; /*!< UART/USART node address (7-bit long max). */ 57 } UART_WakeUpTypeDef; 58 59 /** 60 * @} 61 */ 62 63 /* Exported constants --------------------------------------------------------*/ 64 /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants 65 * @{ 66 */ 67 68 /** @defgroup UARTEx_Word_Length UARTEx Word Length 69 * @{ 70 */ 71 #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ 72 #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ 73 #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ 74 /** 75 * @} 76 */ 77 78 /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length 79 * @{ 80 */ 81 #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ 82 #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ 83 /** 84 * @} 85 */ 86 87 /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode 88 * @brief UART FIFO mode 89 * @{ 90 */ 91 #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ 92 #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ 93 /** 94 * @} 95 */ 96 97 /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level 98 * @brief UART TXFIFO threshold level 99 * @{ 100 */ 101 #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TX FIFO reaches 1/8 of its depth */ 102 #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TX FIFO reaches 1/4 of its depth */ 103 #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TX FIFO reaches 1/2 of its depth */ 104 #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TX FIFO reaches 3/4 of its depth */ 105 #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TX FIFO reaches 7/8 of its depth */ 106 #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TX FIFO becomes empty */ 107 /** 108 * @} 109 */ 110 111 /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level 112 * @brief UART RXFIFO threshold level 113 * @{ 114 */ 115 #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RX FIFO reaches 1/8 of its depth */ 116 #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RX FIFO reaches 1/4 of its depth */ 117 #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RX FIFO reaches 1/2 of its depth */ 118 #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RX FIFO reaches 3/4 of its depth */ 119 #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RX FIFO reaches 7/8 of its depth */ 120 #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RX FIFO becomes full */ 121 /** 122 * @} 123 */ 124 125 /** 126 * @} 127 */ 128 129 /* Exported macros -----------------------------------------------------------*/ 130 /* Exported functions --------------------------------------------------------*/ 131 /** @addtogroup UARTEx_Exported_Functions 132 * @{ 133 */ 134 135 /** @addtogroup UARTEx_Exported_Functions_Group1 136 * @{ 137 */ 138 139 /* Initialization and de-initialization functions ****************************/ 140 HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, 141 uint32_t DeassertionTime); 142 143 /** 144 * @} 145 */ 146 147 /** @addtogroup UARTEx_Exported_Functions_Group2 148 * @{ 149 */ 150 151 void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); 152 153 void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); 154 void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); 155 156 /** 157 * @} 158 */ 159 160 /** @addtogroup UARTEx_Exported_Functions_Group3 161 * @{ 162 */ 163 164 /* Peripheral Control functions **********************************************/ 165 HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); 166 HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); 167 HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); 168 169 HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); 170 171 HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); 172 HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); 173 HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 174 HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 175 176 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, 177 uint32_t Timeout); 178 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 179 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 180 181 HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(const UART_HandleTypeDef *huart); 182 183 184 /** 185 * @} 186 */ 187 188 /** 189 * @} 190 */ 191 192 /* Private macros ------------------------------------------------------------*/ 193 /** @defgroup UARTEx_Private_Macros UARTEx Private Macros 194 * @{ 195 */ 196 197 /** @brief Report the UART clock source. 198 * @param __HANDLE__ specifies the UART Handle. 199 * @param __CLOCKSOURCE__ output variable. 200 * @retval UART clocking source, written in __CLOCKSOURCE__. 201 */ 202 #if defined(UART5) 203 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 204 do { \ 205 if((__HANDLE__)->Instance == USART1) \ 206 { \ 207 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 208 { \ 209 case RCC_USART1CLKSOURCE_PCLK2: \ 210 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 211 break; \ 212 case RCC_USART1CLKSOURCE_HSI: \ 213 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 214 break; \ 215 case RCC_USART1CLKSOURCE_SYSCLK: \ 216 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 217 break; \ 218 case RCC_USART1CLKSOURCE_LSE: \ 219 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 220 break; \ 221 default: \ 222 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 223 break; \ 224 } \ 225 } \ 226 else if((__HANDLE__)->Instance == USART2) \ 227 { \ 228 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 229 { \ 230 case RCC_USART2CLKSOURCE_PCLK1: \ 231 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 232 break; \ 233 case RCC_USART2CLKSOURCE_HSI: \ 234 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 235 break; \ 236 case RCC_USART2CLKSOURCE_SYSCLK: \ 237 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 238 break; \ 239 case RCC_USART2CLKSOURCE_LSE: \ 240 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 241 break; \ 242 default: \ 243 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 244 break; \ 245 } \ 246 } \ 247 else if((__HANDLE__)->Instance == USART3) \ 248 { \ 249 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 250 { \ 251 case RCC_USART3CLKSOURCE_PCLK1: \ 252 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 253 break; \ 254 case RCC_USART3CLKSOURCE_HSI: \ 255 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 256 break; \ 257 case RCC_USART3CLKSOURCE_SYSCLK: \ 258 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 259 break; \ 260 case RCC_USART3CLKSOURCE_LSE: \ 261 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 262 break; \ 263 default: \ 264 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 265 break; \ 266 } \ 267 } \ 268 else if((__HANDLE__)->Instance == UART4) \ 269 { \ 270 switch(__HAL_RCC_GET_UART4_SOURCE()) \ 271 { \ 272 case RCC_UART4CLKSOURCE_PCLK1: \ 273 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 274 break; \ 275 case RCC_UART4CLKSOURCE_HSI: \ 276 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 277 break; \ 278 case RCC_UART4CLKSOURCE_SYSCLK: \ 279 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 280 break; \ 281 case RCC_UART4CLKSOURCE_LSE: \ 282 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 283 break; \ 284 default: \ 285 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 286 break; \ 287 } \ 288 } \ 289 else if((__HANDLE__)->Instance == UART5) \ 290 { \ 291 switch(__HAL_RCC_GET_UART5_SOURCE()) \ 292 { \ 293 case RCC_UART5CLKSOURCE_PCLK1: \ 294 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 295 break; \ 296 case RCC_UART5CLKSOURCE_HSI: \ 297 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 298 break; \ 299 case RCC_UART5CLKSOURCE_SYSCLK: \ 300 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 301 break; \ 302 case RCC_UART5CLKSOURCE_LSE: \ 303 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 304 break; \ 305 default: \ 306 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 307 break; \ 308 } \ 309 } \ 310 else if((__HANDLE__)->Instance == LPUART1) \ 311 { \ 312 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 313 { \ 314 case RCC_LPUART1CLKSOURCE_PCLK1: \ 315 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 316 break; \ 317 case RCC_LPUART1CLKSOURCE_HSI: \ 318 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 319 break; \ 320 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 321 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 322 break; \ 323 case RCC_LPUART1CLKSOURCE_LSE: \ 324 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 325 break; \ 326 default: \ 327 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 328 break; \ 329 } \ 330 } \ 331 else \ 332 { \ 333 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 334 } \ 335 } while(0U) 336 #elif defined(UART4) 337 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 338 do { \ 339 if((__HANDLE__)->Instance == USART1) \ 340 { \ 341 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 342 { \ 343 case RCC_USART1CLKSOURCE_PCLK2: \ 344 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 345 break; \ 346 case RCC_USART1CLKSOURCE_HSI: \ 347 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 348 break; \ 349 case RCC_USART1CLKSOURCE_SYSCLK: \ 350 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 351 break; \ 352 case RCC_USART1CLKSOURCE_LSE: \ 353 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 354 break; \ 355 default: \ 356 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 357 break; \ 358 } \ 359 } \ 360 else if((__HANDLE__)->Instance == USART2) \ 361 { \ 362 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 363 { \ 364 case RCC_USART2CLKSOURCE_PCLK1: \ 365 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 366 break; \ 367 case RCC_USART2CLKSOURCE_HSI: \ 368 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 369 break; \ 370 case RCC_USART2CLKSOURCE_SYSCLK: \ 371 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 372 break; \ 373 case RCC_USART2CLKSOURCE_LSE: \ 374 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 375 break; \ 376 default: \ 377 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 378 break; \ 379 } \ 380 } \ 381 else if((__HANDLE__)->Instance == USART3) \ 382 { \ 383 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 384 { \ 385 case RCC_USART3CLKSOURCE_PCLK1: \ 386 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 387 break; \ 388 case RCC_USART3CLKSOURCE_HSI: \ 389 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 390 break; \ 391 case RCC_USART3CLKSOURCE_SYSCLK: \ 392 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 393 break; \ 394 case RCC_USART3CLKSOURCE_LSE: \ 395 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 396 break; \ 397 default: \ 398 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 399 break; \ 400 } \ 401 } \ 402 else if((__HANDLE__)->Instance == UART4) \ 403 { \ 404 switch(__HAL_RCC_GET_UART4_SOURCE()) \ 405 { \ 406 case RCC_UART4CLKSOURCE_PCLK1: \ 407 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 408 break; \ 409 case RCC_UART4CLKSOURCE_HSI: \ 410 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 411 break; \ 412 case RCC_UART4CLKSOURCE_SYSCLK: \ 413 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 414 break; \ 415 case RCC_UART4CLKSOURCE_LSE: \ 416 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 417 break; \ 418 default: \ 419 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 420 break; \ 421 } \ 422 } \ 423 else if((__HANDLE__)->Instance == LPUART1) \ 424 { \ 425 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 426 { \ 427 case RCC_LPUART1CLKSOURCE_PCLK1: \ 428 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 429 break; \ 430 case RCC_LPUART1CLKSOURCE_HSI: \ 431 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 432 break; \ 433 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 434 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 435 break; \ 436 case RCC_LPUART1CLKSOURCE_LSE: \ 437 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 438 break; \ 439 default: \ 440 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 441 break; \ 442 } \ 443 } \ 444 else \ 445 { \ 446 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 447 } \ 448 } while(0U) 449 #else 450 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 451 do { \ 452 if((__HANDLE__)->Instance == USART1) \ 453 { \ 454 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 455 { \ 456 case RCC_USART1CLKSOURCE_PCLK2: \ 457 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 458 break; \ 459 case RCC_USART1CLKSOURCE_HSI: \ 460 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 461 break; \ 462 case RCC_USART1CLKSOURCE_SYSCLK: \ 463 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 464 break; \ 465 case RCC_USART1CLKSOURCE_LSE: \ 466 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 467 break; \ 468 default: \ 469 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 470 break; \ 471 } \ 472 } \ 473 else if((__HANDLE__)->Instance == USART2) \ 474 { \ 475 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 476 { \ 477 case RCC_USART2CLKSOURCE_PCLK1: \ 478 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 479 break; \ 480 case RCC_USART2CLKSOURCE_HSI: \ 481 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 482 break; \ 483 case RCC_USART2CLKSOURCE_SYSCLK: \ 484 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 485 break; \ 486 case RCC_USART2CLKSOURCE_LSE: \ 487 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 488 break; \ 489 default: \ 490 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 491 break; \ 492 } \ 493 } \ 494 else if((__HANDLE__)->Instance == USART3) \ 495 { \ 496 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 497 { \ 498 case RCC_USART3CLKSOURCE_PCLK1: \ 499 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 500 break; \ 501 case RCC_USART3CLKSOURCE_HSI: \ 502 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 503 break; \ 504 case RCC_USART3CLKSOURCE_SYSCLK: \ 505 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 506 break; \ 507 case RCC_USART3CLKSOURCE_LSE: \ 508 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 509 break; \ 510 default: \ 511 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 512 break; \ 513 } \ 514 } \ 515 else if((__HANDLE__)->Instance == LPUART1) \ 516 { \ 517 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 518 { \ 519 case RCC_LPUART1CLKSOURCE_PCLK1: \ 520 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 521 break; \ 522 case RCC_LPUART1CLKSOURCE_HSI: \ 523 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 524 break; \ 525 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 526 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 527 break; \ 528 case RCC_LPUART1CLKSOURCE_LSE: \ 529 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 530 break; \ 531 default: \ 532 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 533 break; \ 534 } \ 535 } \ 536 else \ 537 { \ 538 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 539 } \ 540 } while(0U) 541 #endif /* UART5 */ 542 543 /** @brief Report the UART mask to apply to retrieve the received data 544 * according to the word length and to the parity bits activation. 545 * @note If PCE = 1, the parity bit is not included in the data extracted 546 * by the reception API(). 547 * This masking operation is not carried out in the case of 548 * DMA transfers. 549 * @param __HANDLE__ specifies the UART Handle. 550 * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. 551 */ 552 #define UART_MASK_COMPUTATION(__HANDLE__) \ 553 do { \ 554 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ 555 { \ 556 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 557 { \ 558 (__HANDLE__)->Mask = 0x01FFU ; \ 559 } \ 560 else \ 561 { \ 562 (__HANDLE__)->Mask = 0x00FFU ; \ 563 } \ 564 } \ 565 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ 566 { \ 567 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 568 { \ 569 (__HANDLE__)->Mask = 0x00FFU ; \ 570 } \ 571 else \ 572 { \ 573 (__HANDLE__)->Mask = 0x007FU ; \ 574 } \ 575 } \ 576 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ 577 { \ 578 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 579 { \ 580 (__HANDLE__)->Mask = 0x007FU ; \ 581 } \ 582 else \ 583 { \ 584 (__HANDLE__)->Mask = 0x003FU ; \ 585 } \ 586 } \ 587 else \ 588 { \ 589 (__HANDLE__)->Mask = 0x0000U; \ 590 } \ 591 } while(0U) 592 593 /** 594 * @brief Ensure that UART frame length is valid. 595 * @param __LENGTH__ UART frame length. 596 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 597 */ 598 #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ 599 ((__LENGTH__) == UART_WORDLENGTH_8B) || \ 600 ((__LENGTH__) == UART_WORDLENGTH_9B)) 601 602 /** 603 * @brief Ensure that UART wake-up address length is valid. 604 * @param __ADDRESS__ UART wake-up address length. 605 * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) 606 */ 607 #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ 608 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) 609 610 /** 611 * @brief Ensure that UART TXFIFO threshold level is valid. 612 * @param __THRESHOLD__ UART TXFIFO threshold level. 613 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 614 */ 615 #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ 616 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ 617 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ 618 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ 619 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ 620 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) 621 622 /** 623 * @brief Ensure that UART RXFIFO threshold level is valid. 624 * @param __THRESHOLD__ UART RXFIFO threshold level. 625 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 626 */ 627 #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ 628 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ 629 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ 630 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ 631 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ 632 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) 633 634 /** 635 * @} 636 */ 637 638 /* Private functions ---------------------------------------------------------*/ 639 640 /** 641 * @} 642 */ 643 644 /** 645 * @} 646 */ 647 648 #ifdef __cplusplus 649 } 650 #endif 651 652 #endif /* STM32G4xx_HAL_UART_EX_H */ 653 654
