1 /**
2 ******************************************************************************
3 * @file stm32g0xx_hal_dac.c
4 * @author MCD Application Team
5 * @brief DAC HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Digital to Analog Converter (DAC) peripheral:
8 * + Initialization and de-initialization functions
9 * + IO operation functions
10 * + Peripheral Control functions
11 * + Peripheral State and Errors functions
12 *
13 *
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2018 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### DAC Peripheral features #####
28 ==============================================================================
29 [..]
30 *** DAC Channels ***
31 ====================
32 [..]
33 STM32G0 devices integrate two 12-bit Digital Analog Converters
34
35 The 2 converters (i.e. channel1 & channel2)
36 can be used independently or simultaneously (dual mode):
37 (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip
38 peripherals (ex. timers).
39 (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip
40 peripherals (ex. timers).
41
42 *** DAC Triggers ***
43 ====================
44 [..]
45 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
46 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
47 [..]
48 Digital to Analog conversion can be triggered by:
49 (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
50 The used pin (GPIOx_PIN_9) must be configured in input mode.
51
52 (#) Timers TRGO: TIM2, TIM3, TIM4, TIM5, TIM6 and TIM7
53 (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T3_TRGO...)
54
55 (#) Software using DAC_TRIGGER_SOFTWARE
56
57 *** DAC Buffer mode feature ***
58 ===============================
59 [..]
60 Each DAC channel integrates an output buffer that can be used to
61 reduce the output impedance, and to drive external loads directly
62 without having to add an external operational amplifier.
63 To enable, the output buffer use
64 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
65 [..]
66 (@) Refer to the device datasheet for more details about output
67 impedance value with and without output buffer.
68
69 *** GPIO configurations guidelines ***
70 =====================
71 [..]
72 When a DAC channel is used (ex channel1 on PA4) and the other is not
73 (ex channel2 on PA5 is configured in Analog and disabled).
74 Channel1 may disturb channel2 as coupling effect.
75 Note that there is no coupling on channel2 as soon as channel2 is turned on.
76 Coupling on adjacent channel could be avoided as follows:
77 when unused PA5 is configured as INPUT PULL-UP or DOWN.
78 PA5 is configured in ANALOG just before it is turned on.
79
80 *** DAC Sample and Hold feature ***
81 ========================
82 [..]
83 For each converter, 2 modes are supported: normal mode and
84 "sample and hold" mode (i.e. low power mode).
85 In the sample and hold mode, the DAC core converts data, then holds the
86 converted voltage on a capacitor. When not converting, the DAC cores and
87 buffer are completely turned off between samples and the DAC output is
88 tri-stated, therefore reducing the overall power consumption. A new
89 stabilization period is needed before each new conversion.
90
91 The sample and hold allow setting internal or external voltage @
92 low power consumption cost (output value can be at any given rate either
93 by CPU or DMA).
94
95 The Sample and hold block and registers uses either LSI & run in
96 several power modes: run mode, sleep mode, low power run, low power sleep
97 mode & stop1 mode.
98
99 Low power stop1 mode allows only static conversion.
100
101 To enable Sample and Hold mode
102 Enable LSI using HAL_RCC_OscConfig with RCC_OSCILLATORTYPE_LSI &
103 RCC_LSI_ON parameters.
104
105 Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE;
106 & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime,
107 DAC_HoldTime & DAC_RefreshTime;
108
109 *** DAC calibration feature ***
110 ===================================
111 [..]
112 (#) The 2 converters (channel1 & channel2) provide calibration capabilities.
113 (++) Calibration aims at correcting some offset of output buffer.
114 (++) The DAC uses either factory calibration settings OR user defined
115 calibration (trimming) settings (i.e. trimming mode).
116 (++) The user defined settings can be figured out using self calibration
117 handled by HAL_DACEx_SelfCalibrate.
118 (++) HAL_DACEx_SelfCalibrate:
119 (+++) Runs automatically the calibration.
120 (+++) Enables the user trimming mode
121 (+++) Updates a structure with trimming values with fresh calibration
122 results.
123 The user may store the calibration results for larger
124 (ex monitoring the trimming as a function of temperature
125 for instance)
126
127 *** DAC wave generation feature ***
128 ===================================
129 [..]
130 Both DAC channels can be used to generate
131 (#) Noise wave
132 (#) Triangle wave
133
134 *** DAC data format ***
135 =======================
136 [..]
137 The DAC data format can be:
138 (#) 8-bit right alignment using DAC_ALIGN_8B_R
139 (#) 12-bit left alignment using DAC_ALIGN_12B_L
140 (#) 12-bit right alignment using DAC_ALIGN_12B_R
141
142 *** DAC data value to voltage correspondence ***
143 ================================================
144 [..]
145 The analog output voltage on each DAC channel pin is determined
146 by the following equation:
147 [..]
148 DAC_OUTx = VREF+ * DOR / 4095
149 (+) with DOR is the Data Output Register
150 [..]
151 VREF+ is the input voltage reference (refer to the device datasheet)
152 [..]
153 e.g. To set DAC_OUT1 to 0.7V, use
154 (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
155
156 *** DMA requests ***
157 =====================
158 [..]
159 A DMA request can be generated when an external trigger (but not a software trigger)
160 occurs if DMA1 requests are enabled using HAL_DAC_Start_DMA().
161 DMA requests are mapped as following:
162 (#) DAC channel1: mapped on DMA request 8 (can be any DMA channel)
163 (#) DAC channel2: mapped on DMA request 9 (can be any DMA channel)
164
165 [..]
166 (@) For Dual mode and specific signal (Triangle and noise) generation please
167 refer to Extended Features Driver description
168
169 ##### How to use this driver #####
170 ==============================================================================
171 [..]
172 (+) DAC APB clock must be enabled to get write access to DAC
173 registers using HAL_DAC_Init()
174 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
175 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
176 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions.
177
178 *** Calibration mode IO operation ***
179 ======================================
180 [..]
181 (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset()
182 (+) Run the calibration using HAL_DACEx_SelfCalibrate()
183 (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming()
184
185 *** Polling mode IO operation ***
186 =================================
187 [..]
188 (+) Start the DAC peripheral using HAL_DAC_Start()
189 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
190 (+) Stop the DAC peripheral using HAL_DAC_Stop()
191
192 *** DMA mode IO operation ***
193 ==============================
194 [..]
195 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
196 of data to be transferred at each end of conversion
197 First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue().
198 (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
199 function is executed and user can add his own code by customization of function pointer
200 HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
201 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
202 function is executed and user can add his own code by customization of function pointer
203 HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
204 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can
205 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
206 (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
207 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2()
208 function is executed and user can add his own code by customization of function pointer
209 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and
210 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1()
211 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
212
213 *** Callback registration ***
214 =============================================
215 [..]
216 The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1
217 allows the user to configure dynamically the driver callbacks.
218
219 Use Functions HAL_DAC_RegisterCallback() to register a user callback,
220 it allows to register following callbacks:
221 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
222 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
223 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
224 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
225 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
226 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
227 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
228 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
229 (+) MspInitCallback : DAC MspInit.
230 (+) MspDeInitCallback : DAC MspdeInit.
231 This function takes as parameters the HAL peripheral handle, the Callback ID
232 and a pointer to the user callback function.
233
234 Use function HAL_DAC_UnRegisterCallback() to reset a callback to the default
235 weak (overridden) function. It allows to reset following callbacks:
236 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
237 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
238 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
239 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
240 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
241 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
242 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
243 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
244 (+) MspInitCallback : DAC MspInit.
245 (+) MspDeInitCallback : DAC MspdeInit.
246 (+) All Callbacks
247 This function) takes as parameters the HAL peripheral handle and the Callback ID.
248
249 By default, after the HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET
250 all callbacks are reset to the corresponding legacy weak (overridden) functions.
251 Exception done for MspInit and MspDeInit callbacks that are respectively
252 reset to the legacy weak (overridden) functions in the HAL_DAC_Init
253 and HAL_DAC_DeInit only when these callbacks are null (not registered beforehand).
254 If not, MspInit or MspDeInit are not null, the HAL_DAC_Init and HAL_DAC_DeInit
255 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
256
257 Callbacks can be registered/unregistered in READY state only.
258 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
259 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
260 during the Init/DeInit.
261 In that case first register the MspInit/MspDeInit user callbacks
262 using HAL_DAC_RegisterCallback before calling HAL_DAC_DeInit
263 or HAL_DAC_Init function.
264
265 When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or
266 not defined, the callback registering feature is not available
267 and weak (overridden) callbacks are used.
268
269 *** DAC HAL driver macros list ***
270 =============================================
271 [..]
272 Below the list of most used macros in DAC HAL driver.
273
274 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
275 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
276 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
277 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
278
279 [..]
280 (@) You can refer to the DAC HAL driver header file for more useful macros
281
282 @endverbatim
283 ******************************************************************************
284 */
285
286 /* Includes ------------------------------------------------------------------*/
287 #include "stm32g0xx_hal.h"
288
289 /** @addtogroup STM32G0xx_HAL_Driver
290 * @{
291 */
292
293 #ifdef HAL_DAC_MODULE_ENABLED
294 #if defined(DAC1)
295
296 /** @defgroup DAC DAC
297 * @brief DAC driver modules
298 * @{
299 */
300
301 /* Private typedef -----------------------------------------------------------*/
302 /* Private define ------------------------------------------------------------*/
303 /* Private constants ---------------------------------------------------------*/
304 /** @addtogroup DAC_Private_Constants DAC Private Constants
305 * @{
306 */
307 #define TIMEOUT_DAC_CALIBCONFIG 1U /* 1 ms */
308
309 /**
310 * @}
311 */
312
313 /* Private macro -------------------------------------------------------------*/
314 /* Private variables ---------------------------------------------------------*/
315 /* Private function prototypes -----------------------------------------------*/
316 /* Exported functions -------------------------------------------------------*/
317
318 /** @defgroup DAC_Exported_Functions DAC Exported Functions
319 * @{
320 */
321
322 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
323 * @brief Initialization and Configuration functions
324 *
325 @verbatim
326 ==============================================================================
327 ##### Initialization and de-initialization functions #####
328 ==============================================================================
329 [..] This section provides functions allowing to:
330 (+) Initialize and configure the DAC.
331 (+) De-initialize the DAC.
332
333 @endverbatim
334 * @{
335 */
336
337 /**
338 * @brief Initialize the DAC peripheral according to the specified parameters
339 * in the DAC_InitStruct and initialize the associated handle.
340 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
341 * the configuration information for the specified DAC.
342 * @retval HAL status
343 */
HAL_DAC_Init(DAC_HandleTypeDef * hdac)344 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac)
345 {
346 /* Check the DAC peripheral handle */
347 if (hdac == NULL)
348 {
349 return HAL_ERROR;
350 }
351 /* Check the parameters */
352 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
353
354 if (hdac->State == HAL_DAC_STATE_RESET)
355 {
356 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
357 /* Init the DAC Callback settings */
358 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
359 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
360 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
361 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
362
363 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
364 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
365 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
366 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
367
368 if (hdac->MspInitCallback == NULL)
369 {
370 hdac->MspInitCallback = HAL_DAC_MspInit;
371 }
372 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
373
374 /* Allocate lock resource and initialize it */
375 hdac->Lock = HAL_UNLOCKED;
376
377 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
378 /* Init the low level hardware */
379 hdac->MspInitCallback(hdac);
380 #else
381 /* Init the low level hardware */
382 HAL_DAC_MspInit(hdac);
383 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
384 }
385
386 /* Initialize the DAC state*/
387 hdac->State = HAL_DAC_STATE_BUSY;
388
389 /* Set DAC error code to none */
390 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
391
392 /* Initialize the DAC state*/
393 hdac->State = HAL_DAC_STATE_READY;
394
395 /* Return function status */
396 return HAL_OK;
397 }
398
399 /**
400 * @brief Deinitialize the DAC peripheral registers to their default reset values.
401 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
402 * the configuration information for the specified DAC.
403 * @retval HAL status
404 */
HAL_DAC_DeInit(DAC_HandleTypeDef * hdac)405 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac)
406 {
407 /* Check the DAC peripheral handle */
408 if (hdac == NULL)
409 {
410 return HAL_ERROR;
411 }
412
413 /* Check the parameters */
414 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
415
416 /* Change DAC state */
417 hdac->State = HAL_DAC_STATE_BUSY;
418
419 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
420 if (hdac->MspDeInitCallback == NULL)
421 {
422 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
423 }
424 /* DeInit the low level hardware */
425 hdac->MspDeInitCallback(hdac);
426 #else
427 /* DeInit the low level hardware */
428 HAL_DAC_MspDeInit(hdac);
429 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
430
431 /* Set DAC error code to none */
432 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
433
434 /* Change DAC state */
435 hdac->State = HAL_DAC_STATE_RESET;
436
437 /* Release Lock */
438 __HAL_UNLOCK(hdac);
439
440 /* Return function status */
441 return HAL_OK;
442 }
443
444 /**
445 * @brief Initialize the DAC MSP.
446 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
447 * the configuration information for the specified DAC.
448 * @retval None
449 */
HAL_DAC_MspInit(DAC_HandleTypeDef * hdac)450 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac)
451 {
452 /* Prevent unused argument(s) compilation warning */
453 UNUSED(hdac);
454
455 /* NOTE : This function should not be modified, when the callback is needed,
456 the HAL_DAC_MspInit could be implemented in the user file
457 */
458 }
459
460 /**
461 * @brief DeInitialize the DAC MSP.
462 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
463 * the configuration information for the specified DAC.
464 * @retval None
465 */
HAL_DAC_MspDeInit(DAC_HandleTypeDef * hdac)466 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac)
467 {
468 /* Prevent unused argument(s) compilation warning */
469 UNUSED(hdac);
470
471 /* NOTE : This function should not be modified, when the callback is needed,
472 the HAL_DAC_MspDeInit could be implemented in the user file
473 */
474 }
475
476 /**
477 * @}
478 */
479
480 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
481 * @brief IO operation functions
482 *
483 @verbatim
484 ==============================================================================
485 ##### IO operation functions #####
486 ==============================================================================
487 [..] This section provides functions allowing to:
488 (+) Start conversion.
489 (+) Stop conversion.
490 (+) Start conversion and enable DMA transfer.
491 (+) Stop conversion and disable DMA transfer.
492 (+) Get result of conversion.
493
494 @endverbatim
495 * @{
496 */
497
498 /**
499 * @brief Enables DAC and starts conversion of channel.
500 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
501 * the configuration information for the specified DAC.
502 * @param Channel The selected DAC channel.
503 * This parameter can be one of the following values:
504 * @arg DAC_CHANNEL_1: DAC Channel1 selected
505 * @arg DAC_CHANNEL_2: DAC Channel2 selected
506 * @retval HAL status
507 */
HAL_DAC_Start(DAC_HandleTypeDef * hdac,uint32_t Channel)508 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel)
509 {
510 /* Check the DAC peripheral handle */
511 if (hdac == NULL)
512 {
513 return HAL_ERROR;
514 }
515
516 /* Check the parameters */
517 assert_param(IS_DAC_CHANNEL(Channel));
518
519 /* Process locked */
520 __HAL_LOCK(hdac);
521
522 /* Change DAC state */
523 hdac->State = HAL_DAC_STATE_BUSY;
524
525 /* Enable the Peripheral */
526 __HAL_DAC_ENABLE(hdac, Channel);
527
528 if (Channel == DAC_CHANNEL_1)
529 {
530 /* Check if software trigger enabled */
531 if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE)
532 {
533 /* Enable the selected DAC software conversion */
534 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
535 }
536 }
537
538 else
539 {
540 /* Check if software trigger enabled */
541 if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL)))
542 {
543 /* Enable the selected DAC software conversion*/
544 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
545 }
546 }
547
548
549 /* Change DAC state */
550 hdac->State = HAL_DAC_STATE_READY;
551
552 /* Process unlocked */
553 __HAL_UNLOCK(hdac);
554
555 /* Return function status */
556 return HAL_OK;
557 }
558
559 /**
560 * @brief Disables DAC and stop conversion of channel.
561 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
562 * the configuration information for the specified DAC.
563 * @param Channel The selected DAC channel.
564 * This parameter can be one of the following values:
565 * @arg DAC_CHANNEL_1: DAC Channel1 selected
566 * @arg DAC_CHANNEL_2: DAC Channel2 selected
567 * @retval HAL status
568 */
HAL_DAC_Stop(DAC_HandleTypeDef * hdac,uint32_t Channel)569 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel)
570 {
571 /* Check the DAC peripheral handle */
572 if (hdac == NULL)
573 {
574 return HAL_ERROR;
575 }
576
577 /* Check the parameters */
578 assert_param(IS_DAC_CHANNEL(Channel));
579
580 /* Disable the Peripheral */
581 __HAL_DAC_DISABLE(hdac, Channel);
582
583 /* Change DAC state */
584 hdac->State = HAL_DAC_STATE_READY;
585
586 /* Return function status */
587 return HAL_OK;
588 }
589
590 /**
591 * @brief Enables DAC and starts conversion of channel.
592 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
593 * the configuration information for the specified DAC.
594 * @param Channel The selected DAC channel.
595 * This parameter can be one of the following values:
596 * @arg DAC_CHANNEL_1: DAC Channel1 selected
597 * @arg DAC_CHANNEL_2: DAC Channel2 selected
598 * @param pData The source Buffer address.
599 * @param Length The length of data to be transferred from memory to DAC peripheral
600 * @param Alignment Specifies the data alignment for DAC channel.
601 * This parameter can be one of the following values:
602 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
603 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
604 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
605 * @retval HAL status
606 */
HAL_DAC_Start_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel,const uint32_t * pData,uint32_t Length,uint32_t Alignment)607 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, const uint32_t *pData, uint32_t Length,
608 uint32_t Alignment)
609 {
610 HAL_StatusTypeDef status;
611 uint32_t tmpreg;
612
613 /* Check the DAC peripheral handle */
614 if (hdac == NULL)
615 {
616 return HAL_ERROR;
617 }
618
619 /* Check the parameters */
620 assert_param(IS_DAC_CHANNEL(Channel));
621 assert_param(IS_DAC_ALIGN(Alignment));
622
623 /* Process locked */
624 __HAL_LOCK(hdac);
625
626 /* Change DAC state */
627 hdac->State = HAL_DAC_STATE_BUSY;
628
629 if (Channel == DAC_CHANNEL_1)
630 {
631 /* Set the DMA transfer complete callback for channel1 */
632 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
633
634 /* Set the DMA half transfer complete callback for channel1 */
635 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
636
637 /* Set the DMA error callback for channel1 */
638 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
639
640 /* Enable the selected DAC channel1 DMA request */
641 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
642
643 /* Case of use of channel 1 */
644 switch (Alignment)
645 {
646 case DAC_ALIGN_12B_R:
647 /* Get DHR12R1 address */
648 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
649 break;
650 case DAC_ALIGN_12B_L:
651 /* Get DHR12L1 address */
652 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
653 break;
654 default: /* case DAC_ALIGN_8B_R */
655 /* Get DHR8R1 address */
656 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
657 break;
658 }
659 }
660
661 else
662 {
663 /* Set the DMA transfer complete callback for channel2 */
664 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
665
666 /* Set the DMA half transfer complete callback for channel2 */
667 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
668
669 /* Set the DMA error callback for channel2 */
670 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
671
672 /* Enable the selected DAC channel2 DMA request */
673 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
674
675 /* Case of use of channel 2 */
676 switch (Alignment)
677 {
678 case DAC_ALIGN_12B_R:
679 /* Get DHR12R2 address */
680 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
681 break;
682 case DAC_ALIGN_12B_L:
683 /* Get DHR12L2 address */
684 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
685 break;
686 default: /* case DAC_ALIGN_8B_R */
687 /* Get DHR8R2 address */
688 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
689 break;
690 }
691 }
692
693 if (Channel == DAC_CHANNEL_1)
694 {
695 /* Enable the DAC DMA underrun interrupt */
696 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
697
698 /* Enable the DMA channel */
699 status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
700 }
701
702 else
703 {
704 /* Enable the DAC DMA underrun interrupt */
705 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
706
707 /* Enable the DMA channel */
708 status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
709 }
710
711
712 /* Process Unlocked */
713 __HAL_UNLOCK(hdac);
714
715 if (status == HAL_OK)
716 {
717 /* Enable the Peripheral */
718 __HAL_DAC_ENABLE(hdac, Channel);
719 }
720 else
721 {
722 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
723 }
724
725 /* Return function status */
726 return status;
727 }
728
729 /**
730 * @brief Disables DAC and stop conversion of channel.
731 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
732 * the configuration information for the specified DAC.
733 * @param Channel The selected DAC channel.
734 * This parameter can be one of the following values:
735 * @arg DAC_CHANNEL_1: DAC Channel1 selected
736 * @arg DAC_CHANNEL_2: DAC Channel2 selected
737 * @retval HAL status
738 */
HAL_DAC_Stop_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel)739 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel)
740 {
741 /* Check the DAC peripheral handle */
742 if (hdac == NULL)
743 {
744 return HAL_ERROR;
745 }
746
747 /* Check the parameters */
748 assert_param(IS_DAC_CHANNEL(Channel));
749
750 /* Disable the selected DAC channel DMA request */
751 hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL));
752
753 /* Disable the Peripheral */
754 __HAL_DAC_DISABLE(hdac, Channel);
755
756 /* Disable the DMA channel */
757
758 /* Channel1 is used */
759 if (Channel == DAC_CHANNEL_1)
760 {
761 /* Disable the DMA channel */
762 (void)HAL_DMA_Abort(hdac->DMA_Handle1);
763
764 /* Disable the DAC DMA underrun interrupt */
765 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
766 }
767
768 else /* Channel2 is used for */
769 {
770 /* Disable the DMA channel */
771 (void)HAL_DMA_Abort(hdac->DMA_Handle2);
772
773 /* Disable the DAC DMA underrun interrupt */
774 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
775 }
776
777
778 /* Change DAC state */
779 hdac->State = HAL_DAC_STATE_READY;
780
781 /* Return function status */
782 return HAL_OK;
783 }
784
785 /**
786 * @brief Handles DAC interrupt request
787 * This function uses the interruption of DMA
788 * underrun.
789 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
790 * the configuration information for the specified DAC.
791 * @retval None
792 */
HAL_DAC_IRQHandler(DAC_HandleTypeDef * hdac)793 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac)
794 {
795 uint32_t itsource = hdac->Instance->CR;
796 uint32_t itflag = hdac->Instance->SR;
797
798 if ((itsource & DAC_IT_DMAUDR1) == DAC_IT_DMAUDR1)
799 {
800 /* Check underrun flag of DAC channel 1 */
801 if ((itflag & DAC_FLAG_DMAUDR1) == DAC_FLAG_DMAUDR1)
802 {
803 /* Change DAC state to error state */
804 hdac->State = HAL_DAC_STATE_ERROR;
805
806 /* Set DAC error code to channel1 DMA underrun error */
807 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
808
809 /* Clear the underrun flag */
810 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1);
811
812 /* Disable the selected DAC channel1 DMA request */
813 __HAL_DAC_DISABLE_IT(hdac, DAC_CR_DMAEN1);
814
815 /* Error callback */
816 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
817 hdac->DMAUnderrunCallbackCh1(hdac);
818 #else
819 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
820 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
821 }
822 }
823
824
825 if ((itsource & DAC_IT_DMAUDR2) == DAC_IT_DMAUDR2)
826 {
827 /* Check underrun flag of DAC channel 2 */
828 if ((itflag & DAC_FLAG_DMAUDR2) == DAC_FLAG_DMAUDR2)
829 {
830 /* Change DAC state to error state */
831 hdac->State = HAL_DAC_STATE_ERROR;
832
833 /* Set DAC error code to channel2 DMA underrun error */
834 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
835
836 /* Clear the underrun flag */
837 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2);
838
839 /* Disable the selected DAC channel2 DMA request */
840 __HAL_DAC_DISABLE_IT(hdac, DAC_CR_DMAEN2);
841
842 /* Error callback */
843 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
844 hdac->DMAUnderrunCallbackCh2(hdac);
845 #else
846 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
847 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
848 }
849 }
850
851 }
852
853 /**
854 * @brief Set the specified data holding register value for DAC channel.
855 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
856 * the configuration information for the specified DAC.
857 * @param Channel The selected DAC channel.
858 * This parameter can be one of the following values:
859 * @arg DAC_CHANNEL_1: DAC Channel1 selected
860 * @arg DAC_CHANNEL_2: DAC Channel2 selected
861 * @param Alignment Specifies the data alignment.
862 * This parameter can be one of the following values:
863 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
864 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
865 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
866 * @param Data Data to be loaded in the selected data holding register.
867 * @retval HAL status
868 */
HAL_DAC_SetValue(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t Alignment,uint32_t Data)869 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
870 {
871 __IO uint32_t tmp = 0UL;
872
873 /* Check the DAC peripheral handle */
874 if (hdac == NULL)
875 {
876 return HAL_ERROR;
877 }
878
879 /* Check the parameters */
880 assert_param(IS_DAC_CHANNEL(Channel));
881 assert_param(IS_DAC_ALIGN(Alignment));
882 assert_param(IS_DAC_DATA(Data));
883
884 tmp = (uint32_t)hdac->Instance;
885 if (Channel == DAC_CHANNEL_1)
886 {
887 tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
888 }
889
890 else
891 {
892 tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
893 }
894
895
896 /* Set the DAC channel selected data holding register */
897 *(__IO uint32_t *) tmp = Data;
898
899 /* Return function status */
900 return HAL_OK;
901 }
902
903 /**
904 * @brief Conversion complete callback in non-blocking mode for Channel1
905 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
906 * the configuration information for the specified DAC.
907 * @retval None
908 */
HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef * hdac)909 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac)
910 {
911 /* Prevent unused argument(s) compilation warning */
912 UNUSED(hdac);
913
914 /* NOTE : This function should not be modified, when the callback is needed,
915 the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
916 */
917 }
918
919 /**
920 * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1
921 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
922 * the configuration information for the specified DAC.
923 * @retval None
924 */
HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef * hdac)925 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac)
926 {
927 /* Prevent unused argument(s) compilation warning */
928 UNUSED(hdac);
929
930 /* NOTE : This function should not be modified, when the callback is needed,
931 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
932 */
933 }
934
935 /**
936 * @brief Error DAC callback for Channel1.
937 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
938 * the configuration information for the specified DAC.
939 * @retval None
940 */
HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef * hdac)941 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
942 {
943 /* Prevent unused argument(s) compilation warning */
944 UNUSED(hdac);
945
946 /* NOTE : This function should not be modified, when the callback is needed,
947 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
948 */
949 }
950
951 /**
952 * @brief DMA underrun DAC callback for channel1.
953 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
954 * the configuration information for the specified DAC.
955 * @retval None
956 */
HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef * hdac)957 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
958 {
959 /* Prevent unused argument(s) compilation warning */
960 UNUSED(hdac);
961
962 /* NOTE : This function should not be modified, when the callback is needed,
963 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
964 */
965 }
966
967 /**
968 * @}
969 */
970
971 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
972 * @brief Peripheral Control functions
973 *
974 @verbatim
975 ==============================================================================
976 ##### Peripheral Control functions #####
977 ==============================================================================
978 [..] This section provides functions allowing to:
979 (+) Configure channels.
980 (+) Set the specified data holding register value for DAC channel.
981
982 @endverbatim
983 * @{
984 */
985
986 /**
987 * @brief Returns the last data output value of the selected DAC channel.
988 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
989 * the configuration information for the specified DAC.
990 * @param Channel The selected DAC channel.
991 * This parameter can be one of the following values:
992 * @arg DAC_CHANNEL_1: DAC Channel1 selected
993 * @arg DAC_CHANNEL_2: DAC Channel2 selected
994 * @retval The selected DAC channel data output value.
995 */
HAL_DAC_GetValue(const DAC_HandleTypeDef * hdac,uint32_t Channel)996 uint32_t HAL_DAC_GetValue(const DAC_HandleTypeDef *hdac, uint32_t Channel)
997 {
998 uint32_t result;
999
1000 /* Check the DAC peripheral handle */
1001 assert_param(hdac != NULL);
1002
1003 /* Check the parameters */
1004 assert_param(IS_DAC_CHANNEL(Channel));
1005
1006 if (Channel == DAC_CHANNEL_1)
1007 {
1008 result = hdac->Instance->DOR1;
1009 }
1010
1011 else
1012 {
1013 result = hdac->Instance->DOR2;
1014 }
1015
1016 /* Returns the DAC channel data output register value */
1017 return result;
1018 }
1019
1020 /**
1021 * @brief Configures the selected DAC channel.
1022 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1023 * the configuration information for the specified DAC.
1024 * @param sConfig DAC configuration structure.
1025 * @param Channel The selected DAC channel.
1026 * This parameter can be one of the following values:
1027 * @arg DAC_CHANNEL_1: DAC Channel1 selected
1028 * @arg DAC_CHANNEL_2: DAC Channel2 selected
1029 * @retval HAL status
1030 */
HAL_DAC_ConfigChannel(DAC_HandleTypeDef * hdac,const DAC_ChannelConfTypeDef * sConfig,uint32_t Channel)1031 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac,
1032 const DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
1033 {
1034 HAL_StatusTypeDef status = HAL_OK;
1035 uint32_t tmpreg1;
1036 uint32_t tmpreg2;
1037 uint32_t tickstart;
1038
1039 /* Check the DAC peripheral handle and channel configuration struct */
1040 if ((hdac == NULL) || (sConfig == NULL))
1041 {
1042 return HAL_ERROR;
1043 }
1044
1045 /* Check the DAC parameters */
1046 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
1047 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
1048 assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral));
1049 assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming));
1050 if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER)
1051 {
1052 assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue));
1053 }
1054 assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold));
1055 if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE)
1056 {
1057 assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime));
1058 assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime));
1059 assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime));
1060 }
1061 assert_param(IS_DAC_CHANNEL(Channel));
1062
1063 /* Process locked */
1064 __HAL_LOCK(hdac);
1065
1066 /* Change DAC state */
1067 hdac->State = HAL_DAC_STATE_BUSY;
1068
1069 /* Sample and hold configuration */
1070 if (sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE)
1071 {
1072 /* Get timeout */
1073 tickstart = HAL_GetTick();
1074
1075 if (Channel == DAC_CHANNEL_1)
1076 {
1077 /* SHSR1 can be written when BWST1 is cleared */
1078 while (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1079 {
1080 /* Check for the Timeout */
1081 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1082 {
1083 /* New check to avoid false timeout detection in case of preemption */
1084 if (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1085 {
1086 /* Update error code */
1087 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1088
1089 /* Change the DMA state */
1090 hdac->State = HAL_DAC_STATE_TIMEOUT;
1091
1092 return HAL_TIMEOUT;
1093 }
1094 }
1095 }
1096 hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1097 }
1098
1099 else /* Channel 2 */
1100 {
1101 /* SHSR2 can be written when BWST2 is cleared */
1102 while (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1103 {
1104 /* Check for the Timeout */
1105 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1106 {
1107 /* New check to avoid false timeout detection in case of preemption */
1108 if (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1109 {
1110 /* Update error code */
1111 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1112
1113 /* Change the DMA state */
1114 hdac->State = HAL_DAC_STATE_TIMEOUT;
1115
1116 return HAL_TIMEOUT;
1117 }
1118 }
1119 }
1120 hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1121 }
1122
1123
1124 /* HoldTime */
1125 MODIFY_REG(hdac->Instance->SHHR, DAC_SHHR_THOLD1 << (Channel & 0x10UL),
1126 (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime) << (Channel & 0x10UL));
1127 /* RefreshTime */
1128 MODIFY_REG(hdac->Instance->SHRR, DAC_SHRR_TREFRESH1 << (Channel & 0x10UL),
1129 (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime) << (Channel & 0x10UL));
1130 }
1131
1132 if (sConfig->DAC_UserTrimming == DAC_TRIMMING_USER)
1133 /* USER TRIMMING */
1134 {
1135 /* Get the DAC CCR value */
1136 tmpreg1 = hdac->Instance->CCR;
1137 /* Clear trimming value */
1138 tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << (Channel & 0x10UL));
1139 /* Configure for the selected trimming offset */
1140 tmpreg2 = sConfig->DAC_TrimmingValue;
1141 /* Calculate CCR register value depending on DAC_Channel */
1142 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1143 /* Write to DAC CCR */
1144 hdac->Instance->CCR = tmpreg1;
1145 }
1146 /* else factory trimming is used (factory setting are available at reset)*/
1147 /* SW Nothing has nothing to do */
1148
1149 /* Get the DAC MCR value */
1150 tmpreg1 = hdac->Instance->MCR;
1151 /* Clear DAC_MCR_MODEx bits */
1152 tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << (Channel & 0x10UL));
1153 /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */
1154 tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | sConfig->DAC_ConnectOnChipPeripheral);
1155 /* Calculate MCR register value depending on DAC_Channel */
1156 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1157 /* Write to DAC MCR */
1158 hdac->Instance->MCR = tmpreg1;
1159
1160 /* DAC in normal operating mode hence clear DAC_CR_CENx bit */
1161 CLEAR_BIT(hdac->Instance->CR, DAC_CR_CEN1 << (Channel & 0x10UL));
1162
1163 /* Get the DAC CR value */
1164 tmpreg1 = hdac->Instance->CR;
1165 /* Clear TENx, TSELx, WAVEx and MAMPx bits */
1166 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << (Channel & 0x10UL));
1167 /* Configure for the selected DAC channel: trigger */
1168 /* Set TSELx and TENx bits according to DAC_Trigger value */
1169 tmpreg2 = sConfig->DAC_Trigger;
1170 /* Calculate CR register value depending on DAC_Channel */
1171 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1172 /* Write to DAC CR */
1173 hdac->Instance->CR = tmpreg1;
1174 /* Disable wave generation */
1175 CLEAR_BIT(hdac->Instance->CR, (DAC_CR_WAVE1 << (Channel & 0x10UL)));
1176
1177 /* Change DAC state */
1178 hdac->State = HAL_DAC_STATE_READY;
1179
1180 /* Process unlocked */
1181 __HAL_UNLOCK(hdac);
1182
1183 /* Return function status */
1184 return status;
1185 }
1186
1187 /**
1188 * @}
1189 */
1190
1191 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
1192 * @brief Peripheral State and Errors functions
1193 *
1194 @verbatim
1195 ==============================================================================
1196 ##### Peripheral State and Errors functions #####
1197 ==============================================================================
1198 [..]
1199 This subsection provides functions allowing to
1200 (+) Check the DAC state.
1201 (+) Check the DAC Errors.
1202
1203 @endverbatim
1204 * @{
1205 */
1206
1207 /**
1208 * @brief return the DAC handle state
1209 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1210 * the configuration information for the specified DAC.
1211 * @retval HAL state
1212 */
HAL_DAC_GetState(const DAC_HandleTypeDef * hdac)1213 HAL_DAC_StateTypeDef HAL_DAC_GetState(const DAC_HandleTypeDef *hdac)
1214 {
1215 /* Return DAC handle state */
1216 return hdac->State;
1217 }
1218
1219
1220 /**
1221 * @brief Return the DAC error code
1222 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1223 * the configuration information for the specified DAC.
1224 * @retval DAC Error Code
1225 */
HAL_DAC_GetError(const DAC_HandleTypeDef * hdac)1226 uint32_t HAL_DAC_GetError(const DAC_HandleTypeDef *hdac)
1227 {
1228 return hdac->ErrorCode;
1229 }
1230
1231 /**
1232 * @}
1233 */
1234
1235 /**
1236 * @}
1237 */
1238
1239 /** @addtogroup DAC_Exported_Functions
1240 * @{
1241 */
1242
1243 /** @addtogroup DAC_Exported_Functions_Group1
1244 * @{
1245 */
1246 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1247 /**
1248 * @brief Register a User DAC Callback
1249 * To be used instead of the weak (overridden) predefined callback
1250 * @note The HAL_DAC_RegisterCallback() may be called before HAL_DAC_Init() in HAL_DAC_STATE_RESET to register
1251 * callbacks for HAL_DAC_MSPINIT_CB_ID and HAL_DAC_MSPDEINIT_CB_ID
1252 * @param hdac DAC handle
1253 * @param CallbackID ID of the callback to be registered
1254 * This parameter can be one of the following values:
1255 * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID
1256 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID
1257 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1258 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1259 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1260 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1261 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1262 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1263 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1264 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1265 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1266 *
1267 * @param pCallback pointer to the Callback function
1268 * @retval status
1269 */
HAL_DAC_RegisterCallback(DAC_HandleTypeDef * hdac,HAL_DAC_CallbackIDTypeDef CallbackID,pDAC_CallbackTypeDef pCallback)1270 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID,
1271 pDAC_CallbackTypeDef pCallback)
1272 {
1273 HAL_StatusTypeDef status = HAL_OK;
1274
1275 /* Check the DAC peripheral handle */
1276 if (hdac == NULL)
1277 {
1278 return HAL_ERROR;
1279 }
1280
1281 if (pCallback == NULL)
1282 {
1283 /* Update the error code */
1284 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1285 return HAL_ERROR;
1286 }
1287
1288 if (hdac->State == HAL_DAC_STATE_READY)
1289 {
1290 switch (CallbackID)
1291 {
1292 case HAL_DAC_CH1_COMPLETE_CB_ID :
1293 hdac->ConvCpltCallbackCh1 = pCallback;
1294 break;
1295 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1296 hdac->ConvHalfCpltCallbackCh1 = pCallback;
1297 break;
1298 case HAL_DAC_CH1_ERROR_ID :
1299 hdac->ErrorCallbackCh1 = pCallback;
1300 break;
1301 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1302 hdac->DMAUnderrunCallbackCh1 = pCallback;
1303 break;
1304
1305 case HAL_DAC_CH2_COMPLETE_CB_ID :
1306 hdac->ConvCpltCallbackCh2 = pCallback;
1307 break;
1308 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1309 hdac->ConvHalfCpltCallbackCh2 = pCallback;
1310 break;
1311 case HAL_DAC_CH2_ERROR_ID :
1312 hdac->ErrorCallbackCh2 = pCallback;
1313 break;
1314 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1315 hdac->DMAUnderrunCallbackCh2 = pCallback;
1316 break;
1317
1318 case HAL_DAC_MSPINIT_CB_ID :
1319 hdac->MspInitCallback = pCallback;
1320 break;
1321 case HAL_DAC_MSPDEINIT_CB_ID :
1322 hdac->MspDeInitCallback = pCallback;
1323 break;
1324 default :
1325 /* Update the error code */
1326 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1327 /* update return status */
1328 status = HAL_ERROR;
1329 break;
1330 }
1331 }
1332 else if (hdac->State == HAL_DAC_STATE_RESET)
1333 {
1334 switch (CallbackID)
1335 {
1336 case HAL_DAC_MSPINIT_CB_ID :
1337 hdac->MspInitCallback = pCallback;
1338 break;
1339 case HAL_DAC_MSPDEINIT_CB_ID :
1340 hdac->MspDeInitCallback = pCallback;
1341 break;
1342 default :
1343 /* Update the error code */
1344 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1345 /* update return status */
1346 status = HAL_ERROR;
1347 break;
1348 }
1349 }
1350 else
1351 {
1352 /* Update the error code */
1353 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1354 /* update return status */
1355 status = HAL_ERROR;
1356 }
1357
1358 return status;
1359 }
1360
1361 /**
1362 * @brief Unregister a User DAC Callback
1363 * DAC Callback is redirected to the weak (overridden) predefined callback
1364 * @note The HAL_DAC_UnRegisterCallback() may be called before HAL_DAC_Init() in HAL_DAC_STATE_RESET to un-register
1365 * callbacks for HAL_DAC_MSPINIT_CB_ID and HAL_DAC_MSPDEINIT_CB_ID
1366 * @param hdac DAC handle
1367 * @param CallbackID ID of the callback to be unregistered
1368 * This parameter can be one of the following values:
1369 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 transfer Complete Callback ID
1370 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1371 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1372 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1373 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1374 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1375 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1376 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1377 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1378 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1379 * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks
1380 * @retval status
1381 */
HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef * hdac,HAL_DAC_CallbackIDTypeDef CallbackID)1382 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID)
1383 {
1384 HAL_StatusTypeDef status = HAL_OK;
1385
1386 /* Check the DAC peripheral handle */
1387 if (hdac == NULL)
1388 {
1389 return HAL_ERROR;
1390 }
1391
1392 if (hdac->State == HAL_DAC_STATE_READY)
1393 {
1394 switch (CallbackID)
1395 {
1396 case HAL_DAC_CH1_COMPLETE_CB_ID :
1397 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1398 break;
1399 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1400 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1401 break;
1402 case HAL_DAC_CH1_ERROR_ID :
1403 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1404 break;
1405 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1406 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1407 break;
1408
1409 case HAL_DAC_CH2_COMPLETE_CB_ID :
1410 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1411 break;
1412 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1413 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1414 break;
1415 case HAL_DAC_CH2_ERROR_ID :
1416 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1417 break;
1418 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1419 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1420 break;
1421
1422 case HAL_DAC_MSPINIT_CB_ID :
1423 hdac->MspInitCallback = HAL_DAC_MspInit;
1424 break;
1425 case HAL_DAC_MSPDEINIT_CB_ID :
1426 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1427 break;
1428 case HAL_DAC_ALL_CB_ID :
1429 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1430 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1431 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1432 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1433
1434 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1435 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1436 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1437 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1438
1439 hdac->MspInitCallback = HAL_DAC_MspInit;
1440 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1441 break;
1442 default :
1443 /* Update the error code */
1444 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1445 /* update return status */
1446 status = HAL_ERROR;
1447 break;
1448 }
1449 }
1450 else if (hdac->State == HAL_DAC_STATE_RESET)
1451 {
1452 switch (CallbackID)
1453 {
1454 case HAL_DAC_MSPINIT_CB_ID :
1455 hdac->MspInitCallback = HAL_DAC_MspInit;
1456 break;
1457 case HAL_DAC_MSPDEINIT_CB_ID :
1458 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1459 break;
1460 default :
1461 /* Update the error code */
1462 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1463 /* update return status */
1464 status = HAL_ERROR;
1465 break;
1466 }
1467 }
1468 else
1469 {
1470 /* Update the error code */
1471 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1472 /* update return status */
1473 status = HAL_ERROR;
1474 }
1475
1476 return status;
1477 }
1478 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1479
1480 /**
1481 * @}
1482 */
1483
1484 /**
1485 * @}
1486 */
1487
1488 /** @addtogroup DAC_Private_Functions
1489 * @{
1490 */
1491
1492 /**
1493 * @brief DMA conversion complete callback.
1494 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1495 * the configuration information for the specified DMA module.
1496 * @retval None
1497 */
DAC_DMAConvCpltCh1(DMA_HandleTypeDef * hdma)1498 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
1499 {
1500 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1501
1502 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1503 hdac->ConvCpltCallbackCh1(hdac);
1504 #else
1505 HAL_DAC_ConvCpltCallbackCh1(hdac);
1506 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1507
1508 hdac->State = HAL_DAC_STATE_READY;
1509 }
1510
1511 /**
1512 * @brief DMA half transfer complete callback.
1513 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1514 * the configuration information for the specified DMA module.
1515 * @retval None
1516 */
DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef * hdma)1517 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
1518 {
1519 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1520 /* Conversion complete callback */
1521 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1522 hdac->ConvHalfCpltCallbackCh1(hdac);
1523 #else
1524 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
1525 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1526 }
1527
1528 /**
1529 * @brief DMA error callback
1530 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1531 * the configuration information for the specified DMA module.
1532 * @retval None
1533 */
DAC_DMAErrorCh1(DMA_HandleTypeDef * hdma)1534 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
1535 {
1536 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1537
1538 /* Set DAC error code to DMA error */
1539 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
1540
1541 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1542 hdac->ErrorCallbackCh1(hdac);
1543 #else
1544 HAL_DAC_ErrorCallbackCh1(hdac);
1545 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1546
1547 hdac->State = HAL_DAC_STATE_READY;
1548 }
1549
1550 /**
1551 * @}
1552 */
1553
1554 /**
1555 * @}
1556 */
1557
1558 #endif /* DAC1 */
1559
1560 #endif /* HAL_DAC_MODULE_ENABLED */
1561 /**
1562 * @}
1563 */
1564
