1 /** 2 ****************************************************************************** 3 * @file stm32g0xx_hal_uart_ex.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2018 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32G0xx_HAL_UART_EX_H 21 #define STM32G0xx_HAL_UART_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32g0xx_hal_def.h" 29 30 /** @addtogroup STM32G0xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UARTEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UARTEx_Exported_Types UARTEx Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART wake up from stop mode parameters 45 */ 46 typedef struct 47 { 48 uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF). 49 This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. 50 If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must 51 be filled up. */ 52 53 uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. 54 This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ 55 56 uint8_t Address; /*!< UART/USART node address (7-bit long max). */ 57 } UART_WakeUpTypeDef; 58 59 /** 60 * @} 61 */ 62 63 /* Exported constants --------------------------------------------------------*/ 64 /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants 65 * @{ 66 */ 67 68 /** @defgroup UARTEx_Word_Length UARTEx Word Length 69 * @{ 70 */ 71 #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ 72 #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ 73 #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ 74 /** 75 * @} 76 */ 77 78 /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length 79 * @{ 80 */ 81 #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ 82 #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ 83 /** 84 * @} 85 */ 86 87 /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode 88 * @brief UART FIFO mode 89 * @{ 90 */ 91 #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ 92 #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ 93 /** 94 * @} 95 */ 96 97 /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level 98 * @brief UART TXFIFO threshold level 99 * @{ 100 */ 101 #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TX FIFO reaches 1/8 of its depth */ 102 #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TX FIFO reaches 1/4 of its depth */ 103 #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TX FIFO reaches 1/2 of its depth */ 104 #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TX FIFO reaches 3/4 of its depth */ 105 #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TX FIFO reaches 7/8 of its depth */ 106 #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TX FIFO becomes empty */ 107 /** 108 * @} 109 */ 110 111 /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level 112 * @brief UART RXFIFO threshold level 113 * @{ 114 */ 115 #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RX FIFO reaches 1/8 of its depth */ 116 #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RX FIFO reaches 1/4 of its depth */ 117 #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RX FIFO reaches 1/2 of its depth */ 118 #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RX FIFO reaches 3/4 of its depth */ 119 #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RX FIFO reaches 7/8 of its depth */ 120 #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RX FIFO becomes full */ 121 /** 122 * @} 123 */ 124 125 /** 126 * @} 127 */ 128 129 /* Exported macros -----------------------------------------------------------*/ 130 /* Exported functions --------------------------------------------------------*/ 131 /** @addtogroup UARTEx_Exported_Functions 132 * @{ 133 */ 134 135 /** @addtogroup UARTEx_Exported_Functions_Group1 136 * @{ 137 */ 138 139 /* Initialization and de-initialization functions ****************************/ 140 HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, 141 uint32_t DeassertionTime); 142 143 /** 144 * @} 145 */ 146 147 /** @addtogroup UARTEx_Exported_Functions_Group2 148 * @{ 149 */ 150 151 void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); 152 153 void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); 154 void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); 155 156 /** 157 * @} 158 */ 159 160 /** @addtogroup UARTEx_Exported_Functions_Group3 161 * @{ 162 */ 163 164 /* Peripheral Control functions **********************************************/ 165 HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); 166 HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); 167 HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); 168 169 HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); 170 171 HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); 172 HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); 173 HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 174 HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 175 176 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, 177 uint32_t Timeout); 178 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 179 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 180 181 HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(const UART_HandleTypeDef *huart); 182 183 184 /** 185 * @} 186 */ 187 188 /** 189 * @} 190 */ 191 192 /* Private macros ------------------------------------------------------------*/ 193 /** @defgroup UARTEx_Private_Macros UARTEx Private Macros 194 * @{ 195 */ 196 197 #if defined(STM32G0C1xx) || defined(STM32G0B1xx) 198 /** @brief Report the UART clock source. 199 * @param __HANDLE__ specifies the UART Handle. 200 * @param __CLOCKSOURCE__ output variable. 201 * @retval UART clocking source, written in __CLOCKSOURCE__. 202 */ 203 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 204 do { \ 205 if((__HANDLE__)->Instance == USART1) \ 206 { \ 207 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 208 { \ 209 case RCC_USART1CLKSOURCE_PCLK1: \ 210 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 211 break; \ 212 case RCC_USART1CLKSOURCE_HSI: \ 213 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 214 break; \ 215 case RCC_USART1CLKSOURCE_SYSCLK: \ 216 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 217 break; \ 218 case RCC_USART1CLKSOURCE_LSE: \ 219 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 220 break; \ 221 default: \ 222 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 223 break; \ 224 } \ 225 } \ 226 else if((__HANDLE__)->Instance == USART2) \ 227 { \ 228 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 229 { \ 230 case RCC_USART2CLKSOURCE_PCLK1: \ 231 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 232 break; \ 233 case RCC_USART2CLKSOURCE_HSI: \ 234 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 235 break; \ 236 case RCC_USART2CLKSOURCE_SYSCLK: \ 237 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 238 break; \ 239 case RCC_USART2CLKSOURCE_LSE: \ 240 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 241 break; \ 242 default: \ 243 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 244 break; \ 245 } \ 246 } \ 247 else if((__HANDLE__)->Instance == USART3) \ 248 { \ 249 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 250 { \ 251 case RCC_USART3CLKSOURCE_PCLK1: \ 252 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 253 break; \ 254 case RCC_USART3CLKSOURCE_HSI: \ 255 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 256 break; \ 257 case RCC_USART3CLKSOURCE_SYSCLK: \ 258 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 259 break; \ 260 case RCC_USART3CLKSOURCE_LSE: \ 261 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 262 break; \ 263 default: \ 264 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 265 break; \ 266 } \ 267 } \ 268 else if((__HANDLE__)->Instance == USART4) \ 269 { \ 270 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 271 } \ 272 else if((__HANDLE__)->Instance == USART5) \ 273 { \ 274 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 275 } \ 276 else if((__HANDLE__)->Instance == USART6) \ 277 { \ 278 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 279 } \ 280 else if((__HANDLE__)->Instance == LPUART1) \ 281 { \ 282 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 283 { \ 284 case RCC_LPUART1CLKSOURCE_PCLK1: \ 285 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 286 break; \ 287 case RCC_LPUART1CLKSOURCE_HSI: \ 288 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 289 break; \ 290 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 291 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 292 break; \ 293 case RCC_LPUART1CLKSOURCE_LSE: \ 294 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 295 break; \ 296 default: \ 297 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 298 break; \ 299 } \ 300 } \ 301 else if((__HANDLE__)->Instance == LPUART2) \ 302 { \ 303 switch(__HAL_RCC_GET_LPUART2_SOURCE()) \ 304 { \ 305 case RCC_LPUART2CLKSOURCE_PCLK1: \ 306 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 307 break; \ 308 case RCC_LPUART2CLKSOURCE_HSI: \ 309 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 310 break; \ 311 case RCC_LPUART2CLKSOURCE_SYSCLK: \ 312 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 313 break; \ 314 case RCC_LPUART2CLKSOURCE_LSE: \ 315 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 316 break; \ 317 default: \ 318 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 319 break; \ 320 } \ 321 } \ 322 else \ 323 { \ 324 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 325 } \ 326 } while(0U) 327 #elif defined(STM32G0B0xx) 328 /** @brief Report the UART clock source. 329 * @param __HANDLE__ specifies the UART Handle. 330 * @param __CLOCKSOURCE__ output variable. 331 * @retval UART clocking source, written in __CLOCKSOURCE__. 332 */ 333 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 334 do { \ 335 if((__HANDLE__)->Instance == USART1) \ 336 { \ 337 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 338 { \ 339 case RCC_USART1CLKSOURCE_PCLK1: \ 340 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 341 break; \ 342 case RCC_USART1CLKSOURCE_HSI: \ 343 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 344 break; \ 345 case RCC_USART1CLKSOURCE_SYSCLK: \ 346 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 347 break; \ 348 case RCC_USART1CLKSOURCE_LSE: \ 349 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 350 break; \ 351 default: \ 352 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 353 break; \ 354 } \ 355 } \ 356 else if((__HANDLE__)->Instance == USART2) \ 357 { \ 358 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 359 { \ 360 case RCC_USART2CLKSOURCE_PCLK1: \ 361 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 362 break; \ 363 case RCC_USART2CLKSOURCE_HSI: \ 364 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 365 break; \ 366 case RCC_USART2CLKSOURCE_SYSCLK: \ 367 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 368 break; \ 369 case RCC_USART2CLKSOURCE_LSE: \ 370 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 371 break; \ 372 default: \ 373 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 374 break; \ 375 } \ 376 } \ 377 else if((__HANDLE__)->Instance == USART3) \ 378 { \ 379 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 380 { \ 381 case RCC_USART3CLKSOURCE_PCLK1: \ 382 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 383 break; \ 384 case RCC_USART3CLKSOURCE_HSI: \ 385 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 386 break; \ 387 case RCC_USART3CLKSOURCE_SYSCLK: \ 388 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 389 break; \ 390 case RCC_USART3CLKSOURCE_LSE: \ 391 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 392 break; \ 393 default: \ 394 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 395 break; \ 396 } \ 397 } \ 398 else if((__HANDLE__)->Instance == USART4) \ 399 { \ 400 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 401 } \ 402 else if((__HANDLE__)->Instance == USART5) \ 403 { \ 404 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 405 } \ 406 else if((__HANDLE__)->Instance == USART6) \ 407 { \ 408 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 409 } \ 410 else \ 411 { \ 412 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 413 } \ 414 } while(0U) 415 #elif defined(STM32G081xx) || defined(STM32G071xx) 416 /** @brief Report the UART clock source. 417 * @param __HANDLE__ specifies the UART Handle. 418 * @param __CLOCKSOURCE__ output variable. 419 * @retval UART clocking source, written in __CLOCKSOURCE__. 420 */ 421 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 422 do { \ 423 if((__HANDLE__)->Instance == USART1) \ 424 { \ 425 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 426 { \ 427 case RCC_USART1CLKSOURCE_PCLK1: \ 428 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 429 break; \ 430 case RCC_USART1CLKSOURCE_HSI: \ 431 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 432 break; \ 433 case RCC_USART1CLKSOURCE_SYSCLK: \ 434 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 435 break; \ 436 case RCC_USART1CLKSOURCE_LSE: \ 437 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 438 break; \ 439 default: \ 440 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 441 break; \ 442 } \ 443 } \ 444 else if((__HANDLE__)->Instance == USART2) \ 445 { \ 446 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 447 { \ 448 case RCC_USART2CLKSOURCE_PCLK1: \ 449 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 450 break; \ 451 case RCC_USART2CLKSOURCE_HSI: \ 452 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 453 break; \ 454 case RCC_USART2CLKSOURCE_SYSCLK: \ 455 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 456 break; \ 457 case RCC_USART2CLKSOURCE_LSE: \ 458 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 459 break; \ 460 default: \ 461 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 462 break; \ 463 } \ 464 } \ 465 else if((__HANDLE__)->Instance == USART3) \ 466 { \ 467 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 468 } \ 469 else if((__HANDLE__)->Instance == USART4) \ 470 { \ 471 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 472 } \ 473 else if((__HANDLE__)->Instance == LPUART1) \ 474 { \ 475 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 476 { \ 477 case RCC_LPUART1CLKSOURCE_PCLK1: \ 478 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 479 break; \ 480 case RCC_LPUART1CLKSOURCE_HSI: \ 481 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 482 break; \ 483 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 484 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 485 break; \ 486 case RCC_LPUART1CLKSOURCE_LSE: \ 487 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 488 break; \ 489 default: \ 490 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 491 break; \ 492 } \ 493 } \ 494 else \ 495 { \ 496 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 497 } \ 498 } while(0U) 499 #elif defined(STM32G070xx) 500 /** @brief Report the UART clock source. 501 * @param __HANDLE__ specifies the UART Handle. 502 * @param __CLOCKSOURCE__ output variable. 503 * @retval UART clocking source, written in __CLOCKSOURCE__. 504 */ 505 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 506 do { \ 507 if((__HANDLE__)->Instance == USART1) \ 508 { \ 509 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 510 { \ 511 case RCC_USART1CLKSOURCE_PCLK1: \ 512 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 513 break; \ 514 case RCC_USART1CLKSOURCE_HSI: \ 515 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 516 break; \ 517 case RCC_USART1CLKSOURCE_SYSCLK: \ 518 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 519 break; \ 520 case RCC_USART1CLKSOURCE_LSE: \ 521 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 522 break; \ 523 default: \ 524 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 525 break; \ 526 } \ 527 } \ 528 else if((__HANDLE__)->Instance == USART2) \ 529 { \ 530 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 531 { \ 532 case RCC_USART2CLKSOURCE_PCLK1: \ 533 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 534 break; \ 535 case RCC_USART2CLKSOURCE_HSI: \ 536 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 537 break; \ 538 case RCC_USART2CLKSOURCE_SYSCLK: \ 539 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 540 break; \ 541 case RCC_USART2CLKSOURCE_LSE: \ 542 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 543 break; \ 544 default: \ 545 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 546 break; \ 547 } \ 548 } \ 549 else if((__HANDLE__)->Instance == USART3) \ 550 { \ 551 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 552 } \ 553 else if((__HANDLE__)->Instance == USART4) \ 554 { \ 555 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 556 } \ 557 else \ 558 { \ 559 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 560 } \ 561 } while(0U) 562 #elif defined(STM32G041xx) || defined(STM32G031xx) || defined(STM32G051xx) || defined(STM32G061xx) 563 /** @brief Report the UART clock source. 564 * @param __HANDLE__ specifies the UART Handle. 565 * @param __CLOCKSOURCE__ output variable. 566 * @retval UART clocking source, written in __CLOCKSOURCE__. 567 */ 568 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 569 do { \ 570 if((__HANDLE__)->Instance == USART1) \ 571 { \ 572 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 573 { \ 574 case RCC_USART1CLKSOURCE_PCLK1: \ 575 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 576 break; \ 577 case RCC_USART1CLKSOURCE_HSI: \ 578 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 579 break; \ 580 case RCC_USART1CLKSOURCE_SYSCLK: \ 581 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 582 break; \ 583 case RCC_USART1CLKSOURCE_LSE: \ 584 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 585 break; \ 586 default: \ 587 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 588 break; \ 589 } \ 590 } \ 591 else if((__HANDLE__)->Instance == USART2) \ 592 { \ 593 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 594 } \ 595 else if((__HANDLE__)->Instance == LPUART1) \ 596 { \ 597 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 598 { \ 599 case RCC_LPUART1CLKSOURCE_PCLK1: \ 600 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 601 break; \ 602 case RCC_LPUART1CLKSOURCE_HSI: \ 603 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 604 break; \ 605 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 606 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 607 break; \ 608 case RCC_LPUART1CLKSOURCE_LSE: \ 609 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 610 break; \ 611 default: \ 612 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 613 break; \ 614 } \ 615 } \ 616 else \ 617 { \ 618 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 619 } \ 620 } while(0U) 621 #elif defined(STM32G030xx) || defined(STM32G050xx) 622 /** @brief Report the UART clock source. 623 * @param __HANDLE__ specifies the UART Handle. 624 * @param __CLOCKSOURCE__ output variable. 625 * @retval UART clocking source, written in __CLOCKSOURCE__. 626 */ 627 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 628 do { \ 629 if((__HANDLE__)->Instance == USART1) \ 630 { \ 631 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 632 { \ 633 case RCC_USART1CLKSOURCE_PCLK1: \ 634 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 635 break; \ 636 case RCC_USART1CLKSOURCE_HSI: \ 637 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 638 break; \ 639 case RCC_USART1CLKSOURCE_SYSCLK: \ 640 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 641 break; \ 642 case RCC_USART1CLKSOURCE_LSE: \ 643 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 644 break; \ 645 default: \ 646 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 647 break; \ 648 } \ 649 } \ 650 else if((__HANDLE__)->Instance == USART2) \ 651 { \ 652 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 653 } \ 654 else \ 655 { \ 656 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 657 } \ 658 } while(0U) 659 #endif /* STM32G0C1xx || STM32G0B1xx */ 660 661 /** @brief Report the UART mask to apply to retrieve the received data 662 * according to the word length and to the parity bits activation. 663 * @note If PCE = 1, the parity bit is not included in the data extracted 664 * by the reception API(). 665 * This masking operation is not carried out in the case of 666 * DMA transfers. 667 * @param __HANDLE__ specifies the UART Handle. 668 * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. 669 */ 670 #define UART_MASK_COMPUTATION(__HANDLE__) \ 671 do { \ 672 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ 673 { \ 674 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 675 { \ 676 (__HANDLE__)->Mask = 0x01FFU ; \ 677 } \ 678 else \ 679 { \ 680 (__HANDLE__)->Mask = 0x00FFU ; \ 681 } \ 682 } \ 683 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ 684 { \ 685 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 686 { \ 687 (__HANDLE__)->Mask = 0x00FFU ; \ 688 } \ 689 else \ 690 { \ 691 (__HANDLE__)->Mask = 0x007FU ; \ 692 } \ 693 } \ 694 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ 695 { \ 696 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 697 { \ 698 (__HANDLE__)->Mask = 0x007FU ; \ 699 } \ 700 else \ 701 { \ 702 (__HANDLE__)->Mask = 0x003FU ; \ 703 } \ 704 } \ 705 else \ 706 { \ 707 (__HANDLE__)->Mask = 0x0000U; \ 708 } \ 709 } while(0U) 710 711 /** 712 * @brief Ensure that UART frame length is valid. 713 * @param __LENGTH__ UART frame length. 714 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 715 */ 716 #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ 717 ((__LENGTH__) == UART_WORDLENGTH_8B) || \ 718 ((__LENGTH__) == UART_WORDLENGTH_9B)) 719 720 /** 721 * @brief Ensure that UART wake-up address length is valid. 722 * @param __ADDRESS__ UART wake-up address length. 723 * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) 724 */ 725 #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ 726 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) 727 728 /** 729 * @brief Ensure that UART TXFIFO threshold level is valid. 730 * @param __THRESHOLD__ UART TXFIFO threshold level. 731 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 732 */ 733 #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ 734 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ 735 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ 736 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ 737 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ 738 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) 739 740 /** 741 * @brief Ensure that UART RXFIFO threshold level is valid. 742 * @param __THRESHOLD__ UART RXFIFO threshold level. 743 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 744 */ 745 #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ 746 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ 747 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ 748 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ 749 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ 750 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) 751 752 /** 753 * @} 754 */ 755 756 /* Private functions ---------------------------------------------------------*/ 757 758 /** 759 * @} 760 */ 761 762 /** 763 * @} 764 */ 765 766 #ifdef __cplusplus 767 } 768 #endif 769 770 #endif /* STM32G0xx_HAL_UART_EX_H */ 771 772
