1 /**
2 ******************************************************************************
3 * @file stm32f3xx_hal_tim_ex.c
4 * @author MCD Application Team
5 * @brief TIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Timer Extended peripheral:
8 * + Time Hall Sensor Interface Initialization
9 * + Time Hall Sensor Interface Start
10 * + Time Complementary signal break and dead time configuration
11 * + Time Master and Slave synchronization configuration
12 * + Time Output Compare/PWM Channel Configuration (for channels 5 and 6)
13 * + Time OCRef clear configuration
14 * + Timer remapping capabilities configuration
15 ******************************************************************************
16 * @attention
17 *
18 * Copyright (c) 2016 STMicroelectronics.
19 * All rights reserved.
20 *
21 * This software is licensed under terms that can be found in the LICENSE file
22 * in the root directory of this software component.
23 * If no LICENSE file comes with this software, it is provided AS-IS.
24 *
25 ******************************************************************************
26 @verbatim
27 ==============================================================================
28 ##### TIMER Extended features #####
29 ==============================================================================
30 [..]
31 The Timer Extended features include:
32 (#) Complementary outputs with programmable dead-time for :
33 (++) Output Compare
34 (++) PWM generation (Edge and Center-aligned Mode)
35 (++) One-pulse mode output
36 (#) Synchronization circuit to control the timer with external signals and to
37 interconnect several timers together.
38 (#) Break input to put the timer output signals in reset state or in a known state.
39 (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
40 positioning purposes
41
42 ##### How to use this driver #####
43 ==============================================================================
44 [..]
45 (#) Initialize the TIM low level resources by implementing the following functions
46 depending on the selected feature:
47 (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
48
49 (#) Initialize the TIM low level resources :
50 (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
51 (##) TIM pins configuration
52 (+++) Enable the clock for the TIM GPIOs using the following function:
53 __HAL_RCC_GPIOx_CLK_ENABLE();
54 (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
55
56 (#) The external Clock can be configured, if needed (the default clock is the
57 internal clock from the APBx), using the following function:
58 HAL_TIM_ConfigClockSource, the clock configuration should be done before
59 any start function.
60
61 (#) Configure the TIM in the desired functioning mode using one of the
62 initialization function of this driver:
63 (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the
64 Timer Hall Sensor Interface and the commutation event with the corresponding
65 Interrupt and DMA request if needed (Note that One Timer is used to interface
66 with the Hall sensor Interface and another Timer should be used to use
67 the commutation event).
68
69 (#) Activate the TIM peripheral using one of the start functions:
70 (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(),
71 HAL_TIMEx_OCN_Start_IT()
72 (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(),
73 HAL_TIMEx_PWMN_Start_IT()
74 (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
75 (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(),
76 HAL_TIMEx_HallSensor_Start_IT().
77
78 @endverbatim
79 ******************************************************************************
80 */
81
82 /* Includes ------------------------------------------------------------------*/
83 #include "stm32f3xx_hal.h"
84
85 /** @addtogroup STM32F3xx_HAL_Driver
86 * @{
87 */
88
89 /** @defgroup TIMEx TIMEx
90 * @brief TIM Extended HAL module driver
91 * @{
92 */
93
94 #ifdef HAL_TIM_MODULE_ENABLED
95
96 /* Private typedef -----------------------------------------------------------*/
97 /* Private define ------------------------------------------------------------*/
98 /* Private macros ------------------------------------------------------------*/
99 /* Private variables ---------------------------------------------------------*/
100 /* Private function prototypes -----------------------------------------------*/
101 static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma);
102 static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma);
103 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState);
104
105 /* Exported functions --------------------------------------------------------*/
106 /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
107 * @{
108 */
109
110 /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
111 * @brief Timer Hall Sensor functions
112 *
113 @verbatim
114 ==============================================================================
115 ##### Timer Hall Sensor functions #####
116 ==============================================================================
117 [..]
118 This section provides functions allowing to:
119 (+) Initialize and configure TIM HAL Sensor.
120 (+) De-initialize TIM HAL Sensor.
121 (+) Start the Hall Sensor Interface.
122 (+) Stop the Hall Sensor Interface.
123 (+) Start the Hall Sensor Interface and enable interrupts.
124 (+) Stop the Hall Sensor Interface and disable interrupts.
125 (+) Start the Hall Sensor Interface and enable DMA transfers.
126 (+) Stop the Hall Sensor Interface and disable DMA transfers.
127
128 @endverbatim
129 * @{
130 */
131 /**
132 * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle.
133 * @note When the timer instance is initialized in Hall Sensor Interface mode,
134 * timer channels 1 and channel 2 are reserved and cannot be used for
135 * other purpose.
136 * @param htim TIM Hall Sensor Interface handle
137 * @param sConfig TIM Hall Sensor configuration structure
138 * @retval HAL status
139 */
HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef * htim,const TIM_HallSensor_InitTypeDef * sConfig)140 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig)
141 {
142 TIM_OC_InitTypeDef OC_Config;
143
144 /* Check the TIM handle allocation */
145 if (htim == NULL)
146 {
147 return HAL_ERROR;
148 }
149
150 /* Check the parameters */
151 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
152 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
153 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
154 assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
155 assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
156 assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
157 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
158 assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
159
160 if (htim->State == HAL_TIM_STATE_RESET)
161 {
162 /* Allocate lock resource and initialize it */
163 htim->Lock = HAL_UNLOCKED;
164
165 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
166 /* Reset interrupt callbacks to legacy week callbacks */
167 TIM_ResetCallback(htim);
168
169 if (htim->HallSensor_MspInitCallback == NULL)
170 {
171 htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
172 }
173 /* Init the low level hardware : GPIO, CLOCK, NVIC */
174 htim->HallSensor_MspInitCallback(htim);
175 #else
176 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
177 HAL_TIMEx_HallSensor_MspInit(htim);
178 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
179 }
180
181 /* Set the TIM state */
182 htim->State = HAL_TIM_STATE_BUSY;
183
184 /* Configure the Time base in the Encoder Mode */
185 TIM_Base_SetConfig(htim->Instance, &htim->Init);
186
187 /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
188 TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
189
190 /* Reset the IC1PSC Bits */
191 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
192 /* Set the IC1PSC value */
193 htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
194
195 /* Enable the Hall sensor interface (XOR function of the three inputs) */
196 htim->Instance->CR2 |= TIM_CR2_TI1S;
197
198 /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
199 htim->Instance->SMCR &= ~TIM_SMCR_TS;
200 htim->Instance->SMCR |= TIM_TS_TI1F_ED;
201
202 /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
203 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
204 htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
205
206 /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
207 OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
208 OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
209 OC_Config.OCMode = TIM_OCMODE_PWM2;
210 OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
211 OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
212 OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
213 OC_Config.Pulse = sConfig->Commutation_Delay;
214
215 TIM_OC2_SetConfig(htim->Instance, &OC_Config);
216
217 /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
218 register to 101 */
219 htim->Instance->CR2 &= ~TIM_CR2_MMS;
220 htim->Instance->CR2 |= TIM_TRGO_OC2REF;
221
222 /* Initialize the DMA burst operation state */
223 htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
224
225 /* Initialize the TIM channels state */
226 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
227 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
228 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
229 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
230
231 /* Initialize the TIM state*/
232 htim->State = HAL_TIM_STATE_READY;
233
234 return HAL_OK;
235 }
236
237 /**
238 * @brief DeInitializes the TIM Hall Sensor interface
239 * @param htim TIM Hall Sensor Interface handle
240 * @retval HAL status
241 */
HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef * htim)242 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
243 {
244 /* Check the parameters */
245 assert_param(IS_TIM_INSTANCE(htim->Instance));
246
247 htim->State = HAL_TIM_STATE_BUSY;
248
249 /* Disable the TIM Peripheral Clock */
250 __HAL_TIM_DISABLE(htim);
251
252 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
253 if (htim->HallSensor_MspDeInitCallback == NULL)
254 {
255 htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
256 }
257 /* DeInit the low level hardware */
258 htim->HallSensor_MspDeInitCallback(htim);
259 #else
260 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
261 HAL_TIMEx_HallSensor_MspDeInit(htim);
262 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
263
264 /* Change the DMA burst operation state */
265 htim->DMABurstState = HAL_DMA_BURST_STATE_RESET;
266
267 /* Change the TIM channels state */
268 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
269 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
270 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
271 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
272
273 /* Change TIM state */
274 htim->State = HAL_TIM_STATE_RESET;
275
276 /* Release Lock */
277 __HAL_UNLOCK(htim);
278
279 return HAL_OK;
280 }
281
282 /**
283 * @brief Initializes the TIM Hall Sensor MSP.
284 * @param htim TIM Hall Sensor Interface handle
285 * @retval None
286 */
HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef * htim)287 __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
288 {
289 /* Prevent unused argument(s) compilation warning */
290 UNUSED(htim);
291
292 /* NOTE : This function should not be modified, when the callback is needed,
293 the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
294 */
295 }
296
297 /**
298 * @brief DeInitializes TIM Hall Sensor MSP.
299 * @param htim TIM Hall Sensor Interface handle
300 * @retval None
301 */
HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef * htim)302 __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
303 {
304 /* Prevent unused argument(s) compilation warning */
305 UNUSED(htim);
306
307 /* NOTE : This function should not be modified, when the callback is needed,
308 the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
309 */
310 }
311
312 /**
313 * @brief Starts the TIM Hall Sensor Interface.
314 * @param htim TIM Hall Sensor Interface handle
315 * @retval HAL status
316 */
HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef * htim)317 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
318 {
319 uint32_t tmpsmcr;
320 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
321 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
322 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
323 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
324
325 /* Check the parameters */
326 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
327
328 /* Check the TIM channels state */
329 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
330 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
331 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
332 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
333 {
334 return HAL_ERROR;
335 }
336
337 /* Set the TIM channels state */
338 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
339 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
340 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
341 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
342
343 /* Enable the Input Capture channel 1
344 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
345 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
346 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
347
348 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
349 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
350 {
351 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
352 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
353 {
354 __HAL_TIM_ENABLE(htim);
355 }
356 }
357 else
358 {
359 __HAL_TIM_ENABLE(htim);
360 }
361
362 /* Return function status */
363 return HAL_OK;
364 }
365
366 /**
367 * @brief Stops the TIM Hall sensor Interface.
368 * @param htim TIM Hall Sensor Interface handle
369 * @retval HAL status
370 */
HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef * htim)371 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
372 {
373 /* Check the parameters */
374 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
375
376 /* Disable the Input Capture channels 1, 2 and 3
377 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
378 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
379 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
380
381 /* Disable the Peripheral */
382 __HAL_TIM_DISABLE(htim);
383
384 /* Set the TIM channels state */
385 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
386 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
387 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
388 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
389
390 /* Return function status */
391 return HAL_OK;
392 }
393
394 /**
395 * @brief Starts the TIM Hall Sensor Interface in interrupt mode.
396 * @param htim TIM Hall Sensor Interface handle
397 * @retval HAL status
398 */
HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef * htim)399 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
400 {
401 uint32_t tmpsmcr;
402 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
403 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
404 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
405 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
406
407 /* Check the parameters */
408 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
409
410 /* Check the TIM channels state */
411 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
412 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
413 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
414 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
415 {
416 return HAL_ERROR;
417 }
418
419 /* Set the TIM channels state */
420 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
421 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
422 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
423 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
424
425 /* Enable the capture compare Interrupts 1 event */
426 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
427
428 /* Enable the Input Capture channel 1
429 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
430 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
431 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
432
433 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
434 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
435 {
436 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
437 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
438 {
439 __HAL_TIM_ENABLE(htim);
440 }
441 }
442 else
443 {
444 __HAL_TIM_ENABLE(htim);
445 }
446
447 /* Return function status */
448 return HAL_OK;
449 }
450
451 /**
452 * @brief Stops the TIM Hall Sensor Interface in interrupt mode.
453 * @param htim TIM Hall Sensor Interface handle
454 * @retval HAL status
455 */
HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef * htim)456 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
457 {
458 /* Check the parameters */
459 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
460
461 /* Disable the Input Capture channel 1
462 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
463 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
464 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
465
466 /* Disable the capture compare Interrupts event */
467 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
468
469 /* Disable the Peripheral */
470 __HAL_TIM_DISABLE(htim);
471
472 /* Set the TIM channels state */
473 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
474 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
475 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
476 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
477
478 /* Return function status */
479 return HAL_OK;
480 }
481
482 /**
483 * @brief Starts the TIM Hall Sensor Interface in DMA mode.
484 * @param htim TIM Hall Sensor Interface handle
485 * @param pData The destination Buffer address.
486 * @param Length The length of data to be transferred from TIM peripheral to memory.
487 * @retval HAL status
488 */
HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef * htim,uint32_t * pData,uint16_t Length)489 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
490 {
491 uint32_t tmpsmcr;
492 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
493 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
494
495 /* Check the parameters */
496 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
497
498 /* Set the TIM channel state */
499 if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)
500 || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY))
501 {
502 return HAL_BUSY;
503 }
504 else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
505 && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
506 {
507 if ((pData == NULL) || (Length == 0U))
508 {
509 return HAL_ERROR;
510 }
511 else
512 {
513 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
514 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
515 }
516 }
517 else
518 {
519 return HAL_ERROR;
520 }
521
522 /* Enable the Input Capture channel 1
523 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
524 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
525 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
526
527 /* Set the DMA Input Capture 1 Callbacks */
528 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
529 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
530 /* Set the DMA error callback */
531 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
532
533 /* Enable the DMA channel for Capture 1*/
534 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK)
535 {
536 /* Return error status */
537 return HAL_ERROR;
538 }
539 /* Enable the capture compare 1 Interrupt */
540 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
541
542 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
543 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
544 {
545 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
546 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
547 {
548 __HAL_TIM_ENABLE(htim);
549 }
550 }
551 else
552 {
553 __HAL_TIM_ENABLE(htim);
554 }
555
556 /* Return function status */
557 return HAL_OK;
558 }
559
560 /**
561 * @brief Stops the TIM Hall Sensor Interface in DMA mode.
562 * @param htim TIM Hall Sensor Interface handle
563 * @retval HAL status
564 */
HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef * htim)565 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
566 {
567 /* Check the parameters */
568 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
569
570 /* Disable the Input Capture channel 1
571 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
572 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
573 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
574
575
576 /* Disable the capture compare Interrupts 1 event */
577 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
578
579 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
580
581 /* Disable the Peripheral */
582 __HAL_TIM_DISABLE(htim);
583
584 /* Set the TIM channel state */
585 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
586 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
587
588 /* Return function status */
589 return HAL_OK;
590 }
591
592 /**
593 * @}
594 */
595
596 /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
597 * @brief Timer Complementary Output Compare functions
598 *
599 @verbatim
600 ==============================================================================
601 ##### Timer Complementary Output Compare functions #####
602 ==============================================================================
603 [..]
604 This section provides functions allowing to:
605 (+) Start the Complementary Output Compare/PWM.
606 (+) Stop the Complementary Output Compare/PWM.
607 (+) Start the Complementary Output Compare/PWM and enable interrupts.
608 (+) Stop the Complementary Output Compare/PWM and disable interrupts.
609 (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
610 (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
611
612 @endverbatim
613 * @{
614 */
615
616 /**
617 * @brief Starts the TIM Output Compare signal generation on the complementary
618 * output.
619 * @param htim TIM Output Compare handle
620 * @param Channel TIM Channel to be enabled
621 * This parameter can be one of the following values:
622 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
623 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
624 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
625 * @retval HAL status
626 */
HAL_TIMEx_OCN_Start(TIM_HandleTypeDef * htim,uint32_t Channel)627 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
628 {
629 uint32_t tmpsmcr;
630
631 /* Check the parameters */
632 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
633
634 /* Check the TIM complementary channel state */
635 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
636 {
637 return HAL_ERROR;
638 }
639
640 /* Set the TIM complementary channel state */
641 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
642
643 /* Enable the Capture compare channel N */
644 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
645
646 /* Enable the Main Output */
647 __HAL_TIM_MOE_ENABLE(htim);
648
649 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
650 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
651 {
652 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
653 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
654 {
655 __HAL_TIM_ENABLE(htim);
656 }
657 }
658 else
659 {
660 __HAL_TIM_ENABLE(htim);
661 }
662
663 /* Return function status */
664 return HAL_OK;
665 }
666
667 /**
668 * @brief Stops the TIM Output Compare signal generation on the complementary
669 * output.
670 * @param htim TIM handle
671 * @param Channel TIM Channel to be disabled
672 * This parameter can be one of the following values:
673 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
674 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
675 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
676 * @retval HAL status
677 */
HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef * htim,uint32_t Channel)678 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
679 {
680 /* Check the parameters */
681 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
682
683 /* Disable the Capture compare channel N */
684 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
685
686 /* Disable the Main Output */
687 __HAL_TIM_MOE_DISABLE(htim);
688
689 /* Disable the Peripheral */
690 __HAL_TIM_DISABLE(htim);
691
692 /* Set the TIM complementary channel state */
693 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
694
695 /* Return function status */
696 return HAL_OK;
697 }
698
699 /**
700 * @brief Starts the TIM Output Compare signal generation in interrupt mode
701 * on the complementary output.
702 * @param htim TIM OC handle
703 * @param Channel TIM Channel to be enabled
704 * This parameter can be one of the following values:
705 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
706 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
707 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
708 * @retval HAL status
709 */
HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef * htim,uint32_t Channel)710 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
711 {
712 HAL_StatusTypeDef status = HAL_OK;
713 uint32_t tmpsmcr;
714
715 /* Check the parameters */
716 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
717
718 /* Check the TIM complementary channel state */
719 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
720 {
721 return HAL_ERROR;
722 }
723
724 /* Set the TIM complementary channel state */
725 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
726
727 switch (Channel)
728 {
729 case TIM_CHANNEL_1:
730 {
731 /* Enable the TIM Output Compare interrupt */
732 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
733 break;
734 }
735
736 case TIM_CHANNEL_2:
737 {
738 /* Enable the TIM Output Compare interrupt */
739 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
740 break;
741 }
742
743 case TIM_CHANNEL_3:
744 {
745 /* Enable the TIM Output Compare interrupt */
746 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
747 break;
748 }
749
750
751 default:
752 status = HAL_ERROR;
753 break;
754 }
755
756 if (status == HAL_OK)
757 {
758 /* Enable the TIM Break interrupt */
759 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
760
761 /* Enable the Capture compare channel N */
762 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
763
764 /* Enable the Main Output */
765 __HAL_TIM_MOE_ENABLE(htim);
766
767 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
768 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
769 {
770 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
771 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
772 {
773 __HAL_TIM_ENABLE(htim);
774 }
775 }
776 else
777 {
778 __HAL_TIM_ENABLE(htim);
779 }
780 }
781
782 /* Return function status */
783 return status;
784 }
785
786 /**
787 * @brief Stops the TIM Output Compare signal generation in interrupt mode
788 * on the complementary output.
789 * @param htim TIM Output Compare handle
790 * @param Channel TIM Channel to be disabled
791 * This parameter can be one of the following values:
792 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
793 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
794 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
795 * @retval HAL status
796 */
HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t Channel)797 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
798 {
799 HAL_StatusTypeDef status = HAL_OK;
800 uint32_t tmpccer;
801
802 /* Check the parameters */
803 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
804
805 switch (Channel)
806 {
807 case TIM_CHANNEL_1:
808 {
809 /* Disable the TIM Output Compare interrupt */
810 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
811 break;
812 }
813
814 case TIM_CHANNEL_2:
815 {
816 /* Disable the TIM Output Compare interrupt */
817 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
818 break;
819 }
820
821 case TIM_CHANNEL_3:
822 {
823 /* Disable the TIM Output Compare interrupt */
824 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
825 break;
826 }
827
828 default:
829 status = HAL_ERROR;
830 break;
831 }
832
833 if (status == HAL_OK)
834 {
835 /* Disable the Capture compare channel N */
836 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
837
838 /* Disable the TIM Break interrupt (only if no more channel is active) */
839 tmpccer = htim->Instance->CCER;
840 if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET)
841 {
842 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
843 }
844
845 /* Disable the Main Output */
846 __HAL_TIM_MOE_DISABLE(htim);
847
848 /* Disable the Peripheral */
849 __HAL_TIM_DISABLE(htim);
850
851 /* Set the TIM complementary channel state */
852 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
853 }
854
855 /* Return function status */
856 return status;
857 }
858
859 /**
860 * @brief Starts the TIM Output Compare signal generation in DMA mode
861 * on the complementary output.
862 * @param htim TIM Output Compare handle
863 * @param Channel TIM Channel to be enabled
864 * This parameter can be one of the following values:
865 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
866 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
867 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
868 * @param pData The source Buffer address.
869 * @param Length The length of data to be transferred from memory to TIM peripheral
870 * @retval HAL status
871 */
HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef * htim,uint32_t Channel,const uint32_t * pData,uint16_t Length)872 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
873 uint16_t Length)
874 {
875 HAL_StatusTypeDef status = HAL_OK;
876 uint32_t tmpsmcr;
877
878 /* Check the parameters */
879 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
880
881 /* Set the TIM complementary channel state */
882 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
883 {
884 return HAL_BUSY;
885 }
886 else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
887 {
888 if ((pData == NULL) || (Length == 0U))
889 {
890 return HAL_ERROR;
891 }
892 else
893 {
894 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
895 }
896 }
897 else
898 {
899 return HAL_ERROR;
900 }
901
902 switch (Channel)
903 {
904 case TIM_CHANNEL_1:
905 {
906 /* Set the DMA compare callbacks */
907 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
908 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
909
910 /* Set the DMA error callback */
911 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
912
913 /* Enable the DMA channel */
914 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
915 Length) != HAL_OK)
916 {
917 /* Return error status */
918 return HAL_ERROR;
919 }
920 /* Enable the TIM Output Compare DMA request */
921 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
922 break;
923 }
924
925 case TIM_CHANNEL_2:
926 {
927 /* Set the DMA compare callbacks */
928 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
929 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
930
931 /* Set the DMA error callback */
932 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
933
934 /* Enable the DMA channel */
935 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
936 Length) != HAL_OK)
937 {
938 /* Return error status */
939 return HAL_ERROR;
940 }
941 /* Enable the TIM Output Compare DMA request */
942 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
943 break;
944 }
945
946 case TIM_CHANNEL_3:
947 {
948 /* Set the DMA compare callbacks */
949 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
950 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
951
952 /* Set the DMA error callback */
953 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
954
955 /* Enable the DMA channel */
956 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
957 Length) != HAL_OK)
958 {
959 /* Return error status */
960 return HAL_ERROR;
961 }
962 /* Enable the TIM Output Compare DMA request */
963 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
964 break;
965 }
966
967 default:
968 status = HAL_ERROR;
969 break;
970 }
971
972 if (status == HAL_OK)
973 {
974 /* Enable the Capture compare channel N */
975 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
976
977 /* Enable the Main Output */
978 __HAL_TIM_MOE_ENABLE(htim);
979
980 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
981 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
982 {
983 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
984 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
985 {
986 __HAL_TIM_ENABLE(htim);
987 }
988 }
989 else
990 {
991 __HAL_TIM_ENABLE(htim);
992 }
993 }
994
995 /* Return function status */
996 return status;
997 }
998
999 /**
1000 * @brief Stops the TIM Output Compare signal generation in DMA mode
1001 * on the complementary output.
1002 * @param htim TIM Output Compare handle
1003 * @param Channel TIM Channel to be disabled
1004 * This parameter can be one of the following values:
1005 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1006 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1007 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1008 * @retval HAL status
1009 */
HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef * htim,uint32_t Channel)1010 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
1011 {
1012 HAL_StatusTypeDef status = HAL_OK;
1013
1014 /* Check the parameters */
1015 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1016
1017 switch (Channel)
1018 {
1019 case TIM_CHANNEL_1:
1020 {
1021 /* Disable the TIM Output Compare DMA request */
1022 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
1023 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
1024 break;
1025 }
1026
1027 case TIM_CHANNEL_2:
1028 {
1029 /* Disable the TIM Output Compare DMA request */
1030 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
1031 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
1032 break;
1033 }
1034
1035 case TIM_CHANNEL_3:
1036 {
1037 /* Disable the TIM Output Compare DMA request */
1038 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
1039 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
1040 break;
1041 }
1042
1043 default:
1044 status = HAL_ERROR;
1045 break;
1046 }
1047
1048 if (status == HAL_OK)
1049 {
1050 /* Disable the Capture compare channel N */
1051 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1052
1053 /* Disable the Main Output */
1054 __HAL_TIM_MOE_DISABLE(htim);
1055
1056 /* Disable the Peripheral */
1057 __HAL_TIM_DISABLE(htim);
1058
1059 /* Set the TIM complementary channel state */
1060 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
1061 }
1062
1063 /* Return function status */
1064 return status;
1065 }
1066
1067 /**
1068 * @}
1069 */
1070
1071 /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
1072 * @brief Timer Complementary PWM functions
1073 *
1074 @verbatim
1075 ==============================================================================
1076 ##### Timer Complementary PWM functions #####
1077 ==============================================================================
1078 [..]
1079 This section provides functions allowing to:
1080 (+) Start the Complementary PWM.
1081 (+) Stop the Complementary PWM.
1082 (+) Start the Complementary PWM and enable interrupts.
1083 (+) Stop the Complementary PWM and disable interrupts.
1084 (+) Start the Complementary PWM and enable DMA transfers.
1085 (+) Stop the Complementary PWM and disable DMA transfers.
1086 @endverbatim
1087 * @{
1088 */
1089
1090 /**
1091 * @brief Starts the PWM signal generation on the complementary output.
1092 * @param htim TIM handle
1093 * @param Channel TIM Channel to be enabled
1094 * This parameter can be one of the following values:
1095 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1096 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1097 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1098 * @retval HAL status
1099 */
HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef * htim,uint32_t Channel)1100 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
1101 {
1102 uint32_t tmpsmcr;
1103
1104 /* Check the parameters */
1105 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1106
1107 /* Check the TIM complementary channel state */
1108 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
1109 {
1110 return HAL_ERROR;
1111 }
1112
1113 /* Set the TIM complementary channel state */
1114 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
1115
1116 /* Enable the complementary PWM output */
1117 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1118
1119 /* Enable the Main Output */
1120 __HAL_TIM_MOE_ENABLE(htim);
1121
1122 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1123 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
1124 {
1125 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1126 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1127 {
1128 __HAL_TIM_ENABLE(htim);
1129 }
1130 }
1131 else
1132 {
1133 __HAL_TIM_ENABLE(htim);
1134 }
1135
1136 /* Return function status */
1137 return HAL_OK;
1138 }
1139
1140 /**
1141 * @brief Stops the PWM signal generation on the complementary output.
1142 * @param htim TIM handle
1143 * @param Channel TIM Channel to be disabled
1144 * This parameter can be one of the following values:
1145 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1146 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1147 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1148 * @retval HAL status
1149 */
HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef * htim,uint32_t Channel)1150 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
1151 {
1152 /* Check the parameters */
1153 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1154
1155 /* Disable the complementary PWM output */
1156 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1157
1158 /* Disable the Main Output */
1159 __HAL_TIM_MOE_DISABLE(htim);
1160
1161 /* Disable the Peripheral */
1162 __HAL_TIM_DISABLE(htim);
1163
1164 /* Set the TIM complementary channel state */
1165 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
1166
1167 /* Return function status */
1168 return HAL_OK;
1169 }
1170
1171 /**
1172 * @brief Starts the PWM signal generation in interrupt mode on the
1173 * complementary output.
1174 * @param htim TIM handle
1175 * @param Channel TIM Channel to be disabled
1176 * This parameter can be one of the following values:
1177 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1178 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1179 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1180 * @retval HAL status
1181 */
HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef * htim,uint32_t Channel)1182 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
1183 {
1184 HAL_StatusTypeDef status = HAL_OK;
1185 uint32_t tmpsmcr;
1186
1187 /* Check the parameters */
1188 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1189
1190 /* Check the TIM complementary channel state */
1191 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
1192 {
1193 return HAL_ERROR;
1194 }
1195
1196 /* Set the TIM complementary channel state */
1197 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
1198
1199 switch (Channel)
1200 {
1201 case TIM_CHANNEL_1:
1202 {
1203 /* Enable the TIM Capture/Compare 1 interrupt */
1204 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
1205 break;
1206 }
1207
1208 case TIM_CHANNEL_2:
1209 {
1210 /* Enable the TIM Capture/Compare 2 interrupt */
1211 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
1212 break;
1213 }
1214
1215 case TIM_CHANNEL_3:
1216 {
1217 /* Enable the TIM Capture/Compare 3 interrupt */
1218 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
1219 break;
1220 }
1221
1222 default:
1223 status = HAL_ERROR;
1224 break;
1225 }
1226
1227 if (status == HAL_OK)
1228 {
1229 /* Enable the TIM Break interrupt */
1230 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
1231
1232 /* Enable the complementary PWM output */
1233 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1234
1235 /* Enable the Main Output */
1236 __HAL_TIM_MOE_ENABLE(htim);
1237
1238 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1239 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
1240 {
1241 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1242 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1243 {
1244 __HAL_TIM_ENABLE(htim);
1245 }
1246 }
1247 else
1248 {
1249 __HAL_TIM_ENABLE(htim);
1250 }
1251 }
1252
1253 /* Return function status */
1254 return status;
1255 }
1256
1257 /**
1258 * @brief Stops the PWM signal generation in interrupt mode on the
1259 * complementary output.
1260 * @param htim TIM handle
1261 * @param Channel TIM Channel to be disabled
1262 * This parameter can be one of the following values:
1263 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1264 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1265 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1266 * @retval HAL status
1267 */
HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t Channel)1268 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
1269 {
1270 HAL_StatusTypeDef status = HAL_OK;
1271 uint32_t tmpccer;
1272
1273 /* Check the parameters */
1274 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1275
1276 switch (Channel)
1277 {
1278 case TIM_CHANNEL_1:
1279 {
1280 /* Disable the TIM Capture/Compare 1 interrupt */
1281 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
1282 break;
1283 }
1284
1285 case TIM_CHANNEL_2:
1286 {
1287 /* Disable the TIM Capture/Compare 2 interrupt */
1288 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
1289 break;
1290 }
1291
1292 case TIM_CHANNEL_3:
1293 {
1294 /* Disable the TIM Capture/Compare 3 interrupt */
1295 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
1296 break;
1297 }
1298
1299 default:
1300 status = HAL_ERROR;
1301 break;
1302 }
1303
1304 if (status == HAL_OK)
1305 {
1306 /* Disable the complementary PWM output */
1307 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1308
1309 /* Disable the TIM Break interrupt (only if no more channel is active) */
1310 tmpccer = htim->Instance->CCER;
1311 if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET)
1312 {
1313 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
1314 }
1315
1316 /* Disable the Main Output */
1317 __HAL_TIM_MOE_DISABLE(htim);
1318
1319 /* Disable the Peripheral */
1320 __HAL_TIM_DISABLE(htim);
1321
1322 /* Set the TIM complementary channel state */
1323 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
1324 }
1325
1326 /* Return function status */
1327 return status;
1328 }
1329
1330 /**
1331 * @brief Starts the TIM PWM signal generation in DMA mode on the
1332 * complementary output
1333 * @param htim TIM handle
1334 * @param Channel TIM Channel to be enabled
1335 * This parameter can be one of the following values:
1336 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1337 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1338 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1339 * @param pData The source Buffer address.
1340 * @param Length The length of data to be transferred from memory to TIM peripheral
1341 * @retval HAL status
1342 */
HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef * htim,uint32_t Channel,const uint32_t * pData,uint16_t Length)1343 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
1344 uint16_t Length)
1345 {
1346 HAL_StatusTypeDef status = HAL_OK;
1347 uint32_t tmpsmcr;
1348
1349 /* Check the parameters */
1350 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1351
1352 /* Set the TIM complementary channel state */
1353 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
1354 {
1355 return HAL_BUSY;
1356 }
1357 else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
1358 {
1359 if ((pData == NULL) || (Length == 0U))
1360 {
1361 return HAL_ERROR;
1362 }
1363 else
1364 {
1365 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
1366 }
1367 }
1368 else
1369 {
1370 return HAL_ERROR;
1371 }
1372
1373 switch (Channel)
1374 {
1375 case TIM_CHANNEL_1:
1376 {
1377 /* Set the DMA compare callbacks */
1378 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
1379 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1380
1381 /* Set the DMA error callback */
1382 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
1383
1384 /* Enable the DMA channel */
1385 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
1386 Length) != HAL_OK)
1387 {
1388 /* Return error status */
1389 return HAL_ERROR;
1390 }
1391 /* Enable the TIM Capture/Compare 1 DMA request */
1392 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
1393 break;
1394 }
1395
1396 case TIM_CHANNEL_2:
1397 {
1398 /* Set the DMA compare callbacks */
1399 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
1400 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1401
1402 /* Set the DMA error callback */
1403 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
1404
1405 /* Enable the DMA channel */
1406 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
1407 Length) != HAL_OK)
1408 {
1409 /* Return error status */
1410 return HAL_ERROR;
1411 }
1412 /* Enable the TIM Capture/Compare 2 DMA request */
1413 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
1414 break;
1415 }
1416
1417 case TIM_CHANNEL_3:
1418 {
1419 /* Set the DMA compare callbacks */
1420 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
1421 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1422
1423 /* Set the DMA error callback */
1424 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
1425
1426 /* Enable the DMA channel */
1427 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
1428 Length) != HAL_OK)
1429 {
1430 /* Return error status */
1431 return HAL_ERROR;
1432 }
1433 /* Enable the TIM Capture/Compare 3 DMA request */
1434 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
1435 break;
1436 }
1437
1438 default:
1439 status = HAL_ERROR;
1440 break;
1441 }
1442
1443 if (status == HAL_OK)
1444 {
1445 /* Enable the complementary PWM output */
1446 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1447
1448 /* Enable the Main Output */
1449 __HAL_TIM_MOE_ENABLE(htim);
1450
1451 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1452 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
1453 {
1454 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1455 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1456 {
1457 __HAL_TIM_ENABLE(htim);
1458 }
1459 }
1460 else
1461 {
1462 __HAL_TIM_ENABLE(htim);
1463 }
1464 }
1465
1466 /* Return function status */
1467 return status;
1468 }
1469
1470 /**
1471 * @brief Stops the TIM PWM signal generation in DMA mode on the complementary
1472 * output
1473 * @param htim TIM handle
1474 * @param Channel TIM Channel to be disabled
1475 * This parameter can be one of the following values:
1476 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1477 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1478 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1479 * @retval HAL status
1480 */
HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef * htim,uint32_t Channel)1481 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
1482 {
1483 HAL_StatusTypeDef status = HAL_OK;
1484
1485 /* Check the parameters */
1486 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1487
1488 switch (Channel)
1489 {
1490 case TIM_CHANNEL_1:
1491 {
1492 /* Disable the TIM Capture/Compare 1 DMA request */
1493 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
1494 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
1495 break;
1496 }
1497
1498 case TIM_CHANNEL_2:
1499 {
1500 /* Disable the TIM Capture/Compare 2 DMA request */
1501 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
1502 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
1503 break;
1504 }
1505
1506 case TIM_CHANNEL_3:
1507 {
1508 /* Disable the TIM Capture/Compare 3 DMA request */
1509 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
1510 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
1511 break;
1512 }
1513
1514 default:
1515 status = HAL_ERROR;
1516 break;
1517 }
1518
1519 if (status == HAL_OK)
1520 {
1521 /* Disable the complementary PWM output */
1522 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1523
1524 /* Disable the Main Output */
1525 __HAL_TIM_MOE_DISABLE(htim);
1526
1527 /* Disable the Peripheral */
1528 __HAL_TIM_DISABLE(htim);
1529
1530 /* Set the TIM complementary channel state */
1531 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
1532 }
1533
1534 /* Return function status */
1535 return status;
1536 }
1537
1538 /**
1539 * @}
1540 */
1541
1542 /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
1543 * @brief Timer Complementary One Pulse functions
1544 *
1545 @verbatim
1546 ==============================================================================
1547 ##### Timer Complementary One Pulse functions #####
1548 ==============================================================================
1549 [..]
1550 This section provides functions allowing to:
1551 (+) Start the Complementary One Pulse generation.
1552 (+) Stop the Complementary One Pulse.
1553 (+) Start the Complementary One Pulse and enable interrupts.
1554 (+) Stop the Complementary One Pulse and disable interrupts.
1555
1556 @endverbatim
1557 * @{
1558 */
1559
1560 /**
1561 * @brief Starts the TIM One Pulse signal generation on the complementary
1562 * output.
1563 * @note OutputChannel must match the pulse output channel chosen when calling
1564 * @ref HAL_TIM_OnePulse_ConfigChannel().
1565 * @param htim TIM One Pulse handle
1566 * @param OutputChannel pulse output channel to enable
1567 * This parameter can be one of the following values:
1568 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1569 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1570 * @retval HAL status
1571 */
HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1572 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1573 {
1574 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1575 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
1576 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
1577 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
1578 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
1579
1580 /* Check the parameters */
1581 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1582
1583 /* Check the TIM channels state */
1584 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
1585 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
1586 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
1587 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
1588 {
1589 return HAL_ERROR;
1590 }
1591
1592 /* Set the TIM channels state */
1593 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
1594 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
1595 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
1596 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
1597
1598 /* Enable the complementary One Pulse output channel and the Input Capture channel */
1599 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
1600 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
1601
1602 /* Enable the Main Output */
1603 __HAL_TIM_MOE_ENABLE(htim);
1604
1605 /* Return function status */
1606 return HAL_OK;
1607 }
1608
1609 /**
1610 * @brief Stops the TIM One Pulse signal generation on the complementary
1611 * output.
1612 * @note OutputChannel must match the pulse output channel chosen when calling
1613 * @ref HAL_TIM_OnePulse_ConfigChannel().
1614 * @param htim TIM One Pulse handle
1615 * @param OutputChannel pulse output channel to disable
1616 * This parameter can be one of the following values:
1617 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1618 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1619 * @retval HAL status
1620 */
HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1621 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1622 {
1623 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1624
1625 /* Check the parameters */
1626 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1627
1628 /* Disable the complementary One Pulse output channel and the Input Capture channel */
1629 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
1630 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
1631
1632 /* Disable the Main Output */
1633 __HAL_TIM_MOE_DISABLE(htim);
1634
1635 /* Disable the Peripheral */
1636 __HAL_TIM_DISABLE(htim);
1637
1638 /* Set the TIM channels state */
1639 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
1640 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
1641 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
1642 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
1643
1644 /* Return function status */
1645 return HAL_OK;
1646 }
1647
1648 /**
1649 * @brief Starts the TIM One Pulse signal generation in interrupt mode on the
1650 * complementary channel.
1651 * @note OutputChannel must match the pulse output channel chosen when calling
1652 * @ref HAL_TIM_OnePulse_ConfigChannel().
1653 * @param htim TIM One Pulse handle
1654 * @param OutputChannel pulse output channel to enable
1655 * This parameter can be one of the following values:
1656 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1657 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1658 * @retval HAL status
1659 */
HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1660 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1661 {
1662 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1663 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
1664 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
1665 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
1666 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
1667
1668 /* Check the parameters */
1669 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1670
1671 /* Check the TIM channels state */
1672 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
1673 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
1674 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
1675 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
1676 {
1677 return HAL_ERROR;
1678 }
1679
1680 /* Set the TIM channels state */
1681 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
1682 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
1683 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
1684 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
1685
1686 /* Enable the TIM Capture/Compare 1 interrupt */
1687 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
1688
1689 /* Enable the TIM Capture/Compare 2 interrupt */
1690 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
1691
1692 /* Enable the complementary One Pulse output channel and the Input Capture channel */
1693 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
1694 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
1695
1696 /* Enable the Main Output */
1697 __HAL_TIM_MOE_ENABLE(htim);
1698
1699 /* Return function status */
1700 return HAL_OK;
1701 }
1702
1703 /**
1704 * @brief Stops the TIM One Pulse signal generation in interrupt mode on the
1705 * complementary channel.
1706 * @note OutputChannel must match the pulse output channel chosen when calling
1707 * @ref HAL_TIM_OnePulse_ConfigChannel().
1708 * @param htim TIM One Pulse handle
1709 * @param OutputChannel pulse output channel to disable
1710 * This parameter can be one of the following values:
1711 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1712 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1713 * @retval HAL status
1714 */
HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1715 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1716 {
1717 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1718
1719 /* Check the parameters */
1720 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1721
1722 /* Disable the TIM Capture/Compare 1 interrupt */
1723 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
1724
1725 /* Disable the TIM Capture/Compare 2 interrupt */
1726 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
1727
1728 /* Disable the complementary One Pulse output channel and the Input Capture channel */
1729 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
1730 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
1731
1732 /* Disable the Main Output */
1733 __HAL_TIM_MOE_DISABLE(htim);
1734
1735 /* Disable the Peripheral */
1736 __HAL_TIM_DISABLE(htim);
1737
1738 /* Set the TIM channels state */
1739 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
1740 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
1741 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
1742 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
1743
1744 /* Return function status */
1745 return HAL_OK;
1746 }
1747
1748 /**
1749 * @}
1750 */
1751
1752 /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
1753 * @brief Peripheral Control functions
1754 *
1755 @verbatim
1756 ==============================================================================
1757 ##### Peripheral Control functions #####
1758 ==============================================================================
1759 [..]
1760 This section provides functions allowing to:
1761 (+) Configure the commutation event in case of use of the Hall sensor interface.
1762 (+) Configure Output channels for OC and PWM mode.
1763
1764 (+) Configure Complementary channels, break features and dead time.
1765 (+) Configure Master synchronization.
1766 (+) Configure timer remapping capabilities.
1767 (+) Enable or disable channel grouping.
1768
1769 @endverbatim
1770 * @{
1771 */
1772
1773 /**
1774 * @brief Configure the TIM commutation event sequence.
1775 * @note This function is mandatory to use the commutation event in order to
1776 * update the configuration at each commutation detection on the TRGI input of the Timer,
1777 * the typical use of this feature is with the use of another Timer(interface Timer)
1778 * configured in Hall sensor interface, this interface Timer will generate the
1779 * commutation at its TRGO output (connected to Timer used in this function) each time
1780 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1781 * @param htim TIM handle
1782 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1783 * This parameter can be one of the following values:
1784 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1785 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1786 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1787 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1788 * @arg TIM_TS_NONE: No trigger is needed
1789 * @param CommutationSource the Commutation Event source
1790 * This parameter can be one of the following values:
1791 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1792 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1793 * @retval HAL status
1794 */
HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1795 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
1796 uint32_t CommutationSource)
1797 {
1798 /* Check the parameters */
1799 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1800 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1801
1802 __HAL_LOCK(htim);
1803
1804 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1805 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1806 {
1807 /* Select the Input trigger */
1808 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1809 htim->Instance->SMCR |= InputTrigger;
1810 }
1811
1812 /* Select the Capture Compare preload feature */
1813 htim->Instance->CR2 |= TIM_CR2_CCPC;
1814 /* Select the Commutation event source */
1815 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1816 htim->Instance->CR2 |= CommutationSource;
1817
1818 /* Disable Commutation Interrupt */
1819 __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
1820
1821 /* Disable Commutation DMA request */
1822 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
1823
1824 __HAL_UNLOCK(htim);
1825
1826 return HAL_OK;
1827 }
1828
1829 /**
1830 * @brief Configure the TIM commutation event sequence with interrupt.
1831 * @note This function is mandatory to use the commutation event in order to
1832 * update the configuration at each commutation detection on the TRGI input of the Timer,
1833 * the typical use of this feature is with the use of another Timer(interface Timer)
1834 * configured in Hall sensor interface, this interface Timer will generate the
1835 * commutation at its TRGO output (connected to Timer used in this function) each time
1836 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1837 * @param htim TIM handle
1838 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1839 * This parameter can be one of the following values:
1840 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1841 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1842 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1843 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1844 * @arg TIM_TS_NONE: No trigger is needed
1845 * @param CommutationSource the Commutation Event source
1846 * This parameter can be one of the following values:
1847 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1848 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1849 * @retval HAL status
1850 */
HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1851 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
1852 uint32_t CommutationSource)
1853 {
1854 /* Check the parameters */
1855 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1856 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1857
1858 __HAL_LOCK(htim);
1859
1860 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1861 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1862 {
1863 /* Select the Input trigger */
1864 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1865 htim->Instance->SMCR |= InputTrigger;
1866 }
1867
1868 /* Select the Capture Compare preload feature */
1869 htim->Instance->CR2 |= TIM_CR2_CCPC;
1870 /* Select the Commutation event source */
1871 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1872 htim->Instance->CR2 |= CommutationSource;
1873
1874 /* Disable Commutation DMA request */
1875 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
1876
1877 /* Enable the Commutation Interrupt */
1878 __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
1879
1880 __HAL_UNLOCK(htim);
1881
1882 return HAL_OK;
1883 }
1884
1885 /**
1886 * @brief Configure the TIM commutation event sequence with DMA.
1887 * @note This function is mandatory to use the commutation event in order to
1888 * update the configuration at each commutation detection on the TRGI input of the Timer,
1889 * the typical use of this feature is with the use of another Timer(interface Timer)
1890 * configured in Hall sensor interface, this interface Timer will generate the
1891 * commutation at its TRGO output (connected to Timer used in this function) each time
1892 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1893 * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set
1894 * @param htim TIM handle
1895 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1896 * This parameter can be one of the following values:
1897 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1898 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1899 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1900 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1901 * @arg TIM_TS_NONE: No trigger is needed
1902 * @param CommutationSource the Commutation Event source
1903 * This parameter can be one of the following values:
1904 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1905 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1906 * @retval HAL status
1907 */
HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1908 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
1909 uint32_t CommutationSource)
1910 {
1911 /* Check the parameters */
1912 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1913 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1914
1915 __HAL_LOCK(htim);
1916
1917 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1918 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1919 {
1920 /* Select the Input trigger */
1921 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1922 htim->Instance->SMCR |= InputTrigger;
1923 }
1924
1925 /* Select the Capture Compare preload feature */
1926 htim->Instance->CR2 |= TIM_CR2_CCPC;
1927 /* Select the Commutation event source */
1928 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1929 htim->Instance->CR2 |= CommutationSource;
1930
1931 /* Enable the Commutation DMA Request */
1932 /* Set the DMA Commutation Callback */
1933 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
1934 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
1935 /* Set the DMA error callback */
1936 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
1937
1938 /* Disable Commutation Interrupt */
1939 __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
1940
1941 /* Enable the Commutation DMA Request */
1942 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
1943
1944 __HAL_UNLOCK(htim);
1945
1946 return HAL_OK;
1947 }
1948
1949 /**
1950 * @brief Configures the TIM in master mode.
1951 * @param htim TIM handle.
1952 * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
1953 * contains the selected trigger output (TRGO) and the Master/Slave
1954 * mode.
1955 * @retval HAL status
1956 */
HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef * htim,const TIM_MasterConfigTypeDef * sMasterConfig)1957 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
1958 const TIM_MasterConfigTypeDef *sMasterConfig)
1959 {
1960 uint32_t tmpcr2;
1961 uint32_t tmpsmcr;
1962
1963 /* Check the parameters */
1964 assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
1965 assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
1966 assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
1967
1968 /* Check input state */
1969 __HAL_LOCK(htim);
1970
1971 /* Change the handler state */
1972 htim->State = HAL_TIM_STATE_BUSY;
1973
1974 /* Get the TIMx CR2 register value */
1975 tmpcr2 = htim->Instance->CR2;
1976
1977 /* Get the TIMx SMCR register value */
1978 tmpsmcr = htim->Instance->SMCR;
1979
1980 #if defined(TIM_CR2_MMS2)
1981 /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
1982 if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
1983 {
1984 /* Check the parameters */
1985 assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
1986
1987 /* Clear the MMS2 bits */
1988 tmpcr2 &= ~TIM_CR2_MMS2;
1989 /* Select the TRGO2 source*/
1990 tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
1991 }
1992 #endif /* TIM_CR2_MMS2 */
1993
1994 /* Reset the MMS Bits */
1995 tmpcr2 &= ~TIM_CR2_MMS;
1996 /* Select the TRGO source */
1997 tmpcr2 |= sMasterConfig->MasterOutputTrigger;
1998
1999 /* Update TIMx CR2 */
2000 htim->Instance->CR2 = tmpcr2;
2001
2002 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
2003 {
2004 /* Reset the MSM Bit */
2005 tmpsmcr &= ~TIM_SMCR_MSM;
2006 /* Set master mode */
2007 tmpsmcr |= sMasterConfig->MasterSlaveMode;
2008
2009 /* Update TIMx SMCR */
2010 htim->Instance->SMCR = tmpsmcr;
2011 }
2012
2013 /* Change the htim state */
2014 htim->State = HAL_TIM_STATE_READY;
2015
2016 __HAL_UNLOCK(htim);
2017
2018 return HAL_OK;
2019 }
2020
2021 /**
2022 * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
2023 * and the AOE(automatic output enable).
2024 * @param htim TIM handle
2025 * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
2026 * contains the BDTR Register configuration information for the TIM peripheral.
2027 * @note Interrupts can be generated when an active level is detected on the
2028 * break input, the break 2 input or the system break input. Break
2029 * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
2030 * @retval HAL status
2031 */
HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef * htim,const TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig)2032 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
2033 const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
2034 {
2035 /* Keep this variable initialized to 0 as it is used to configure BDTR register */
2036 uint32_t tmpbdtr = 0U;
2037
2038 /* Check the parameters */
2039 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
2040 assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
2041 assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
2042 assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
2043 assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
2044 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
2045 assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
2046 #if defined(TIM_BDTR_BKF)
2047 assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter));
2048 #endif /* TIM_BDTR_BKF */
2049 assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
2050
2051 /* Check input state */
2052 __HAL_LOCK(htim);
2053
2054 /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
2055 the OSSI State, the dead time value and the Automatic Output Enable Bit */
2056
2057 /* Set the BDTR bits */
2058 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
2059 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
2060 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
2061 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
2062 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
2063 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
2064 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
2065 #if defined(TIM_BDTR_BKF)
2066 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos));
2067 #endif /* TIM_BDTR_BKF */
2068
2069 #if defined(TIM_BDTR_BK2E)
2070 if (IS_TIM_BKIN2_INSTANCE(htim->Instance))
2071 {
2072 /* Check the parameters */
2073 assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State));
2074 assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity));
2075 assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter));
2076
2077 /* Set the BREAK2 input related BDTR bits */
2078 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << TIM_BDTR_BK2F_Pos));
2079 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State);
2080 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity);
2081 }
2082 #endif /* TIM_BDTR_BK2E */
2083
2084 /* Set TIMx_BDTR */
2085 htim->Instance->BDTR = tmpbdtr;
2086
2087 __HAL_UNLOCK(htim);
2088
2089 return HAL_OK;
2090 }
2091
2092 /**
2093 * @brief Configures the TIMx Remapping input capabilities.
2094 * @param htim TIM handle.
2095 * @param Remap specifies the TIM remapping source.
2096 @if STM32F301x8
2097 * For TIM1, the parameter can have the following values:
2098 * @arg TIM_TIM1_ADC1_NONE: TIM1_ETR is not connected to any AWD (analog watchdog)
2099 * @arg TIM_TIM1_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1
2100 * @arg TIM_TIM1_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2
2101 * @arg TIM_TIM1_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD2
2102 @elseif STM32F303xE
2103 * For TIM1, the parameter is a combination of 2 fields (field1 | field2):
2104 *
2105 * field1 can have the following values:
2106 * @arg TIM_TIM1_ADC1_NONE: TIM1_ETR is not connected to any AWD (analog watchdog)
2107 * @arg TIM_TIM1_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1
2108 * @arg TIM_TIM1_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2
2109 * @arg TIM_TIM1_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD2
2110 *
2111 * field2 can have the following values:
2112 * @arg TIM_TIM1_ADC4_NONE : TIM1_ETR is not connected to any AWD (analog watchdog)
2113 * @arg TIM_TIM1_ADC4_AWD1: TIM1_ETR is connected to ADC4 AWD1
2114 * @arg TIM_TIM1_ADC4_AWD2: TIM1_ETR is connected to ADC4 AWD2
2115 * @arg TIM_TIM1_ADC4_AWD3: TIM1_ETR is connected to ADC4 AWD3
2116 @elseif STM32F334x8
2117 * For TIM1, the parameter is a combination of 2 fields (field1 | field2):
2118 *
2119 * field1 can have the following values:
2120 * @arg TIM_TIM1_ADC1_NONE: TIM1_ETR is not connected to any AWD (analog watchdog)
2121 * @arg TIM_TIM1_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1
2122 * @arg TIM_TIM1_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2
2123 * @arg TIM_TIM1_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD2
2124 *
2125 * field2 can have the following values:
2126 * @arg TIM_TIM1_ADC2_NONE : TIM1_ETR is not connected to any AWD (analog watchdog)
2127 * @arg TIM_TIM1_ADC2_AWD1: TIM1_ETR is connected to ADC2 AWD1
2128 * @arg TIM_TIM1_ADC2_AWD2: TIM1_ETR is connected to ADC2 AWD2
2129 * @arg TIM_TIM1_ADC2_AWD3: TIM1_ETR is connected to ADC2 AWD3
2130 @endif
2131 @if STM32F303xE
2132 * For TIM8, the parameter is a combination of 2 fields (field1 | field2):
2133 *
2134 * field1 can have the following values:
2135 * @arg TIM_TIM8_ADC2_NONE: TIM1_ETR is not connected to any AWD (analog watchdog)
2136 * @arg TIM_TIM8_ADC2_AWD1: TIM1_ETR is connected to ADC2 AWD1
2137 * @arg TIM_TIM8_ADC2_AWD2: TIM1_ETR is connected to ADC2 AWD2
2138 * @arg TIM_TIM8_ADC2_AWD3: TIM1_ETR is connected to ADC2 AWD2
2139 *
2140 * field2 can have the following values:
2141 * @arg TIM_TIM8_ADC3_NONE : TIM1_ETR is not connected to any AWD (analog watchdog)
2142 * @arg TIM_TIM8_ADC3_AWD1: TIM1_ETR is connected to ADC3 AWD1
2143 * @arg TIM_TIM8_ADC3_AWD2: TIM1_ETR is connected to ADC3 AWD2
2144 * @arg TIM_TIM8_ADC3_AWD3: TIM1_ETR is connected to ADC3 AWD3
2145 @endif
2146 @if STM32F373xC
2147 * For TIM14, the parameter can have the following values:
2148 * @arg TIM_TIM14_GPIO: TIM14 TI1 is connected to GPIO
2149 * @arg TIM_TIM14_RTC: TIM14 TI1 is connected to RTC_clock
2150 * @arg TIM_TIM14_HSE: TIM14 TI1 is connected to HSE/32
2151 * @arg TIM_TIM14_MCO: TIM14 TI1 is connected to MCO
2152 @else
2153 * For TIM16, the parameter can have the following values:
2154 * @arg TIM_TIM16_GPIO: TIM16 TI1 is connected to GPIO
2155 * @arg TIM_TIM16_RTC: TIM16 TI1 is connected to RTC_clock
2156 * @arg TIM_TIM16_HSE: TIM16 TI1 is connected to HSE/32
2157 * @arg TIM_TIM16_MCO: TIM16 TI1 is connected to MCO
2158 @endif
2159 @if STM32F303xE
2160 * For TIM20, the parameter is a combination of 2 fields (field1 | field2):
2161 *
2162 * field1 can have the following values:
2163 * @arg TIM_TIM20_ADC3_NONE: TIM1_ETR is not connected to any AWD (analog watchdog)
2164 * @arg TIM_TIM20_ADC3_AWD1: TIM1_ETR is connected to ADC3 AWD1
2165 * @arg TIM_TIM20_ADC3_AWD2: TIM1_ETR is connected to ADC3 AWD2
2166 * @arg TIM_TIM20_ADC3_AWD3: TIM1_ETR is connected to ADC3 AWD2
2167 *
2168 * field2 can have the following values:
2169 * @arg TIM_TIM20_ADC4_NONE : TIM1_ETR is not connected to any AWD (analog watchdog)
2170 * @arg TIM_TIM20_ADC4_AWD1: TIM1_ETR is connected to ADC4 AWD1
2171 * @arg TIM_TIM20_ADC4_AWD2: TIM1_ETR is connected to ADC4 AWD2
2172 * @arg TIM_TIM20_ADC4_AWD3: TIM1_ETR is connected to ADC4 AWD3
2173 @endif
2174 *
2175 * @retval HAL status
2176 */
HAL_TIMEx_RemapConfig(TIM_HandleTypeDef * htim,uint32_t Remap)2177 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
2178 {
2179
2180 /* Check parameters */
2181 assert_param(IS_TIM_REMAP(htim->Instance, Remap));
2182
2183 __HAL_LOCK(htim);
2184
2185 /* Set the Timer remapping configuration */
2186 WRITE_REG(htim->Instance->OR, Remap);
2187
2188 __HAL_UNLOCK(htim);
2189
2190 return HAL_OK;
2191 }
2192
2193 #if defined(TIM_CCR5_CCR5)
2194 /**
2195 * @brief Group channel 5 and channel 1, 2 or 3
2196 * @param htim TIM handle.
2197 * @param Channels specifies the reference signal(s) the OC5REF is combined with.
2198 * This parameter can be any combination of the following values:
2199 * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC
2200 * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF
2201 * TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF
2202 * TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF
2203 * @retval HAL status
2204 */
HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef * htim,uint32_t Channels)2205 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels)
2206 {
2207 /* Check parameters */
2208 assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance));
2209 assert_param(IS_TIM_GROUPCH5(Channels));
2210
2211 /* Process Locked */
2212 __HAL_LOCK(htim);
2213
2214 htim->State = HAL_TIM_STATE_BUSY;
2215
2216 /* Clear GC5Cx bit fields */
2217 htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1);
2218
2219 /* Set GC5Cx bit fields */
2220 htim->Instance->CCR5 |= Channels;
2221
2222 /* Change the htim state */
2223 htim->State = HAL_TIM_STATE_READY;
2224
2225 __HAL_UNLOCK(htim);
2226
2227 return HAL_OK;
2228 }
2229 #endif /* TIM_CCR5_CCR5 */
2230
2231 /**
2232 * @}
2233 */
2234
2235 /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
2236 * @brief Extended Callbacks functions
2237 *
2238 @verbatim
2239 ==============================================================================
2240 ##### Extended Callbacks functions #####
2241 ==============================================================================
2242 [..]
2243 This section provides Extended TIM callback functions:
2244 (+) Timer Commutation callback
2245 (+) Timer Break callback
2246
2247 @endverbatim
2248 * @{
2249 */
2250
2251 /**
2252 * @brief Commutation callback in non-blocking mode
2253 * @param htim TIM handle
2254 * @retval None
2255 */
HAL_TIMEx_CommutCallback(TIM_HandleTypeDef * htim)2256 __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
2257 {
2258 /* Prevent unused argument(s) compilation warning */
2259 UNUSED(htim);
2260
2261 /* NOTE : This function should not be modified, when the callback is needed,
2262 the HAL_TIMEx_CommutCallback could be implemented in the user file
2263 */
2264 }
2265 /**
2266 * @brief Commutation half complete callback in non-blocking mode
2267 * @param htim TIM handle
2268 * @retval None
2269 */
HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef * htim)2270 __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
2271 {
2272 /* Prevent unused argument(s) compilation warning */
2273 UNUSED(htim);
2274
2275 /* NOTE : This function should not be modified, when the callback is needed,
2276 the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file
2277 */
2278 }
2279
2280 /**
2281 * @brief Break detection callback in non-blocking mode
2282 * @param htim TIM handle
2283 * @retval None
2284 */
HAL_TIMEx_BreakCallback(TIM_HandleTypeDef * htim)2285 __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
2286 {
2287 /* Prevent unused argument(s) compilation warning */
2288 UNUSED(htim);
2289
2290 /* NOTE : This function should not be modified, when the callback is needed,
2291 the HAL_TIMEx_BreakCallback could be implemented in the user file
2292 */
2293 }
2294
2295 #if defined(TIM_BDTR_BK2E)
2296 /**
2297 * @brief Break2 detection callback in non blocking mode
2298 * @param htim: TIM handle
2299 * @retval None
2300 */
HAL_TIMEx_Break2Callback(TIM_HandleTypeDef * htim)2301 __weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
2302 {
2303 /* Prevent unused argument(s) compilation warning */
2304 UNUSED(htim);
2305
2306 /* NOTE : This function Should not be modified, when the callback is needed,
2307 the HAL_TIMEx_Break2Callback could be implemented in the user file
2308 */
2309 }
2310 #endif /* TIM_BDTR_BK2E */
2311 /**
2312 * @}
2313 */
2314
2315 /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
2316 * @brief Extended Peripheral State functions
2317 *
2318 @verbatim
2319 ==============================================================================
2320 ##### Extended Peripheral State functions #####
2321 ==============================================================================
2322 [..]
2323 This subsection permits to get in run-time the status of the peripheral
2324 and the data flow.
2325
2326 @endverbatim
2327 * @{
2328 */
2329
2330 /**
2331 * @brief Return the TIM Hall Sensor interface handle state.
2332 * @param htim TIM Hall Sensor handle
2333 * @retval HAL state
2334 */
HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef * htim)2335 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim)
2336 {
2337 return htim->State;
2338 }
2339
2340 /**
2341 * @brief Return actual state of the TIM complementary channel.
2342 * @param htim TIM handle
2343 * @param ChannelN TIM Complementary channel
2344 * This parameter can be one of the following values:
2345 * @arg TIM_CHANNEL_1: TIM Channel 1
2346 * @arg TIM_CHANNEL_2: TIM Channel 2
2347 * @arg TIM_CHANNEL_3: TIM Channel 3
2348 * @retval TIM Complementary channel state
2349 */
HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef * htim,uint32_t ChannelN)2350 HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN)
2351 {
2352 HAL_TIM_ChannelStateTypeDef channel_state;
2353
2354 /* Check the parameters */
2355 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, ChannelN));
2356
2357 channel_state = TIM_CHANNEL_N_STATE_GET(htim, ChannelN);
2358
2359 return channel_state;
2360 }
2361 /**
2362 * @}
2363 */
2364
2365 /**
2366 * @}
2367 */
2368
2369 /* Private functions ---------------------------------------------------------*/
2370 /** @defgroup TIMEx_Private_Functions TIM Extended Private Functions
2371 * @{
2372 */
2373
2374 /**
2375 * @brief TIM DMA Commutation callback.
2376 * @param hdma pointer to DMA handle.
2377 * @retval None
2378 */
TIMEx_DMACommutationCplt(DMA_HandleTypeDef * hdma)2379 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
2380 {
2381 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2382
2383 /* Change the htim state */
2384 htim->State = HAL_TIM_STATE_READY;
2385
2386 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2387 htim->CommutationCallback(htim);
2388 #else
2389 HAL_TIMEx_CommutCallback(htim);
2390 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2391 }
2392
2393 /**
2394 * @brief TIM DMA Commutation half complete callback.
2395 * @param hdma pointer to DMA handle.
2396 * @retval None
2397 */
TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef * hdma)2398 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
2399 {
2400 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2401
2402 /* Change the htim state */
2403 htim->State = HAL_TIM_STATE_READY;
2404
2405 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2406 htim->CommutationHalfCpltCallback(htim);
2407 #else
2408 HAL_TIMEx_CommutHalfCpltCallback(htim);
2409 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2410 }
2411
2412
2413 /**
2414 * @brief TIM DMA Delay Pulse complete callback (complementary channel).
2415 * @param hdma pointer to DMA handle.
2416 * @retval None
2417 */
TIM_DMADelayPulseNCplt(DMA_HandleTypeDef * hdma)2418 static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma)
2419 {
2420 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2421
2422 if (hdma == htim->hdma[TIM_DMA_ID_CC1])
2423 {
2424 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
2425
2426 if (hdma->Init.Mode == DMA_NORMAL)
2427 {
2428 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
2429 }
2430 }
2431 else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
2432 {
2433 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
2434
2435 if (hdma->Init.Mode == DMA_NORMAL)
2436 {
2437 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
2438 }
2439 }
2440 else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
2441 {
2442 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
2443
2444 if (hdma->Init.Mode == DMA_NORMAL)
2445 {
2446 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
2447 }
2448 }
2449 else
2450 {
2451 /* nothing to do */
2452 }
2453
2454 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2455 htim->PWM_PulseFinishedCallback(htim);
2456 #else
2457 HAL_TIM_PWM_PulseFinishedCallback(htim);
2458 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2459
2460 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
2461 }
2462
2463 /**
2464 * @brief TIM DMA error callback (complementary channel)
2465 * @param hdma pointer to DMA handle.
2466 * @retval None
2467 */
TIM_DMAErrorCCxN(DMA_HandleTypeDef * hdma)2468 static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma)
2469 {
2470 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2471
2472 if (hdma == htim->hdma[TIM_DMA_ID_CC1])
2473 {
2474 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
2475 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
2476 }
2477 else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
2478 {
2479 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
2480 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
2481 }
2482 else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
2483 {
2484 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
2485 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
2486 }
2487 else
2488 {
2489 /* nothing to do */
2490 }
2491
2492 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2493 htim->ErrorCallback(htim);
2494 #else
2495 HAL_TIM_ErrorCallback(htim);
2496 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2497
2498 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
2499 }
2500
2501 /**
2502 * @brief Enables or disables the TIM Capture Compare Channel xN.
2503 * @param TIMx to select the TIM peripheral
2504 * @param Channel specifies the TIM Channel
2505 * This parameter can be one of the following values:
2506 * @arg TIM_CHANNEL_1: TIM Channel 1
2507 * @arg TIM_CHANNEL_2: TIM Channel 2
2508 * @arg TIM_CHANNEL_3: TIM Channel 3
2509 * @param ChannelNState specifies the TIM Channel CCxNE bit new state.
2510 * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
2511 * @retval None
2512 */
TIM_CCxNChannelCmd(TIM_TypeDef * TIMx,uint32_t Channel,uint32_t ChannelNState)2513 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
2514 {
2515 uint32_t tmp;
2516
2517 tmp = TIM_CCER_CC1NE << (Channel & 0xFU); /* 0xFU = 15 bits max shift */
2518
2519 /* Reset the CCxNE Bit */
2520 TIMx->CCER &= ~tmp;
2521
2522 /* Set or reset the CCxNE Bit */
2523 TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0xFU)); /* 0xFU = 15 bits max shift */
2524 }
2525 /**
2526 * @}
2527 */
2528
2529 #endif /* HAL_TIM_MODULE_ENABLED */
2530 /**
2531 * @}
2532 */
2533
2534 /**
2535 * @}
2536 */
2537
