1 /** 2 ****************************************************************************** 3 * @file stm32f1xx_hal_dma_ex.h 4 * @author MCD Application Team 5 * @brief Header file of DMA HAL extension module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file in 13 * the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef __STM32F1xx_HAL_DMA_EX_H 21 #define __STM32F1xx_HAL_DMA_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32f1xx_hal_def.h" 29 30 /** @addtogroup STM32F1xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @defgroup DMAEx DMAEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /* Exported constants --------------------------------------------------------*/ 40 /* Exported macro ------------------------------------------------------------*/ 41 /** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros 42 * @{ 43 */ 44 /* Interrupt & Flag management */ 45 #if defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || \ 46 defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC) 47 /** @defgroup DMAEx_High_density_XL_density_Product_devices DMAEx High density and XL density product devices 48 * @{ 49 */ 50 51 /** 52 * @brief Returns the current DMA Channel transfer complete flag. 53 * @param __HANDLE__: DMA handle 54 * @retval The specified transfer complete flag index. 55 */ 56 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ 57 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\ 58 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\ 59 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\ 60 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\ 61 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\ 62 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\ 63 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\ 64 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\ 65 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\ 66 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\ 67 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\ 68 DMA_FLAG_TC5) 69 70 /** 71 * @brief Returns the current DMA Channel half transfer complete flag. 72 * @param __HANDLE__: DMA handle 73 * @retval The specified half transfer complete flag index. 74 */ 75 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\ 76 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\ 77 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\ 78 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\ 79 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\ 80 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\ 81 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\ 82 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\ 83 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\ 84 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\ 85 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\ 86 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\ 87 DMA_FLAG_HT5) 88 89 /** 90 * @brief Returns the current DMA Channel transfer error flag. 91 * @param __HANDLE__: DMA handle 92 * @retval The specified transfer error flag index. 93 */ 94 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\ 95 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\ 96 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\ 97 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\ 98 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\ 99 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\ 100 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\ 101 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\ 102 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\ 103 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\ 104 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\ 105 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\ 106 DMA_FLAG_TE5) 107 108 /** 109 * @brief Return the current DMA Channel Global interrupt flag. 110 * @param __HANDLE__: DMA handle 111 * @retval The specified transfer error flag index. 112 */ 113 #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\ 114 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\ 115 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\ 116 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\ 117 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\ 118 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\ 119 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\ 120 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_GL7 :\ 121 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_GL1 :\ 122 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_GL2 :\ 123 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_GL3 :\ 124 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_GL4 :\ 125 DMA_FLAG_GL5) 126 127 /** 128 * @brief Get the DMA Channel pending flags. 129 * @param __HANDLE__: DMA handle 130 * @param __FLAG__: Get the specified flag. 131 * This parameter can be any combination of the following values: 132 * @arg DMA_FLAG_TCx: Transfer complete flag 133 * @arg DMA_FLAG_HTx: Half transfer complete flag 134 * @arg DMA_FLAG_TEx: Transfer error flag 135 * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag. 136 * @retval The state of FLAG (SET or RESET). 137 */ 138 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\ 139 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\ 140 (DMA1->ISR & (__FLAG__))) 141 142 /** 143 * @brief Clears the DMA Channel pending flags. 144 * @param __HANDLE__: DMA handle 145 * @param __FLAG__: specifies the flag to clear. 146 * This parameter can be any combination of the following values: 147 * @arg DMA_FLAG_TCx: Transfer complete flag 148 * @arg DMA_FLAG_HTx: Half transfer complete flag 149 * @arg DMA_FLAG_TEx: Transfer error flag 150 * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag. 151 * @retval None 152 */ 153 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \ 154 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\ 155 (DMA1->IFCR = (__FLAG__))) 156 157 /** 158 * @} 159 */ 160 161 #else 162 /** @defgroup DMA_Low_density_Medium_density_Product_devices DMA Low density and Medium density product devices 163 * @{ 164 */ 165 166 /** 167 * @brief Returns the current DMA Channel transfer complete flag. 168 * @param __HANDLE__: DMA handle 169 * @retval The specified transfer complete flag index. 170 */ 171 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ 172 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\ 173 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\ 174 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\ 175 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\ 176 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\ 177 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\ 178 DMA_FLAG_TC7) 179 180 /** 181 * @brief Return the current DMA Channel half transfer complete flag. 182 * @param __HANDLE__: DMA handle 183 * @retval The specified half transfer complete flag index. 184 */ 185 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\ 186 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\ 187 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\ 188 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\ 189 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\ 190 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\ 191 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\ 192 DMA_FLAG_HT7) 193 194 /** 195 * @brief Return the current DMA Channel transfer error flag. 196 * @param __HANDLE__: DMA handle 197 * @retval The specified transfer error flag index. 198 */ 199 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\ 200 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\ 201 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\ 202 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\ 203 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\ 204 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\ 205 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\ 206 DMA_FLAG_TE7) 207 208 /** 209 * @brief Return the current DMA Channel Global interrupt flag. 210 * @param __HANDLE__: DMA handle 211 * @retval The specified transfer error flag index. 212 */ 213 #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\ 214 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\ 215 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\ 216 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\ 217 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\ 218 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\ 219 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\ 220 DMA_FLAG_GL7) 221 222 /** 223 * @brief Get the DMA Channel pending flags. 224 * @param __HANDLE__: DMA handle 225 * @param __FLAG__: Get the specified flag. 226 * This parameter can be any combination of the following values: 227 * @arg DMA_FLAG_TCx: Transfer complete flag 228 * @arg DMA_FLAG_HTx: Half transfer complete flag 229 * @arg DMA_FLAG_TEx: Transfer error flag 230 * @arg DMA_FLAG_GLx: Global interrupt flag 231 * Where x can be 1_7 to select the DMA Channel flag. 232 * @retval The state of FLAG (SET or RESET). 233 */ 234 235 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__)) 236 237 /** 238 * @brief Clear the DMA Channel pending flags. 239 * @param __HANDLE__: DMA handle 240 * @param __FLAG__: specifies the flag to clear. 241 * This parameter can be any combination of the following values: 242 * @arg DMA_FLAG_TCx: Transfer complete flag 243 * @arg DMA_FLAG_HTx: Half transfer complete flag 244 * @arg DMA_FLAG_TEx: Transfer error flag 245 * @arg DMA_FLAG_GLx: Global interrupt flag 246 * Where x can be 1_7 to select the DMA Channel flag. 247 * @retval None 248 */ 249 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__)) 250 251 /** 252 * @} 253 */ 254 255 #endif 256 257 /** 258 * @} 259 */ 260 261 /** 262 * @} 263 */ 264 265 /** 266 * @} 267 */ 268 269 #ifdef __cplusplus 270 } 271 #endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || */ 272 /* STM32F103xG || STM32F105xC || STM32F107xC */ 273 274 #endif /* __STM32F1xx_HAL_DMA_H */ 275 276
