1 /** 2 ****************************************************************************** 3 * @file stm32wbxx_hal_pcd.h 4 * @author MCD Application Team 5 * @brief Header file of PCD HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32WBxx_HAL_PCD_H 21 #define STM32WBxx_HAL_PCD_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32wbxx_ll_usb.h" 29 30 #if defined (USB) 31 32 /** @addtogroup STM32WBxx_HAL_Driver 33 * @{ 34 */ 35 36 /** @addtogroup PCD 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 /** @defgroup PCD_Exported_Types PCD Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief PCD State structure definition 47 */ 48 typedef enum 49 { 50 HAL_PCD_STATE_RESET = 0x00, 51 HAL_PCD_STATE_READY = 0x01, 52 HAL_PCD_STATE_ERROR = 0x02, 53 HAL_PCD_STATE_BUSY = 0x03, 54 HAL_PCD_STATE_TIMEOUT = 0x04 55 } PCD_StateTypeDef; 56 57 /* Device LPM suspend state */ 58 typedef enum 59 { 60 LPM_L0 = 0x00, /* on */ 61 LPM_L1 = 0x01, /* LPM L1 sleep */ 62 LPM_L2 = 0x02, /* suspend */ 63 LPM_L3 = 0x03, /* off */ 64 } PCD_LPM_StateTypeDef; 65 66 typedef enum 67 { 68 PCD_LPM_L0_ACTIVE = 0x00, /* on */ 69 PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */ 70 } PCD_LPM_MsgTypeDef; 71 72 typedef enum 73 { 74 PCD_BCD_ERROR = 0xFF, 75 PCD_BCD_CONTACT_DETECTION = 0xFE, 76 PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD, 77 PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC, 78 PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB, 79 PCD_BCD_DISCOVERY_COMPLETED = 0x00, 80 81 } PCD_BCD_MsgTypeDef; 82 83 84 85 86 87 typedef USB_TypeDef PCD_TypeDef; 88 typedef USB_CfgTypeDef PCD_InitTypeDef; 89 typedef USB_EPTypeDef PCD_EPTypeDef; 90 91 92 /** 93 * @brief PCD Handle Structure definition 94 */ 95 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 96 typedef struct __PCD_HandleTypeDef 97 #else 98 typedef struct 99 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 100 { 101 PCD_TypeDef *Instance; /*!< Register base address */ 102 PCD_InitTypeDef Init; /*!< PCD required parameters */ 103 __IO uint8_t USB_Address; /*!< USB Address */ 104 PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */ 105 PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */ 106 HAL_LockTypeDef Lock; /*!< PCD peripheral status */ 107 __IO PCD_StateTypeDef State; /*!< PCD communication state */ 108 __IO uint32_t ErrorCode; /*!< PCD Error code */ 109 uint32_t Setup[12]; /*!< Setup packet buffer */ 110 PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ 111 uint32_t BESL; 112 113 114 uint32_t lpm_active; /*!< Enable or disable the Link Power Management . 115 This parameter can be set to ENABLE or DISABLE */ 116 117 uint32_t battery_charging_active; /*!< Enable or disable Battery charging. 118 This parameter can be set to ENABLE or DISABLE */ 119 void *pData; /*!< Pointer to upper stack Handler */ 120 121 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 122 void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */ 123 void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */ 124 void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */ 125 void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */ 126 void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */ 127 void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */ 128 void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */ 129 130 void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */ 131 void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */ 132 void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */ 133 void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */ 134 void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< USB OTG PCD BCD callback */ 135 void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< USB OTG PCD LPM callback */ 136 137 void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */ 138 void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */ 139 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 140 } PCD_HandleTypeDef; 141 142 /** 143 * @} 144 */ 145 146 /* Include PCD HAL Extended module */ 147 #include "stm32wbxx_hal_pcd_ex.h" 148 149 /* Exported constants --------------------------------------------------------*/ 150 /** @defgroup PCD_Exported_Constants PCD Exported Constants 151 * @{ 152 */ 153 154 /** @defgroup PCD_Speed PCD Speed 155 * @{ 156 */ 157 #define PCD_SPEED_FULL USBD_FS_SPEED 158 /** 159 * @} 160 */ 161 162 /** @defgroup PCD_PHY_Module PCD PHY Module 163 * @{ 164 */ 165 #define PCD_PHY_ULPI 1U 166 #define PCD_PHY_EMBEDDED 2U 167 #define PCD_PHY_UTMI 3U 168 /** 169 * @} 170 */ 171 172 /** @defgroup PCD_Error_Code_definition PCD Error Code definition 173 * @brief PCD Error Code definition 174 * @{ 175 */ 176 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 177 #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */ 178 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 179 180 /** 181 * @} 182 */ 183 184 /** 185 * @} 186 */ 187 188 /* Exported macros -----------------------------------------------------------*/ 189 /** @defgroup PCD_Exported_Macros PCD Exported Macros 190 * @brief macros to handle interrupts and specific clock configurations 191 * @{ 192 */ 193 #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) 194 #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) 195 196 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \ 197 ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) 198 199 200 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR)\ 201 &= (uint16_t)(~(__INTERRUPT__))) 202 203 #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_WAKEUP_EXTI_LINE 204 #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_WAKEUP_EXTI_LINE) 205 206 207 /** 208 * @} 209 */ 210 211 /* Exported functions --------------------------------------------------------*/ 212 /** @addtogroup PCD_Exported_Functions PCD Exported Functions 213 * @{ 214 */ 215 216 /* Initialization/de-initialization functions ********************************/ 217 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions 218 * @{ 219 */ 220 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); 221 HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd); 222 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); 223 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); 224 225 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 226 /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition 227 * @brief HAL USB OTG PCD Callback ID enumeration definition 228 * @{ 229 */ 230 typedef enum 231 { 232 HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */ 233 HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */ 234 HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */ 235 HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */ 236 HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */ 237 HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */ 238 HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */ 239 240 HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */ 241 HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */ 242 243 } HAL_PCD_CallbackIDTypeDef; 244 /** 245 * @} 246 */ 247 248 /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition 249 * @brief HAL USB OTG PCD Callback pointer definition 250 * @{ 251 */ 252 253 typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */ 254 typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */ 255 typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */ 256 typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */ 257 typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */ 258 typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< pointer to USB OTG PCD LPM callback */ 259 typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< pointer to USB OTG PCD BCD callback */ 260 261 /** 262 * @} 263 */ 264 265 HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, 266 pPCD_CallbackTypeDef pCallback); 267 268 HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID); 269 270 HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, 271 pPCD_DataOutStageCallbackTypeDef pCallback); 272 273 HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd); 274 275 HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, 276 pPCD_DataInStageCallbackTypeDef pCallback); 277 278 HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd); 279 280 HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, 281 pPCD_IsoOutIncpltCallbackTypeDef pCallback); 282 283 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd); 284 285 HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, 286 pPCD_IsoInIncpltCallbackTypeDef pCallback); 287 288 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd); 289 290 HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback); 291 HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd); 292 293 HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback); 294 HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd); 295 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 296 /** 297 * @} 298 */ 299 300 /* I/O operation functions ***************************************************/ 301 /* Non-Blocking mode: Interrupt */ 302 /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions 303 * @{ 304 */ 305 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); 306 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); 307 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); 308 309 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); 310 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); 311 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); 312 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); 313 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); 314 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); 315 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); 316 317 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 318 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 319 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 320 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 321 /** 322 * @} 323 */ 324 325 /* Peripheral Control functions **********************************************/ 326 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions 327 * @{ 328 */ 329 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); 330 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); 331 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); 332 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); 333 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 334 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); 335 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); 336 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 337 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 338 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 339 HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 340 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); 341 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); 342 uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr); 343 /** 344 * @} 345 */ 346 347 /* Peripheral State functions ************************************************/ 348 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions 349 * @{ 350 */ 351 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd); 352 /** 353 * @} 354 */ 355 356 /** 357 * @} 358 */ 359 360 /* Private constants ---------------------------------------------------------*/ 361 /** @defgroup PCD_Private_Constants PCD Private Constants 362 * @{ 363 */ 364 /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt 365 * @{ 366 */ 367 368 369 #define USB_WAKEUP_EXTI_LINE (0x1U << 28) /*!< USB FS EXTI Line WakeUp Interrupt */ 370 371 372 /** 373 * @} 374 */ 375 376 /** @defgroup PCD_EP0_MPS PCD EP0 MPS 377 * @{ 378 */ 379 #define PCD_EP0MPS_64 EP_MPS_64 380 #define PCD_EP0MPS_32 EP_MPS_32 381 #define PCD_EP0MPS_16 EP_MPS_16 382 #define PCD_EP0MPS_08 EP_MPS_8 383 /** 384 * @} 385 */ 386 387 /** @defgroup PCD_ENDP PCD ENDP 388 * @{ 389 */ 390 #define PCD_ENDP0 0U 391 #define PCD_ENDP1 1U 392 #define PCD_ENDP2 2U 393 #define PCD_ENDP3 3U 394 #define PCD_ENDP4 4U 395 #define PCD_ENDP5 5U 396 #define PCD_ENDP6 6U 397 #define PCD_ENDP7 7U 398 /** 399 * @} 400 */ 401 402 /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind 403 * @{ 404 */ 405 #define PCD_SNG_BUF 0U 406 #define PCD_DBL_BUF 1U 407 /** 408 * @} 409 */ 410 411 /** 412 * @} 413 */ 414 415 /* Private macros ------------------------------------------------------------*/ 416 /** @defgroup PCD_Private_Macros PCD Private Macros 417 * @{ 418 */ 419 420 /******************** Bit definition for USB_COUNTn_RX register *************/ 421 #define USB_CNTRX_NBLK_MSK (0x1FU << 10) 422 #define USB_CNTRX_BLSIZE (0x1U << 15) 423 424 /* SetENDPOINT */ 425 #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) \ 426 (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue)) 427 428 /* GetENDPOINT */ 429 #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U))) 430 431 432 /** 433 * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) 434 * @param USBx USB peripheral instance register address. 435 * @param bEpNum Endpoint Number. 436 * @param wType Endpoint Type. 437 * @retval None 438 */ 439 #define PCD_SET_EPTYPE(USBx, bEpNum, wType) \ 440 (PCD_SET_ENDPOINT((USBx), (bEpNum), \ 441 ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX))) 442 443 444 /** 445 * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) 446 * @param USBx USB peripheral instance register address. 447 * @param bEpNum Endpoint Number. 448 * @retval Endpoint Type 449 */ 450 #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) 451 452 /** 453 * @brief free buffer used from the application realizing it to the line 454 * toggles bit SW_BUF in the double buffered endpoint register 455 * @param USBx USB device. 456 * @param bEpNum, bDir 457 * @retval None 458 */ 459 #define PCD_FREE_USER_BUFFER(USBx, bEpNum, bDir) \ 460 do { \ 461 if ((bDir) == 0U) \ 462 { \ 463 /* OUT double buffered endpoint */ \ 464 PCD_TX_DTOG((USBx), (bEpNum)); \ 465 } \ 466 else if ((bDir) == 1U) \ 467 { \ 468 /* IN double buffered endpoint */ \ 469 PCD_RX_DTOG((USBx), (bEpNum)); \ 470 } \ 471 } while(0) 472 473 /** 474 * @brief sets the status for tx transfer (bits STAT_TX[1:0]). 475 * @param USBx USB peripheral instance register address. 476 * @param bEpNum Endpoint Number. 477 * @param wState new state 478 * @retval None 479 */ 480 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \ 481 do { \ 482 uint16_t _wRegVal; \ 483 \ 484 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \ 485 /* toggle first bit ? */ \ 486 if ((USB_EPTX_DTOG1 & (wState))!= 0U) \ 487 { \ 488 _wRegVal ^= USB_EPTX_DTOG1; \ 489 } \ 490 /* toggle second bit ? */ \ 491 if ((USB_EPTX_DTOG2 & (wState))!= 0U) \ 492 { \ 493 _wRegVal ^= USB_EPTX_DTOG2; \ 494 } \ 495 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 496 } while(0) /* PCD_SET_EP_TX_STATUS */ 497 498 /** 499 * @brief sets the status for rx transfer (bits STAT_TX[1:0]) 500 * @param USBx USB peripheral instance register address. 501 * @param bEpNum Endpoint Number. 502 * @param wState new state 503 * @retval None 504 */ 505 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \ 506 do { \ 507 uint16_t _wRegVal; \ 508 \ 509 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \ 510 /* toggle first bit ? */ \ 511 if ((USB_EPRX_DTOG1 & (wState))!= 0U) \ 512 { \ 513 _wRegVal ^= USB_EPRX_DTOG1; \ 514 } \ 515 /* toggle second bit ? */ \ 516 if ((USB_EPRX_DTOG2 & (wState))!= 0U) \ 517 { \ 518 _wRegVal ^= USB_EPRX_DTOG2; \ 519 } \ 520 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 521 } while(0) /* PCD_SET_EP_RX_STATUS */ 522 523 /** 524 * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) 525 * @param USBx USB peripheral instance register address. 526 * @param bEpNum Endpoint Number. 527 * @param wStaterx new state. 528 * @param wStatetx new state. 529 * @retval None 530 */ 531 #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \ 532 do { \ 533 uint16_t _wRegVal; \ 534 \ 535 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \ 536 /* toggle first bit ? */ \ 537 if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \ 538 { \ 539 _wRegVal ^= USB_EPRX_DTOG1; \ 540 } \ 541 /* toggle second bit ? */ \ 542 if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \ 543 { \ 544 _wRegVal ^= USB_EPRX_DTOG2; \ 545 } \ 546 /* toggle first bit ? */ \ 547 if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \ 548 { \ 549 _wRegVal ^= USB_EPTX_DTOG1; \ 550 } \ 551 /* toggle second bit ? */ \ 552 if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \ 553 { \ 554 _wRegVal ^= USB_EPTX_DTOG2; \ 555 } \ 556 \ 557 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 558 } while(0) /* PCD_SET_EP_TXRX_STATUS */ 559 560 /** 561 * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] 562 * /STAT_RX[1:0]) 563 * @param USBx USB peripheral instance register address. 564 * @param bEpNum Endpoint Number. 565 * @retval status 566 */ 567 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) 568 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) 569 570 /** 571 * @brief sets directly the VALID tx/rx-status into the endpoint register 572 * @param USBx USB peripheral instance register address. 573 * @param bEpNum Endpoint Number. 574 * @retval None 575 */ 576 #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) 577 #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) 578 579 /** 580 * @brief checks stall condition in an endpoint. 581 * @param USBx USB peripheral instance register address. 582 * @param bEpNum Endpoint Number. 583 * @retval TRUE = endpoint in stall condition. 584 */ 585 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL) 586 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL) 587 588 /** 589 * @brief set & clear EP_KIND bit. 590 * @param USBx USB peripheral instance register address. 591 * @param bEpNum Endpoint Number. 592 * @retval None 593 */ 594 #define PCD_SET_EP_KIND(USBx, bEpNum) \ 595 do { \ 596 uint16_t _wRegVal; \ 597 \ 598 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 599 \ 600 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \ 601 } while(0) /* PCD_SET_EP_KIND */ 602 603 #define PCD_CLEAR_EP_KIND(USBx, bEpNum) \ 604 do { \ 605 uint16_t _wRegVal; \ 606 \ 607 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \ 608 \ 609 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 610 } while(0) /* PCD_CLEAR_EP_KIND */ 611 612 /** 613 * @brief Sets/clears directly STATUS_OUT bit in the endpoint register. 614 * @param USBx USB peripheral instance register address. 615 * @param bEpNum Endpoint Number. 616 * @retval None 617 */ 618 #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) 619 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) 620 621 /** 622 * @brief Sets/clears directly EP_KIND bit in the endpoint register. 623 * @param USBx USB peripheral instance register address. 624 * @param bEpNum Endpoint Number. 625 * @retval None 626 */ 627 #define PCD_SET_BULK_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) 628 #define PCD_CLEAR_BULK_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) 629 630 /** 631 * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. 632 * @param USBx USB peripheral instance register address. 633 * @param bEpNum Endpoint Number. 634 * @retval None 635 */ 636 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \ 637 do { \ 638 uint16_t _wRegVal; \ 639 \ 640 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \ 641 \ 642 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \ 643 } while(0) /* PCD_CLEAR_RX_EP_CTR */ 644 645 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \ 646 do { \ 647 uint16_t _wRegVal; \ 648 \ 649 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \ 650 \ 651 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \ 652 } while(0) /* PCD_CLEAR_TX_EP_CTR */ 653 654 /** 655 * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. 656 * @param USBx USB peripheral instance register address. 657 * @param bEpNum Endpoint Number. 658 * @retval None 659 */ 660 #define PCD_RX_DTOG(USBx, bEpNum) \ 661 do { \ 662 uint16_t _wEPVal; \ 663 \ 664 _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 665 \ 666 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \ 667 } while(0) /* PCD_RX_DTOG */ 668 669 #define PCD_TX_DTOG(USBx, bEpNum) \ 670 do { \ 671 uint16_t _wEPVal; \ 672 \ 673 _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 674 \ 675 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \ 676 } while(0) /* PCD_TX_DTOG */ 677 /** 678 * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. 679 * @param USBx USB peripheral instance register address. 680 * @param bEpNum Endpoint Number. 681 * @retval None 682 */ 683 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \ 684 do { \ 685 uint16_t _wRegVal; \ 686 \ 687 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ 688 \ 689 if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\ 690 { \ 691 PCD_RX_DTOG((USBx), (bEpNum)); \ 692 } \ 693 } while(0) /* PCD_CLEAR_RX_DTOG */ 694 695 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \ 696 do { \ 697 uint16_t _wRegVal; \ 698 \ 699 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ 700 \ 701 if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\ 702 { \ 703 PCD_TX_DTOG((USBx), (bEpNum)); \ 704 } \ 705 } while(0) /* PCD_CLEAR_TX_DTOG */ 706 707 /** 708 * @brief Sets address in an endpoint register. 709 * @param USBx USB peripheral instance register address. 710 * @param bEpNum Endpoint Number. 711 * @param bAddr Address. 712 * @retval None 713 */ 714 #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \ 715 do { \ 716 uint16_t _wRegVal; \ 717 \ 718 _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \ 719 \ 720 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 721 } while(0) /* PCD_SET_EP_ADDRESS */ 722 723 /** 724 * @brief Gets address in an endpoint register. 725 * @param USBx USB peripheral instance register address. 726 * @param bEpNum Endpoint Number. 727 * @retval None 728 */ 729 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) 730 731 #define PCD_EP_TX_CNT(USBx, bEpNum) \ 732 ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \ 733 ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) 734 735 #define PCD_EP_RX_CNT(USBx, bEpNum) \ 736 ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \ 737 ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) 738 739 740 /** 741 * @brief sets address of the tx/rx buffer. 742 * @param USBx USB peripheral instance register address. 743 * @param bEpNum Endpoint Number. 744 * @param wAddr address to be set (must be word aligned). 745 * @retval None 746 */ 747 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \ 748 do { \ 749 __IO uint16_t *_wRegVal; \ 750 uint32_t _wRegBase = (uint32_t)USBx; \ 751 \ 752 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 753 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \ 754 *_wRegVal = ((wAddr) >> 1) << 1; \ 755 } while(0) /* PCD_SET_EP_TX_ADDRESS */ 756 757 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \ 758 do { \ 759 __IO uint16_t *_wRegVal; \ 760 uint32_t _wRegBase = (uint32_t)USBx; \ 761 \ 762 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 763 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \ 764 *_wRegVal = ((wAddr) >> 1) << 1; \ 765 } while(0) /* PCD_SET_EP_RX_ADDRESS */ 766 767 /** 768 * @brief Gets address of the tx/rx buffer. 769 * @param USBx USB peripheral instance register address. 770 * @param bEpNum Endpoint Number. 771 * @retval address of the buffer. 772 */ 773 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) 774 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) 775 776 /** 777 * @brief Sets counter of rx buffer with no. of blocks. 778 * @param pdwReg Register pointer 779 * @param wCount Counter. 780 * @param wNBlocks no. of Blocks. 781 * @retval None 782 */ 783 #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \ 784 do { \ 785 (wNBlocks) = (wCount) >> 5; \ 786 if (((wCount) & 0x1fU) == 0U) \ 787 { \ 788 (wNBlocks)--; \ 789 } \ 790 *(pdwReg) |= (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \ 791 } while(0) /* PCD_CALC_BLK32 */ 792 793 #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \ 794 do { \ 795 (wNBlocks) = (wCount) >> 1; \ 796 if (((wCount) & 0x1U) != 0U) \ 797 { \ 798 (wNBlocks)++; \ 799 } \ 800 *(pdwReg) |= (uint16_t)((wNBlocks) << 10); \ 801 } while(0) /* PCD_CALC_BLK2 */ 802 803 #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \ 804 do { \ 805 uint32_t wNBlocks; \ 806 \ 807 *(pdwReg) &= 0x3FFU; \ 808 \ 809 if ((wCount) > 62U) \ 810 { \ 811 PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \ 812 } \ 813 else \ 814 { \ 815 if ((wCount) == 0U) \ 816 { \ 817 *(pdwReg) |= USB_CNTRX_BLSIZE; \ 818 } \ 819 else \ 820 { \ 821 PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ 822 } \ 823 } \ 824 } while(0) /* PCD_SET_EP_CNT_RX_REG */ 825 826 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \ 827 do { \ 828 uint32_t _wRegBase = (uint32_t)(USBx); \ 829 __IO uint16_t *pdwReg; \ 830 \ 831 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 832 pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ 833 PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \ 834 } while(0) 835 836 /** 837 * @brief sets counter for the tx/rx buffer. 838 * @param USBx USB peripheral instance register address. 839 * @param bEpNum Endpoint Number. 840 * @param wCount Counter value. 841 * @retval None 842 */ 843 #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \ 844 do { \ 845 uint32_t _wRegBase = (uint32_t)(USBx); \ 846 __IO uint16_t *_wRegVal; \ 847 \ 848 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 849 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ 850 *_wRegVal = (uint16_t)(wCount); \ 851 } while(0) 852 853 #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \ 854 do { \ 855 uint32_t _wRegBase = (uint32_t)(USBx); \ 856 __IO uint16_t *_wRegVal; \ 857 \ 858 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 859 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ 860 PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \ 861 } while(0) 862 863 /** 864 * @brief gets counter of the tx buffer. 865 * @param USBx USB peripheral instance register address. 866 * @param bEpNum Endpoint Number. 867 * @retval Counter value 868 */ 869 #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU) 870 #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU) 871 872 /** 873 * @brief Sets buffer 0/1 address in a double buffer endpoint. 874 * @param USBx USB peripheral instance register address. 875 * @param bEpNum Endpoint Number. 876 * @param wBuf0Addr buffer 0 address. 877 * @retval Counter value 878 */ 879 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \ 880 do { \ 881 PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \ 882 } while(0) /* PCD_SET_EP_DBUF0_ADDR */ 883 884 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \ 885 do { \ 886 PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \ 887 } while(0) /* PCD_SET_EP_DBUF1_ADDR */ 888 889 /** 890 * @brief Sets addresses in a double buffer endpoint. 891 * @param USBx USB peripheral instance register address. 892 * @param bEpNum Endpoint Number. 893 * @param wBuf0Addr: buffer 0 address. 894 * @param wBuf1Addr = buffer 1 address. 895 * @retval None 896 */ 897 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \ 898 do { \ 899 PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \ 900 PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \ 901 } while(0) /* PCD_SET_EP_DBUF_ADDR */ 902 903 /** 904 * @brief Gets buffer 0/1 address of a double buffer endpoint. 905 * @param USBx USB peripheral instance register address. 906 * @param bEpNum Endpoint Number. 907 * @retval None 908 */ 909 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) 910 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) 911 912 /** 913 * @brief Gets buffer 0/1 address of a double buffer endpoint. 914 * @param USBx USB peripheral instance register address. 915 * @param bEpNum Endpoint Number. 916 * @param bDir endpoint dir EP_DBUF_OUT = OUT 917 * EP_DBUF_IN = IN 918 * @param wCount: Counter value 919 * @retval None 920 */ 921 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \ 922 do { \ 923 if ((bDir) == 0U) \ 924 /* OUT endpoint */ \ 925 { \ 926 PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \ 927 } \ 928 else \ 929 { \ 930 if ((bDir) == 1U) \ 931 { \ 932 /* IN endpoint */ \ 933 PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \ 934 } \ 935 } \ 936 } while(0) /* SetEPDblBuf0Count*/ 937 938 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \ 939 do { \ 940 uint32_t _wBase = (uint32_t)(USBx); \ 941 __IO uint16_t *_wEPRegVal; \ 942 \ 943 if ((bDir) == 0U) \ 944 { \ 945 /* OUT endpoint */ \ 946 PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \ 947 } \ 948 else \ 949 { \ 950 if ((bDir) == 1U) \ 951 { \ 952 /* IN endpoint */ \ 953 _wBase += (uint32_t)(USBx)->BTABLE; \ 954 _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ 955 *_wEPRegVal = (uint16_t)(wCount); \ 956 } \ 957 } \ 958 } while(0) /* SetEPDblBuf1Count */ 959 960 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \ 961 do { \ 962 PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ 963 PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ 964 } while(0) /* PCD_SET_EP_DBUF_CNT */ 965 966 /** 967 * @brief Gets buffer 0/1 rx/tx counter for double buffering. 968 * @param USBx USB peripheral instance register address. 969 * @param bEpNum Endpoint Number. 970 * @retval None 971 */ 972 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) 973 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) 974 975 976 977 /** 978 * @} 979 */ 980 981 /** 982 * @} 983 */ 984 985 /** 986 * @} 987 */ 988 #endif /* defined (USB) */ 989 990 #ifdef __cplusplus 991 } 992 #endif 993 994 #endif /* STM32WBxx_HAL_PCD_H */ 995
