1 /**
2 ******************************************************************************
3 * @file stm32wbaxx_hal_ramcfg.c
4 * @author MCD Application Team
5 * @brief RAMCFG HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the RAMs configuration controller peripheral:
8 * + RAMCFG Initialization and De-initialization Functions.
9 * + RAMCFG Parity Error Detection Functions.
10 * + RAMCFG Configure Wait State Functions.
11 * + RAMCFG Write Protection Functions.
12 * + RAMCFG Erase Operation Functions.
13 * + RAMCFG Handle Interrupt and Callbacks Functions.
14 * + RAMCFG State and Error Functions.
15 *
16 ******************************************************************************
17 * @attention
18 *
19 * Copyright (c) 2022 STMicroelectronics.
20 * All rights reserved.
21 *
22 * This software is licensed under terms that can be found in the LICENSE file
23 * in the root directory of this software component.
24 * If no LICENSE file comes with this software, it is provided AS-IS.
25 *
26 ******************************************************************************
27 @verbatim
28 ==============================================================================
29 ##### RAMCFG Peripheral features #####
30 ==============================================================================
31 [..]
32 (+) Each SRAM is managed by a RAMCFG instance.
33 (++) SRAM1 placed in Core Domain.
34 (+++) Size = 64 kB (STM32WBA54xx, STM32WBA55xx)
35 (+++) Size = 16 kB (STM32WBA50xx)
36 (+++) Base Address = 0x20000000.
37
38 (++) SRAM2 placed in Core Domain.
39 (+++) Size = 64 kB (STM32WBA54xx, STM32WBA55xx)
40 (+++) Size = 48 kB (STM32WBA50xx)
41 (+++) Base Address = 0x20010000.
42
43 (++) SRAM6 controls the 2.4 GHz RADIO TXRX and sequence SRAMs.
44
45 In what follows, only the wait state value can be set for SRAM6. Otherwise,
46 only SRAM1 and/or SRAM2 are considered.
47
48 (+) Each SRAM can be erased independently through its RAMCFG instance.
49
50 (+) The wait state value for each SRAM can be configured independently
51 through its RAMCFG instance.
52
53 (+) SRAM2 is divided into 64 or 48 pages (depending on the product) with
54 1 kB granularity. Each page can be write protected independently through
55 its RAMCFG instance.
56
57 (+) SRAM2 supports Parity Error Detection (PED)correction feature.
58 When the ALE bit is set in RAMCFG SRAM2 control register (RAMCFG_M2CR),
59 the failing parity SRAM offset word address is stored in the RAMCFG SRAM2
60 parity error address register RAMCFG_M2PEAR.
61
62 ==============================================================================
63 ##### How to use this driver #####
64 ==============================================================================
65 [..]
66 (#) Call HAL_RAMCFG_Init() to initialize the RAMCFG peripheral before using
67 any feature. Call HAL_RAMCFG_DeInit() to de-initialize the RAMCFG when
68 using this peripheral is no more needed or a hardware issue has occurred.
69
70 *** Parity Error Detection (PED) feature ***
71 ============================================
72 [..]
73 (+) Parity is supported by SRAM2 when enabled with the SRAM2_PE user option bit
74 in FLASH_OPTR register.
75
76 When enabling SRAM2 parity, it is advised to initialize by software the whole
77 RAM memory at the beginning of the code. This to avoid getting parity errors
78 when reading non-initialized addresses.
79
80 (+) Call HAL_RAMCFG_EnableNotification() and HAL_RAMCFG_DisableNotification()
81 to enable and disable PED interrupts. Interrupts could be:
82 (++) Parity error detection interrupt.
83 (++) Parity error detection interrupt redirected to Non Maskable
84 interrupt (NMI).
85
86 When a parity error is detected the PED and CPED bits are set in RAMCFG SRAM2
87 interrupt status register (RAMCFG_M2ISR) and RAMCFG SRAM2 interrupt clear register
88 (RAMCFG_M2ICR). An interrupt or NMI can be generated if enabled by the PEIE or PENMI
89 bits in the RAMCFG SRAM2 control register (RAMCFG_M2CR).
90
91 (+) Call HAL_RAMCFG_LatchParityErrorAddress() to set ALE bit and track parity error location address
92
93 (+) Call HAL_RAMCFG_GetParityErrorAddress() to get the failing parity SRAM offset word
94 address stored in the RAMCFG parity error address register (RAMCFG_M2PEAR) together
95 with the failing byte(s) parity error flag and the AHB bus master ID.
96
97 When the PED and CPED bits are already set any subsequent parity failing access SRAM
98 offset word address is no longer updated. A new parity error SRAM offset word address will
99 only be latched when PED and CPED are cleared.
100
101 (+) Call HAL_RAMCFG_IsParityErrorDetected() to check if an Parity error was detected.
102 This API is used in silent mode (No PED interrupt is enabled).
103
104 *** Wait State feature ***
105 ==========================
106 [..]
107 (+) Call HAL_RAMCFG_ConfigWaitState() to configure the wait state value
108 for a given SRAM according to the HCLK frequency and voltage range
109 scaling.
110
111 (+) Call HAL_RAMCFG_GetWaitState() to get the current configured wait
112 state value.
113
114 *** Write protection feature ***
115 ================================
116 [..]
117 (+) Call HAL_RAMCFG_EnableWriteProtection() to enable the write
118 protection for the given SRAM2 page(s).
119
120 (+) There is no API to disable write protection as this feature can
121 be disabled only by a global peripheral reset or system reset.
122
123 (+) Any write access to a write protected area of SRAM2 causes a
124 HardFault interrupt.
125
126 *** Erase feature ***
127 =====================
128 [..]
129 (+) Call HAL_RAMCFG_Erase() to launch a hardware erase for the given
130 SRAM.
131
132 (+) The erase value is equal to 0 when launching erase hardware through
133 RAMCFG.
134
135 (+) SRAM2 write protected pages are erased when performing an erase
136 through RAMCFG.
137
138 *** RAMCFG HAL driver macros list ***
139 =====================================
140 [..]
141 Below the list of used macros in RAMCFG HAL driver.
142
143 (+) __HAL_RAMCFG_ENABLE_IT : Enable the specified RAMCFG interrupts.
144 (+) __HAL_RAMCFG_DISABLE_IT : Disable the specified RAMCFG interrupts.
145 (+) __HAL_RAMCFG_GET_FLAG : Get the RAMCFG pending flags.
146 (+) __HAL_RAMCFG_CLEAR_FLAG : Clear the RAMCFG pending flags.
147 (+) __HAL_RAMCFG_GET_IT_SOURCE : Check whether the specified RAMCFG
148 interrupt source is enabled or not.
149 @endverbatim
150 */
151
152 /* Includes ------------------------------------------------------------------*/
153 #include "stm32wbaxx_hal.h"
154
155 /** @addtogroup STM32WBAxx_HAL_Driver
156 * @{
157 */
158
159 /** @defgroup RAMCFG RAMCFG
160 * @brief RAMCFG HAL module driver
161 * @{
162 */
163
164 #ifdef HAL_RAMCFG_MODULE_ENABLED
165
166 /* Private types -------------------------------------------------------------*/
167 /* Private variables ---------------------------------------------------------*/
168 /* Private constants ---------------------------------------------------------*/
169
170 /** @addtogroup RAMCFG_Private_Constants
171 * @{
172 */
173 #define RAMCFG_TIMEOUT_VALUE 50000U
174 /**
175 * @}
176 */
177
178 /* Private macros ------------------------------------------------------------*/
179 /* Private functions ---------------------------------------------------------*/
180 /* Exported functions --------------------------------------------------------*/
181
182 /** @addtogroup RAMCFG_Exported_Functions
183 * @{
184 */
185
186 /** @addtogroup RAMCFG_Exported_Functions_Group1
187 *
188 @verbatim
189 ===============================================================================
190 ##### Initialization and de-initialization Functions #####
191 ===============================================================================
192 [..]
193 This section provides functions to initialize and de-initialize the
194 RAMCFG instance.
195 [..]
196 The HAL_RAMCFG_Init() function follows the RAMCFG instance configuration
197 procedures as described in the reference manual.
198 The HAL_RAMCFG_DeInit() function allows deinitializing the RAMCFG instance.
199
200 @endverbatim
201 * @{
202 */
203
204 /**
205 * @brief Initialize the RAMCFG by clearing flags and disabling interrupts.
206 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that contains
207 * the configuration information for the specified RAMCFG
208 * instance.
209 * @retval HAL status.
210 */
HAL_RAMCFG_Init(RAMCFG_HandleTypeDef * hramcfg)211 HAL_StatusTypeDef HAL_RAMCFG_Init(RAMCFG_HandleTypeDef *hramcfg)
212 {
213 /* Check the RAMCFG peripheral handle */
214 if (hramcfg == NULL)
215 {
216 return HAL_ERROR;
217 }
218
219 /* Check the parameters */
220 assert_param(IS_RAMCFG_ALL_INSTANCE(hramcfg->Instance));
221
222 /* Update RAMCFG peripheral state */
223 hramcfg->State = HAL_RAMCFG_STATE_BUSY;
224
225 #if (USE_HAL_RAMCFG_REGISTER_CALLBACKS == 1U)
226
227 /* Init the low level hardware */
228 /* Check if a valid MSP API was registered */
229 if (hramcfg->MspInitCallback == NULL)
230 {
231 /* Legacy callback */
232 hramcfg->MspInitCallback = HAL_RAMCFG_MspInit;
233 }
234 hramcfg->MspInitCallback(hramcfg);
235 #else
236 HAL_RAMCFG_MspInit(hramcfg);
237 #endif /* USE_HAL_RAMCFG_REGISTER_CALLBACKS */
238
239 /* Initialize the RAMCFG error code */
240 hramcfg->ErrorCode = HAL_RAMCFG_ERROR_NONE;
241
242 /* Initialize the RAMCFG state */
243 hramcfg->State = HAL_RAMCFG_STATE_READY;
244
245 return HAL_OK;
246 }
247
248 /**
249 * @brief DeInitialize the RAMCFG peripheral.
250 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that contains
251 * the configuration information for the specified RAMCFG
252 * instance.
253 * @retval HAL status.
254 */
HAL_RAMCFG_DeInit(RAMCFG_HandleTypeDef * hramcfg)255 HAL_StatusTypeDef HAL_RAMCFG_DeInit(RAMCFG_HandleTypeDef *hramcfg)
256 {
257 /* Check the RAMCFG peripheral handle */
258 if (hramcfg == NULL)
259 {
260 return HAL_ERROR;
261 }
262
263 /* Check the parameters */
264 assert_param(IS_RAMCFG_ALL_INSTANCE(hramcfg->Instance));
265
266 /* Disable the PED feature */
267 hramcfg->Instance->CR &= ~(RAMCFG_CR_ALE);
268
269 /* Disable all RAMCFG interrupts */
270 __HAL_RAMCFG_DISABLE_IT(hramcfg, RAMCFG_IT_ALL);
271
272 /* Clear RAMCFG monitor flags */
273 __HAL_RAMCFG_CLEAR_FLAG(hramcfg, RAMCFG_FLAG_PARITYERR);
274
275 #if (USE_HAL_RAMCFG_REGISTER_CALLBACKS == 1U)
276 /* Check if a valid MSP API was registered */
277 if (hramcfg->MspDeInitCallback != NULL)
278 {
279 /* Init the low level hardware */
280 hramcfg->MspDeInitCallback(hramcfg);
281 }
282
283 /* Clean callbacks */
284 hramcfg->DetectParityErrorCallback = NULL;
285 #else
286 HAL_RAMCFG_MspDeInit(hramcfg);
287 #endif /* USE_HAL_RAMCFG_REGISTER_CALLBACKS */
288
289 /* Reset the RAMCFG error code */
290 hramcfg->ErrorCode = HAL_RAMCFG_ERROR_NONE;
291
292 /* Reset the RAMCFG state */
293 hramcfg->State = HAL_RAMCFG_STATE_RESET;
294
295 return HAL_OK;
296 }
297
298 /**
299 * @brief Initialize the RAMCFG MSP.
300 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that contains
301 * the configuration information for the specified RAMCFG.
302 * @retval None.
303 */
HAL_RAMCFG_MspInit(RAMCFG_HandleTypeDef * hramcfg)304 __weak void HAL_RAMCFG_MspInit(RAMCFG_HandleTypeDef *hramcfg)
305 {
306 /* Prevent unused argument(s) compilation warning */
307 UNUSED(hramcfg);
308
309 /* NOTE : This function should not be modified, when the callback is needed,
310 the HAL_RAMCFG_MspInit can be implemented in the user file */
311 }
312
313 /**
314 * @brief DeInitialize the RAMCFG MSP.
315 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that contains
316 * the configuration information for the specified RAMCFG.
317 * @retval None.
318 */
HAL_RAMCFG_MspDeInit(RAMCFG_HandleTypeDef * hramcfg)319 __weak void HAL_RAMCFG_MspDeInit(RAMCFG_HandleTypeDef *hramcfg)
320 {
321 /* Prevent unused argument(s) compilation warning */
322 UNUSED(hramcfg);
323
324 /* NOTE : This function should not be modified, when the callback is needed,
325 the HAL_RAMCFG_MspDeInit can be implemented in the user file */
326 }
327 /**
328 * @}
329 */
330
331 /** @addtogroup RAMCFG_Exported_Functions_Group2
332 *
333 @verbatim
334 ===============================================================================
335 ##### (Parity Error Detection) PED Operations Functions #####
336 ===============================================================================
337 [..]
338 This section provides functions to manage Parity Error Detection
339 (PED) feature provided by the RAMCFG peripheral.
340 [..]
341 The HAL_RAMCFG_LatchParityErrorAddress() function allows enabling the parity error
342 fail address latch for the selected RAMCFG instance.
343 The HAL_RAMCFG_UnlatchParityErrorAddress() function allows disabling the parity error
344 fail address latch for the selected RAMCFG instance.
345 The HAL_RAMCFG_EnableNotification() function allows enabling interrupts
346 for parity error detection and NMI error.
347 The HAL_RAMCFG_DisableNotification() function allows disabling interrupts
348 for parity error detection. When NMI interrupt is enabled, it can only be
349 disabled by a global peripheral reset or by a system reset.
350 The HAL_RAMCFG_IsParityErrorDetected() function allows checking if a parity
351 error is detected.
352 The HAL_RAMCFG_GetParityErrorAddress() function allows getting the address of
353 the parity error detected. This address is defined by three elements parts of
354 the structure RAMCFG_PEAddressTypeDef:
355 (+) byte : Byte parity error flag
356 1xxx: parity error detected on 4th byte in word aligned address
357 x1xx: parity error detected on 3rd byte in word aligned address
358 xx1x: parity error detected on 2th byte in word aligned address
359 xxx1: parity error detected on 1st byte in word aligned address
360 (+) ID : Parity error AHB bus master ID
361 (+) AddressOffset: Parity error SRAM word aligned address offset
362
363 @endverbatim
364 * @{
365 */
366
367 /**
368 * @brief Parity error fail address latch enable.
369 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that contains
370 * the configuration information for the specified RAMCFG
371 * instance.
372 * @note Parity Error Detection mechanism is enabled in setting SRAM2_PE user
373 * option bit in FLASH_OPTR register.
374 * @retval HAL status.
375 */
HAL_RAMCFG_LatchParityErrorAddress(RAMCFG_HandleTypeDef * hramcfg)376 HAL_StatusTypeDef HAL_RAMCFG_LatchParityErrorAddress(RAMCFG_HandleTypeDef *hramcfg)
377 {
378 /* Check the parameters */
379 assert_param(IS_RAMCFG_PED_INSTANCE(hramcfg->Instance));
380
381 /* Check RAMCFG state */
382 if (hramcfg->State == HAL_RAMCFG_STATE_READY)
383 {
384 /* Update RAMCFG peripheral state */
385 hramcfg->State = HAL_RAMCFG_STATE_BUSY;
386
387 /* Enable parity error fail address latch */
388 SET_BIT(hramcfg->Instance->CR, RAMCFG_CR_ALE);
389 }
390 else
391 {
392 /* Update the error code */
393 hramcfg->ErrorCode = HAL_RAMCFG_ERROR_BUSY;
394
395 /* Return error status */
396 return HAL_ERROR;
397 }
398
399 /* Update the RAMCFG state */
400 hramcfg->State = HAL_RAMCFG_STATE_READY;
401
402 return HAL_OK;
403 }
404
405 /**
406 * @brief Parity error fail address latch disable
407 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that contains
408 * the configuration information for the specified RAMCFG
409 * instance.
410 * @note Parity Error Detection mechanism is disabled in clearing SRAM2_PE user
411 * option bit in FLASH_OPTR register.
412 * @retval HAL status.
413 */
HAL_RAMCFG_UnlatchParityErrorAddress(RAMCFG_HandleTypeDef * hramcfg)414 HAL_StatusTypeDef HAL_RAMCFG_UnlatchParityErrorAddress(RAMCFG_HandleTypeDef *hramcfg)
415 {
416 /* Check the parameters */
417 assert_param(IS_RAMCFG_PED_INSTANCE(hramcfg->Instance));
418
419 /* Check RAMCFG state */
420 if (hramcfg->State == HAL_RAMCFG_STATE_READY)
421 {
422 /* Update RAMCFG peripheral state */
423 hramcfg->State = HAL_RAMCFG_STATE_BUSY;
424
425 /* Disable parity error fail address latch */
426 CLEAR_BIT(hramcfg->Instance->CR, RAMCFG_CR_ALE);
427 }
428 else
429 {
430 /* Update the error code */
431 hramcfg->ErrorCode = HAL_RAMCFG_ERROR_BUSY;
432
433 /* Return error status */
434 return HAL_ERROR;
435 }
436
437 /* Update the RAMCFG state */
438 hramcfg->State = HAL_RAMCFG_STATE_READY;
439
440 return HAL_OK;
441 }
442
443 /**
444 * @brief Enable the RAMCFG error interrupts.
445 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that
446 * contains the configuration information for the
447 * specified RAMCFG instance.
448 * @param Notifications : Select the notification to be enabled.
449 * This parameter could be any value of @ref RAMCFG_Interrupt group.
450 * @retval HAL status.
451 */
HAL_RAMCFG_EnableNotification(RAMCFG_HandleTypeDef * hramcfg,uint32_t Notifications)452 HAL_StatusTypeDef HAL_RAMCFG_EnableNotification(RAMCFG_HandleTypeDef *hramcfg, uint32_t Notifications)
453 {
454 /* Check the parameters */
455 assert_param(IS_RAMCFG_PED_INSTANCE(hramcfg->Instance));
456 assert_param(IS_RAMCFG_INTERRUPT(Notifications));
457
458 /* Check RAMCFG state */
459 if (hramcfg->State == HAL_RAMCFG_STATE_READY)
460 {
461 /* Update RAMCFG peripheral state */
462 hramcfg->State = HAL_RAMCFG_STATE_BUSY;
463
464 /* Enable RAMCFG interrupts */
465 __HAL_RAMCFG_ENABLE_IT(hramcfg, Notifications);
466 }
467 else
468 {
469 /* Update the error code */
470 hramcfg->ErrorCode = HAL_RAMCFG_ERROR_BUSY;
471
472 /* Return error status */
473 return HAL_ERROR;
474 }
475
476 /* Update the RAMCFG state */
477 hramcfg->State = HAL_RAMCFG_STATE_READY;
478
479 return HAL_OK;
480 }
481
482 /**
483 * @brief Disable the RAMCFG error interrupts.
484 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that
485 * contains the configuration information for the
486 * specified RAMCFG instance.
487 * @param Notifications : Select the notification to be disabled.
488 * This parameter could be :
489 * RAMCFG_IT_PARITYERR : Parity Error Detection.
490 * @retval HAL status.
491 */
HAL_RAMCFG_DisableNotification(RAMCFG_HandleTypeDef * hramcfg,uint32_t Notifications)492 HAL_StatusTypeDef HAL_RAMCFG_DisableNotification(RAMCFG_HandleTypeDef *hramcfg, uint32_t Notifications)
493 {
494 /* Check the parameters */
495 assert_param(IS_RAMCFG_PED_INSTANCE(hramcfg->Instance));
496 assert_param(IS_RAMCFG_INTERRUPT(Notifications));
497
498 /* Check RAMCFG state */
499 if (hramcfg->State == HAL_RAMCFG_STATE_READY)
500 {
501 /* Update RAMCFG peripheral state */
502 hramcfg->State = HAL_RAMCFG_STATE_BUSY;
503
504 /* Disable RAMCFG interrupts */
505 __HAL_RAMCFG_DISABLE_IT(hramcfg, Notifications);
506 }
507 else
508 {
509 /* Update the error code */
510 hramcfg->ErrorCode = HAL_RAMCFG_ERROR_BUSY;
511
512 /* Return error status */
513 return HAL_ERROR;
514 }
515
516 /* Update the RAMCFG state */
517 hramcfg->State = HAL_RAMCFG_STATE_READY;
518
519 return HAL_OK;
520 }
521
522 /**
523 * @brief Check if a parity error was detected.
524 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that
525 * contains the configuration information for the
526 * specified RAMCFG instance.
527 * @retval State of bit (1 or 0).
528 */
HAL_RAMCFG_IsParityErrorDetected(const RAMCFG_HandleTypeDef * hramcfg)529 uint32_t HAL_RAMCFG_IsParityErrorDetected(const RAMCFG_HandleTypeDef *hramcfg)
530 {
531 /* Check the parameters */
532 assert_param(IS_RAMCFG_PED_INSTANCE(hramcfg->Instance));
533
534 /* Return the state of PED flag */
535 return ((READ_BIT(hramcfg->Instance->ISR, RAMCFG_FLAG_PARITYERR) == (RAMCFG_FLAG_PARITYERR)) ? 1UL : 0UL);
536 }
537
538 /**
539 * @brief Get the RAMCFG parity error address.
540 * @param hramcfg Pointer to a RAMCFG_HandleTypeDef structure that
541 * contains the configuration information for the
542 * specified RAMCFG instance.
543 * @param sPEAddress Pointer to a structure filled with all the information relevant to parity error address
544 * @retval HAL status.
545 */
HAL_RAMCFG_GetParityErrorAddress(const RAMCFG_HandleTypeDef * hramcfg,RAMCFG_PEAddressTypeDef * sPEAddress)546 HAL_StatusTypeDef HAL_RAMCFG_GetParityErrorAddress(const RAMCFG_HandleTypeDef *hramcfg, RAMCFG_PEAddressTypeDef *sPEAddress)
547 {
548 uint32_t tmp;
549 /* Check the parameters */
550 assert_param(IS_RAMCFG_PED_INSTANCE(hramcfg->Instance));
551
552 tmp = READ_REG(hramcfg->Instance->PEAR);
553 sPEAddress->Byte = (tmp & RAMCFG_PEAR_BYTE_Msk) >> RAMCFG_PEAR_BYTE_Pos;
554 sPEAddress->BusMasterId = (tmp & RAMCFG_PEAR_ID_Msk) >> RAMCFG_PEAR_ID_Pos;
555 sPEAddress->AddressOffset = (tmp & RAMCFG_PEAR_PEA_Msk) >> RAMCFG_PEAR_PEA_Pos;
556
557 return HAL_OK;
558 }
559
560 /**
561 * @}
562 */
563
564 /** @addtogroup RAMCFG_Exported_Functions_Group3
565 *
566 @verbatim
567 ===============================================================================
568 ##### Wait State Functions #####
569 ===============================================================================
570 [..]
571 This section provides functions to get and configure the wait state
572 value .
573 [..]
574 The HAL_RAMCFG_ConfigWaitState() function allows configuring the wait state
575 value.
576 The HAL_RAMCFG_GetWaitState() function allows getting the current wait state
577 value.
578
579 @endverbatim
580 * @{
581 */
582
583 /**
584 * @brief Configure the wait state value for the given SRAM.
585 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that
586 * contains the configuration information for the
587 * specified RAMCFG instance.
588 * @param WaitState : Select the value of wait state to be configured.
589 * This parameter could be any value of @ref RAMCFG_WaitState group
590 * @retval HAL status.
591 */
HAL_RAMCFG_ConfigWaitState(RAMCFG_HandleTypeDef * hramcfg,uint32_t WaitState)592 HAL_StatusTypeDef HAL_RAMCFG_ConfigWaitState(RAMCFG_HandleTypeDef *hramcfg, uint32_t WaitState)
593 {
594 /* Check the parameters */
595 assert_param(IS_RAMCFG_ALL_INSTANCE(hramcfg->Instance));
596 assert_param(IS_RAMCFG_WAITSTATE(WaitState));
597
598 /* Get RAMCFG state */
599 if (hramcfg->State == HAL_RAMCFG_STATE_READY)
600 {
601 /* Update RAMCFG peripheral state */
602 hramcfg->State = HAL_RAMCFG_STATE_BUSY;
603
604 /* Set the SRAM wait state */
605 hramcfg->Instance->CR = WaitState;
606 }
607 else
608 {
609 /* Update the error code */
610 hramcfg->ErrorCode = HAL_RAMCFG_ERROR_BUSY;
611
612 return HAL_ERROR;
613 }
614
615 /* Update RAMCFG peripheral state */
616 hramcfg->State = HAL_RAMCFG_STATE_READY;
617
618 return HAL_OK;
619 }
620
621 /**
622 * @brief Get the current wait state value for the given SRAM.
623 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that
624 * contains the configuration information for the
625 * specified RAMCFG instance.
626 * @retval Wait state value, part of @ref RAMCFG_WaitState group.
627 */
HAL_RAMCFG_GetWaitState(const RAMCFG_HandleTypeDef * hramcfg)628 uint32_t HAL_RAMCFG_GetWaitState(const RAMCFG_HandleTypeDef *hramcfg)
629 {
630 /* Check the parameters */
631 assert_param(IS_RAMCFG_ALL_INSTANCE(hramcfg->Instance));
632
633 /* Return the configured wait state number */
634 return (hramcfg->Instance->CR & RAMCFG_CR_WSC);
635 }
636 /**
637 * @}
638 */
639
640 /** @addtogroup RAMCFG_Exported_Functions_Group4
641 *
642 @verbatim
643 ===============================================================================
644 ##### Write Protection Functions #####
645 ===============================================================================
646 [..]
647 This section provides functions to enable write protection feature for
648 the page(s) of SRAM2.
649 [..]
650 The HAL_RAMCFG_EnableWriteProtection() function allows enabling the write
651 protection for the page(s) of SRAM2.
652 Disabling SRAM2 page(s) protection is performed only by a global
653 peripheral reset or a by a system reset.
654
655 @endverbatim
656 * @{
657 */
658
659 /**
660 * @brief Enable write protection for the given page(s).
661 * @note Write protection feature could be disabled only by system reset.
662 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that
663 * contains the configuration information for the
664 * specified RAMCFG instance.
665 * @param StartPage : Select the start page number (from 0 to 63)
666 * @param NbPage : Number of pages to be protected.
667 * @retval HAL status.
668 */
HAL_RAMCFG_EnableWriteProtection(RAMCFG_HandleTypeDef * hramcfg,uint32_t StartPage,uint32_t NbPage)669 HAL_StatusTypeDef HAL_RAMCFG_EnableWriteProtection(RAMCFG_HandleTypeDef *hramcfg, uint32_t StartPage, uint32_t NbPage)
670 {
671 uint32_t page_mask_0 = 0U;
672 uint32_t page_mask_1 = 0U;
673
674 /* Check the parameters */
675 assert_param(IS_RAMCFG_WP_INSTANCE(hramcfg->Instance));
676 assert_param(IS_RAMCFG_WRITEPROTECTION_PAGE(StartPage + NbPage));
677
678 /* Check RAMCFG state */
679 if (hramcfg->State == HAL_RAMCFG_STATE_READY)
680 {
681 /* Update RAMCFG peripheral state */
682 hramcfg->State = HAL_RAMCFG_STATE_BUSY;
683
684 /* Repeat for page number to be protected */
685 for (uint32_t count = 0U; count < NbPage; count++)
686 {
687 if ((StartPage + count) < 32U)
688 {
689 page_mask_0 |= (1UL << (StartPage + count));
690 }
691 else
692 {
693 page_mask_1 |= (1UL << ((StartPage + count) - 32U));
694 }
695 }
696
697 /* Apply mask to protect pages */
698 WRITE_REG(hramcfg->Instance->WPR1, page_mask_0);
699 WRITE_REG(hramcfg->Instance->WPR2, page_mask_1);
700 }
701 else
702 {
703 /* Update the error code */
704 hramcfg->ErrorCode = HAL_RAMCFG_ERROR_BUSY;
705
706 /* Return error status */
707 return HAL_ERROR;
708 }
709
710 /* Update the RAMCFG state */
711 hramcfg->State = HAL_RAMCFG_STATE_READY;
712
713 return HAL_OK;
714 }
715 /**
716 * @}
717 */
718
719 /** @addtogroup RAMCFG_Exported_Functions_Group5
720 *
721 @verbatim
722 ===============================================================================
723 ##### Erase Operation Functions #####
724 ===============================================================================
725 [..]
726 This section provides functions allowing a hardware erase for the given SRAM.
727 [..]
728 The HAL_RAMCFG_Erase() function allowing a hardware mass erase for the given
729 SRAM. The erase value for all SRAMs is 0.
730
731 @endverbatim
732 * @{
733 */
734
735 /**
736 * @brief Launches and waits for the mass erase completion of a given SRAM.
737 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that
738 * contains the configuration information for the
739 * specified RAMCFG instance.
740
741 * @retval HAL status.
742 */
HAL_RAMCFG_Erase(RAMCFG_HandleTypeDef * hramcfg)743 HAL_StatusTypeDef HAL_RAMCFG_Erase(RAMCFG_HandleTypeDef *hramcfg)
744 {
745 uint32_t tickstart = HAL_GetTick();
746
747 /* Check the parameters */
748 assert_param(IS_RAMCFG_ER_INSTANCE(hramcfg->Instance));
749
750 /* Check RAMCFG state */
751 if (hramcfg->State == HAL_RAMCFG_STATE_READY)
752 {
753 /* Update RAMCFG peripheral state */
754 hramcfg->State = HAL_RAMCFG_STATE_BUSY;
755
756 /* Unlock the RAMCFG erase bit */
757 WRITE_REG(hramcfg->Instance->ERKEYR, RAMCFG_ERASE_KEY1);
758 WRITE_REG(hramcfg->Instance->ERKEYR, RAMCFG_ERASE_KEY2);
759
760 /* Start the SRAM erase operation */
761 SET_BIT(hramcfg->Instance->CR, RAMCFG_CR_SRAMER);
762
763 /* Wait for the SRAM hardware erase operation to complete by polling on
764 SRAMBUSY flag to be reset. */
765 while (__HAL_RAMCFG_GET_FLAG(hramcfg, RAMCFG_FLAG_SRAMBUSY) != 0U)
766 {
767 if ((HAL_GetTick() - tickstart) > RAMCFG_TIMEOUT_VALUE)
768 {
769 /* Update the RAMCFG error code */
770 hramcfg->ErrorCode = HAL_RAMCFG_ERROR_TIMEOUT;
771
772 /* Update the RAMCFG state */
773 hramcfg->State = HAL_RAMCFG_STATE_ERROR;
774
775 /* Return error status */
776 return HAL_ERROR;
777 }
778 }
779 }
780 else
781 {
782 /* Update the error code */
783 hramcfg->ErrorCode = HAL_RAMCFG_ERROR_BUSY;
784
785 /* Return error status */
786 return HAL_ERROR;
787 }
788
789 /* Update the RAMCFG state */
790 hramcfg->State = HAL_RAMCFG_STATE_READY;
791
792 return HAL_OK;
793 }
794 /**
795 * @}
796 */
797
798 /** @addtogroup RAMCFG_Exported_Functions_Group6
799 *
800 @verbatim
801 ===============================================================================
802 ##### Handle Interrupt and Callbacks Functions #####
803 ===============================================================================
804 [..]
805 This section provides functions to handle RAMCFG interrupts and
806 Register / UnRegister the different callbacks.
807 [..]
808 The HAL_RAMCFG_IRQHandler() function allows handling the active RAMCFG
809 interrupt request.
810 The HAL_RAMCFG_RegisterCallback() function allows registering the selected
811 RAMCFG callbacks.
812 The HAL_RAMCFG_UnRegisterCallback() function allows unregistering the
813 selected RAMCFG callbacks.
814 @endverbatim
815 * @{
816 */
817
818 /**
819 * @brief Handles RAMCFG interrupt request.
820 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that
821 * contains the configuration information for the
822 * specified RAMCFG instance.
823 * @retval None.
824 */
HAL_RAMCFG_IRQHandler(RAMCFG_HandleTypeDef * hramcfg)825 void HAL_RAMCFG_IRQHandler(RAMCFG_HandleTypeDef *hramcfg)
826 {
827 /* Single Error Interrupt Management ****************************************/
828 if (__HAL_RAMCFG_GET_IT_SOURCE(hramcfg, RAMCFG_IT_PARITYERR) != 0U)
829 {
830 if (__HAL_RAMCFG_GET_FLAG(hramcfg, RAMCFG_FLAG_PARITYERR) != 0U)
831 {
832 /* Clear active flags */
833 __HAL_RAMCFG_CLEAR_FLAG(hramcfg, RAMCFG_FLAG_PARITYERR);
834
835 #if (USE_HAL_RAMCFG_REGISTER_CALLBACKS == 1U)
836 /* Check if a valid single error callback is registered */
837 if (hramcfg->DetectParityErrorCallback == NULL)
838 {
839 /* Legacy callback */
840 hramcfg->DetectParityErrorCallback = HAL_RAMCFG_DetectParityErrorCallback;
841 }
842 hramcfg->DetectParityErrorCallback(hramcfg);
843 #else
844 HAL_RAMCFG_DetectParityErrorCallback(hramcfg);
845 #endif /* USE_HAL_RAMCFG_REGISTER_CALLBACKS */
846 }
847 }
848 }
849
850 /**
851 * @brief RAMCFG parity error detection callback.
852 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that contains
853 * the configuration information for the specified RAMCFG.
854 * @retval None.
855 */
HAL_RAMCFG_DetectParityErrorCallback(RAMCFG_HandleTypeDef * hramcfg)856 __weak void HAL_RAMCFG_DetectParityErrorCallback(RAMCFG_HandleTypeDef *hramcfg)
857 {
858 /* Prevent unused argument(s) compilation warning */
859 UNUSED(hramcfg);
860
861 /* NOTE : This function should not be modified; when the callback is needed,
862 the HAL_RAMCFG_DetectParityErrorCallback can be implemented in
863 the user file. */
864 }
865
866 #if (USE_HAL_RAMCFG_REGISTER_CALLBACKS == 1U)
867 /**
868 * @brief Register RAMCFG callbacks.
869 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that
870 * contains the configuration information for the
871 * specified RAMCFG instance.
872 * @param CallbackID : User Callback identifier a HAL_RAMCFG_CallbackIDTypeDef
873 * ENUM as parameter.
874 * @param pCallback : Pointer to private callback function.
875 * @retval HAL status.
876 */
HAL_RAMCFG_RegisterCallback(RAMCFG_HandleTypeDef * hramcfg,HAL_RAMCFG_CallbackIDTypeDef CallbackID,void (* pCallback)(RAMCFG_HandleTypeDef * _hramcfg))877 HAL_StatusTypeDef HAL_RAMCFG_RegisterCallback(RAMCFG_HandleTypeDef *hramcfg,
878 HAL_RAMCFG_CallbackIDTypeDef CallbackID,
879 void (* pCallback)(RAMCFG_HandleTypeDef *_hramcfg))
880 {
881 HAL_StatusTypeDef status = HAL_OK;
882
883 if (pCallback == NULL)
884 {
885 /* Update the error code */
886 hramcfg->ErrorCode = HAL_RAMCFG_ERROR_INVALID_CALLBACK;
887
888 /* Return error status */
889 return HAL_ERROR;
890 }
891
892 /* Check the parameters */
893 assert_param(IS_RAMCFG_ALL_INSTANCE(hramcfg->Instance));
894
895 /* Check RAMCFG state */
896 if (hramcfg->State == HAL_RAMCFG_STATE_READY)
897 {
898 switch (CallbackID)
899 {
900 case HAL_RAMCFG_PE_DETECT_CB_ID:
901 /* Register parity error detection callback */
902 hramcfg->DetectParityErrorCallback = pCallback;
903 break;
904
905 case HAL_RAMCFG_MSPINIT_CB_ID :
906 /* Register msp init callback */
907 hramcfg->MspInitCallback = pCallback;
908 break;
909
910 case HAL_RAMCFG_MSPDEINIT_CB_ID :
911 /* Register msp de-init callback */
912 hramcfg->MspDeInitCallback = pCallback;
913 break;
914
915 default:
916 /* Update the error code */
917 hramcfg->ErrorCode = HAL_RAMCFG_ERROR_INVALID_CALLBACK;
918
919 /* Update return status */
920 status = HAL_ERROR;
921 break;
922 }
923 }
924 else if (hramcfg->State == HAL_RAMCFG_STATE_RESET)
925 {
926 switch (CallbackID)
927 {
928 case HAL_RAMCFG_MSPINIT_CB_ID :
929 /* Register msp init callback */
930 hramcfg->MspInitCallback = pCallback;
931 break;
932
933 case HAL_RAMCFG_MSPDEINIT_CB_ID :
934 /* Register msp de-init callback */
935 hramcfg->MspDeInitCallback = pCallback;
936 break;
937
938 default :
939 /* Update the error code */
940 hramcfg->ErrorCode = HAL_RAMCFG_ERROR_INVALID_CALLBACK;
941
942 /* Update return status */
943 status = HAL_ERROR;
944 break;
945 }
946 }
947 else
948 {
949 /* Update the error code */
950 hramcfg->ErrorCode = HAL_RAMCFG_ERROR_INVALID_CALLBACK;
951
952 /* Update return status */
953 status = HAL_ERROR;
954 }
955
956 return status;
957 }
958
959 /**
960 * @brief UnRegister RAMCFG callbacks.
961 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that
962 * contains the configuration information for the
963 * specified RAMCFG instance.
964 * @param CallbackID : User Callback identifier a HAL_RAMCFG_CallbackIDTypeDef
965 * ENUM as parameter.
966 * @retval HAL status.
967 */
HAL_RAMCFG_UnRegisterCallback(RAMCFG_HandleTypeDef * hramcfg,HAL_RAMCFG_CallbackIDTypeDef CallbackID)968 HAL_StatusTypeDef HAL_RAMCFG_UnRegisterCallback(RAMCFG_HandleTypeDef *hramcfg, HAL_RAMCFG_CallbackIDTypeDef CallbackID)
969 {
970 HAL_StatusTypeDef status = HAL_OK;
971
972 /* Check the parameters */
973 assert_param(IS_RAMCFG_ALL_INSTANCE(hramcfg->Instance));
974
975 /* Check RAMCFG state */
976 if (hramcfg->State == HAL_RAMCFG_STATE_READY)
977 {
978 switch (CallbackID)
979 {
980 case HAL_RAMCFG_PE_DETECT_CB_ID:
981 /* UnRegister parity error detection callback */
982 hramcfg->DetectParityErrorCallback = NULL;
983 break;
984
985 case HAL_RAMCFG_MSPINIT_CB_ID :
986 /* UnRegister msp init callback */
987 hramcfg->MspInitCallback = NULL;
988 break;
989
990 case HAL_RAMCFG_MSPDEINIT_CB_ID :
991 /* UnRegister msp de-init callback */
992 hramcfg->MspDeInitCallback = NULL;
993 break;
994
995 case HAL_RAMCFG_ALL_CB_ID:
996 /* UnRegister all available callbacks */
997 hramcfg->DetectParityErrorCallback = NULL;
998 hramcfg->MspDeInitCallback = NULL;
999 hramcfg->MspInitCallback = NULL;
1000 break;
1001
1002 default:
1003 /* Update the error code */
1004 hramcfg->ErrorCode = HAL_RAMCFG_ERROR_INVALID_CALLBACK;
1005
1006 /* Return error status */
1007 status = HAL_ERROR;
1008 break;
1009 }
1010 }
1011 else if (hramcfg->State == HAL_RAMCFG_STATE_RESET)
1012 {
1013 switch (CallbackID)
1014 {
1015 case HAL_RAMCFG_MSPINIT_CB_ID :
1016 /* UnRegister msp init callback */
1017 hramcfg->MspInitCallback = NULL;
1018 break;
1019
1020 case HAL_RAMCFG_MSPDEINIT_CB_ID :
1021 /* UnRegister msp de-init callback */
1022 hramcfg->MspDeInitCallback = NULL;
1023 break;
1024
1025 case HAL_RAMCFG_ALL_CB_ID:
1026 /* UnRegister all available callbacks */
1027 hramcfg->MspDeInitCallback = NULL;
1028 hramcfg->MspInitCallback = NULL;
1029 break;
1030
1031 default :
1032 /* Update the error code */
1033 hramcfg->ErrorCode = HAL_RAMCFG_ERROR_INVALID_CALLBACK;
1034
1035 /* Update return status */
1036 status = HAL_ERROR;
1037 break;
1038 }
1039 }
1040 else
1041 {
1042 /* Update the error code */
1043 hramcfg->ErrorCode = HAL_RAMCFG_ERROR_INVALID_CALLBACK;
1044
1045 /* Update return status */
1046 status = HAL_ERROR;
1047 }
1048
1049 return status;
1050 }
1051 /**
1052 * @}
1053 */
1054 #endif /* USE_HAL_RAMCFG_REGISTER_CALLBACKS */
1055
1056 /** @addtogroup RAMCFG_Exported_Functions_Group7
1057 *
1058 @verbatim
1059 ===============================================================================
1060 ##### State and Error Functions #####
1061 ===============================================================================
1062 [..]
1063 This section provides functions to check and get the RAMCFG state
1064 and the error code .
1065 [..]
1066 The HAL_RAMCFG_GetState() function allows getting the RAMCFG peripheral
1067 state.
1068 The HAL_RAMCFG_GetError() function allows getting the RAMCFG peripheral error
1069 code.
1070
1071 @endverbatim
1072 * @{
1073 */
1074
1075 /**
1076 * @brief Get the RAMCFG peripheral state.
1077 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that
1078 * contains the configuration information for the
1079 * specified RAMCFG instance.
1080 * @retval RAMCFG state.
1081 */
HAL_RAMCFG_GetState(const RAMCFG_HandleTypeDef * hramcfg)1082 HAL_RAMCFG_StateTypeDef HAL_RAMCFG_GetState(const RAMCFG_HandleTypeDef *hramcfg)
1083 {
1084 /* Check the parameters */
1085 assert_param(IS_RAMCFG_ALL_INSTANCE(hramcfg->Instance));
1086
1087 /* Return the RAMCFG state */
1088 return hramcfg->State;
1089 }
1090
1091 /**
1092 * @brief Get the RAMCFG peripheral error code.
1093 * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that
1094 * contains the configuration information for the
1095 * specified RAMCFG instance.
1096 * @retval RAMCFG error code.
1097 */
HAL_RAMCFG_GetError(const RAMCFG_HandleTypeDef * hramcfg)1098 uint32_t HAL_RAMCFG_GetError(const RAMCFG_HandleTypeDef *hramcfg)
1099 {
1100 /* Check the parameters */
1101 assert_param(IS_RAMCFG_ALL_INSTANCE(hramcfg->Instance));
1102
1103 /* Return the RAMCFG error code */
1104 return hramcfg->ErrorCode;
1105 }
1106 /**
1107 * @}
1108 */
1109
1110
1111 #endif /* HAL_RAMCFG_MODULE_ENABLED */
1112 /**
1113 * @}
1114 */
1115
1116 /**
1117 * @}
1118 */
1119
1120 /**
1121 * @}
1122 */
1123
1124
