1 /**
2 ******************************************************************************
3 * @file stm32l4xx_ll_exti.h
4 * @author MCD Application Team
5 * @brief Header file of EXTI LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32L4xx_LL_EXTI_H
21 #define STM32L4xx_LL_EXTI_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32l4xx.h"
29
30 /** @addtogroup STM32L4xx_LL_Driver
31 * @{
32 */
33
34 #if defined (EXTI)
35
36 /** @defgroup EXTI_LL EXTI
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /* Private Macros ------------------------------------------------------------*/
44 #if defined(USE_FULL_LL_DRIVER)
45 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
46 * @{
47 */
48 /**
49 * @}
50 */
51 #endif /*USE_FULL_LL_DRIVER*/
52 /* Exported types ------------------------------------------------------------*/
53 #if defined(USE_FULL_LL_DRIVER)
54 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
55 * @{
56 */
57 typedef struct
58 {
59
60 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
61 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
62
63 uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63
64 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
65
66 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
67 This parameter can be set either to ENABLE or DISABLE */
68
69 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
70 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
71
72 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
73 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
74 } LL_EXTI_InitTypeDef;
75
76 /**
77 * @}
78 */
79 #endif /*USE_FULL_LL_DRIVER*/
80
81 /* Exported constants --------------------------------------------------------*/
82 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
83 * @{
84 */
85
86 /** @defgroup EXTI_LL_EC_LINE LINE
87 * @{
88 */
89 #define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */
90 #define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */
91 #define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */
92 #define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */
93 #define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */
94 #define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */
95 #define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */
96 #define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */
97 #define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */
98 #define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */
99 #define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */
100 #define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */
101 #define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */
102 #define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */
103 #define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */
104 #define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */
105 #if defined(EXTI_IMR1_IM16)
106 #define LL_EXTI_LINE_16 EXTI_IMR1_IM16 /*!< Extended line 16 */
107 #endif
108 #define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /*!< Extended line 17 */
109 #if defined(EXTI_IMR1_IM18)
110 #ifndef LL_EXTI_LINE_18
111 #define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /*!< Extended line 18 */
112 #endif
113 #endif
114 #define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */
115 #if defined(EXTI_IMR1_IM20)
116 #ifndef LL_EXTI_LINE_20
117 #define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /*!< Extended line 20 */
118 #endif
119 #endif
120 #if defined(EXTI_IMR1_IM21)
121 #define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /*!< Extended line 21 */
122 #endif
123 #if defined(EXTI_IMR1_IM22)
124 #define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /*!< Extended line 22 */
125 #endif
126 #define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */
127 #if defined(EXTI_IMR1_IM24)
128 #define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /*!< Extended line 24 */
129 #endif
130 #if defined(EXTI_IMR1_IM25)
131 #define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */
132 #endif
133 #if defined(EXTI_IMR1_IM26)
134 #define LL_EXTI_LINE_26 EXTI_IMR1_IM26 /*!< Extended line 26 */
135 #endif
136 #if defined(EXTI_IMR1_IM27)
137 #define LL_EXTI_LINE_27 EXTI_IMR1_IM27 /*!< Extended line 27 */
138 #endif
139 #if defined(EXTI_IMR1_IM28)
140 #define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /*!< Extended line 28 */
141 #endif
142 #if defined(EXTI_IMR1_IM29)
143 #define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /*!< Extended line 29 */
144 #endif
145 #if defined(EXTI_IMR1_IM30)
146 #define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /*!< Extended line 30 */
147 #endif
148 #if defined(EXTI_IMR1_IM31)
149 #define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */
150 #endif
151 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR1_IM /*!< All Extended line not reserved*/
152
153 #define LL_EXTI_LINE_32 EXTI_IMR2_IM32 /*!< Extended line 32 */
154 #if defined(EXTI_IMR2_IM33)
155 #define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /*!< Extended line 33 */
156 #endif
157 #if defined(EXTI_IMR2_IM34)
158 #define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /*!< Extended line 34 */
159 #endif
160 #if defined(EXTI_IMR2_IM35)
161 #define LL_EXTI_LINE_35 EXTI_IMR2_IM35 /*!< Extended line 35 */
162 #endif
163 #if defined(EXTI_IMR2_IM36)
164 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */
165 #endif
166 #if defined(EXTI_IMR2_IM37)
167 #define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /*!< Extended line 37 */
168 #endif
169 #if defined(EXTI_IMR2_IM38)
170 #define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /*!< Extended line 38 */
171 #endif
172 #if defined(EXTI_IMR2_IM39)
173 #define LL_EXTI_LINE_39 EXTI_IMR2_IM39 /*!< Extended line 39 */
174 #endif
175 #if defined(EXTI_IMR2_IM40)
176 #define LL_EXTI_LINE_40 EXTI_IMR2_IM40 /*!< Extended line 40 */
177 #endif
178 #define LL_EXTI_LINE_ALL_32_63 EXTI_IMR2_IM /*!< All Extended line not reserved*/
179
180
181 #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */
182
183 #if defined(USE_FULL_LL_DRIVER)
184 #define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */
185 #endif /*USE_FULL_LL_DRIVER*/
186
187 /**
188 * @}
189 */
190
191
192 #if defined(USE_FULL_LL_DRIVER)
193
194 /** @defgroup EXTI_LL_EC_MODE Mode
195 * @{
196 */
197 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
198 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
199 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
200 /**
201 * @}
202 */
203
204 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
205 * @{
206 */
207 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
208 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
209 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
210 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
211
212 /**
213 * @}
214 */
215
216
217 #endif /*USE_FULL_LL_DRIVER*/
218
219
220 /**
221 * @}
222 */
223
224 /* Exported macro ------------------------------------------------------------*/
225 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
226 * @{
227 */
228
229 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
230 * @{
231 */
232
233 /**
234 * @brief Write a value in EXTI register
235 * @param __REG__ Register to be written
236 * @param __VALUE__ Value to be written in the register
237 * @retval None
238 */
239 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
240
241 /**
242 * @brief Read a value in EXTI register
243 * @param __REG__ Register to be read
244 * @retval Register value
245 */
246 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
247 /**
248 * @}
249 */
250
251
252 /**
253 * @}
254 */
255
256
257
258 /* Exported functions --------------------------------------------------------*/
259 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
260 * @{
261 */
262 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
263 * @{
264 */
265
266 /**
267 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
268 * @note The reset value for the direct or internal lines (see RM)
269 * is set to 1 in order to enable the interrupt by default.
270 * Bits are set automatically at Power on.
271 * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31
272 * @param ExtiLine This parameter can be one of the following values:
273 * @arg @ref LL_EXTI_LINE_0
274 * @arg @ref LL_EXTI_LINE_1
275 * @arg @ref LL_EXTI_LINE_2
276 * @arg @ref LL_EXTI_LINE_3
277 * @arg @ref LL_EXTI_LINE_4
278 * @arg @ref LL_EXTI_LINE_5
279 * @arg @ref LL_EXTI_LINE_6
280 * @arg @ref LL_EXTI_LINE_7
281 * @arg @ref LL_EXTI_LINE_8
282 * @arg @ref LL_EXTI_LINE_9
283 * @arg @ref LL_EXTI_LINE_10
284 * @arg @ref LL_EXTI_LINE_11
285 * @arg @ref LL_EXTI_LINE_12
286 * @arg @ref LL_EXTI_LINE_13
287 * @arg @ref LL_EXTI_LINE_14
288 * @arg @ref LL_EXTI_LINE_15
289 * @arg @ref LL_EXTI_LINE_16
290 * @arg @ref LL_EXTI_LINE_17
291 * @arg @ref LL_EXTI_LINE_18
292 * @arg @ref LL_EXTI_LINE_19
293 * @arg @ref LL_EXTI_LINE_20
294 * @arg @ref LL_EXTI_LINE_21
295 * @arg @ref LL_EXTI_LINE_22
296 * @arg @ref LL_EXTI_LINE_23
297 * @arg @ref LL_EXTI_LINE_24
298 * @arg @ref LL_EXTI_LINE_25
299 * @arg @ref LL_EXTI_LINE_26
300 * @arg @ref LL_EXTI_LINE_27
301 * @arg @ref LL_EXTI_LINE_28
302 * @arg @ref LL_EXTI_LINE_29
303 * @arg @ref LL_EXTI_LINE_30
304 * @arg @ref LL_EXTI_LINE_31
305 * @arg @ref LL_EXTI_LINE_ALL_0_31
306 * @note Please check each device line mapping for EXTI Line availability
307 * @retval None
308 */
LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)309 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
310 {
311 SET_BIT(EXTI->IMR1, ExtiLine);
312 }
313 /**
314 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63
315 * @note The reset value for the direct lines (lines from 32 to 34, line
316 * 39) is set to 1 in order to enable the interrupt by default.
317 * Bits are set automatically at Power on.
318 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63
319 * @param ExtiLine This parameter can be one of the following values:
320 * @arg @ref LL_EXTI_LINE_32
321 * @arg @ref LL_EXTI_LINE_33
322 * @arg @ref LL_EXTI_LINE_34(*)
323 * @arg @ref LL_EXTI_LINE_35
324 * @arg @ref LL_EXTI_LINE_36
325 * @arg @ref LL_EXTI_LINE_37
326 * @arg @ref LL_EXTI_LINE_38
327 * @arg @ref LL_EXTI_LINE_39(*)
328 * @arg @ref LL_EXTI_LINE_40(*)
329 * @arg @ref LL_EXTI_LINE_ALL_32_63
330 * @note (*): Available in some devices
331 * @retval None
332 */
LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)333 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)
334 {
335 SET_BIT(EXTI->IMR2, ExtiLine);
336 }
337
338 /**
339 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
340 * @note The reset value for the direct or internal lines (see RM)
341 * is set to 1 in order to enable the interrupt by default.
342 * Bits are set automatically at Power on.
343 * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31
344 * @param ExtiLine This parameter can be one of the following values:
345 * @arg @ref LL_EXTI_LINE_0
346 * @arg @ref LL_EXTI_LINE_1
347 * @arg @ref LL_EXTI_LINE_2
348 * @arg @ref LL_EXTI_LINE_3
349 * @arg @ref LL_EXTI_LINE_4
350 * @arg @ref LL_EXTI_LINE_5
351 * @arg @ref LL_EXTI_LINE_6
352 * @arg @ref LL_EXTI_LINE_7
353 * @arg @ref LL_EXTI_LINE_8
354 * @arg @ref LL_EXTI_LINE_9
355 * @arg @ref LL_EXTI_LINE_10
356 * @arg @ref LL_EXTI_LINE_11
357 * @arg @ref LL_EXTI_LINE_12
358 * @arg @ref LL_EXTI_LINE_13
359 * @arg @ref LL_EXTI_LINE_14
360 * @arg @ref LL_EXTI_LINE_15
361 * @arg @ref LL_EXTI_LINE_16
362 * @arg @ref LL_EXTI_LINE_17
363 * @arg @ref LL_EXTI_LINE_18
364 * @arg @ref LL_EXTI_LINE_19
365 * @arg @ref LL_EXTI_LINE_20
366 * @arg @ref LL_EXTI_LINE_21
367 * @arg @ref LL_EXTI_LINE_22
368 * @arg @ref LL_EXTI_LINE_23
369 * @arg @ref LL_EXTI_LINE_24
370 * @arg @ref LL_EXTI_LINE_25
371 * @arg @ref LL_EXTI_LINE_26
372 * @arg @ref LL_EXTI_LINE_27
373 * @arg @ref LL_EXTI_LINE_28
374 * @arg @ref LL_EXTI_LINE_29
375 * @arg @ref LL_EXTI_LINE_30
376 * @arg @ref LL_EXTI_LINE_31
377 * @arg @ref LL_EXTI_LINE_ALL_0_31
378 * @note Please check each device line mapping for EXTI Line availability
379 * @retval None
380 */
LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)381 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
382 {
383 CLEAR_BIT(EXTI->IMR1, ExtiLine);
384 }
385
386 /**
387 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63
388 * @note The reset value for the direct lines (lines from 32 to 34, line
389 * 39) is set to 1 in order to enable the interrupt by default.
390 * Bits are set automatically at Power on.
391 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63
392 * @param ExtiLine This parameter can be one of the following values:
393 * @arg @ref LL_EXTI_LINE_32
394 * @arg @ref LL_EXTI_LINE_33
395 * @arg @ref LL_EXTI_LINE_34(*)
396 * @arg @ref LL_EXTI_LINE_35
397 * @arg @ref LL_EXTI_LINE_36
398 * @arg @ref LL_EXTI_LINE_37
399 * @arg @ref LL_EXTI_LINE_38
400 * @arg @ref LL_EXTI_LINE_39(*)
401 * @arg @ref LL_EXTI_LINE_40(*)
402 * @arg @ref LL_EXTI_LINE_ALL_32_63
403 * @note (*): Available in some devices
404 * @retval None
405 */
LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)406 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)
407 {
408 CLEAR_BIT(EXTI->IMR2, ExtiLine);
409 }
410
411 /**
412 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
413 * @note The reset value for the direct or internal lines (see RM)
414 * is set to 1 in order to enable the interrupt by default.
415 * Bits are set automatically at Power on.
416 * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31
417 * @param ExtiLine This parameter can be one of the following values:
418 * @arg @ref LL_EXTI_LINE_0
419 * @arg @ref LL_EXTI_LINE_1
420 * @arg @ref LL_EXTI_LINE_2
421 * @arg @ref LL_EXTI_LINE_3
422 * @arg @ref LL_EXTI_LINE_4
423 * @arg @ref LL_EXTI_LINE_5
424 * @arg @ref LL_EXTI_LINE_6
425 * @arg @ref LL_EXTI_LINE_7
426 * @arg @ref LL_EXTI_LINE_8
427 * @arg @ref LL_EXTI_LINE_9
428 * @arg @ref LL_EXTI_LINE_10
429 * @arg @ref LL_EXTI_LINE_11
430 * @arg @ref LL_EXTI_LINE_12
431 * @arg @ref LL_EXTI_LINE_13
432 * @arg @ref LL_EXTI_LINE_14
433 * @arg @ref LL_EXTI_LINE_15
434 * @arg @ref LL_EXTI_LINE_16
435 * @arg @ref LL_EXTI_LINE_17
436 * @arg @ref LL_EXTI_LINE_18
437 * @arg @ref LL_EXTI_LINE_19
438 * @arg @ref LL_EXTI_LINE_20
439 * @arg @ref LL_EXTI_LINE_21
440 * @arg @ref LL_EXTI_LINE_22
441 * @arg @ref LL_EXTI_LINE_23
442 * @arg @ref LL_EXTI_LINE_24
443 * @arg @ref LL_EXTI_LINE_25
444 * @arg @ref LL_EXTI_LINE_26
445 * @arg @ref LL_EXTI_LINE_27
446 * @arg @ref LL_EXTI_LINE_28
447 * @arg @ref LL_EXTI_LINE_29
448 * @arg @ref LL_EXTI_LINE_30
449 * @arg @ref LL_EXTI_LINE_31
450 * @arg @ref LL_EXTI_LINE_ALL_0_31
451 * @note Please check each device line mapping for EXTI Line availability
452 * @retval State of bit (1 or 0).
453 */
LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)454 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
455 {
456 return ((READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
457 }
458
459 /**
460 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63
461 * @note The reset value for the direct lines (lines from 32 to 34, line
462 * 39) is set to 1 in order to enable the interrupt by default.
463 * Bits are set automatically at Power on.
464 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63
465 * @param ExtiLine This parameter can be one of the following values:
466 * @arg @ref LL_EXTI_LINE_32
467 * @arg @ref LL_EXTI_LINE_33
468 * @arg @ref LL_EXTI_LINE_34(*)
469 * @arg @ref LL_EXTI_LINE_35
470 * @arg @ref LL_EXTI_LINE_36
471 * @arg @ref LL_EXTI_LINE_37
472 * @arg @ref LL_EXTI_LINE_38
473 * @arg @ref LL_EXTI_LINE_39(*)
474 * @arg @ref LL_EXTI_LINE_40(*)
475 * @arg @ref LL_EXTI_LINE_ALL_32_63
476 * @note (*): Available in some devices
477 * @retval State of bit (1 or 0).
478 */
LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)479 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
480 {
481 return ((READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
482 }
483
484 /**
485 * @}
486 */
487
488 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
489 * @{
490 */
491
492 /**
493 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
494 * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31
495 * @param ExtiLine This parameter can be one of the following values:
496 * @arg @ref LL_EXTI_LINE_0
497 * @arg @ref LL_EXTI_LINE_1
498 * @arg @ref LL_EXTI_LINE_2
499 * @arg @ref LL_EXTI_LINE_3
500 * @arg @ref LL_EXTI_LINE_4
501 * @arg @ref LL_EXTI_LINE_5
502 * @arg @ref LL_EXTI_LINE_6
503 * @arg @ref LL_EXTI_LINE_7
504 * @arg @ref LL_EXTI_LINE_8
505 * @arg @ref LL_EXTI_LINE_9
506 * @arg @ref LL_EXTI_LINE_10
507 * @arg @ref LL_EXTI_LINE_11
508 * @arg @ref LL_EXTI_LINE_12
509 * @arg @ref LL_EXTI_LINE_13
510 * @arg @ref LL_EXTI_LINE_14
511 * @arg @ref LL_EXTI_LINE_15
512 * @arg @ref LL_EXTI_LINE_16
513 * @arg @ref LL_EXTI_LINE_17
514 * @arg @ref LL_EXTI_LINE_18
515 * @arg @ref LL_EXTI_LINE_19
516 * @arg @ref LL_EXTI_LINE_20
517 * @arg @ref LL_EXTI_LINE_21
518 * @arg @ref LL_EXTI_LINE_22
519 * @arg @ref LL_EXTI_LINE_23
520 * @arg @ref LL_EXTI_LINE_24
521 * @arg @ref LL_EXTI_LINE_25
522 * @arg @ref LL_EXTI_LINE_26
523 * @arg @ref LL_EXTI_LINE_27
524 * @arg @ref LL_EXTI_LINE_28
525 * @arg @ref LL_EXTI_LINE_29
526 * @arg @ref LL_EXTI_LINE_30
527 * @arg @ref LL_EXTI_LINE_31
528 * @arg @ref LL_EXTI_LINE_ALL_0_31
529 * @note Please check each device line mapping for EXTI Line availability
530 * @retval None
531 */
LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)532 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
533 {
534 SET_BIT(EXTI->EMR1, ExtiLine);
535
536 }
537
538 /**
539 * @brief Enable ExtiLine Event request for Lines in range 32 to 63
540 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63
541 * @param ExtiLine This parameter can be a combination of the following values:
542 * @arg @ref LL_EXTI_LINE_32
543 * @arg @ref LL_EXTI_LINE_33
544 * @arg @ref LL_EXTI_LINE_34(*)
545 * @arg @ref LL_EXTI_LINE_35
546 * @arg @ref LL_EXTI_LINE_36
547 * @arg @ref LL_EXTI_LINE_37
548 * @arg @ref LL_EXTI_LINE_38
549 * @arg @ref LL_EXTI_LINE_39(*)
550 * @arg @ref LL_EXTI_LINE_40(*)
551 * @arg @ref LL_EXTI_LINE_ALL_32_63
552 * @note (*): Available in some devices
553 * @retval None
554 */
LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)555 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
556 {
557 SET_BIT(EXTI->EMR2, ExtiLine);
558 }
559
560 /**
561 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
562 * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31
563 * @param ExtiLine This parameter can be one of the following values:
564 * @arg @ref LL_EXTI_LINE_0
565 * @arg @ref LL_EXTI_LINE_1
566 * @arg @ref LL_EXTI_LINE_2
567 * @arg @ref LL_EXTI_LINE_3
568 * @arg @ref LL_EXTI_LINE_4
569 * @arg @ref LL_EXTI_LINE_5
570 * @arg @ref LL_EXTI_LINE_6
571 * @arg @ref LL_EXTI_LINE_7
572 * @arg @ref LL_EXTI_LINE_8
573 * @arg @ref LL_EXTI_LINE_9
574 * @arg @ref LL_EXTI_LINE_10
575 * @arg @ref LL_EXTI_LINE_11
576 * @arg @ref LL_EXTI_LINE_12
577 * @arg @ref LL_EXTI_LINE_13
578 * @arg @ref LL_EXTI_LINE_14
579 * @arg @ref LL_EXTI_LINE_15
580 * @arg @ref LL_EXTI_LINE_16
581 * @arg @ref LL_EXTI_LINE_17
582 * @arg @ref LL_EXTI_LINE_18
583 * @arg @ref LL_EXTI_LINE_19
584 * @arg @ref LL_EXTI_LINE_20
585 * @arg @ref LL_EXTI_LINE_21
586 * @arg @ref LL_EXTI_LINE_22
587 * @arg @ref LL_EXTI_LINE_23
588 * @arg @ref LL_EXTI_LINE_24
589 * @arg @ref LL_EXTI_LINE_25
590 * @arg @ref LL_EXTI_LINE_26
591 * @arg @ref LL_EXTI_LINE_27
592 * @arg @ref LL_EXTI_LINE_28
593 * @arg @ref LL_EXTI_LINE_29
594 * @arg @ref LL_EXTI_LINE_30
595 * @arg @ref LL_EXTI_LINE_31
596 * @arg @ref LL_EXTI_LINE_ALL_0_31
597 * @note Please check each device line mapping for EXTI Line availability
598 * @retval None
599 */
LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)600 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
601 {
602 CLEAR_BIT(EXTI->EMR1, ExtiLine);
603 }
604
605 /**
606 * @brief Disable ExtiLine Event request for Lines in range 32 to 63
607 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63
608 * @param ExtiLine This parameter can be a combination of the following values:
609 * @arg @ref LL_EXTI_LINE_32
610 * @arg @ref LL_EXTI_LINE_33
611 * @arg @ref LL_EXTI_LINE_34(*)
612 * @arg @ref LL_EXTI_LINE_35
613 * @arg @ref LL_EXTI_LINE_36
614 * @arg @ref LL_EXTI_LINE_37
615 * @arg @ref LL_EXTI_LINE_38
616 * @arg @ref LL_EXTI_LINE_39(*)
617 * @arg @ref LL_EXTI_LINE_40(*)
618 * @arg @ref LL_EXTI_LINE_ALL_32_63
619 * @note (*): Available in some devices
620 * @retval None
621 */
LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)622 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
623 {
624 CLEAR_BIT(EXTI->EMR2, ExtiLine);
625 }
626
627 /**
628 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
629 * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31
630 * @param ExtiLine This parameter can be one of the following values:
631 * @arg @ref LL_EXTI_LINE_0
632 * @arg @ref LL_EXTI_LINE_1
633 * @arg @ref LL_EXTI_LINE_2
634 * @arg @ref LL_EXTI_LINE_3
635 * @arg @ref LL_EXTI_LINE_4
636 * @arg @ref LL_EXTI_LINE_5
637 * @arg @ref LL_EXTI_LINE_6
638 * @arg @ref LL_EXTI_LINE_7
639 * @arg @ref LL_EXTI_LINE_8
640 * @arg @ref LL_EXTI_LINE_9
641 * @arg @ref LL_EXTI_LINE_10
642 * @arg @ref LL_EXTI_LINE_11
643 * @arg @ref LL_EXTI_LINE_12
644 * @arg @ref LL_EXTI_LINE_13
645 * @arg @ref LL_EXTI_LINE_14
646 * @arg @ref LL_EXTI_LINE_15
647 * @arg @ref LL_EXTI_LINE_16
648 * @arg @ref LL_EXTI_LINE_17
649 * @arg @ref LL_EXTI_LINE_18
650 * @arg @ref LL_EXTI_LINE_19
651 * @arg @ref LL_EXTI_LINE_20
652 * @arg @ref LL_EXTI_LINE_21
653 * @arg @ref LL_EXTI_LINE_22
654 * @arg @ref LL_EXTI_LINE_23
655 * @arg @ref LL_EXTI_LINE_24
656 * @arg @ref LL_EXTI_LINE_25
657 * @arg @ref LL_EXTI_LINE_26
658 * @arg @ref LL_EXTI_LINE_27
659 * @arg @ref LL_EXTI_LINE_28
660 * @arg @ref LL_EXTI_LINE_29
661 * @arg @ref LL_EXTI_LINE_30
662 * @arg @ref LL_EXTI_LINE_31
663 * @arg @ref LL_EXTI_LINE_ALL_0_31
664 * @note Please check each device line mapping for EXTI Line availability
665 * @retval State of bit (1 or 0).
666 */
LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)667 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
668 {
669 return ((READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
670
671 }
672
673 /**
674 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63
675 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63
676 * @param ExtiLine This parameter can be a combination of the following values:
677 * @arg @ref LL_EXTI_LINE_32
678 * @arg @ref LL_EXTI_LINE_33
679 * @arg @ref LL_EXTI_LINE_34(*)
680 * @arg @ref LL_EXTI_LINE_35
681 * @arg @ref LL_EXTI_LINE_36
682 * @arg @ref LL_EXTI_LINE_37
683 * @arg @ref LL_EXTI_LINE_38
684 * @arg @ref LL_EXTI_LINE_39(*)
685 * @arg @ref LL_EXTI_LINE_40(*)
686 * @arg @ref LL_EXTI_LINE_ALL_32_63
687 * @note (*): Available in some devices
688 * @retval State of bit (1 or 0).
689 */
LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)690 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
691 {
692 return ((READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
693 }
694
695 /**
696 * @}
697 */
698
699 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
700 * @{
701 */
702
703 /**
704 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
705 * @note The configurable wakeup lines are edge-triggered. No glitch must be
706 * generated on these lines. If a rising edge on a configurable interrupt
707 * line occurs during a write operation in the EXTI_RTSR register, the
708 * pending bit is not set.
709 * Rising and falling edge triggers can be set for
710 * the same interrupt line. In this case, both generate a trigger
711 * condition.
712 * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31
713 * @param ExtiLine This parameter can be a combination of the following values:
714 * @arg @ref LL_EXTI_LINE_0
715 * @arg @ref LL_EXTI_LINE_1
716 * @arg @ref LL_EXTI_LINE_2
717 * @arg @ref LL_EXTI_LINE_3
718 * @arg @ref LL_EXTI_LINE_4
719 * @arg @ref LL_EXTI_LINE_5
720 * @arg @ref LL_EXTI_LINE_6
721 * @arg @ref LL_EXTI_LINE_7
722 * @arg @ref LL_EXTI_LINE_8
723 * @arg @ref LL_EXTI_LINE_9
724 * @arg @ref LL_EXTI_LINE_10
725 * @arg @ref LL_EXTI_LINE_11
726 * @arg @ref LL_EXTI_LINE_12
727 * @arg @ref LL_EXTI_LINE_13
728 * @arg @ref LL_EXTI_LINE_14
729 * @arg @ref LL_EXTI_LINE_15
730 * @arg @ref LL_EXTI_LINE_16
731 * @arg @ref LL_EXTI_LINE_18
732 * @arg @ref LL_EXTI_LINE_19
733 * @arg @ref LL_EXTI_LINE_20
734 * @arg @ref LL_EXTI_LINE_21
735 * @arg @ref LL_EXTI_LINE_22
736 * @arg @ref LL_EXTI_LINE_29
737 * @arg @ref LL_EXTI_LINE_30
738 * @arg @ref LL_EXTI_LINE_31
739 * @note Please check each device line mapping for EXTI Line availability
740 * @retval None
741 */
LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)742 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
743 {
744 SET_BIT(EXTI->RTSR1, ExtiLine);
745
746 }
747
748 /**
749 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
750 * @note The configurable wakeup lines are edge-triggered. No glitch must be
751 * generated on these lines. If a rising edge on a configurable interrupt
752 * line occurs during a write operation in the EXTI_RTSR register, the
753 * pending bit is not set.Rising and falling edge triggers can be set for
754 * the same interrupt line. In this case, both generate a trigger
755 * condition.
756 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63
757 * @param ExtiLine This parameter can be a combination of the following values:
758 * @arg @ref LL_EXTI_LINE_35
759 * @arg @ref LL_EXTI_LINE_36
760 * @arg @ref LL_EXTI_LINE_37
761 * @arg @ref LL_EXTI_LINE_38
762 * @retval None
763 */
LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)764 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)
765 {
766 SET_BIT(EXTI->RTSR2, ExtiLine);
767 }
768
769 /**
770 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
771 * @note The configurable wakeup lines are edge-triggered. No glitch must be
772 * generated on these lines. If a rising edge on a configurable interrupt
773 * line occurs during a write operation in the EXTI_RTSR register, the
774 * pending bit is not set.
775 * Rising and falling edge triggers can be set for
776 * the same interrupt line. In this case, both generate a trigger
777 * condition.
778 * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31
779 * @param ExtiLine This parameter can be a combination of the following values:
780 * @arg @ref LL_EXTI_LINE_0
781 * @arg @ref LL_EXTI_LINE_1
782 * @arg @ref LL_EXTI_LINE_2
783 * @arg @ref LL_EXTI_LINE_3
784 * @arg @ref LL_EXTI_LINE_4
785 * @arg @ref LL_EXTI_LINE_5
786 * @arg @ref LL_EXTI_LINE_6
787 * @arg @ref LL_EXTI_LINE_7
788 * @arg @ref LL_EXTI_LINE_8
789 * @arg @ref LL_EXTI_LINE_9
790 * @arg @ref LL_EXTI_LINE_10
791 * @arg @ref LL_EXTI_LINE_11
792 * @arg @ref LL_EXTI_LINE_12
793 * @arg @ref LL_EXTI_LINE_13
794 * @arg @ref LL_EXTI_LINE_14
795 * @arg @ref LL_EXTI_LINE_15
796 * @arg @ref LL_EXTI_LINE_16
797 * @arg @ref LL_EXTI_LINE_18
798 * @arg @ref LL_EXTI_LINE_19
799 * @arg @ref LL_EXTI_LINE_20
800 * @arg @ref LL_EXTI_LINE_21
801 * @arg @ref LL_EXTI_LINE_22
802 * @arg @ref LL_EXTI_LINE_29
803 * @arg @ref LL_EXTI_LINE_30
804 * @arg @ref LL_EXTI_LINE_31
805 * @note Please check each device line mapping for EXTI Line availability
806 * @retval None
807 */
LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)808 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
809 {
810 CLEAR_BIT(EXTI->RTSR1, ExtiLine);
811
812 }
813
814 /**
815 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
816 * @note The configurable wakeup lines are edge-triggered. No glitch must be
817 * generated on these lines. If a rising edge on a configurable interrupt
818 * line occurs during a write operation in the EXTI_RTSR register, the
819 * pending bit is not set.
820 * Rising and falling edge triggers can be set for
821 * the same interrupt line. In this case, both generate a trigger
822 * condition.
823 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63
824 * @param ExtiLine This parameter can be a combination of the following values:
825 * @arg @ref LL_EXTI_LINE_35
826 * @arg @ref LL_EXTI_LINE_36
827 * @arg @ref LL_EXTI_LINE_37
828 * @arg @ref LL_EXTI_LINE_38
829 * @retval None
830 */
LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)831 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)
832 {
833 CLEAR_BIT(EXTI->RTSR2, ExtiLine);
834 }
835
836 /**
837 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
838 * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31
839 * @param ExtiLine This parameter can be a combination of the following values:
840 * @arg @ref LL_EXTI_LINE_0
841 * @arg @ref LL_EXTI_LINE_1
842 * @arg @ref LL_EXTI_LINE_2
843 * @arg @ref LL_EXTI_LINE_3
844 * @arg @ref LL_EXTI_LINE_4
845 * @arg @ref LL_EXTI_LINE_5
846 * @arg @ref LL_EXTI_LINE_6
847 * @arg @ref LL_EXTI_LINE_7
848 * @arg @ref LL_EXTI_LINE_8
849 * @arg @ref LL_EXTI_LINE_9
850 * @arg @ref LL_EXTI_LINE_10
851 * @arg @ref LL_EXTI_LINE_11
852 * @arg @ref LL_EXTI_LINE_12
853 * @arg @ref LL_EXTI_LINE_13
854 * @arg @ref LL_EXTI_LINE_14
855 * @arg @ref LL_EXTI_LINE_15
856 * @arg @ref LL_EXTI_LINE_16
857 * @arg @ref LL_EXTI_LINE_18
858 * @arg @ref LL_EXTI_LINE_19
859 * @arg @ref LL_EXTI_LINE_20
860 * @arg @ref LL_EXTI_LINE_21
861 * @arg @ref LL_EXTI_LINE_22
862 * @arg @ref LL_EXTI_LINE_29
863 * @arg @ref LL_EXTI_LINE_30
864 * @arg @ref LL_EXTI_LINE_31
865 * @note Please check each device line mapping for EXTI Line availability
866 * @retval State of bit (1 or 0).
867 */
LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)868 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
869 {
870 return ((READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
871 }
872
873 /**
874 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63
875 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63
876 * @param ExtiLine This parameter can be a combination of the following values:
877 * @arg @ref LL_EXTI_LINE_35
878 * @arg @ref LL_EXTI_LINE_36
879 * @arg @ref LL_EXTI_LINE_37
880 * @arg @ref LL_EXTI_LINE_38
881 * @retval State of bit (1 or 0).
882 */
LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)883 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)
884 {
885 return ((READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
886 }
887
888 /**
889 * @}
890 */
891
892 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
893 * @{
894 */
895
896 /**
897 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
898 * @note The configurable wakeup lines are edge-triggered. No glitch must be
899 * generated on these lines. If a falling edge on a configurable interrupt
900 * line occurs during a write operation in the EXTI_FTSR register, the
901 * pending bit is not set.
902 * Rising and falling edge triggers can be set for
903 * the same interrupt line. In this case, both generate a trigger
904 * condition.
905 * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31
906 * @param ExtiLine This parameter can be a combination of the following values:
907 * @arg @ref LL_EXTI_LINE_0
908 * @arg @ref LL_EXTI_LINE_1
909 * @arg @ref LL_EXTI_LINE_2
910 * @arg @ref LL_EXTI_LINE_3
911 * @arg @ref LL_EXTI_LINE_4
912 * @arg @ref LL_EXTI_LINE_5
913 * @arg @ref LL_EXTI_LINE_6
914 * @arg @ref LL_EXTI_LINE_7
915 * @arg @ref LL_EXTI_LINE_8
916 * @arg @ref LL_EXTI_LINE_9
917 * @arg @ref LL_EXTI_LINE_10
918 * @arg @ref LL_EXTI_LINE_11
919 * @arg @ref LL_EXTI_LINE_12
920 * @arg @ref LL_EXTI_LINE_13
921 * @arg @ref LL_EXTI_LINE_14
922 * @arg @ref LL_EXTI_LINE_15
923 * @arg @ref LL_EXTI_LINE_16
924 * @arg @ref LL_EXTI_LINE_18
925 * @arg @ref LL_EXTI_LINE_19
926 * @arg @ref LL_EXTI_LINE_20
927 * @arg @ref LL_EXTI_LINE_21
928 * @arg @ref LL_EXTI_LINE_22
929 * @arg @ref LL_EXTI_LINE_29
930 * @arg @ref LL_EXTI_LINE_30
931 * @arg @ref LL_EXTI_LINE_31
932 * @note Please check each device line mapping for EXTI Line availability
933 * @retval None
934 */
LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)935 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
936 {
937 SET_BIT(EXTI->FTSR1, ExtiLine);
938 }
939
940 /**
941 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
942 * @note The configurable wakeup lines are edge-triggered. No glitch must be
943 * generated on these lines. If a Falling edge on a configurable interrupt
944 * line occurs during a write operation in the EXTI_FTSR register, the
945 * pending bit is not set.
946 * Rising and falling edge triggers can be set for
947 * the same interrupt line. In this case, both generate a trigger
948 * condition.
949 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63
950 * @param ExtiLine This parameter can be a combination of the following values:
951 * @arg @ref LL_EXTI_LINE_35
952 * @arg @ref LL_EXTI_LINE_36
953 * @arg @ref LL_EXTI_LINE_37
954 * @arg @ref LL_EXTI_LINE_38
955 * @retval None
956 */
LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)957 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)
958 {
959 SET_BIT(EXTI->FTSR2, ExtiLine);
960 }
961
962 /**
963 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
964 * @note The configurable wakeup lines are edge-triggered. No glitch must be
965 * generated on these lines. If a Falling edge on a configurable interrupt
966 * line occurs during a write operation in the EXTI_FTSR register, the
967 * pending bit is not set.
968 * Rising and falling edge triggers can be set for the same interrupt line.
969 * In this case, both generate a trigger condition.
970 * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31
971 * @param ExtiLine This parameter can be a combination of the following values:
972 * @arg @ref LL_EXTI_LINE_0
973 * @arg @ref LL_EXTI_LINE_1
974 * @arg @ref LL_EXTI_LINE_2
975 * @arg @ref LL_EXTI_LINE_3
976 * @arg @ref LL_EXTI_LINE_4
977 * @arg @ref LL_EXTI_LINE_5
978 * @arg @ref LL_EXTI_LINE_6
979 * @arg @ref LL_EXTI_LINE_7
980 * @arg @ref LL_EXTI_LINE_8
981 * @arg @ref LL_EXTI_LINE_9
982 * @arg @ref LL_EXTI_LINE_10
983 * @arg @ref LL_EXTI_LINE_11
984 * @arg @ref LL_EXTI_LINE_12
985 * @arg @ref LL_EXTI_LINE_13
986 * @arg @ref LL_EXTI_LINE_14
987 * @arg @ref LL_EXTI_LINE_15
988 * @arg @ref LL_EXTI_LINE_16
989 * @arg @ref LL_EXTI_LINE_18
990 * @arg @ref LL_EXTI_LINE_19
991 * @arg @ref LL_EXTI_LINE_20
992 * @arg @ref LL_EXTI_LINE_21
993 * @arg @ref LL_EXTI_LINE_22
994 * @arg @ref LL_EXTI_LINE_29
995 * @arg @ref LL_EXTI_LINE_30
996 * @arg @ref LL_EXTI_LINE_31
997 * @note Please check each device line mapping for EXTI Line availability
998 * @retval None
999 */
LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)1000 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
1001 {
1002 CLEAR_BIT(EXTI->FTSR1, ExtiLine);
1003 }
1004
1005 /**
1006 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
1007 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1008 * generated on these lines. If a Falling edge on a configurable interrupt
1009 * line occurs during a write operation in the EXTI_FTSR register, the
1010 * pending bit is not set.
1011 * Rising and falling edge triggers can be set for the same interrupt line.
1012 * In this case, both generate a trigger condition.
1013 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63
1014 * @param ExtiLine This parameter can be a combination of the following values:
1015 * @arg @ref LL_EXTI_LINE_35
1016 * @arg @ref LL_EXTI_LINE_36
1017 * @arg @ref LL_EXTI_LINE_37
1018 * @arg @ref LL_EXTI_LINE_38
1019 * @retval None
1020 */
LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)1021 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)
1022 {
1023 CLEAR_BIT(EXTI->FTSR2, ExtiLine);
1024 }
1025
1026 /**
1027 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
1028 * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31
1029 * @param ExtiLine This parameter can be a combination of the following values:
1030 * @arg @ref LL_EXTI_LINE_0
1031 * @arg @ref LL_EXTI_LINE_1
1032 * @arg @ref LL_EXTI_LINE_2
1033 * @arg @ref LL_EXTI_LINE_3
1034 * @arg @ref LL_EXTI_LINE_4
1035 * @arg @ref LL_EXTI_LINE_5
1036 * @arg @ref LL_EXTI_LINE_6
1037 * @arg @ref LL_EXTI_LINE_7
1038 * @arg @ref LL_EXTI_LINE_8
1039 * @arg @ref LL_EXTI_LINE_9
1040 * @arg @ref LL_EXTI_LINE_10
1041 * @arg @ref LL_EXTI_LINE_11
1042 * @arg @ref LL_EXTI_LINE_12
1043 * @arg @ref LL_EXTI_LINE_13
1044 * @arg @ref LL_EXTI_LINE_14
1045 * @arg @ref LL_EXTI_LINE_15
1046 * @arg @ref LL_EXTI_LINE_16
1047 * @arg @ref LL_EXTI_LINE_18
1048 * @arg @ref LL_EXTI_LINE_19
1049 * @arg @ref LL_EXTI_LINE_20
1050 * @arg @ref LL_EXTI_LINE_21
1051 * @arg @ref LL_EXTI_LINE_22
1052 * @arg @ref LL_EXTI_LINE_29
1053 * @arg @ref LL_EXTI_LINE_30
1054 * @arg @ref LL_EXTI_LINE_31
1055 * @note Please check each device line mapping for EXTI Line availability
1056 * @retval State of bit (1 or 0).
1057 */
LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)1058 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
1059 {
1060 return ((READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1061 }
1062
1063 /**
1064 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63
1065 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63
1066 * @param ExtiLine This parameter can be a combination of the following values:
1067 * @arg @ref LL_EXTI_LINE_35
1068 * @arg @ref LL_EXTI_LINE_36
1069 * @arg @ref LL_EXTI_LINE_37
1070 * @arg @ref LL_EXTI_LINE_38
1071 * @retval State of bit (1 or 0).
1072 */
LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)1073 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)
1074 {
1075 return ((READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1076 }
1077
1078 /**
1079 * @}
1080 */
1081
1082 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
1083 * @{
1084 */
1085
1086 /**
1087 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
1088 * @note If the interrupt is enabled on this line in the EXTI_IMR1, writing a 1 to
1089 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR1
1090 * resulting in an interrupt request generation.
1091 * This bit is cleared by clearing the corresponding bit in the EXTI_PR1
1092 * register (by writing a 1 into the bit)
1093 * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31
1094 * @param ExtiLine This parameter can be a combination of the following values:
1095 * @arg @ref LL_EXTI_LINE_0
1096 * @arg @ref LL_EXTI_LINE_1
1097 * @arg @ref LL_EXTI_LINE_2
1098 * @arg @ref LL_EXTI_LINE_3
1099 * @arg @ref LL_EXTI_LINE_4
1100 * @arg @ref LL_EXTI_LINE_5
1101 * @arg @ref LL_EXTI_LINE_6
1102 * @arg @ref LL_EXTI_LINE_7
1103 * @arg @ref LL_EXTI_LINE_8
1104 * @arg @ref LL_EXTI_LINE_9
1105 * @arg @ref LL_EXTI_LINE_10
1106 * @arg @ref LL_EXTI_LINE_11
1107 * @arg @ref LL_EXTI_LINE_12
1108 * @arg @ref LL_EXTI_LINE_13
1109 * @arg @ref LL_EXTI_LINE_14
1110 * @arg @ref LL_EXTI_LINE_15
1111 * @arg @ref LL_EXTI_LINE_16
1112 * @arg @ref LL_EXTI_LINE_18
1113 * @arg @ref LL_EXTI_LINE_19
1114 * @arg @ref LL_EXTI_LINE_20
1115 * @arg @ref LL_EXTI_LINE_21
1116 * @arg @ref LL_EXTI_LINE_22
1117 * @arg @ref LL_EXTI_LINE_29
1118 * @arg @ref LL_EXTI_LINE_30
1119 * @arg @ref LL_EXTI_LINE_31
1120 * @note Please check each device line mapping for EXTI Line availability
1121 * @retval None
1122 */
LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)1123 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
1124 {
1125 SET_BIT(EXTI->SWIER1, ExtiLine);
1126 }
1127
1128 /**
1129 * @brief Generate a software Interrupt Event for Lines in range 32 to 63
1130 * @note If the interrupt is enabled on this line in the EXTI_IMR2, writing a 1 to
1131 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR2
1132 * resulting in an interrupt request generation.
1133 * This bit is cleared by clearing the corresponding bit in the EXTI_PR2
1134 * register (by writing a 1 into the bit)
1135 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63
1136 * @param ExtiLine This parameter can be a combination of the following values:
1137 * @arg @ref LL_EXTI_LINE_35
1138 * @arg @ref LL_EXTI_LINE_36
1139 * @arg @ref LL_EXTI_LINE_37
1140 * @arg @ref LL_EXTI_LINE_38
1141 * @retval None
1142 */
LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)1143 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)
1144 {
1145 SET_BIT(EXTI->SWIER2, ExtiLine);
1146 }
1147
1148 /**
1149 * @}
1150 */
1151
1152 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
1153 * @{
1154 */
1155
1156 /**
1157 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
1158 * @note This bit is set when the selected edge event arrives on the interrupt
1159 * line. This bit is cleared by writing a 1 to the bit.
1160 * @rmtoll PR1 PIFx LL_EXTI_IsActiveFlag_0_31
1161 * @param ExtiLine This parameter can be a combination of the following values:
1162 * @arg @ref LL_EXTI_LINE_0
1163 * @arg @ref LL_EXTI_LINE_1
1164 * @arg @ref LL_EXTI_LINE_2
1165 * @arg @ref LL_EXTI_LINE_3
1166 * @arg @ref LL_EXTI_LINE_4
1167 * @arg @ref LL_EXTI_LINE_5
1168 * @arg @ref LL_EXTI_LINE_6
1169 * @arg @ref LL_EXTI_LINE_7
1170 * @arg @ref LL_EXTI_LINE_8
1171 * @arg @ref LL_EXTI_LINE_9
1172 * @arg @ref LL_EXTI_LINE_10
1173 * @arg @ref LL_EXTI_LINE_11
1174 * @arg @ref LL_EXTI_LINE_12
1175 * @arg @ref LL_EXTI_LINE_13
1176 * @arg @ref LL_EXTI_LINE_14
1177 * @arg @ref LL_EXTI_LINE_15
1178 * @arg @ref LL_EXTI_LINE_16
1179 * @arg @ref LL_EXTI_LINE_18
1180 * @arg @ref LL_EXTI_LINE_19
1181 * @arg @ref LL_EXTI_LINE_20
1182 * @arg @ref LL_EXTI_LINE_21
1183 * @arg @ref LL_EXTI_LINE_22
1184 * @arg @ref LL_EXTI_LINE_29
1185 * @arg @ref LL_EXTI_LINE_30
1186 * @arg @ref LL_EXTI_LINE_31
1187 * @note Please check each device line mapping for EXTI Line availability
1188 * @retval State of bit (1 or 0).
1189 */
LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)1190 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
1191 {
1192 return ((READ_BIT(EXTI->PR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1193 }
1194
1195 /**
1196 * @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63
1197 * @note This bit is set when the selected edge event arrives on the interrupt
1198 * line. This bit is cleared by writing a 1 to the bit.
1199 * @rmtoll PR2 PIFx LL_EXTI_IsActiveFlag_32_63
1200 * @param ExtiLine This parameter can be a combination of the following values:
1201 * @arg @ref LL_EXTI_LINE_35
1202 * @arg @ref LL_EXTI_LINE_36
1203 * @arg @ref LL_EXTI_LINE_37
1204 * @arg @ref LL_EXTI_LINE_38
1205 * @retval State of bit (1 or 0).
1206 */
LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)1207 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)
1208 {
1209 return ((READ_BIT(EXTI->PR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1210 }
1211
1212 /**
1213 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31
1214 * @note This bit is set when the selected edge event arrives on the interrupt
1215 * line. This bit is cleared by writing a 1 to the bit.
1216 * @rmtoll PR1 PIFx LL_EXTI_ReadFlag_0_31
1217 * @param ExtiLine This parameter can be a combination of the following values:
1218 * @arg @ref LL_EXTI_LINE_0
1219 * @arg @ref LL_EXTI_LINE_1
1220 * @arg @ref LL_EXTI_LINE_2
1221 * @arg @ref LL_EXTI_LINE_3
1222 * @arg @ref LL_EXTI_LINE_4
1223 * @arg @ref LL_EXTI_LINE_5
1224 * @arg @ref LL_EXTI_LINE_6
1225 * @arg @ref LL_EXTI_LINE_7
1226 * @arg @ref LL_EXTI_LINE_8
1227 * @arg @ref LL_EXTI_LINE_9
1228 * @arg @ref LL_EXTI_LINE_10
1229 * @arg @ref LL_EXTI_LINE_11
1230 * @arg @ref LL_EXTI_LINE_12
1231 * @arg @ref LL_EXTI_LINE_13
1232 * @arg @ref LL_EXTI_LINE_14
1233 * @arg @ref LL_EXTI_LINE_15
1234 * @arg @ref LL_EXTI_LINE_16
1235 * @arg @ref LL_EXTI_LINE_18
1236 * @arg @ref LL_EXTI_LINE_19
1237 * @arg @ref LL_EXTI_LINE_20
1238 * @arg @ref LL_EXTI_LINE_21
1239 * @arg @ref LL_EXTI_LINE_22
1240 * @arg @ref LL_EXTI_LINE_29
1241 * @arg @ref LL_EXTI_LINE_30
1242 * @arg @ref LL_EXTI_LINE_31
1243 * @note Please check each device line mapping for EXTI Line availability
1244 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1245 */
LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)1246 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
1247 {
1248 return (uint32_t)(READ_BIT(EXTI->PR1, ExtiLine));
1249 }
1250
1251 /**
1252 * @brief Read ExtLine Combination Flag for Lines in range 32 to 63
1253 * @note This bit is set when the selected edge event arrives on the interrupt
1254 * line. This bit is cleared by writing a 1 to the bit.
1255 * @rmtoll PR2 PIFx LL_EXTI_ReadFlag_32_63
1256 * @param ExtiLine This parameter can be a combination of the following values:
1257 * @arg @ref LL_EXTI_LINE_35
1258 * @arg @ref LL_EXTI_LINE_36
1259 * @arg @ref LL_EXTI_LINE_37
1260 * @arg @ref LL_EXTI_LINE_38
1261 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1262 */
LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)1263 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)
1264 {
1265 return (uint32_t)(READ_BIT(EXTI->PR2, ExtiLine));
1266 }
1267
1268 /**
1269 * @brief Clear ExtLine Flags for Lines in range 0 to 31
1270 * @note This bit is set when the selected edge event arrives on the interrupt
1271 * line. This bit is cleared by writing a 1 to the bit.
1272 * @rmtoll PR1 PIFx LL_EXTI_ClearFlag_0_31
1273 * @param ExtiLine This parameter can be a combination of the following values:
1274 * @arg @ref LL_EXTI_LINE_0
1275 * @arg @ref LL_EXTI_LINE_1
1276 * @arg @ref LL_EXTI_LINE_2
1277 * @arg @ref LL_EXTI_LINE_3
1278 * @arg @ref LL_EXTI_LINE_4
1279 * @arg @ref LL_EXTI_LINE_5
1280 * @arg @ref LL_EXTI_LINE_6
1281 * @arg @ref LL_EXTI_LINE_7
1282 * @arg @ref LL_EXTI_LINE_8
1283 * @arg @ref LL_EXTI_LINE_9
1284 * @arg @ref LL_EXTI_LINE_10
1285 * @arg @ref LL_EXTI_LINE_11
1286 * @arg @ref LL_EXTI_LINE_12
1287 * @arg @ref LL_EXTI_LINE_13
1288 * @arg @ref LL_EXTI_LINE_14
1289 * @arg @ref LL_EXTI_LINE_15
1290 * @arg @ref LL_EXTI_LINE_16
1291 * @arg @ref LL_EXTI_LINE_18
1292 * @arg @ref LL_EXTI_LINE_19
1293 * @arg @ref LL_EXTI_LINE_20
1294 * @arg @ref LL_EXTI_LINE_21
1295 * @arg @ref LL_EXTI_LINE_22
1296 * @arg @ref LL_EXTI_LINE_29
1297 * @arg @ref LL_EXTI_LINE_30
1298 * @arg @ref LL_EXTI_LINE_31
1299 * @note Please check each device line mapping for EXTI Line availability
1300 * @retval None
1301 */
LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)1302 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
1303 {
1304 WRITE_REG(EXTI->PR1, ExtiLine);
1305 }
1306
1307 /**
1308 * @brief Clear ExtLine Flags for Lines in range 32 to 63
1309 * @note This bit is set when the selected edge event arrives on the interrupt
1310 * line. This bit is cleared by writing a 1 to the bit.
1311 * @rmtoll PR2 PIFx LL_EXTI_ClearFlag_32_63
1312 * @param ExtiLine This parameter can be a combination of the following values:
1313 * @arg @ref LL_EXTI_LINE_35
1314 * @arg @ref LL_EXTI_LINE_36
1315 * @arg @ref LL_EXTI_LINE_37
1316 * @arg @ref LL_EXTI_LINE_38
1317 * @retval None
1318 */
LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)1319 __STATIC_INLINE void LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)
1320 {
1321 WRITE_REG(EXTI->PR2, ExtiLine);
1322 }
1323
1324
1325 /**
1326 * @}
1327 */
1328
1329 #if defined(USE_FULL_LL_DRIVER)
1330 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
1331 * @{
1332 */
1333
1334 uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1335 uint32_t LL_EXTI_DeInit(void);
1336 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1337
1338
1339 /**
1340 * @}
1341 */
1342 #endif /* USE_FULL_LL_DRIVER */
1343
1344 /**
1345 * @}
1346 */
1347
1348 /**
1349 * @}
1350 */
1351
1352 #endif /* EXTI */
1353
1354 /**
1355 * @}
1356 */
1357
1358 #ifdef __cplusplus
1359 }
1360 #endif
1361
1362 #endif /* STM32L4xx_LL_EXTI_H */
1363
1364
