1 /**
2 ******************************************************************************
3 * @file stm32l0xx_ll_usart.c
4 * @author MCD Application Team
5 * @brief USART LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2016 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18 #if defined(USE_FULL_LL_DRIVER)
19
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32l0xx_ll_usart.h"
22 #include "stm32l0xx_ll_rcc.h"
23 #include "stm32l0xx_ll_bus.h"
24 #ifdef USE_FULL_ASSERT
25 #include "stm32_assert.h"
26 #else
27 #define assert_param(expr) ((void)0U)
28 #endif /* USE_FULL_ASSERT */
29
30 /** @addtogroup STM32L0xx_LL_Driver
31 * @{
32 */
33
34 #if defined(USART1) || defined(USART2) || defined(USART4) || defined(USART5)
35
36 /** @addtogroup USART_LL
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /** @addtogroup USART_LL_Private_Constants
44 * @{
45 */
46
47 /* Definition of default baudrate value used for USART initialisation */
48 #define USART_DEFAULT_BAUDRATE (9600U)
49
50 /**
51 * @}
52 */
53
54 /* Private macros ------------------------------------------------------------*/
55 /** @addtogroup USART_LL_Private_Macros
56 * @{
57 */
58
59 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
60 * divided by the smallest oversampling used on the USART (i.e. 8) */
61 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 4000000U)
62
63 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
64 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
65
66 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
67 || ((__VALUE__) == LL_USART_DIRECTION_RX) \
68 || ((__VALUE__) == LL_USART_DIRECTION_TX) \
69 || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
70
71 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
72 || ((__VALUE__) == LL_USART_PARITY_EVEN) \
73 || ((__VALUE__) == LL_USART_PARITY_ODD))
74
75 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
76 || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
77 || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
78
79 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
80 || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
81
82 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
83 || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
84
85 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
86 || ((__VALUE__) == LL_USART_PHASE_2EDGE))
87
88 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
89 || ((__VALUE__) == LL_USART_POLARITY_HIGH))
90
91 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
92 || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
93
94 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
95 || ((__VALUE__) == LL_USART_STOPBITS_1) \
96 || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
97 || ((__VALUE__) == LL_USART_STOPBITS_2))
98
99 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
100 || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
101 || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
102 || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
103
104 /**
105 * @}
106 */
107
108 /* Private function prototypes -----------------------------------------------*/
109
110 /* Exported functions --------------------------------------------------------*/
111 /** @addtogroup USART_LL_Exported_Functions
112 * @{
113 */
114
115 /** @addtogroup USART_LL_EF_Init
116 * @{
117 */
118
119 /**
120 * @brief De-initialize USART registers (Registers restored to their default values).
121 * @param USARTx USART Instance
122 * @retval An ErrorStatus enumeration value:
123 * - SUCCESS: USART registers are de-initialized
124 * - ERROR: USART registers are not de-initialized
125 */
LL_USART_DeInit(const USART_TypeDef * USARTx)126 ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx)
127 {
128 ErrorStatus status = SUCCESS;
129
130 /* Check the parameters */
131 assert_param(IS_UART_INSTANCE(USARTx));
132
133 #if defined(USART1)
134 if (USARTx == USART1)
135 {
136 /* Force reset of USART clock */
137 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
138
139 /* Release reset of USART clock */
140 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
141 }
142 #endif /* USART1 */
143 #if defined(USART1)
144 else if (USARTx == USART2)
145 #else
146 if (USARTx == USART2)
147 #endif /* USART1 */
148 {
149 /* Force reset of USART clock */
150 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
151
152 /* Release reset of USART clock */
153 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
154 }
155 #if defined(USART4)
156 else if (USARTx == USART4)
157 {
158 /* Force reset of USART clock */
159 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART4);
160
161 /* Release reset of USART clock */
162 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART4);
163 }
164 #endif /* USART4 */
165 #if defined(USART5)
166 else if (USARTx == USART5)
167 {
168 /* Force reset of USART clock */
169 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART5);
170
171 /* Release reset of USART clock */
172 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART5);
173 }
174 #endif /* USART5 */
175 else
176 {
177 status = ERROR;
178 }
179
180 return (status);
181 }
182
183 /**
184 * @brief Initialize USART registers according to the specified
185 * parameters in USART_InitStruct.
186 * @note As some bits in USART configuration registers can only be written when
187 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
188 * this function. Otherwise, ERROR result will be returned.
189 * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
190 * @param USARTx USART Instance
191 * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
192 * that contains the configuration information for the specified USART peripheral.
193 * @retval An ErrorStatus enumeration value:
194 * - SUCCESS: USART registers are initialized according to USART_InitStruct content
195 * - ERROR: Problem occurred during USART Registers initialization
196 */
LL_USART_Init(USART_TypeDef * USARTx,const LL_USART_InitTypeDef * USART_InitStruct)197 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct)
198 {
199 ErrorStatus status = ERROR;
200 uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
201 #if defined(USART4) || defined(USART5)
202 LL_RCC_ClocksTypeDef RCC_Clocks;
203 #endif /* USART4 || USART5 */
204
205 /* Check the parameters */
206 assert_param(IS_UART_INSTANCE(USARTx));
207 assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
208 assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
209 assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
210 assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
211 assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
212 assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
213 assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
214
215 /* USART needs to be in disabled state, in order to be able to configure some bits in
216 CRx registers */
217 if (LL_USART_IsEnabled(USARTx) == 0U)
218 {
219 /*---------------------------- USART CR1 Configuration ---------------------
220 * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
221 * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
222 * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
223 * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
224 * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
225 */
226 MODIFY_REG(USARTx->CR1,
227 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
228 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
229 (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
230 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
231
232 /*---------------------------- USART CR2 Configuration ---------------------
233 * Configure USARTx CR2 (Stop bits) with parameters:
234 * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
235 * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
236 */
237 LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
238
239 /*---------------------------- USART CR3 Configuration ---------------------
240 * Configure USARTx CR3 (Hardware Flow Control) with parameters:
241 * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
242 * USART_InitStruct->HardwareFlowControl value.
243 */
244 LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
245
246 /*---------------------------- USART BRR Configuration ---------------------
247 * Retrieve Clock frequency used for USART Peripheral
248 */
249 #if defined(USART1)
250 if (USARTx == USART1)
251 {
252 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
253 }
254 #endif /* USART1 */
255 #if defined(USART1)
256 else if (USARTx == USART2)
257 #else
258 if (USARTx == USART2)
259 #endif /* USART1 */
260 {
261 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
262 }
263 #if defined(USART4)
264 else if (USARTx == USART4)
265 {
266 /* USART4 clock is PCLK1 */
267 LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
268 periphclk = RCC_Clocks.PCLK1_Frequency;
269 }
270 #endif /* USART4 */
271 #if defined(USART5)
272 else if (USARTx == USART5)
273 {
274 /* USART5 clock is PCLK1 */
275 LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
276 periphclk = RCC_Clocks.PCLK1_Frequency;
277 }
278 #endif /* USART5 */
279 else
280 {
281 /* Nothing to do, as error code is already assigned to ERROR value */
282 }
283
284 /* Configure the USART Baud Rate :
285 - valid baud rate value (different from 0) is required
286 - Peripheral clock as returned by RCC service, should be valid (different from 0).
287 */
288 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
289 && (USART_InitStruct->BaudRate != 0U))
290 {
291 status = SUCCESS;
292 LL_USART_SetBaudRate(USARTx,
293 periphclk,
294 USART_InitStruct->OverSampling,
295 USART_InitStruct->BaudRate);
296
297 /* Check BRR is greater than or equal to 16d */
298 assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
299 }
300 }
301 /* Endif (=> USART not in Disabled state => return ERROR) */
302
303 return (status);
304 }
305
306 /**
307 * @brief Set each @ref LL_USART_InitTypeDef field to default value.
308 * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
309 * whose fields will be set to default values.
310 * @retval None
311 */
312
LL_USART_StructInit(LL_USART_InitTypeDef * USART_InitStruct)313 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
314 {
315 /* Set USART_InitStruct fields to default values */
316 USART_InitStruct->BaudRate = USART_DEFAULT_BAUDRATE;
317 USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
318 USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
319 USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
320 USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
321 USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
322 USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
323 }
324
325 /**
326 * @brief Initialize USART Clock related settings according to the
327 * specified parameters in the USART_ClockInitStruct.
328 * @note As some bits in USART configuration registers can only be written when
329 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
330 * this function. Otherwise, ERROR result will be returned.
331 * @param USARTx USART Instance
332 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
333 * that contains the Clock configuration information for the specified USART peripheral.
334 * @retval An ErrorStatus enumeration value:
335 * - SUCCESS: USART registers related to Clock settings are initialized according
336 * to USART_ClockInitStruct content
337 * - ERROR: Problem occurred during USART Registers initialization
338 */
LL_USART_ClockInit(USART_TypeDef * USARTx,const LL_USART_ClockInitTypeDef * USART_ClockInitStruct)339 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
340 {
341 ErrorStatus status = SUCCESS;
342
343 /* Check USART Instance and Clock signal output parameters */
344 assert_param(IS_UART_INSTANCE(USARTx));
345 assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
346
347 /* USART needs to be in disabled state, in order to be able to configure some bits in
348 CRx registers */
349 if (LL_USART_IsEnabled(USARTx) == 0U)
350 {
351 /* If USART Clock signal is disabled */
352 if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
353 {
354 /* Deactivate Clock signal delivery :
355 * - Disable Clock Output: USART_CR2_CLKEN cleared
356 */
357 LL_USART_DisableSCLKOutput(USARTx);
358 }
359 else
360 {
361 /* Ensure USART instance is USART capable */
362 assert_param(IS_USART_INSTANCE(USARTx));
363
364 /* Check clock related parameters */
365 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
366 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
367 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
368
369 /*---------------------------- USART CR2 Configuration -----------------------
370 * Configure USARTx CR2 (Clock signal related bits) with parameters:
371 * - Enable Clock Output: USART_CR2_CLKEN set
372 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
373 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
374 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
375 */
376 MODIFY_REG(USARTx->CR2,
377 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
378 USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
379 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
380 }
381 }
382 /* Else (USART not in Disabled state => return ERROR */
383 else
384 {
385 status = ERROR;
386 }
387
388 return (status);
389 }
390
391 /**
392 * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
393 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
394 * whose fields will be set to default values.
395 * @retval None
396 */
LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef * USART_ClockInitStruct)397 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
398 {
399 /* Set LL_USART_ClockInitStruct fields with default values */
400 USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
401 USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput =
402 LL_USART_CLOCK_DISABLE */
403 USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput =
404 LL_USART_CLOCK_DISABLE */
405 USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput =
406 LL_USART_CLOCK_DISABLE */
407 }
408
409 /**
410 * @}
411 */
412
413 /**
414 * @}
415 */
416
417 /**
418 * @}
419 */
420
421 #endif /* USART1 || USART2 || USART4 || USART5 */
422
423 /**
424 * @}
425 */
426
427 #endif /* USE_FULL_LL_DRIVER */
428
429
430
