1 /** 2 ****************************************************************************** 3 * @file stm32f7xx_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32F7xx_HAL_UART_H 21 #define STM32F7xx_HAL_UART_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32f7xx_hal_def.h" 29 30 /** @addtogroup STM32F7xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UART 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UART_Exported_Types UART Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART Init Structure definition 45 */ 46 typedef struct 47 { 48 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 49 The baud rate register is computed using the following formula: 50 - If oversampling is 16 or in LIN mode, 51 Baud Rate Register = ((uart_ker_ck) / ((huart->Init.BaudRate))) 52 - If oversampling is 8, 53 Baud Rate Register[15:4] = ((2 * uart_ker_ck) / 54 ((huart->Init.BaudRate)))[15:4] 55 Baud Rate Register[3] = 0 56 Baud Rate Register[2:0] = (((2 * uart_ker_ck) / 57 ((huart->Init.BaudRate)))[3:0]) >> 1 58 where uart_ker_ck is the UART input clock */ 59 60 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 61 This parameter can be a value of @ref UARTEx_Word_Length. */ 62 63 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 64 This parameter can be a value of @ref UART_Stop_Bits. */ 65 66 uint32_t Parity; /*!< Specifies the parity mode. 67 This parameter can be a value of @ref UART_Parity 68 @note When parity is enabled, the computed parity is inserted 69 at the MSB position of the transmitted data (9th bit when 70 the word length is set to 9 data bits; 8th bit when the 71 word length is set to 8 data bits). */ 72 73 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 74 This parameter can be a value of @ref UART_Mode. */ 75 76 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 77 or disabled. 78 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 79 80 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, 81 to achieve higher speed (up to f_PCLK/8). 82 This parameter can be a value of @ref UART_Over_Sampling. */ 83 84 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 85 Selecting the single sample method increases the receiver tolerance to clock 86 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 87 88 89 } UART_InitTypeDef; 90 91 /** 92 * @brief UART Advanced Features initialization structure definition 93 */ 94 typedef struct 95 { 96 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 97 Advanced Features may be initialized at the same time . 98 This parameter can be a value of 99 @ref UART_Advanced_Features_Initialization_Type. */ 100 101 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 102 This parameter can be a value of @ref UART_Tx_Inv. */ 103 104 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 105 This parameter can be a value of @ref UART_Rx_Inv. */ 106 107 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 108 vs negative/inverted logic). 109 This parameter can be a value of @ref UART_Data_Inv. */ 110 111 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 112 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 113 114 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 115 This parameter can be a value of @ref UART_Overrun_Disable. */ 116 117 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 118 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 119 120 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 121 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 122 123 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 124 detection is carried out. 125 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 126 127 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 128 This parameter can be a value of @ref UART_MSB_First. */ 129 } UART_AdvFeatureInitTypeDef; 130 131 /** 132 * @brief HAL UART State definition 133 * @note HAL UART State value is a combination of 2 different substates: 134 * gState and RxState (see @ref UART_State_Definition). 135 * - gState contains UART state information related to global Handle management 136 * and also information related to Tx operations. 137 * gState value coding follow below described bitmap : 138 * b7-b6 Error information 139 * 00 : No Error 140 * 01 : (Not Used) 141 * 10 : Timeout 142 * 11 : Error 143 * b5 Peripheral initialization status 144 * 0 : Reset (Peripheral not initialized) 145 * 1 : Init done (Peripheral initialized. HAL UART Init function already called) 146 * b4-b3 (not used) 147 * xx : Should be set to 00 148 * b2 Intrinsic process state 149 * 0 : Ready 150 * 1 : Busy (Peripheral busy with some configuration or internal operations) 151 * b1 (not used) 152 * x : Should be set to 0 153 * b0 Tx state 154 * 0 : Ready (no Tx operation ongoing) 155 * 1 : Busy (Tx operation ongoing) 156 * - RxState contains information related to Rx operations. 157 * RxState value coding follow below described bitmap : 158 * b7-b6 (not used) 159 * xx : Should be set to 00 160 * b5 Peripheral initialization status 161 * 0 : Reset (Peripheral not initialized) 162 * 1 : Init done (Peripheral initialized) 163 * b4-b2 (not used) 164 * xxx : Should be set to 000 165 * b1 Rx state 166 * 0 : Ready (no Rx operation ongoing) 167 * 1 : Busy (Rx operation ongoing) 168 * b0 (not used) 169 * x : Should be set to 0. 170 */ 171 typedef uint32_t HAL_UART_StateTypeDef; 172 173 /** 174 * @brief UART clock sources definition 175 */ 176 typedef enum 177 { 178 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 179 UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ 180 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ 181 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ 182 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ 183 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ 184 } UART_ClockSourceTypeDef; 185 186 /** 187 * @brief HAL UART Reception type definition 188 * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. 189 * This parameter can be a value of @ref UART_Reception_Type_Values : 190 * HAL_UART_RECEPTION_STANDARD = 0x00U, 191 * HAL_UART_RECEPTION_TOIDLE = 0x01U, 192 * HAL_UART_RECEPTION_TORTO = 0x02U, 193 * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U, 194 */ 195 typedef uint32_t HAL_UART_RxTypeTypeDef; 196 197 /** 198 * @brief HAL UART Rx Event type definition 199 * @note HAL UART Rx Event type value aims to identify which type of Event has occurred 200 * leading to call of the RxEvent callback. 201 * This parameter can be a value of @ref UART_RxEvent_Type_Values : 202 * HAL_UART_RXEVENT_TC = 0x00U, 203 * HAL_UART_RXEVENT_HT = 0x01U, 204 * HAL_UART_RXEVENT_IDLE = 0x02U, 205 */ 206 typedef uint32_t HAL_UART_RxEventTypeTypeDef; 207 208 /** 209 * @brief UART handle Structure definition 210 */ 211 typedef struct __UART_HandleTypeDef 212 { 213 USART_TypeDef *Instance; /*!< UART registers base address */ 214 215 UART_InitTypeDef Init; /*!< UART communication parameters */ 216 217 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 218 219 const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 220 221 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 222 223 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 224 225 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 226 227 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 228 229 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 230 231 uint16_t Mask; /*!< UART Rx RDR register mask */ 232 233 __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ 234 235 __IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */ 236 237 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 238 239 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 240 241 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 242 243 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 244 245 HAL_LockTypeDef Lock; /*!< Locking object */ 246 247 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 248 and also related to Tx operations. This parameter 249 can be a value of @ref HAL_UART_StateTypeDef */ 250 251 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. This 252 parameter can be a value of @ref HAL_UART_StateTypeDef */ 253 254 __IO uint32_t ErrorCode; /*!< UART Error code */ 255 256 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 257 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 258 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 259 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 260 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 261 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 262 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 263 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 264 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 265 #if defined(USART_CR1_UESM) 266 #if defined(USART_CR3_WUFIE) 267 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 268 #endif /* USART_CR3_WUFIE */ 269 #endif /* USART_CR1_UESM */ 270 void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ 271 272 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 273 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 274 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 275 276 } UART_HandleTypeDef; 277 278 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 279 /** 280 * @brief HAL UART Callback ID enumeration definition 281 */ 282 typedef enum 283 { 284 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 285 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 286 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 287 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 288 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 289 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 290 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 291 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 292 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 293 294 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 295 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 296 297 } HAL_UART_CallbackIDTypeDef; 298 299 /** 300 * @brief HAL UART Callback pointer definition 301 */ 302 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 303 typedef void (*pUART_RxEventCallbackTypeDef) 304 (struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ 305 306 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 307 308 /** 309 * @} 310 */ 311 312 /* Exported constants --------------------------------------------------------*/ 313 /** @defgroup UART_Exported_Constants UART Exported Constants 314 * @{ 315 */ 316 317 /** @defgroup UART_State_Definition UART State Code Definition 318 * @{ 319 */ 320 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 321 Value is allowed for gState and RxState */ 322 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 323 Value is allowed for gState and RxState */ 324 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 325 Value is allowed for gState only */ 326 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 327 Value is allowed for gState only */ 328 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 329 Value is allowed for RxState only */ 330 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 331 Not to be used for neither gState nor RxState.Value is result 332 of combination (Or) between gState and RxState values */ 333 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 334 Value is allowed for gState only */ 335 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 336 Value is allowed for gState only */ 337 /** 338 * @} 339 */ 340 341 /** @defgroup UART_Error_Definition UART Error Definition 342 * @{ 343 */ 344 #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */ 345 #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */ 346 #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */ 347 #define HAL_UART_ERROR_FE (0x00000004U) /*!< Frame error */ 348 #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */ 349 #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 350 #define HAL_UART_ERROR_RTO (0x00000020U) /*!< Receiver Timeout error */ 351 352 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 353 #define HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */ 354 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 355 /** 356 * @} 357 */ 358 359 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 360 * @{ 361 */ 362 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 363 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 364 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 365 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 366 /** 367 * @} 368 */ 369 370 /** @defgroup UART_Parity UART Parity 371 * @{ 372 */ 373 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 374 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 375 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 376 /** 377 * @} 378 */ 379 380 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 381 * @{ 382 */ 383 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 384 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 385 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 386 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 387 /** 388 * @} 389 */ 390 391 /** @defgroup UART_Mode UART Transfer Mode 392 * @{ 393 */ 394 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 395 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 396 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 397 /** 398 * @} 399 */ 400 401 /** @defgroup UART_State UART State 402 * @{ 403 */ 404 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 405 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 406 /** 407 * @} 408 */ 409 410 /** @defgroup UART_Over_Sampling UART Over Sampling 411 * @{ 412 */ 413 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 414 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 415 /** 416 * @} 417 */ 418 419 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 420 * @{ 421 */ 422 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 423 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 424 /** 425 * @} 426 */ 427 428 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 429 * @{ 430 */ 431 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection 432 on start bit */ 433 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection 434 on falling edge */ 435 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection 436 on 0x7F frame detection */ 437 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection 438 on 0x55 frame detection */ 439 /** 440 * @} 441 */ 442 443 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout 444 * @{ 445 */ 446 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ 447 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ 448 /** 449 * @} 450 */ 451 452 /** @defgroup UART_LIN UART Local Interconnection Network mode 453 * @{ 454 */ 455 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 456 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 457 /** 458 * @} 459 */ 460 461 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 462 * @{ 463 */ 464 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 465 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 466 /** 467 * @} 468 */ 469 470 /** @defgroup UART_DMA_Tx UART DMA Tx 471 * @{ 472 */ 473 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 474 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 475 /** 476 * @} 477 */ 478 479 /** @defgroup UART_DMA_Rx UART DMA Rx 480 * @{ 481 */ 482 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 483 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 484 /** 485 * @} 486 */ 487 488 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 489 * @{ 490 */ 491 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 492 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 493 /** 494 * @} 495 */ 496 497 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 498 * @{ 499 */ 500 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 501 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 502 /** 503 * @} 504 */ 505 506 /** @defgroup UART_Request_Parameters UART Request Parameters 507 * @{ 508 */ 509 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 510 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 511 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 512 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 513 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 514 /** 515 * @} 516 */ 517 518 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 519 * @{ 520 */ 521 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 522 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 523 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 524 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 525 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 526 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 527 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 528 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 529 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 530 /** 531 * @} 532 */ 533 534 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 535 * @{ 536 */ 537 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 538 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 539 /** 540 * @} 541 */ 542 543 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 544 * @{ 545 */ 546 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 547 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 548 /** 549 * @} 550 */ 551 552 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 553 * @{ 554 */ 555 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 556 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 557 /** 558 * @} 559 */ 560 561 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 562 * @{ 563 */ 564 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 565 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 566 /** 567 * @} 568 */ 569 570 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 571 * @{ 572 */ 573 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 574 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 575 /** 576 * @} 577 */ 578 579 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 580 * @{ 581 */ 582 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 583 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 584 /** 585 * @} 586 */ 587 588 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 589 * @{ 590 */ 591 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 592 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 593 /** 594 * @} 595 */ 596 597 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 598 * @{ 599 */ 600 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received 601 first disable */ 602 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received 603 first enable */ 604 /** 605 * @} 606 */ 607 #if defined(USART_CR1_UESM) 608 609 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 610 * @{ 611 */ 612 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 613 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 614 /** 615 * @} 616 */ 617 #endif /* USART_CR1_UESM */ 618 619 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 620 * @{ 621 */ 622 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 623 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 624 /** 625 * @} 626 */ 627 628 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 629 * @{ 630 */ 631 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 632 /** 633 * @} 634 */ 635 #if defined(USART_CR1_UESM) 636 637 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 638 * @{ 639 */ 640 #if defined(USART_CR3_WUS) 641 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 642 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 643 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register 644 not empty or RXFIFO is not empty */ 645 #else 646 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 647 #define UART_WAKEUP_ON_READDATA_NONEMPTY 0x00000001U /*!< UART wake-up on receive data register 648 not empty or RXFIFO is not empty */ 649 #endif /* USART_CR3_WUS */ 650 /** 651 * @} 652 */ 653 #endif /* USART_CR1_UESM */ 654 655 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 656 * @{ 657 */ 658 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 659 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 660 /** 661 * @} 662 */ 663 664 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 665 * @{ 666 */ 667 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB 668 position in CR1 register */ 669 /** 670 * @} 671 */ 672 673 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 674 * @{ 675 */ 676 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB 677 position in CR1 register */ 678 /** 679 * @} 680 */ 681 682 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 683 * @{ 684 */ 685 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 686 /** 687 * @} 688 */ 689 690 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 691 * @{ 692 */ 693 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 694 /** 695 * @} 696 */ 697 698 /** @defgroup UART_Flags UART Status Flags 699 * Elements values convention: 0xXXXX 700 * - 0xXXXX : Flag mask in the ISR register 701 * @{ 702 */ 703 #if defined(USART_ISR_REACK) 704 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 705 #endif /* USART_ISR_REACK */ 706 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 707 #if defined(USART_CR1_UESM) 708 #if defined(USART_CR3_WUFIE) 709 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 710 #endif /* USART_CR3_WUFIE */ 711 #endif /* USART_CR1_UESM */ 712 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 713 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 714 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 715 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 716 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 717 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 718 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 719 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 720 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 721 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 722 #define UART_FLAG_TXE USART_ISR_TXE /*!< UART transmit data register empty */ 723 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 724 #define UART_FLAG_RXNE USART_ISR_RXNE /*!< UART read data register not empty */ 725 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 726 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 727 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 728 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 729 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 730 /** 731 * @} 732 */ 733 734 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 735 * Elements values convention: 000ZZZZZ0XXYYYYYb 736 * - YYYYY : Interrupt source position in the XX register (5bits) 737 * - XX : Interrupt source register (2bits) 738 * - 01: CR1 register 739 * - 10: CR2 register 740 * - 11: CR3 register 741 * - ZZZZZ : Flag position in the ISR register(5bits) 742 * Elements values convention: 000000000XXYYYYYb 743 * - YYYYY : Interrupt source position in the XX register (5bits) 744 * - XX : Interrupt source register (2bits) 745 * - 01: CR1 register 746 * - 10: CR2 register 747 * - 11: CR3 register 748 * Elements values convention: 0000ZZZZ00000000b 749 * - ZZZZ : Flag position in the ISR register(4bits) 750 * @{ 751 */ 752 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 753 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 754 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 755 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 756 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 757 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 758 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 759 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 760 #if defined(USART_CR1_UESM) 761 #if defined(USART_CR3_WUFIE) 762 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 763 #endif /* USART_CR3_WUFIE */ 764 #endif /* USART_CR1_UESM */ 765 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ 766 767 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 768 769 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 770 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 771 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 772 /** 773 * @} 774 */ 775 776 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 777 * @{ 778 */ 779 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 780 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 781 #define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise Error detected Clear Flag */ 782 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 783 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 784 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 785 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 786 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 787 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 788 #if defined(USART_CR1_UESM) 789 #if defined(USART_CR3_WUFIE) 790 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 791 #endif /* USART_CR3_WUFIE */ 792 #endif /* USART_CR1_UESM */ 793 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ 794 /** 795 * @} 796 */ 797 798 /** @defgroup UART_Reception_Type_Values UART Reception type values 799 * @{ 800 */ 801 #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ 802 #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ 803 #define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */ 804 #define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */ 805 /** 806 * @} 807 */ 808 809 /** @defgroup UART_RxEvent_Type_Values UART RxEvent type values 810 * @{ 811 */ 812 #define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */ 813 #define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */ 814 #define HAL_UART_RXEVENT_IDLE (0x00000002U) /*!< RxEvent linked to IDLE event */ 815 /** 816 * @} 817 */ 818 819 /** 820 * @} 821 */ 822 823 /* Exported macros -----------------------------------------------------------*/ 824 /** @defgroup UART_Exported_Macros UART Exported Macros 825 * @{ 826 */ 827 828 /** @brief Reset UART handle states. 829 * @param __HANDLE__ UART handle. 830 * @retval None 831 */ 832 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 833 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 834 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 835 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 836 (__HANDLE__)->MspInitCallback = NULL; \ 837 (__HANDLE__)->MspDeInitCallback = NULL; \ 838 } while(0U) 839 #else 840 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 841 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 842 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 843 } while(0U) 844 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 845 846 /** @brief Flush the UART Data registers. 847 * @param __HANDLE__ specifies the UART Handle. 848 * @retval None 849 */ 850 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 851 do{ \ 852 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 853 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 854 } while(0U) 855 856 /** @brief Clear the specified UART pending flag. 857 * @param __HANDLE__ specifies the UART Handle. 858 * @param __FLAG__ specifies the flag to check. 859 * This parameter can be any combination of the following values: 860 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 861 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 862 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 863 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 864 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 865 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 866 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag 867 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 868 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 869 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 870 #if defined(USART_CR1_UESM) 871 #if defined(USART_CR3_WUFIE) 872 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 873 #endif 874 #endif 875 * @retval None 876 */ 877 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 878 879 /** @brief Clear the UART PE pending flag. 880 * @param __HANDLE__ specifies the UART Handle. 881 * @retval None 882 */ 883 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 884 885 /** @brief Clear the UART FE pending flag. 886 * @param __HANDLE__ specifies the UART Handle. 887 * @retval None 888 */ 889 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 890 891 /** @brief Clear the UART NE pending flag. 892 * @param __HANDLE__ specifies the UART Handle. 893 * @retval None 894 */ 895 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 896 897 /** @brief Clear the UART ORE pending flag. 898 * @param __HANDLE__ specifies the UART Handle. 899 * @retval None 900 */ 901 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 902 903 /** @brief Clear the UART IDLE pending flag. 904 * @param __HANDLE__ specifies the UART Handle. 905 * @retval None 906 */ 907 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 908 909 910 /** @brief Check whether the specified UART flag is set or not. 911 * @param __HANDLE__ specifies the UART Handle. 912 * @param __FLAG__ specifies the flag to check. 913 * This parameter can be one of the following values: 914 #if defined(USART_ISR_REACK) 915 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 916 #endif 917 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 918 #if defined(USART_CR1_UESM) 919 #if defined(USART_CR3_WUFIE) 920 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 921 #endif 922 #endif 923 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 924 * @arg @ref UART_FLAG_SBKF Send Break flag 925 * @arg @ref UART_FLAG_CMF Character match flag 926 * @arg @ref UART_FLAG_BUSY Busy flag 927 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 928 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 929 * @arg @ref UART_FLAG_CTS CTS Change flag 930 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 931 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 932 * @arg @ref UART_FLAG_TC Transmission Complete flag 933 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 934 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag 935 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 936 * @arg @ref UART_FLAG_ORE Overrun Error flag 937 * @arg @ref UART_FLAG_NE Noise Error flag 938 * @arg @ref UART_FLAG_FE Framing Error flag 939 * @arg @ref UART_FLAG_PE Parity Error flag 940 * @retval The new state of __FLAG__ (TRUE or FALSE). 941 */ 942 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 943 944 /** @brief Enable the specified UART interrupt. 945 * @param __HANDLE__ specifies the UART Handle. 946 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 947 * This parameter can be one of the following values: 948 #if defined(USART_CR1_UESM) 949 #if defined(USART_CR3_WUFIE) 950 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 951 #endif 952 #endif 953 * @arg @ref UART_IT_CM Character match interrupt 954 * @arg @ref UART_IT_CTS CTS change interrupt 955 * @arg @ref UART_IT_LBD LIN Break detection interrupt 956 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 957 * @arg @ref UART_IT_TC Transmission complete interrupt 958 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 959 * @arg @ref UART_IT_RTO Receive Timeout interrupt 960 * @arg @ref UART_IT_IDLE Idle line detection interrupt 961 * @arg @ref UART_IT_PE Parity Error interrupt 962 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 963 * @retval None 964 */ 965 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (\ 966 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 967 ((__HANDLE__)->Instance->CR1 |= (1U <<\ 968 ((__INTERRUPT__) & UART_IT_MASK))): \ 969 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 970 ((__HANDLE__)->Instance->CR2 |= (1U <<\ 971 ((__INTERRUPT__) & UART_IT_MASK))): \ 972 ((__HANDLE__)->Instance->CR3 |= (1U <<\ 973 ((__INTERRUPT__) & UART_IT_MASK)))) 974 975 /** @brief Disable the specified UART interrupt. 976 * @param __HANDLE__ specifies the UART Handle. 977 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 978 * This parameter can be one of the following values: 979 #if defined(USART_CR1_UESM) 980 #if defined(USART_CR3_WUFIE) 981 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 982 #endif 983 #endif 984 * @arg @ref UART_IT_CM Character match interrupt 985 * @arg @ref UART_IT_CTS CTS change interrupt 986 * @arg @ref UART_IT_LBD LIN Break detection interrupt 987 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 988 * @arg @ref UART_IT_TC Transmission complete interrupt 989 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 990 * @arg @ref UART_IT_RTO Receive Timeout interrupt 991 * @arg @ref UART_IT_IDLE Idle line detection interrupt 992 * @arg @ref UART_IT_PE Parity Error interrupt 993 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 994 * @retval None 995 */ 996 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (\ 997 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 998 ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\ 999 ((__INTERRUPT__) & UART_IT_MASK))): \ 1000 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1001 ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\ 1002 ((__INTERRUPT__) & UART_IT_MASK))): \ 1003 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\ 1004 ((__INTERRUPT__) & UART_IT_MASK)))) 1005 1006 /** @brief Check whether the specified UART interrupt has occurred or not. 1007 * @param __HANDLE__ specifies the UART Handle. 1008 * @param __INTERRUPT__ specifies the UART interrupt to check. 1009 * This parameter can be one of the following values: 1010 #if defined(USART_CR1_UESM) 1011 #if defined(USART_CR3_WUFIE) 1012 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1013 #endif 1014 #endif 1015 * @arg @ref UART_IT_CM Character match interrupt 1016 * @arg @ref UART_IT_CTS CTS change interrupt 1017 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1018 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1019 * @arg @ref UART_IT_TC Transmission complete interrupt 1020 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1021 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1022 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1023 * @arg @ref UART_IT_PE Parity Error interrupt 1024 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1025 * @retval The new state of __INTERRUPT__ (SET or RESET). 1026 */ 1027 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 1028 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 1029 1030 /** @brief Check whether the specified UART interrupt source is enabled or not. 1031 * @param __HANDLE__ specifies the UART Handle. 1032 * @param __INTERRUPT__ specifies the UART interrupt source to check. 1033 * This parameter can be one of the following values: 1034 #if defined(USART_CR1_UESM) 1035 #if defined(USART_CR3_WUFIE) 1036 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1037 #endif 1038 #endif 1039 * @arg @ref UART_IT_CM Character match interrupt 1040 * @arg @ref UART_IT_CTS CTS change interrupt 1041 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1042 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1043 * @arg @ref UART_IT_TC Transmission complete interrupt 1044 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1045 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1046 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1047 * @arg @ref UART_IT_PE Parity Error interrupt 1048 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1049 * @retval The new state of __INTERRUPT__ (SET or RESET). 1050 */ 1051 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\ 1052 (__HANDLE__)->Instance->CR1 : \ 1053 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\ 1054 (__HANDLE__)->Instance->CR2 : \ 1055 (__HANDLE__)->Instance->CR3)) & (1U <<\ 1056 (((uint16_t)(__INTERRUPT__)) &\ 1057 UART_IT_MASK))) != RESET) ? SET : RESET) 1058 1059 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1060 * @param __HANDLE__ specifies the UART Handle. 1061 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1062 * to clear the corresponding interrupt 1063 * This parameter can be one of the following values: 1064 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1065 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1066 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1067 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1068 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1069 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag 1070 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1071 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1072 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1073 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1074 #if defined(USART_CR1_UESM) 1075 #if defined(USART_CR3_WUFIE) 1076 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1077 #endif 1078 #endif 1079 * @retval None 1080 */ 1081 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1082 1083 /** @brief Set a specific UART request flag. 1084 * @param __HANDLE__ specifies the UART Handle. 1085 * @param __REQ__ specifies the request flag to set 1086 * This parameter can be one of the following values: 1087 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1088 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1089 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1090 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1091 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1092 * @retval None 1093 */ 1094 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 1095 1096 /** @brief Enable the UART one bit sample method. 1097 * @param __HANDLE__ specifies the UART Handle. 1098 * @retval None 1099 */ 1100 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1101 1102 /** @brief Disable the UART one bit sample method. 1103 * @param __HANDLE__ specifies the UART Handle. 1104 * @retval None 1105 */ 1106 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1107 1108 /** @brief Enable UART. 1109 * @param __HANDLE__ specifies the UART Handle. 1110 * @retval None 1111 */ 1112 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1113 1114 /** @brief Disable UART. 1115 * @param __HANDLE__ specifies the UART Handle. 1116 * @retval None 1117 */ 1118 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1119 1120 /** @brief Enable CTS flow control. 1121 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1122 * without need to call HAL_UART_Init() function. 1123 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1124 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1125 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1126 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1127 * - macro could only be called when corresponding UART instance is disabled 1128 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1129 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1130 * @param __HANDLE__ specifies the UART Handle. 1131 * @retval None 1132 */ 1133 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1134 do{ \ 1135 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1136 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1137 } while(0U) 1138 1139 /** @brief Disable CTS flow control. 1140 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1141 * without need to call HAL_UART_Init() function. 1142 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1143 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1144 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1145 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1146 * - macro could only be called when corresponding UART instance is disabled 1147 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1148 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1149 * @param __HANDLE__ specifies the UART Handle. 1150 * @retval None 1151 */ 1152 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1153 do{ \ 1154 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1155 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1156 } while(0U) 1157 1158 /** @brief Enable RTS flow control. 1159 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1160 * without need to call HAL_UART_Init() function. 1161 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1162 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1163 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1164 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1165 * - macro could only be called when corresponding UART instance is disabled 1166 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1167 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1168 * @param __HANDLE__ specifies the UART Handle. 1169 * @retval None 1170 */ 1171 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1172 do{ \ 1173 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1174 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1175 } while(0U) 1176 1177 /** @brief Disable RTS flow control. 1178 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1179 * without need to call HAL_UART_Init() function. 1180 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1181 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1182 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1183 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1184 * - macro could only be called when corresponding UART instance is disabled 1185 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1186 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1187 * @param __HANDLE__ specifies the UART Handle. 1188 * @retval None 1189 */ 1190 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1191 do{ \ 1192 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1193 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1194 } while(0U) 1195 /** 1196 * @} 1197 */ 1198 1199 /* Private macros --------------------------------------------------------*/ 1200 /** @defgroup UART_Private_Macros UART Private Macros 1201 * @{ 1202 */ 1203 1204 1205 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1206 * @param __PCLK__ UART clock. 1207 * @param __BAUD__ Baud rate set by the user. 1208 * @retval Division result 1209 */ 1210 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1211 1212 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1213 * @param __PCLK__ UART clock. 1214 * @param __BAUD__ Baud rate set by the user. 1215 * @retval Division result 1216 */ 1217 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__)) 1218 1219 1220 /** @brief Check UART Baud rate. 1221 * @param __BAUDRATE__ Baudrate specified by the user. 1222 * The maximum Baud Rate is derived from the maximum clock on F7 (i.e. 216 MHz) 1223 * divided by the smallest oversampling used on the USART (i.e. 8) 1224 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1225 */ 1226 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 27000001U) 1227 1228 /** @brief Check UART assertion time. 1229 * @param __TIME__ 5-bit value assertion time. 1230 * @retval Test result (TRUE or FALSE). 1231 */ 1232 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1233 1234 /** @brief Check UART deassertion time. 1235 * @param __TIME__ 5-bit value deassertion time. 1236 * @retval Test result (TRUE or FALSE). 1237 */ 1238 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1239 1240 /** 1241 * @brief Ensure that UART frame number of stop bits is valid. 1242 * @param __STOPBITS__ UART frame number of stop bits. 1243 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1244 */ 1245 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1246 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1247 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1248 ((__STOPBITS__) == UART_STOPBITS_2)) 1249 1250 1251 /** 1252 * @brief Ensure that UART frame parity is valid. 1253 * @param __PARITY__ UART frame parity. 1254 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1255 */ 1256 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1257 ((__PARITY__) == UART_PARITY_EVEN) || \ 1258 ((__PARITY__) == UART_PARITY_ODD)) 1259 1260 /** 1261 * @brief Ensure that UART hardware flow control is valid. 1262 * @param __CONTROL__ UART hardware flow control. 1263 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1264 */ 1265 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1266 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1267 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1268 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1269 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1270 1271 /** 1272 * @brief Ensure that UART communication mode is valid. 1273 * @param __MODE__ UART communication mode. 1274 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1275 */ 1276 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1277 1278 /** 1279 * @brief Ensure that UART state is valid. 1280 * @param __STATE__ UART state. 1281 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1282 */ 1283 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1284 ((__STATE__) == UART_STATE_ENABLE)) 1285 1286 /** 1287 * @brief Ensure that UART oversampling is valid. 1288 * @param __SAMPLING__ UART oversampling. 1289 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1290 */ 1291 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1292 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1293 1294 /** 1295 * @brief Ensure that UART frame sampling is valid. 1296 * @param __ONEBIT__ UART frame sampling. 1297 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1298 */ 1299 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1300 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1301 1302 /** 1303 * @brief Ensure that UART auto Baud rate detection mode is valid. 1304 * @param __MODE__ UART auto Baud rate detection mode. 1305 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1306 */ 1307 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1308 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1309 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1310 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1311 1312 /** 1313 * @brief Ensure that UART receiver timeout setting is valid. 1314 * @param __TIMEOUT__ UART receiver timeout setting. 1315 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1316 */ 1317 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1318 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1319 1320 /** @brief Check the receiver timeout value. 1321 * @note The maximum UART receiver timeout value is 0xFFFFFF. 1322 * @param __TIMEOUTVALUE__ receiver timeout value. 1323 * @retval Test result (TRUE or FALSE) 1324 */ 1325 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) 1326 1327 /** 1328 * @brief Ensure that UART LIN state is valid. 1329 * @param __LIN__ UART LIN state. 1330 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1331 */ 1332 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1333 ((__LIN__) == UART_LIN_ENABLE)) 1334 1335 /** 1336 * @brief Ensure that UART LIN break detection length is valid. 1337 * @param __LENGTH__ UART LIN break detection length. 1338 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1339 */ 1340 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1341 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1342 1343 /** 1344 * @brief Ensure that UART DMA TX state is valid. 1345 * @param __DMATX__ UART DMA TX state. 1346 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1347 */ 1348 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1349 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1350 1351 /** 1352 * @brief Ensure that UART DMA RX state is valid. 1353 * @param __DMARX__ UART DMA RX state. 1354 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1355 */ 1356 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1357 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1358 1359 /** 1360 * @brief Ensure that UART half-duplex state is valid. 1361 * @param __HDSEL__ UART half-duplex state. 1362 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1363 */ 1364 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1365 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1366 1367 /** 1368 * @brief Ensure that UART wake-up method is valid. 1369 * @param __WAKEUP__ UART wake-up method . 1370 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1371 */ 1372 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1373 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1374 1375 /** 1376 * @brief Ensure that UART request parameter is valid. 1377 * @param __PARAM__ UART request parameter. 1378 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1379 */ 1380 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1381 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1382 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1383 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1384 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1385 1386 /** 1387 * @brief Ensure that UART advanced features initialization is valid. 1388 * @param __INIT__ UART advanced features initialization. 1389 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1390 */ 1391 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1392 UART_ADVFEATURE_TXINVERT_INIT | \ 1393 UART_ADVFEATURE_RXINVERT_INIT | \ 1394 UART_ADVFEATURE_DATAINVERT_INIT | \ 1395 UART_ADVFEATURE_SWAP_INIT | \ 1396 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1397 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1398 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1399 UART_ADVFEATURE_MSBFIRST_INIT)) 1400 1401 /** 1402 * @brief Ensure that UART frame TX inversion setting is valid. 1403 * @param __TXINV__ UART frame TX inversion setting. 1404 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1405 */ 1406 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1407 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1408 1409 /** 1410 * @brief Ensure that UART frame RX inversion setting is valid. 1411 * @param __RXINV__ UART frame RX inversion setting. 1412 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1413 */ 1414 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1415 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1416 1417 /** 1418 * @brief Ensure that UART frame data inversion setting is valid. 1419 * @param __DATAINV__ UART frame data inversion setting. 1420 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1421 */ 1422 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1423 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1424 1425 /** 1426 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1427 * @param __SWAP__ UART frame RX/TX pins swap setting. 1428 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1429 */ 1430 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1431 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1432 1433 /** 1434 * @brief Ensure that UART frame overrun setting is valid. 1435 * @param __OVERRUN__ UART frame overrun setting. 1436 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1437 */ 1438 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1439 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1440 1441 /** 1442 * @brief Ensure that UART auto Baud rate state is valid. 1443 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1444 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1445 */ 1446 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \ 1447 UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1448 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1449 1450 /** 1451 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1452 * @param __DMA__ UART DMA enabling or disabling on error setting. 1453 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1454 */ 1455 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1456 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1457 1458 /** 1459 * @brief Ensure that UART frame MSB first setting is valid. 1460 * @param __MSBFIRST__ UART frame MSB first setting. 1461 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1462 */ 1463 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1464 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1465 1466 #if defined(USART_CR1_UESM) 1467 /** 1468 * @brief Ensure that UART stop mode state is valid. 1469 * @param __STOPMODE__ UART stop mode state. 1470 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1471 */ 1472 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1473 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1474 1475 #endif /* USART_CR1_UESM */ 1476 /** 1477 * @brief Ensure that UART mute mode state is valid. 1478 * @param __MUTE__ UART mute mode state. 1479 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1480 */ 1481 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1482 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1483 #if defined(USART_CR1_UESM) 1484 1485 /** 1486 * @brief Ensure that UART wake-up selection is valid. 1487 * @param __WAKE__ UART wake-up selection. 1488 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1489 */ 1490 #if defined(USART_CR3_WUFIE) 1491 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1492 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1493 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1494 #else 1495 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1496 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1497 #endif /* USART_CR3_WUFIE */ 1498 #endif /* USART_CR1_UESM */ 1499 1500 /** 1501 * @brief Ensure that UART driver enable polarity is valid. 1502 * @param __POLARITY__ UART driver enable polarity. 1503 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1504 */ 1505 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1506 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1507 1508 1509 /** 1510 * @} 1511 */ 1512 1513 /* Include UART HAL Extended module */ 1514 #include "stm32f7xx_hal_uart_ex.h" 1515 1516 /* Exported functions --------------------------------------------------------*/ 1517 /** @addtogroup UART_Exported_Functions UART Exported Functions 1518 * @{ 1519 */ 1520 1521 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1522 * @{ 1523 */ 1524 1525 /* Initialization and de-initialization functions ****************************/ 1526 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1527 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1528 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1529 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1530 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1531 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1532 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1533 1534 /* Callbacks Register/UnRegister functions ***********************************/ 1535 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1536 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, 1537 pUART_CallbackTypeDef pCallback); 1538 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1539 1540 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); 1541 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); 1542 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1543 1544 /** 1545 * @} 1546 */ 1547 1548 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1549 * @{ 1550 */ 1551 1552 /* IO operation functions *****************************************************/ 1553 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); 1554 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1555 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1556 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1557 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1558 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1559 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1560 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1561 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1562 /* Transfer Abort functions */ 1563 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1564 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1565 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1566 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1567 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1568 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1569 1570 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1571 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1572 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1573 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1574 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1575 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1576 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1577 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1578 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1579 1580 void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); 1581 1582 /** 1583 * @} 1584 */ 1585 1586 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1587 * @{ 1588 */ 1589 1590 /* Peripheral Control functions ************************************************/ 1591 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); 1592 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); 1593 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); 1594 1595 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1596 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1597 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1598 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1599 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1600 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1601 1602 /** 1603 * @} 1604 */ 1605 1606 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1607 * @{ 1608 */ 1609 1610 /* Peripheral State and Errors functions **************************************************/ 1611 HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart); 1612 uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart); 1613 1614 /** 1615 * @} 1616 */ 1617 1618 /** 1619 * @} 1620 */ 1621 1622 /* Private functions -----------------------------------------------------------*/ 1623 /** @addtogroup UART_Private_Functions UART Private Functions 1624 * @{ 1625 */ 1626 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1627 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 1628 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1629 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1630 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1631 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, 1632 uint32_t Tickstart, uint32_t Timeout); 1633 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1634 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1635 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1636 1637 /** 1638 * @} 1639 */ 1640 1641 /* Private variables -----------------------------------------------------------*/ 1642 /** 1643 * @} 1644 */ 1645 1646 /** 1647 * @} 1648 */ 1649 1650 #ifdef __cplusplus 1651 } 1652 #endif 1653 1654 #endif /* STM32F7xx_HAL_UART_H */ 1655 1656
