1 /** 2 ****************************************************************************** 3 * @file stm32f4xx_hal_flash_ex.h 4 * @author MCD Application Team 5 * @brief Header file of FLASH HAL Extension module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file in 13 * the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 ****************************************************************************** 16 */ 17 18 /* Define to prevent recursive inclusion -------------------------------------*/ 19 #ifndef __STM32F4xx_HAL_FLASH_EX_H 20 #define __STM32F4xx_HAL_FLASH_EX_H 21 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 /* Includes ------------------------------------------------------------------*/ 27 #include "stm32f4xx_hal_def.h" 28 29 /** @addtogroup STM32F4xx_HAL_Driver 30 * @{ 31 */ 32 33 /** @addtogroup FLASHEx 34 * @{ 35 */ 36 37 /* Exported types ------------------------------------------------------------*/ 38 /** @defgroup FLASHEx_Exported_Types FLASH Exported Types 39 * @{ 40 */ 41 42 /** 43 * @brief FLASH Erase structure definition 44 */ 45 typedef struct 46 { 47 uint32_t TypeErase; /*!< Mass erase or sector Erase. 48 This parameter can be a value of @ref FLASHEx_Type_Erase */ 49 50 uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled. 51 This parameter must be a value of @ref FLASHEx_Banks */ 52 53 uint32_t Sector; /*!< Initial FLASH sector to erase when Mass erase is disabled 54 This parameter must be a value of @ref FLASHEx_Sectors */ 55 56 uint32_t NbSectors; /*!< Number of sectors to be erased. 57 This parameter must be a value between 1 and (max number of sectors - value of Initial sector)*/ 58 59 uint32_t VoltageRange;/*!< The device voltage range which defines the erase parallelism 60 This parameter must be a value of @ref FLASHEx_Voltage_Range */ 61 62 } FLASH_EraseInitTypeDef; 63 64 /** 65 * @brief FLASH Option Bytes Program structure definition 66 */ 67 typedef struct 68 { 69 uint32_t OptionType; /*!< Option byte to be configured. 70 This parameter can be a value of @ref FLASHEx_Option_Type */ 71 72 uint32_t WRPState; /*!< Write protection activation or deactivation. 73 This parameter can be a value of @ref FLASHEx_WRP_State */ 74 75 uint32_t WRPSector; /*!< Specifies the sector(s) to be write protected. 76 The value of this parameter depend on device used within the same series */ 77 78 uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors. 79 This parameter must be a value of @ref FLASHEx_Banks */ 80 81 uint32_t RDPLevel; /*!< Set the read protection level. 82 This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */ 83 84 uint32_t BORLevel; /*!< Set the BOR Level. 85 This parameter can be a value of @ref FLASHEx_BOR_Reset_Level */ 86 87 uint8_t USERConfig; /*!< Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. */ 88 89 } FLASH_OBProgramInitTypeDef; 90 91 /** 92 * @brief FLASH Advanced Option Bytes Program structure definition 93 */ 94 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ 95 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\ 96 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\ 97 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\ 98 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) 99 typedef struct 100 { 101 uint32_t OptionType; /*!< Option byte to be configured for extension. 102 This parameter can be a value of @ref FLASHEx_Advanced_Option_Type */ 103 104 uint32_t PCROPState; /*!< PCROP activation or deactivation. 105 This parameter can be a value of @ref FLASHEx_PCROP_State */ 106 107 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\ 108 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) 109 uint16_t Sectors; /*!< specifies the sector(s) set for PCROP. 110 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */ 111 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx ||\ 112 STM32F412Cx || STM32F413xx || STM32F423xx */ 113 114 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) 115 uint32_t Banks; /*!< Select banks for PCROP activation/deactivation of all sectors. 116 This parameter must be a value of @ref FLASHEx_Banks */ 117 118 uint16_t SectorsBank1; /*!< Specifies the sector(s) set for PCROP for Bank1. 119 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */ 120 121 uint16_t SectorsBank2; /*!< Specifies the sector(s) set for PCROP for Bank2. 122 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */ 123 124 uint8_t BootConfig; /*!< Specifies Option bytes for boot config. 125 This parameter can be a value of @ref FLASHEx_Dual_Boot */ 126 127 #endif /*STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ 128 }FLASH_AdvOBProgramInitTypeDef; 129 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || 130 STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ 131 /** 132 * @} 133 */ 134 135 /* Exported constants --------------------------------------------------------*/ 136 137 /** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants 138 * @{ 139 */ 140 141 /** @defgroup FLASHEx_Type_Erase FLASH Type Erase 142 * @{ 143 */ 144 #define FLASH_TYPEERASE_SECTORS 0x00000000U /*!< Sectors erase only */ 145 #define FLASH_TYPEERASE_MASSERASE 0x00000001U /*!< Flash Mass erase activation */ 146 /** 147 * @} 148 */ 149 150 /** @defgroup FLASHEx_Voltage_Range FLASH Voltage Range 151 * @{ 152 */ 153 #define FLASH_VOLTAGE_RANGE_1 0x00000000U /*!< Device operating range: 1.8V to 2.1V */ 154 #define FLASH_VOLTAGE_RANGE_2 0x00000001U /*!< Device operating range: 2.1V to 2.7V */ 155 #define FLASH_VOLTAGE_RANGE_3 0x00000002U /*!< Device operating range: 2.7V to 3.6V */ 156 #define FLASH_VOLTAGE_RANGE_4 0x00000003U /*!< Device operating range: 2.7V to 3.6V + External Vpp */ 157 /** 158 * @} 159 */ 160 161 /** @defgroup FLASHEx_WRP_State FLASH WRP State 162 * @{ 163 */ 164 #define OB_WRPSTATE_DISABLE 0x00000000U /*!< Disable the write protection of the desired bank 1 sectors */ 165 #define OB_WRPSTATE_ENABLE 0x00000001U /*!< Enable the write protection of the desired bank 1 sectors */ 166 /** 167 * @} 168 */ 169 170 /** @defgroup FLASHEx_Option_Type FLASH Option Type 171 * @{ 172 */ 173 #define OPTIONBYTE_WRP 0x00000001U /*!< WRP option byte configuration */ 174 #define OPTIONBYTE_RDP 0x00000002U /*!< RDP option byte configuration */ 175 #define OPTIONBYTE_USER 0x00000004U /*!< USER option byte configuration */ 176 #define OPTIONBYTE_BOR 0x00000008U /*!< BOR option byte configuration */ 177 /** 178 * @} 179 */ 180 181 /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection 182 * @{ 183 */ 184 #define OB_RDP_LEVEL_0 ((uint8_t)0xAA) 185 #define OB_RDP_LEVEL_1 ((uint8_t)0x55) 186 #define OB_RDP_LEVEL_2 ((uint8_t)0xCC) /*!< Warning: When enabling read protection level 2 187 it s no more possible to go back to level 1 or 0 */ 188 /** 189 * @} 190 */ 191 192 /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog 193 * @{ 194 */ 195 #define OB_IWDG_SW ((uint8_t)0x20) /*!< Software IWDG selected */ 196 #define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware IWDG selected */ 197 /** 198 * @} 199 */ 200 201 /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASH Option Bytes nRST_STOP 202 * @{ 203 */ 204 #define OB_STOP_NO_RST ((uint8_t)0x40) /*!< No reset generated when entering in STOP */ 205 #define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */ 206 /** 207 * @} 208 */ 209 210 211 /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY 212 * @{ 213 */ 214 #define OB_STDBY_NO_RST ((uint8_t)0x80) /*!< No reset generated when entering in STANDBY */ 215 #define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */ 216 /** 217 * @} 218 */ 219 220 /** @defgroup FLASHEx_BOR_Reset_Level FLASH BOR Reset Level 221 * @{ 222 */ 223 #define OB_BOR_LEVEL3 ((uint8_t)0x00) /*!< Supply voltage ranges from 2.70 to 3.60 V */ 224 #define OB_BOR_LEVEL2 ((uint8_t)0x04) /*!< Supply voltage ranges from 2.40 to 2.70 V */ 225 #define OB_BOR_LEVEL1 ((uint8_t)0x08) /*!< Supply voltage ranges from 2.10 to 2.40 V */ 226 #define OB_BOR_OFF ((uint8_t)0x0C) /*!< Supply voltage ranges from 1.62 to 2.10 V */ 227 /** 228 * @} 229 */ 230 231 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ 232 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\ 233 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\ 234 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\ 235 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) 236 /** @defgroup FLASHEx_PCROP_State FLASH PCROP State 237 * @{ 238 */ 239 #define OB_PCROP_STATE_DISABLE 0x00000000U /*!< Disable PCROP */ 240 #define OB_PCROP_STATE_ENABLE 0x00000001U /*!< Enable PCROP */ 241 /** 242 * @} 243 */ 244 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\ 245 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\ 246 STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ 247 248 /** @defgroup FLASHEx_Advanced_Option_Type FLASH Advanced Option Type 249 * @{ 250 */ 251 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ 252 defined(STM32F469xx) || defined(STM32F479xx) 253 #define OPTIONBYTE_PCROP 0x00000001U /*!< PCROP option byte configuration */ 254 #define OPTIONBYTE_BOOTCONFIG 0x00000002U /*!< BOOTConfig option byte configuration */ 255 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ 256 257 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\ 258 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\ 259 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\ 260 defined(STM32F423xx) 261 #define OPTIONBYTE_PCROP 0x00000001U /*!<PCROP option byte configuration */ 262 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || 263 STM32F413xx || STM32F423xx */ 264 /** 265 * @} 266 */ 267 268 /** @defgroup FLASH_Latency FLASH Latency 269 * @{ 270 */ 271 /*------------------------- STM32F42xxx/STM32F43xxx/STM32F446xx/STM32F469xx/STM32F479xx ----------------------*/ 272 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\ 273 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) 274 #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */ 275 #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */ 276 #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */ 277 #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */ 278 #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */ 279 #define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */ 280 #define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */ 281 #define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */ 282 #define FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS /*!< FLASH Eight Latency cycles */ 283 #define FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS /*!< FLASH Nine Latency cycles */ 284 #define FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /*!< FLASH Ten Latency cycles */ 285 #define FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /*!< FLASH Eleven Latency cycles */ 286 #define FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /*!< FLASH Twelve Latency cycles */ 287 #define FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /*!< FLASH Thirteen Latency cycles */ 288 #define FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS /*!< FLASH Fourteen Latency cycles */ 289 #define FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS /*!< FLASH Fifteen Latency cycles */ 290 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */ 291 /*--------------------------------------------------------------------------------------------------------------*/ 292 293 /*-------------------------- STM32F40xxx/STM32F41xxx/STM32F401xx/STM32F411xx/STM32F423xx -----------------------*/ 294 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ 295 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\ 296 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\ 297 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) 298 299 #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */ 300 #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */ 301 #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */ 302 #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */ 303 #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */ 304 #define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */ 305 #define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */ 306 #define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */ 307 #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || 308 STM32F413xx || STM32F423xx */ 309 /*--------------------------------------------------------------------------------------------------------------*/ 310 311 /** 312 * @} 313 */ 314 315 316 /** @defgroup FLASHEx_Banks FLASH Banks 317 * @{ 318 */ 319 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\ 320 defined(STM32F469xx) || defined(STM32F479xx) 321 #define FLASH_BANK_1 1U /*!< Bank 1 */ 322 #define FLASH_BANK_2 2U /*!< Bank 2 */ 323 #define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */ 324 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */ 325 326 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ 327 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\ 328 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\ 329 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\ 330 defined(STM32F423xx) 331 #define FLASH_BANK_1 1U /*!< Bank 1 */ 332 #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx 333 STM32F413xx || STM32F423xx */ 334 /** 335 * @} 336 */ 337 338 /** @defgroup FLASHEx_MassErase_bit FLASH Mass Erase bit 339 * @{ 340 */ 341 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\ 342 defined(STM32F469xx) || defined(STM32F479xx) 343 #define FLASH_MER_BIT (FLASH_CR_MER1 | FLASH_CR_MER2) /*!< 2 MER bits here to clear */ 344 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */ 345 346 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ 347 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\ 348 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\ 349 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\ 350 defined(STM32F423xx) 351 #define FLASH_MER_BIT (FLASH_CR_MER) /*!< only 1 MER Bit */ 352 #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx 353 STM32F413xx || STM32F423xx */ 354 /** 355 * @} 356 */ 357 358 /** @defgroup FLASHEx_Sectors FLASH Sectors 359 * @{ 360 */ 361 /*-------------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx ------------------------------------*/ 362 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\ 363 defined(STM32F469xx) || defined(STM32F479xx) 364 #define FLASH_SECTOR_0 0U /*!< Sector Number 0 */ 365 #define FLASH_SECTOR_1 1U /*!< Sector Number 1 */ 366 #define FLASH_SECTOR_2 2U /*!< Sector Number 2 */ 367 #define FLASH_SECTOR_3 3U /*!< Sector Number 3 */ 368 #define FLASH_SECTOR_4 4U /*!< Sector Number 4 */ 369 #define FLASH_SECTOR_5 5U /*!< Sector Number 5 */ 370 #define FLASH_SECTOR_6 6U /*!< Sector Number 6 */ 371 #define FLASH_SECTOR_7 7U /*!< Sector Number 7 */ 372 #define FLASH_SECTOR_8 8U /*!< Sector Number 8 */ 373 #define FLASH_SECTOR_9 9U /*!< Sector Number 9 */ 374 #define FLASH_SECTOR_10 10U /*!< Sector Number 10 */ 375 #define FLASH_SECTOR_11 11U /*!< Sector Number 11 */ 376 #define FLASH_SECTOR_12 12U /*!< Sector Number 12 */ 377 #define FLASH_SECTOR_13 13U /*!< Sector Number 13 */ 378 #define FLASH_SECTOR_14 14U /*!< Sector Number 14 */ 379 #define FLASH_SECTOR_15 15U /*!< Sector Number 15 */ 380 #define FLASH_SECTOR_16 16U /*!< Sector Number 16 */ 381 #define FLASH_SECTOR_17 17U /*!< Sector Number 17 */ 382 #define FLASH_SECTOR_18 18U /*!< Sector Number 18 */ 383 #define FLASH_SECTOR_19 19U /*!< Sector Number 19 */ 384 #define FLASH_SECTOR_20 20U /*!< Sector Number 20 */ 385 #define FLASH_SECTOR_21 21U /*!< Sector Number 21 */ 386 #define FLASH_SECTOR_22 22U /*!< Sector Number 22 */ 387 #define FLASH_SECTOR_23 23U /*!< Sector Number 23 */ 388 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */ 389 /*-----------------------------------------------------------------------------------------------------*/ 390 391 /*-------------------------------------- STM32F413xx/STM32F423xx --------------------------------------*/ 392 #if defined(STM32F413xx) || defined(STM32F423xx) 393 #define FLASH_SECTOR_0 0U /*!< Sector Number 0 */ 394 #define FLASH_SECTOR_1 1U /*!< Sector Number 1 */ 395 #define FLASH_SECTOR_2 2U /*!< Sector Number 2 */ 396 #define FLASH_SECTOR_3 3U /*!< Sector Number 3 */ 397 #define FLASH_SECTOR_4 4U /*!< Sector Number 4 */ 398 #define FLASH_SECTOR_5 5U /*!< Sector Number 5 */ 399 #define FLASH_SECTOR_6 6U /*!< Sector Number 6 */ 400 #define FLASH_SECTOR_7 7U /*!< Sector Number 7 */ 401 #define FLASH_SECTOR_8 8U /*!< Sector Number 8 */ 402 #define FLASH_SECTOR_9 9U /*!< Sector Number 9 */ 403 #define FLASH_SECTOR_10 10U /*!< Sector Number 10 */ 404 #define FLASH_SECTOR_11 11U /*!< Sector Number 11 */ 405 #define FLASH_SECTOR_12 12U /*!< Sector Number 12 */ 406 #define FLASH_SECTOR_13 13U /*!< Sector Number 13 */ 407 #define FLASH_SECTOR_14 14U /*!< Sector Number 14 */ 408 #define FLASH_SECTOR_15 15U /*!< Sector Number 15 */ 409 #endif /* STM32F413xx || STM32F423xx */ 410 /*-----------------------------------------------------------------------------------------------------*/ 411 412 /*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/ 413 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\ 414 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) 415 #define FLASH_SECTOR_0 0U /*!< Sector Number 0 */ 416 #define FLASH_SECTOR_1 1U /*!< Sector Number 1 */ 417 #define FLASH_SECTOR_2 2U /*!< Sector Number 2 */ 418 #define FLASH_SECTOR_3 3U /*!< Sector Number 3 */ 419 #define FLASH_SECTOR_4 4U /*!< Sector Number 4 */ 420 #define FLASH_SECTOR_5 5U /*!< Sector Number 5 */ 421 #define FLASH_SECTOR_6 6U /*!< Sector Number 6 */ 422 #define FLASH_SECTOR_7 7U /*!< Sector Number 7 */ 423 #define FLASH_SECTOR_8 8U /*!< Sector Number 8 */ 424 #define FLASH_SECTOR_9 9U /*!< Sector Number 9 */ 425 #define FLASH_SECTOR_10 10U /*!< Sector Number 10 */ 426 #define FLASH_SECTOR_11 11U /*!< Sector Number 11 */ 427 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ 428 /*-----------------------------------------------------------------------------------------------------*/ 429 430 /*--------------------------------------------- STM32F401xC -------------------------------------------*/ 431 #if defined(STM32F401xC) 432 #define FLASH_SECTOR_0 0U /*!< Sector Number 0 */ 433 #define FLASH_SECTOR_1 1U /*!< Sector Number 1 */ 434 #define FLASH_SECTOR_2 2U /*!< Sector Number 2 */ 435 #define FLASH_SECTOR_3 3U /*!< Sector Number 3 */ 436 #define FLASH_SECTOR_4 4U /*!< Sector Number 4 */ 437 #define FLASH_SECTOR_5 5U /*!< Sector Number 5 */ 438 #endif /* STM32F401xC */ 439 /*-----------------------------------------------------------------------------------------------------*/ 440 441 /*--------------------------------------------- STM32F410xx -------------------------------------------*/ 442 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) 443 #define FLASH_SECTOR_0 0U /*!< Sector Number 0 */ 444 #define FLASH_SECTOR_1 1U /*!< Sector Number 1 */ 445 #define FLASH_SECTOR_2 2U /*!< Sector Number 2 */ 446 #define FLASH_SECTOR_3 3U /*!< Sector Number 3 */ 447 #define FLASH_SECTOR_4 4U /*!< Sector Number 4 */ 448 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */ 449 /*-----------------------------------------------------------------------------------------------------*/ 450 451 /*---------------------------------- STM32F401xE/STM32F411xE/STM32F446xx ------------------------------*/ 452 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) 453 #define FLASH_SECTOR_0 0U /*!< Sector Number 0 */ 454 #define FLASH_SECTOR_1 1U /*!< Sector Number 1 */ 455 #define FLASH_SECTOR_2 2U /*!< Sector Number 2 */ 456 #define FLASH_SECTOR_3 3U /*!< Sector Number 3 */ 457 #define FLASH_SECTOR_4 4U /*!< Sector Number 4 */ 458 #define FLASH_SECTOR_5 5U /*!< Sector Number 5 */ 459 #define FLASH_SECTOR_6 6U /*!< Sector Number 6 */ 460 #define FLASH_SECTOR_7 7U /*!< Sector Number 7 */ 461 #endif /* STM32F401xE || STM32F411xE || STM32F446xx */ 462 /*-----------------------------------------------------------------------------------------------------*/ 463 464 /** 465 * @} 466 */ 467 468 /** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection 469 * @{ 470 */ 471 /*--------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx -------------------------*/ 472 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ 473 defined(STM32F469xx) || defined(STM32F479xx) 474 #define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */ 475 #define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */ 476 #define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */ 477 #define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */ 478 #define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */ 479 #define OB_WRP_SECTOR_5 0x00000020U /*!< Write protection of Sector5 */ 480 #define OB_WRP_SECTOR_6 0x00000040U /*!< Write protection of Sector6 */ 481 #define OB_WRP_SECTOR_7 0x00000080U /*!< Write protection of Sector7 */ 482 #define OB_WRP_SECTOR_8 0x00000100U /*!< Write protection of Sector8 */ 483 #define OB_WRP_SECTOR_9 0x00000200U /*!< Write protection of Sector9 */ 484 #define OB_WRP_SECTOR_10 0x00000400U /*!< Write protection of Sector10 */ 485 #define OB_WRP_SECTOR_11 0x00000800U /*!< Write protection of Sector11 */ 486 #define OB_WRP_SECTOR_12 0x00000001U << 12U /*!< Write protection of Sector12 */ 487 #define OB_WRP_SECTOR_13 0x00000002U << 12U /*!< Write protection of Sector13 */ 488 #define OB_WRP_SECTOR_14 0x00000004U << 12U /*!< Write protection of Sector14 */ 489 #define OB_WRP_SECTOR_15 0x00000008U << 12U /*!< Write protection of Sector15 */ 490 #define OB_WRP_SECTOR_16 0x00000010U << 12U /*!< Write protection of Sector16 */ 491 #define OB_WRP_SECTOR_17 0x00000020U << 12U /*!< Write protection of Sector17 */ 492 #define OB_WRP_SECTOR_18 0x00000040U << 12U /*!< Write protection of Sector18 */ 493 #define OB_WRP_SECTOR_19 0x00000080U << 12U /*!< Write protection of Sector19 */ 494 #define OB_WRP_SECTOR_20 0x00000100U << 12U /*!< Write protection of Sector20 */ 495 #define OB_WRP_SECTOR_21 0x00000200U << 12U /*!< Write protection of Sector21 */ 496 #define OB_WRP_SECTOR_22 0x00000400U << 12U /*!< Write protection of Sector22 */ 497 #define OB_WRP_SECTOR_23 0x00000800U << 12U /*!< Write protection of Sector23 */ 498 #define OB_WRP_SECTOR_All 0x00000FFFU << 12U /*!< Write protection of all Sectors */ 499 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */ 500 /*-----------------------------------------------------------------------------------------------------*/ 501 502 /*--------------------------------------- STM32F413xx/STM32F423xx -------------------------------------*/ 503 #if defined(STM32F413xx) || defined(STM32F423xx) 504 #define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */ 505 #define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */ 506 #define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */ 507 #define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */ 508 #define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */ 509 #define OB_WRP_SECTOR_5 0x00000020U /*!< Write protection of Sector5 */ 510 #define OB_WRP_SECTOR_6 0x00000040U /*!< Write protection of Sector6 */ 511 #define OB_WRP_SECTOR_7 0x00000080U /*!< Write protection of Sector7 */ 512 #define OB_WRP_SECTOR_8 0x00000100U /*!< Write protection of Sector8 */ 513 #define OB_WRP_SECTOR_9 0x00000200U /*!< Write protection of Sector9 */ 514 #define OB_WRP_SECTOR_10 0x00000400U /*!< Write protection of Sector10 */ 515 #define OB_WRP_SECTOR_11 0x00000800U /*!< Write protection of Sector11 */ 516 #define OB_WRP_SECTOR_12 0x00001000U /*!< Write protection of Sector12 */ 517 #define OB_WRP_SECTOR_13 0x00002000U /*!< Write protection of Sector13 */ 518 #define OB_WRP_SECTOR_14 0x00004000U /*!< Write protection of Sector14 */ 519 #define OB_WRP_SECTOR_15 0x00004000U /*!< Write protection of Sector15 */ 520 #define OB_WRP_SECTOR_All 0x00007FFFU /*!< Write protection of all Sectors */ 521 #endif /* STM32F413xx || STM32F423xx */ 522 /*-----------------------------------------------------------------------------------------------------*/ 523 524 /*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/ 525 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\ 526 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) 527 #define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */ 528 #define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */ 529 #define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */ 530 #define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */ 531 #define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */ 532 #define OB_WRP_SECTOR_5 0x00000020U /*!< Write protection of Sector5 */ 533 #define OB_WRP_SECTOR_6 0x00000040U /*!< Write protection of Sector6 */ 534 #define OB_WRP_SECTOR_7 0x00000080U /*!< Write protection of Sector7 */ 535 #define OB_WRP_SECTOR_8 0x00000100U /*!< Write protection of Sector8 */ 536 #define OB_WRP_SECTOR_9 0x00000200U /*!< Write protection of Sector9 */ 537 #define OB_WRP_SECTOR_10 0x00000400U /*!< Write protection of Sector10 */ 538 #define OB_WRP_SECTOR_11 0x00000800U /*!< Write protection of Sector11 */ 539 #define OB_WRP_SECTOR_All 0x00000FFFU /*!< Write protection of all Sectors */ 540 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ 541 /*-----------------------------------------------------------------------------------------------------*/ 542 543 /*--------------------------------------------- STM32F401xC -------------------------------------------*/ 544 #if defined(STM32F401xC) 545 #define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */ 546 #define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */ 547 #define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */ 548 #define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */ 549 #define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */ 550 #define OB_WRP_SECTOR_5 0x00000020U /*!< Write protection of Sector5 */ 551 #define OB_WRP_SECTOR_All 0x00000FFFU /*!< Write protection of all Sectors */ 552 #endif /* STM32F401xC */ 553 /*-----------------------------------------------------------------------------------------------------*/ 554 555 /*--------------------------------------------- STM32F410xx -------------------------------------------*/ 556 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) 557 #define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */ 558 #define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */ 559 #define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */ 560 #define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */ 561 #define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */ 562 #define OB_WRP_SECTOR_All 0x00000FFFU /*!< Write protection of all Sectors */ 563 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */ 564 /*-----------------------------------------------------------------------------------------------------*/ 565 566 /*---------------------------------- STM32F401xE/STM32F411xE/STM32F446xx ------------------------------*/ 567 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) 568 #define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */ 569 #define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */ 570 #define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */ 571 #define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */ 572 #define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */ 573 #define OB_WRP_SECTOR_5 0x00000020U /*!< Write protection of Sector5 */ 574 #define OB_WRP_SECTOR_6 0x00000040U /*!< Write protection of Sector6 */ 575 #define OB_WRP_SECTOR_7 0x00000080U /*!< Write protection of Sector7 */ 576 #define OB_WRP_SECTOR_All 0x00000FFFU /*!< Write protection of all Sectors */ 577 #endif /* STM32F401xE || STM32F411xE || STM32F446xx */ 578 /*-----------------------------------------------------------------------------------------------------*/ 579 /** 580 * @} 581 */ 582 583 /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection FLASH Option Bytes PC ReadWrite Protection 584 * @{ 585 */ 586 /*-------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx ---------------------------*/ 587 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\ 588 defined(STM32F469xx) || defined(STM32F479xx) 589 #define OB_PCROP_SECTOR_0 0x00000001U /*!< PC Read/Write protection of Sector0 */ 590 #define OB_PCROP_SECTOR_1 0x00000002U /*!< PC Read/Write protection of Sector1 */ 591 #define OB_PCROP_SECTOR_2 0x00000004U /*!< PC Read/Write protection of Sector2 */ 592 #define OB_PCROP_SECTOR_3 0x00000008U /*!< PC Read/Write protection of Sector3 */ 593 #define OB_PCROP_SECTOR_4 0x00000010U /*!< PC Read/Write protection of Sector4 */ 594 #define OB_PCROP_SECTOR_5 0x00000020U /*!< PC Read/Write protection of Sector5 */ 595 #define OB_PCROP_SECTOR_6 0x00000040U /*!< PC Read/Write protection of Sector6 */ 596 #define OB_PCROP_SECTOR_7 0x00000080U /*!< PC Read/Write protection of Sector7 */ 597 #define OB_PCROP_SECTOR_8 0x00000100U /*!< PC Read/Write protection of Sector8 */ 598 #define OB_PCROP_SECTOR_9 0x00000200U /*!< PC Read/Write protection of Sector9 */ 599 #define OB_PCROP_SECTOR_10 0x00000400U /*!< PC Read/Write protection of Sector10 */ 600 #define OB_PCROP_SECTOR_11 0x00000800U /*!< PC Read/Write protection of Sector11 */ 601 #define OB_PCROP_SECTOR_12 0x00000001U /*!< PC Read/Write protection of Sector12 */ 602 #define OB_PCROP_SECTOR_13 0x00000002U /*!< PC Read/Write protection of Sector13 */ 603 #define OB_PCROP_SECTOR_14 0x00000004U /*!< PC Read/Write protection of Sector14 */ 604 #define OB_PCROP_SECTOR_15 0x00000008U /*!< PC Read/Write protection of Sector15 */ 605 #define OB_PCROP_SECTOR_16 0x00000010U /*!< PC Read/Write protection of Sector16 */ 606 #define OB_PCROP_SECTOR_17 0x00000020U /*!< PC Read/Write protection of Sector17 */ 607 #define OB_PCROP_SECTOR_18 0x00000040U /*!< PC Read/Write protection of Sector18 */ 608 #define OB_PCROP_SECTOR_19 0x00000080U /*!< PC Read/Write protection of Sector19 */ 609 #define OB_PCROP_SECTOR_20 0x00000100U /*!< PC Read/Write protection of Sector20 */ 610 #define OB_PCROP_SECTOR_21 0x00000200U /*!< PC Read/Write protection of Sector21 */ 611 #define OB_PCROP_SECTOR_22 0x00000400U /*!< PC Read/Write protection of Sector22 */ 612 #define OB_PCROP_SECTOR_23 0x00000800U /*!< PC Read/Write protection of Sector23 */ 613 #define OB_PCROP_SECTOR_All 0x00000FFFU /*!< PC Read/Write protection of all Sectors */ 614 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */ 615 /*-----------------------------------------------------------------------------------------------------*/ 616 617 /*------------------------------------- STM32F413xx/STM32F423xx ---------------------------------------*/ 618 #if defined(STM32F413xx) || defined(STM32F423xx) 619 #define OB_PCROP_SECTOR_0 0x00000001U /*!< PC Read/Write protection of Sector0 */ 620 #define OB_PCROP_SECTOR_1 0x00000002U /*!< PC Read/Write protection of Sector1 */ 621 #define OB_PCROP_SECTOR_2 0x00000004U /*!< PC Read/Write protection of Sector2 */ 622 #define OB_PCROP_SECTOR_3 0x00000008U /*!< PC Read/Write protection of Sector3 */ 623 #define OB_PCROP_SECTOR_4 0x00000010U /*!< PC Read/Write protection of Sector4 */ 624 #define OB_PCROP_SECTOR_5 0x00000020U /*!< PC Read/Write protection of Sector5 */ 625 #define OB_PCROP_SECTOR_6 0x00000040U /*!< PC Read/Write protection of Sector6 */ 626 #define OB_PCROP_SECTOR_7 0x00000080U /*!< PC Read/Write protection of Sector7 */ 627 #define OB_PCROP_SECTOR_8 0x00000100U /*!< PC Read/Write protection of Sector8 */ 628 #define OB_PCROP_SECTOR_9 0x00000200U /*!< PC Read/Write protection of Sector9 */ 629 #define OB_PCROP_SECTOR_10 0x00000400U /*!< PC Read/Write protection of Sector10 */ 630 #define OB_PCROP_SECTOR_11 0x00000800U /*!< PC Read/Write protection of Sector11 */ 631 #define OB_PCROP_SECTOR_12 0x00001000U /*!< PC Read/Write protection of Sector12 */ 632 #define OB_PCROP_SECTOR_13 0x00002000U /*!< PC Read/Write protection of Sector13 */ 633 #define OB_PCROP_SECTOR_14 0x00004000U /*!< PC Read/Write protection of Sector14 */ 634 #define OB_PCROP_SECTOR_15 0x00004000U /*!< PC Read/Write protection of Sector15 */ 635 #define OB_PCROP_SECTOR_All 0x00007FFFU /*!< PC Read/Write protection of all Sectors */ 636 #endif /* STM32F413xx || STM32F423xx */ 637 /*-----------------------------------------------------------------------------------------------------*/ 638 639 /*--------------------------------------------- STM32F401xC -------------------------------------------*/ 640 #if defined(STM32F401xC) 641 #define OB_PCROP_SECTOR_0 0x00000001U /*!< PC Read/Write protection of Sector0 */ 642 #define OB_PCROP_SECTOR_1 0x00000002U /*!< PC Read/Write protection of Sector1 */ 643 #define OB_PCROP_SECTOR_2 0x00000004U /*!< PC Read/Write protection of Sector2 */ 644 #define OB_PCROP_SECTOR_3 0x00000008U /*!< PC Read/Write protection of Sector3 */ 645 #define OB_PCROP_SECTOR_4 0x00000010U /*!< PC Read/Write protection of Sector4 */ 646 #define OB_PCROP_SECTOR_5 0x00000020U /*!< PC Read/Write protection of Sector5 */ 647 #define OB_PCROP_SECTOR_All 0x00000FFFU /*!< PC Read/Write protection of all Sectors */ 648 #endif /* STM32F401xC */ 649 /*-----------------------------------------------------------------------------------------------------*/ 650 651 /*--------------------------------------------- STM32F410xx -------------------------------------------*/ 652 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) 653 #define OB_PCROP_SECTOR_0 0x00000001U /*!< PC Read/Write protection of Sector0 */ 654 #define OB_PCROP_SECTOR_1 0x00000002U /*!< PC Read/Write protection of Sector1 */ 655 #define OB_PCROP_SECTOR_2 0x00000004U /*!< PC Read/Write protection of Sector2 */ 656 #define OB_PCROP_SECTOR_3 0x00000008U /*!< PC Read/Write protection of Sector3 */ 657 #define OB_PCROP_SECTOR_4 0x00000010U /*!< PC Read/Write protection of Sector4 */ 658 #define OB_PCROP_SECTOR_All 0x00000FFFU /*!< PC Read/Write protection of all Sectors */ 659 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */ 660 /*-----------------------------------------------------------------------------------------------------*/ 661 662 /*-------------- STM32F401xE/STM32F411xE/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx/STM32F446xx --*/ 663 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\ 664 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) 665 #define OB_PCROP_SECTOR_0 0x00000001U /*!< PC Read/Write protection of Sector0 */ 666 #define OB_PCROP_SECTOR_1 0x00000002U /*!< PC Read/Write protection of Sector1 */ 667 #define OB_PCROP_SECTOR_2 0x00000004U /*!< PC Read/Write protection of Sector2 */ 668 #define OB_PCROP_SECTOR_3 0x00000008U /*!< PC Read/Write protection of Sector3 */ 669 #define OB_PCROP_SECTOR_4 0x00000010U /*!< PC Read/Write protection of Sector4 */ 670 #define OB_PCROP_SECTOR_5 0x00000020U /*!< PC Read/Write protection of Sector5 */ 671 #define OB_PCROP_SECTOR_6 0x00000040U /*!< PC Read/Write protection of Sector6 */ 672 #define OB_PCROP_SECTOR_7 0x00000080U /*!< PC Read/Write protection of Sector7 */ 673 #define OB_PCROP_SECTOR_All 0x00000FFFU /*!< PC Read/Write protection of all Sectors */ 674 #endif /* STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ 675 /*-----------------------------------------------------------------------------------------------------*/ 676 677 /** 678 * @} 679 */ 680 681 /** @defgroup FLASHEx_Dual_Boot FLASH Dual Boot 682 * @{ 683 */ 684 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\ 685 defined(STM32F469xx) || defined(STM32F479xx) 686 #define OB_DUAL_BOOT_ENABLE ((uint8_t)0x10) /*!< Dual Bank Boot Enable */ 687 #define OB_DUAL_BOOT_DISABLE ((uint8_t)0x00) /*!< Dual Bank Boot Disable, always boot on User Flash */ 688 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */ 689 /** 690 * @} 691 */ 692 693 /** @defgroup FLASHEx_Selection_Protection_Mode FLASH Selection Protection Mode 694 * @{ 695 */ 696 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ 697 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\ 698 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\ 699 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\ 700 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) 701 #define OB_PCROP_DESELECTED ((uint8_t)0x00) /*!< Disabled PcROP, nWPRi bits used for Write Protection on sector i */ 702 #define OB_PCROP_SELECTED ((uint8_t)0x80) /*!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i */ 703 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\ 704 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\ 705 STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ 706 /** 707 * @} 708 */ 709 710 /** 711 * @} 712 */ 713 714 /* Exported macro ------------------------------------------------------------*/ 715 716 /* Exported functions --------------------------------------------------------*/ 717 /** @addtogroup FLASHEx_Exported_Functions 718 * @{ 719 */ 720 721 /** @addtogroup FLASHEx_Exported_Functions_Group1 722 * @{ 723 */ 724 /* Extension Program operation functions *************************************/ 725 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError); 726 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); 727 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); 728 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); 729 730 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ 731 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\ 732 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\ 733 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\ 734 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) 735 HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit); 736 void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit); 737 HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void); 738 HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void); 739 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\ 740 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\ 741 STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ 742 743 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\ 744 defined(STM32F469xx) || defined(STM32F479xx) 745 uint16_t HAL_FLASHEx_OB_GetBank2WRP(void); 746 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */ 747 /** 748 * @} 749 */ 750 751 /** 752 * @} 753 */ 754 /* Private types -------------------------------------------------------------*/ 755 /* Private variables ---------------------------------------------------------*/ 756 /* Private constants ---------------------------------------------------------*/ 757 /** @defgroup FLASHEx_Private_Constants FLASH Private Constants 758 * @{ 759 */ 760 /*--------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx---------------------*/ 761 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) 762 #define FLASH_SECTOR_TOTAL 24U 763 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ 764 765 /*-------------------------------------- STM32F413xx/STM32F423xx ---------------------------------------*/ 766 #if defined(STM32F413xx) || defined(STM32F423xx) 767 #define FLASH_SECTOR_TOTAL 16U 768 #endif /* STM32F413xx || STM32F423xx */ 769 770 /*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/ 771 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\ 772 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) 773 #define FLASH_SECTOR_TOTAL 12U 774 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ 775 776 /*--------------------------------------------- STM32F401xC -------------------------------------------*/ 777 #if defined(STM32F401xC) 778 #define FLASH_SECTOR_TOTAL 6U 779 #endif /* STM32F401xC */ 780 781 /*--------------------------------------------- STM32F410xx -------------------------------------------*/ 782 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) 783 #define FLASH_SECTOR_TOTAL 5U 784 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */ 785 786 /*--------------------------------- STM32F401xE/STM32F411xE/STM32F412xG/STM32F446xx -------------------*/ 787 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) 788 #define FLASH_SECTOR_TOTAL 8U 789 #endif /* STM32F401xE || STM32F411xE || STM32F446xx */ 790 791 /** 792 * @brief OPTCR1 register byte 2 (Bits[23:16]) base address 793 */ 794 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) 795 #define OPTCR1_BYTE2_ADDRESS 0x40023C1AU 796 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ 797 798 /** 799 * @} 800 */ 801 802 /* Private macros ------------------------------------------------------------*/ 803 /** @defgroup FLASHEx_Private_Macros FLASH Private Macros 804 * @{ 805 */ 806 807 /** @defgroup FLASHEx_IS_FLASH_Definitions FLASH Private macros to check input parameters 808 * @{ 809 */ 810 811 #define IS_FLASH_TYPEERASE(VALUE)(((VALUE) == FLASH_TYPEERASE_SECTORS) || \ 812 ((VALUE) == FLASH_TYPEERASE_MASSERASE)) 813 814 #define IS_VOLTAGERANGE(RANGE)(((RANGE) == FLASH_VOLTAGE_RANGE_1) || \ 815 ((RANGE) == FLASH_VOLTAGE_RANGE_2) || \ 816 ((RANGE) == FLASH_VOLTAGE_RANGE_3) || \ 817 ((RANGE) == FLASH_VOLTAGE_RANGE_4)) 818 819 #define IS_WRPSTATE(VALUE)(((VALUE) == OB_WRPSTATE_DISABLE) || \ 820 ((VALUE) == OB_WRPSTATE_ENABLE)) 821 822 #define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR))) 823 824 #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\ 825 ((LEVEL) == OB_RDP_LEVEL_1) ||\ 826 ((LEVEL) == OB_RDP_LEVEL_2)) 827 828 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) 829 830 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) 831 832 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) 833 834 #define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\ 835 ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF)) 836 837 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ 838 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\ 839 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\ 840 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\ 841 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) 842 #define IS_PCROPSTATE(VALUE)(((VALUE) == OB_PCROP_STATE_DISABLE) || \ 843 ((VALUE) == OB_PCROP_STATE_ENABLE)) 844 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\ 845 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\ 846 STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ 847 848 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ 849 defined(STM32F469xx) || defined(STM32F479xx) 850 #define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP) || \ 851 ((VALUE) == OPTIONBYTE_BOOTCONFIG)) 852 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ 853 854 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\ 855 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\ 856 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\ 857 defined(STM32F423xx) 858 #define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP)) 859 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx ||\ 860 STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ 861 862 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\ 863 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) 864 #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \ 865 ((LATENCY) == FLASH_LATENCY_1) || \ 866 ((LATENCY) == FLASH_LATENCY_2) || \ 867 ((LATENCY) == FLASH_LATENCY_3) || \ 868 ((LATENCY) == FLASH_LATENCY_4) || \ 869 ((LATENCY) == FLASH_LATENCY_5) || \ 870 ((LATENCY) == FLASH_LATENCY_6) || \ 871 ((LATENCY) == FLASH_LATENCY_7) || \ 872 ((LATENCY) == FLASH_LATENCY_8) || \ 873 ((LATENCY) == FLASH_LATENCY_9) || \ 874 ((LATENCY) == FLASH_LATENCY_10) || \ 875 ((LATENCY) == FLASH_LATENCY_11) || \ 876 ((LATENCY) == FLASH_LATENCY_12) || \ 877 ((LATENCY) == FLASH_LATENCY_13) || \ 878 ((LATENCY) == FLASH_LATENCY_14) || \ 879 ((LATENCY) == FLASH_LATENCY_15)) 880 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */ 881 882 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ 883 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\ 884 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\ 885 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) 886 #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \ 887 ((LATENCY) == FLASH_LATENCY_1) || \ 888 ((LATENCY) == FLASH_LATENCY_2) || \ 889 ((LATENCY) == FLASH_LATENCY_3) || \ 890 ((LATENCY) == FLASH_LATENCY_4) || \ 891 ((LATENCY) == FLASH_LATENCY_5) || \ 892 ((LATENCY) == FLASH_LATENCY_6) || \ 893 ((LATENCY) == FLASH_LATENCY_7)) 894 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F412Zx || STM32F412Vx ||\ 895 STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ 896 897 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) 898 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ 899 ((BANK) == FLASH_BANK_2) || \ 900 ((BANK) == FLASH_BANK_BOTH)) 901 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */ 902 903 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ 904 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\ 905 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\ 906 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\ 907 defined(STM32F423xx) 908 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1)) 909 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx ||\ 910 STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ 911 912 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) 913 #define IS_FLASH_SECTOR(SECTOR) ( ((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ 914 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ 915 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ 916 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\ 917 ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\ 918 ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11) ||\ 919 ((SECTOR) == FLASH_SECTOR_12) || ((SECTOR) == FLASH_SECTOR_13) ||\ 920 ((SECTOR) == FLASH_SECTOR_14) || ((SECTOR) == FLASH_SECTOR_15) ||\ 921 ((SECTOR) == FLASH_SECTOR_16) || ((SECTOR) == FLASH_SECTOR_17) ||\ 922 ((SECTOR) == FLASH_SECTOR_18) || ((SECTOR) == FLASH_SECTOR_19) ||\ 923 ((SECTOR) == FLASH_SECTOR_20) || ((SECTOR) == FLASH_SECTOR_21) ||\ 924 ((SECTOR) == FLASH_SECTOR_22) || ((SECTOR) == FLASH_SECTOR_23)) 925 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ 926 927 #if defined(STM32F413xx) || defined(STM32F423xx) 928 #define IS_FLASH_SECTOR(SECTOR) ( ((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ 929 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ 930 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ 931 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\ 932 ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\ 933 ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11) ||\ 934 ((SECTOR) == FLASH_SECTOR_12) || ((SECTOR) == FLASH_SECTOR_13) ||\ 935 ((SECTOR) == FLASH_SECTOR_14) || ((SECTOR) == FLASH_SECTOR_15)) 936 #endif /* STM32F413xx || STM32F423xx */ 937 938 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\ 939 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) 940 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ 941 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ 942 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ 943 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\ 944 ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\ 945 ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11)) 946 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ 947 948 #if defined(STM32F401xC) 949 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ 950 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ 951 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5)) 952 #endif /* STM32F401xC */ 953 954 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) 955 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ 956 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ 957 ((SECTOR) == FLASH_SECTOR_4)) 958 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */ 959 960 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) 961 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ 962 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ 963 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ 964 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7)) 965 #endif /* STM32F401xE || STM32F411xE || STM32F446xx */ 966 967 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_END)) || \ 968 (((ADDRESS) >= FLASH_OTP_BASE) && ((ADDRESS) <= FLASH_OTP_END))) 969 970 #define IS_FLASH_NBSECTORS(NBSECTORS) (((NBSECTORS) != 0) && ((NBSECTORS) <= FLASH_SECTOR_TOTAL)) 971 972 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) 973 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFF000000U) == 0x00000000U) && ((SECTOR) != 0x00000000U)) 974 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ 975 976 #if defined(STM32F413xx) || defined(STM32F423xx) 977 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFF8000U) == 0x00000000U) && ((SECTOR) != 0x00000000U)) 978 #endif /* STM32F413xx || STM32F423xx */ 979 980 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) 981 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U)) 982 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ 983 984 #if defined(STM32F401xC) 985 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U)) 986 #endif /* STM32F401xC */ 987 988 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) 989 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U)) 990 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */ 991 992 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\ 993 defined(STM32F412Rx) || defined(STM32F412Cx) 994 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U)) 995 #endif /* STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ 996 997 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) 998 #define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U)) 999 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ 1000 1001 #if defined(STM32F413xx) || defined(STM32F423xx) 1002 #define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFF8000U) == 0x00000000U) && ((SECTOR) != 0x00000000U)) 1003 #endif /* STM32F413xx || STM32F423xx */ 1004 1005 #if defined(STM32F401xC) 1006 #define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U)) 1007 #endif /* STM32F401xC */ 1008 1009 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) 1010 #define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U)) 1011 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */ 1012 1013 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\ 1014 defined(STM32F412Rx) || defined(STM32F412Cx) 1015 #define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U)) 1016 #endif /* STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ 1017 1018 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ 1019 defined(STM32F469xx) || defined(STM32F479xx) 1020 #define IS_OB_BOOT(BOOT) (((BOOT) == OB_DUAL_BOOT_ENABLE) || ((BOOT) == OB_DUAL_BOOT_DISABLE)) 1021 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ 1022 1023 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ 1024 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\ 1025 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\ 1026 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\ 1027 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) 1028 #define IS_OB_PCROP_SELECT(PCROP) (((PCROP) == OB_PCROP_SELECTED) || ((PCROP) == OB_PCROP_DESELECTED)) 1029 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\ 1030 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\ 1031 STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ 1032 /** 1033 * @} 1034 */ 1035 1036 /** 1037 * @} 1038 */ 1039 1040 /* Private functions ---------------------------------------------------------*/ 1041 /** @defgroup FLASHEx_Private_Functions FLASH Private Functions 1042 * @{ 1043 */ 1044 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange); 1045 void FLASH_FlushCaches(void); 1046 /** 1047 * @} 1048 */ 1049 1050 /** 1051 * @} 1052 */ 1053 1054 /** 1055 * @} 1056 */ 1057 1058 #ifdef __cplusplus 1059 } 1060 #endif 1061 1062 #endif /* __STM32F4xx_HAL_FLASH_EX_H */ 1063 1064
