1 /** 2 ****************************************************************************** 3 * @file stm32f0xx_hal_dac.h 4 * @author MCD Application Team 5 * @brief Header file of DAC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32F0xx_HAL_DAC_H 21 #define STM32F0xx_HAL_DAC_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /** @addtogroup STM32F0xx_HAL_Driver 28 * @{ 29 */ 30 31 #if defined (DAC1) 32 33 /* Includes ------------------------------------------------------------------*/ 34 #include "stm32f0xx_hal_def.h" 35 36 /** @addtogroup DAC 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 42 /** @defgroup DAC_Exported_Types DAC Exported Types 43 * @{ 44 */ 45 46 /** 47 * @brief HAL State structures definition 48 */ 49 typedef enum 50 { 51 HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */ 52 HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */ 53 HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */ 54 HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */ 55 HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */ 56 57 }HAL_DAC_StateTypeDef; 58 59 /** 60 * @brief DAC handle Structure definition 61 */ 62 typedef struct __DAC_HandleTypeDef 63 { 64 DAC_TypeDef *Instance; /*!< Register base address */ 65 66 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ 67 68 HAL_LockTypeDef Lock; /*!< DAC locking object */ 69 70 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ 71 72 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ 73 74 __IO uint32_t ErrorCode; /*!< DAC Error code */ 75 76 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 77 void (* ConvCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 78 void (* ConvHalfCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 79 void (* ErrorCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 80 void (* DMAUnderrunCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 81 void (* ConvCpltCallbackCh2) (struct __DAC_HandleTypeDef* hdac); 82 void (* ConvHalfCpltCallbackCh2) (struct __DAC_HandleTypeDef* hdac); 83 void (* ErrorCallbackCh2) (struct __DAC_HandleTypeDef* hdac); 84 void (* DMAUnderrunCallbackCh2) (struct __DAC_HandleTypeDef* hdac); 85 86 void (* MspInitCallback) (struct __DAC_HandleTypeDef *hdac); 87 void (* MspDeInitCallback ) (struct __DAC_HandleTypeDef *hdac); 88 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 89 90 }DAC_HandleTypeDef; 91 92 /** 93 * @brief DAC Configuration regular Channel structure definition 94 */ 95 typedef struct 96 { 97 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. 98 This parameter can be a value of @ref DAC_trigger_selection */ 99 100 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. 101 This parameter can be a value of @ref DAC_output_buffer */ 102 103 }DAC_ChannelConfTypeDef; 104 105 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 106 /** 107 * @brief HAL DAC Callback ID enumeration definition 108 */ 109 typedef enum 110 { 111 HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /*!< DAC CH1 Complete Callback ID */ 112 HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /*!< DAC CH1 half Complete Callback ID */ 113 HAL_DAC_CH1_ERROR_ID = 0x02U, /*!< DAC CH1 error Callback ID */ 114 HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /*!< DAC CH1 underrun Callback ID */ 115 HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U, /*!< DAC CH2 Complete Callback ID */ 116 HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U, /*!< DAC CH2 half Complete Callback ID */ 117 HAL_DAC_CH2_ERROR_ID = 0x06U, /*!< DAC CH2 error Callback ID */ 118 HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U, /*!< DAC CH2 underrun Callback ID */ 119 HAL_DAC_MSPINIT_CB_ID = 0x08U, /*!< DAC MspInit Callback ID */ 120 HAL_DAC_MSPDEINIT_CB_ID = 0x09U, /*!< DAC MspDeInit Callback ID */ 121 HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */ 122 } HAL_DAC_CallbackIDTypeDef; 123 124 /** 125 * @brief HAL DAC Callback pointer definition 126 */ 127 typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac); 128 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 129 130 /** 131 * @} 132 */ 133 134 /* Exported constants --------------------------------------------------------*/ 135 136 /** @defgroup DAC_Exported_Constants DAC Exported Constants 137 * @{ 138 */ 139 140 /** @defgroup DAC_Error_Code DAC Error Code 141 * @{ 142 */ 143 #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */ 144 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */ 145 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DMA underrun error */ 146 #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */ 147 #define HAL_DAC_ERROR_TIMEOUT 0x08U /*!< Timeout error */ 148 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 149 #define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /*!< Invalid callback error */ 150 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 151 /** 152 * @} 153 */ 154 155 /** @defgroup DAC_output_buffer DAC output buffer 156 * @{ 157 */ 158 #define DAC_OUTPUTBUFFER_ENABLE (0x00000000U) 159 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1) 160 161 /** 162 * @} 163 */ 164 165 /** @defgroup DAC_data_alignment DAC data alignment 166 * @{ 167 */ 168 #define DAC_ALIGN_12B_R (0x00000000U) 169 #define DAC_ALIGN_12B_L (0x00000004U) 170 #define DAC_ALIGN_8B_R (0x00000008U) 171 172 /** 173 * @} 174 */ 175 176 /** @defgroup DAC_flags_definition DAC flags definition 177 * @{ 178 */ 179 #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) 180 #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) 181 /** 182 * @} 183 */ 184 185 /** @defgroup DAC_IT_definition DAC IT definition 186 * @{ 187 */ 188 #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) 189 #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) 190 /** 191 * @} 192 */ 193 194 /** 195 * @} 196 */ 197 198 /* Exported macro ------------------------------------------------------------*/ 199 200 /** @defgroup DAC_Exported_Macros DAC Exported Macros 201 * @{ 202 */ 203 204 /** @brief Reset DAC handle state 205 * @param __HANDLE__ specifies the DAC handle. 206 * @retval None 207 */ 208 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 209 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \ 210 (__HANDLE__)->State = HAL_DAC_STATE_RESET; \ 211 (__HANDLE__)->MspInitCallback = NULL; \ 212 (__HANDLE__)->MspDeInitCallback = NULL; \ 213 } while(0) 214 #else 215 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) 216 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 217 218 /** @brief Enable the DAC channel 219 * @param __HANDLE__ specifies the DAC handle. 220 * @param __DAC_Channel__ specifies the DAC channel 221 * @retval None 222 */ 223 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ 224 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__))) 225 226 /** @brief Disable the DAC channel 227 * @param __HANDLE__ specifies the DAC handle 228 * @param __DAC_Channel__ specifies the DAC channel. 229 * @retval None 230 */ 231 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ 232 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__))) 233 234 /** @brief Enable the DAC interrupt 235 * @param __HANDLE__ specifies the DAC handle 236 * @param __INTERRUPT__ specifies the DAC interrupt. 237 * This parameter can be any combination of the following values: 238 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 239 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 240 * @retval None 241 */ 242 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) 243 244 /** @brief Disable the DAC interrupt 245 * @param __HANDLE__ specifies the DAC handle 246 * @param __INTERRUPT__ specifies the DAC interrupt. 247 * This parameter can be any combination of the following values: 248 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 249 * @retval None 250 */ 251 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) 252 253 /** @brief Check whether the specified DAC interrupt source is enabled or not 254 * @param __HANDLE__ DAC handle 255 * @param __INTERRUPT__ DAC interrupt source to check 256 * This parameter can be any combination of the following values: 257 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 258 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 259 * @retval State of interruption (SET or RESET) 260 */ 261 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) 262 263 /** @brief Get the selected DAC's flag status 264 * @param __HANDLE__ specifies the DAC handle. 265 * @param __FLAG__ specifies the DAC flag to get. 266 * This parameter can be any combination of the following values: 267 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag 268 * @retval None 269 */ 270 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 271 272 /** @brief Clear the DAC's flag 273 * @param __HANDLE__ specifies the DAC handle. 274 * @param __FLAG__ specifies the DAC flag to clear. 275 * This parameter can be any combination of the following values: 276 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag 277 * @retval None 278 */ 279 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) 280 281 /** 282 * @} 283 */ 284 285 /* Private macro -------------------------------------------------------------*/ 286 287 /** @addtogroup DAC_Private_Macros 288 * @{ 289 */ 290 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ 291 ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) 292 293 294 #if defined(DAC_CHANNEL2_SUPPORT) 295 296 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ 297 ((CHANNEL) == DAC_CHANNEL_2)) 298 299 #else 300 301 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1)) 302 303 #endif /* DAC_CHANNEL2_SUPPORT */ 304 305 306 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ 307 ((ALIGN) == DAC_ALIGN_12B_L) || \ 308 ((ALIGN) == DAC_ALIGN_8B_R)) 309 310 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U) 311 312 /** @brief Set DHR12R1 alignment 313 * @param __ALIGNMENT__ specifies the DAC alignment 314 * @retval None 315 */ 316 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) ((0x00000008U) + (__ALIGNMENT__)) 317 318 /** @brief Set DHR12R2 alignment 319 * @param __ALIGNMENT__ specifies the DAC alignment 320 * @retval None 321 */ 322 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) ((0x00000014U) + (__ALIGNMENT__)) 323 324 /** @brief Set DHR12RD alignment 325 * @param __ALIGNMENT__ specifies the DAC alignment 326 * @retval None 327 */ 328 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) ((0x00000020U) + (__ALIGNMENT__)) 329 330 /** 331 * @} 332 */ 333 334 /* Include DAC HAL Extension module */ 335 #include "stm32f0xx_hal_dac_ex.h" 336 337 /* Exported functions --------------------------------------------------------*/ 338 339 /** @addtogroup DAC_Exported_Functions 340 * @{ 341 */ 342 343 /** @addtogroup DAC_Exported_Functions_Group1 344 * @{ 345 */ 346 /* Initialization and de-initialization functions *****************************/ 347 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac); 348 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac); 349 void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac); 350 void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac); 351 352 /** 353 * @} 354 */ 355 356 /** @addtogroup DAC_Exported_Functions_Group2 357 * @{ 358 */ 359 /* IO operation functions *****************************************************/ 360 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel); 361 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel); 362 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment); 363 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel); 364 365 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac); 366 367 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); 368 369 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac); 370 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac); 371 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); 372 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); 373 374 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 375 /* DAC callback registering/unregistering */ 376 HAL_StatusTypeDef HAL_DAC_RegisterCallback (DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackId, pDAC_CallbackTypeDef pCallback); 377 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback (DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackId); 378 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 379 380 /** 381 * @} 382 */ 383 384 /** @addtogroup DAC_Exported_Functions_Group3 385 * @{ 386 */ 387 /* Peripheral Control functions ***********************************************/ 388 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel); 389 390 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel); 391 /** 392 * @} 393 */ 394 395 /** @addtogroup DAC_Exported_Functions_Group4 396 * @{ 397 */ 398 /* Peripheral State and Error functions ***************************************/ 399 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac); 400 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); 401 402 /** 403 * @} 404 */ 405 406 /** 407 * @} 408 */ 409 410 /** 411 * @} 412 */ 413 414 #endif /* DAC1 */ 415 416 /** 417 * @} 418 */ 419 420 #ifdef __cplusplus 421 } 422 #endif 423 424 425 #endif /* STM32F0xx_HAL_DAC_H */ 426 427 428
