1 /**
2 ******************************************************************************
3 * @file stm32wlxx_ll_rng.h
4 * @author MCD Application Team
5 * @brief Header file of RNG LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2020 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32WLxx_LL_RNG_H
21 #define STM32WLxx_LL_RNG_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32wlxx.h"
29
30 /** @addtogroup STM32WLxx_LL_Driver
31 * @{
32 */
33
34 #if defined (RNG)
35
36 /** @defgroup RNG_LL RNG
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /* Private macros ------------------------------------------------------------*/
44
45 /* Exported types ------------------------------------------------------------*/
46 #if defined(USE_FULL_LL_DRIVER)
47 /** @defgroup RNG_LL_ES_Init_Struct RNG Exported Init structures
48 * @{
49 */
50
51
52 /**
53 * @brief LL RNG Init Structure Definition
54 */
55 typedef struct
56 {
57 uint32_t ClockErrorDetection; /*!< Clock error detection.
58 This parameter can be one value of @ref RNG_LL_CED.
59 This parameter can be modified using unitary
60 functions @ref LL_RNG_EnableClkErrorDetect(). */
61 } LL_RNG_InitTypeDef;
62
63 /**
64 * @}
65 */
66 #endif /* USE_FULL_LL_DRIVER */
67 /* Exported constants --------------------------------------------------------*/
68 /** @defgroup RNG_LL_Exported_Constants RNG Exported Constants
69 * @{
70 */
71
72 /** @defgroup RNG_LL_CED Clock Error Detection
73 * @{
74 */
75 #define LL_RNG_CED_ENABLE 0x00000000U /*!< Clock error detection enabled */
76 #define LL_RNG_CED_DISABLE RNG_CR_CED /*!< Clock error detection disabled */
77 /**
78 * @}
79 */
80
81 /** @defgroup RNG_LL_Clock_Divider_Factor Value used to configure an internal
82 * programmable divider acting on the incoming RNG clock
83 * @{
84 */
85 #define LL_RNG_CLKDIV_BY_1 (0x00000000UL) /*!< No clock division */
86 #define LL_RNG_CLKDIV_BY_2 (RNG_CR_CLKDIV_0) /*!< 2 RNG clock cycles per internal RNG clock */
87 #define LL_RNG_CLKDIV_BY_4 (RNG_CR_CLKDIV_1) /*!< 4 RNG clock cycles per internal RNG clock */
88 #define LL_RNG_CLKDIV_BY_8 (RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0) /*!< 8 RNG clock cycles per internal RNG clock */
89 #define LL_RNG_CLKDIV_BY_16 (RNG_CR_CLKDIV_2) /*!< 16 RNG clock cycles per internal RNG clock */
90 #define LL_RNG_CLKDIV_BY_32 (RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_0) /*!< 32 RNG clock cycles per internal RNG clock */
91 #define LL_RNG_CLKDIV_BY_64 (RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1) /*!< 64 RNG clock cycles per internal RNG clock */
92 #define LL_RNG_CLKDIV_BY_128 (RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0) /*!< 128 RNG clock cycles per internal RNG clock */
93 #define LL_RNG_CLKDIV_BY_256 (RNG_CR_CLKDIV_3) /*!< 256 RNG clock cycles per internal RNG clock */
94 #define LL_RNG_CLKDIV_BY_512 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_0) /*!< 512 RNG clock cycles per internal RNG clock */
95 #define LL_RNG_CLKDIV_BY_1024 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_1) /*!< 1024 RNG clock cycles per internal RNG clock */
96 #define LL_RNG_CLKDIV_BY_2048 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0) /*!< 2048 RNG clock cycles per internal RNG clock */
97 #define LL_RNG_CLKDIV_BY_4096 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2) /*!< 4096 RNG clock cycles per internal RNG clock */
98 #define LL_RNG_CLKDIV_BY_8192 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_0) /*!< 8192 RNG clock cycles per internal RNG clock */
99 #define LL_RNG_CLKDIV_BY_16384 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1) /*!< 16384 RNG clock cycles per internal RNG clock */
100 #define LL_RNG_CLKDIV_BY_32768 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0) /*!< 32768 RNG clock cycles per internal RNG clock */
101 /**
102 * @}
103 */
104
105 /** @defgroup RNG_LL_NIST_Compliance NIST Compliance configuration
106 * @{
107 */
108 #define LL_RNG_NIST_COMPLIANT (0x00000000UL) /*!< Default NIST compliant configuration*/
109 #define LL_RNG_CUSTOM_NIST (RNG_CR_NISTC) /*!< Custom NIST configuration */
110
111 /**
112 * @}
113 */
114
115 /** @defgroup RNG_LL_EC_GET_FLAG Get Flags Defines
116 * @brief Flags defines which can be used with LL_RNG_ReadReg function
117 * @{
118 */
119 #define LL_RNG_SR_DRDY RNG_SR_DRDY /*!< Register contains valid random data */
120 #define LL_RNG_SR_CECS RNG_SR_CECS /*!< Clock error current status */
121 #define LL_RNG_SR_SECS RNG_SR_SECS /*!< Seed error current status */
122 #define LL_RNG_SR_CEIS RNG_SR_CEIS /*!< Clock error interrupt status */
123 #define LL_RNG_SR_SEIS RNG_SR_SEIS /*!< Seed error interrupt status */
124 /**
125 * @}
126 */
127
128 /** @defgroup RNG_LL_EC_IT IT Defines
129 * @brief IT defines which can be used with LL_RNG_ReadReg and LL_RNG_WriteReg macros
130 * @{
131 */
132 #define LL_RNG_CR_IE RNG_CR_IE /*!< RNG Interrupt enable */
133 /**
134 * @}
135 */
136
137 /**
138 * @}
139 */
140
141 /* Exported macro ------------------------------------------------------------*/
142 /** @defgroup RNG_LL_Exported_Macros RNG Exported Macros
143 * @{
144 */
145
146 /** @defgroup RNG_LL_EM_WRITE_READ Common Write and read registers Macros
147 * @{
148 */
149
150 /**
151 * @brief Write a value in RNG register
152 * @param __INSTANCE__ RNG Instance
153 * @param __REG__ Register to be written
154 * @param __VALUE__ Value to be written in the register
155 * @retval None
156 */
157 #define LL_RNG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
158
159 /**
160 * @brief Read a value in RNG register
161 * @param __INSTANCE__ RNG Instance
162 * @param __REG__ Register to be read
163 * @retval Register value
164 */
165 #define LL_RNG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
166 /**
167 * @}
168 */
169
170 /**
171 * @}
172 */
173
174
175 /* Exported functions --------------------------------------------------------*/
176 /** @defgroup RNG_LL_Exported_Functions RNG Exported Functions
177 * @{
178 */
179 /** @defgroup RNG_LL_EF_Configuration RNG Configuration functions
180 * @{
181 */
182
183 /**
184 * @brief Enable Random Number Generation
185 * @rmtoll CR RNGEN LL_RNG_Enable
186 * @param RNGx RNG Instance
187 * @retval None
188 */
LL_RNG_Enable(RNG_TypeDef * RNGx)189 __STATIC_INLINE void LL_RNG_Enable(RNG_TypeDef *RNGx)
190 {
191 SET_BIT(RNGx->CR, RNG_CR_RNGEN);
192 }
193
194 /**
195 * @brief Disable Random Number Generation
196 * @rmtoll CR RNGEN LL_RNG_Disable
197 * @param RNGx RNG Instance
198 * @retval None
199 */
LL_RNG_Disable(RNG_TypeDef * RNGx)200 __STATIC_INLINE void LL_RNG_Disable(RNG_TypeDef *RNGx)
201 {
202 CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN);
203 }
204
205 /**
206 * @brief Check if Random Number Generator is enabled
207 * @rmtoll CR RNGEN LL_RNG_IsEnabled
208 * @param RNGx RNG Instance
209 * @retval State of bit (1 or 0).
210 */
LL_RNG_IsEnabled(RNG_TypeDef * RNGx)211 __STATIC_INLINE uint32_t LL_RNG_IsEnabled(RNG_TypeDef *RNGx)
212 {
213 return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL);
214 }
215
216 /**
217 * @brief Enable Clock Error Detection
218 * @rmtoll CR CED LL_RNG_EnableClkErrorDetect
219 * @param RNGx RNG Instance
220 * @retval None
221 */
LL_RNG_EnableClkErrorDetect(RNG_TypeDef * RNGx)222 __STATIC_INLINE void LL_RNG_EnableClkErrorDetect(RNG_TypeDef *RNGx)
223 {
224 CLEAR_BIT(RNGx->CR, RNG_CR_CED);
225 }
226
227 /**
228 * @brief Disable RNG Clock Error Detection
229 * @rmtoll CR CED LL_RNG_DisableClkErrorDetect
230 * @param RNGx RNG Instance
231 * @retval None
232 */
LL_RNG_DisableClkErrorDetect(RNG_TypeDef * RNGx)233 __STATIC_INLINE void LL_RNG_DisableClkErrorDetect(RNG_TypeDef *RNGx)
234 {
235 SET_BIT(RNGx->CR, RNG_CR_CED);
236 }
237
238 /**
239 * @brief Check if RNG Clock Error Detection is enabled
240 * @rmtoll CR CED LL_RNG_IsEnabledClkErrorDetect
241 * @param RNGx RNG Instance
242 * @retval State of bit (1 or 0).
243 */
LL_RNG_IsEnabledClkErrorDetect(RNG_TypeDef * RNGx)244 __STATIC_INLINE uint32_t LL_RNG_IsEnabledClkErrorDetect(RNG_TypeDef *RNGx)
245 {
246 return ((READ_BIT(RNGx->CR, RNG_CR_CED) != (RNG_CR_CED)) ? 1UL : 0UL);
247 }
248
249 /**
250 * @brief Set RNG Conditioning Soft Reset bit
251 * @rmtoll CR CONDRST LL_RNG_EnableCondReset
252 * @param RNGx RNG Instance
253 * @retval None
254 */
LL_RNG_EnableCondReset(RNG_TypeDef * RNGx)255 __STATIC_INLINE void LL_RNG_EnableCondReset(RNG_TypeDef *RNGx)
256 {
257 SET_BIT(RNGx->CR, RNG_CR_CONDRST);
258 }
259
260 /**
261 * @brief Reset RNG Conditioning Soft Reset bit
262 * @rmtoll CR CONDRST LL_RNG_DisableCondReset
263 * @param RNGx RNG Instance
264 * @retval None
265 */
LL_RNG_DisableCondReset(RNG_TypeDef * RNGx)266 __STATIC_INLINE void LL_RNG_DisableCondReset(RNG_TypeDef *RNGx)
267 {
268 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
269 }
270
271 /**
272 * @brief Check if RNG Conditioning Soft Reset bit is set
273 * @rmtoll CR CONDRST LL_RNG_IsEnabledCondReset
274 * @param RNGx RNG Instance
275 * @retval State of bit (1 or 0).
276 */
LL_RNG_IsEnabledCondReset(RNG_TypeDef * RNGx)277 __STATIC_INLINE uint32_t LL_RNG_IsEnabledCondReset(RNG_TypeDef *RNGx)
278 {
279 return ((READ_BIT(RNGx->CR, RNG_CR_CONDRST) == (RNG_CR_CONDRST)) ? 1UL : 0UL);
280 }
281
282 /**
283 * @brief Enable RNG Config Lock
284 * @rmtoll CR CONFIGLOCK LL_RNG_ConfigLock
285 * @param RNGx RNG Instance
286 * @retval None
287 */
LL_RNG_ConfigLock(RNG_TypeDef * RNGx)288 __STATIC_INLINE void LL_RNG_ConfigLock(RNG_TypeDef *RNGx)
289 {
290 SET_BIT(RNGx->CR, RNG_CR_CONFIGLOCK);
291 }
292
293 /**
294 * @brief Check if RNG Config Lock is enabled
295 * @rmtoll CR CONFIGLOCK LL_RNG_IsConfigLocked
296 * @param RNGx RNG Instance
297 * @retval State of bit (1 or 0).
298 */
LL_RNG_IsConfigLocked(RNG_TypeDef * RNGx)299 __STATIC_INLINE uint32_t LL_RNG_IsConfigLocked(RNG_TypeDef *RNGx)
300 {
301 return ((READ_BIT(RNGx->CR, RNG_CR_CONFIGLOCK) == (RNG_CR_CONFIGLOCK)) ? 1UL : 0UL);
302 }
303
304 /**
305 * @brief Enable NIST Compliance
306 * @rmtoll CR NISTC LL_RNG_EnableNistCompliance
307 * @param RNGx RNG Instance
308 * @retval None
309 */
LL_RNG_EnableNistCompliance(RNG_TypeDef * RNGx)310 __STATIC_INLINE void LL_RNG_EnableNistCompliance(RNG_TypeDef *RNGx)
311 {
312 CLEAR_BIT(RNGx->CR, RNG_CR_NISTC);
313 }
314
315 /**
316 * @brief Disable NIST Compliance
317 * @rmtoll CR NISTC LL_RNG_DisableNistCompliance
318 * @param RNGx RNG Instance
319 * @retval None
320 */
LL_RNG_DisableNistCompliance(RNG_TypeDef * RNGx)321 __STATIC_INLINE void LL_RNG_DisableNistCompliance(RNG_TypeDef *RNGx)
322 {
323 SET_BIT(RNGx->CR, RNG_CR_NISTC);
324 }
325
326 /**
327 * @brief Check if NIST Compliance is enabled
328 * @rmtoll CR NISTC LL_RNG_IsEnabledNistCompliance
329 * @param RNGx RNG Instance
330 * @retval State of bit (1 or 0).
331 */
LL_RNG_IsEnabledNistCompliance(RNG_TypeDef * RNGx)332 __STATIC_INLINE uint32_t LL_RNG_IsEnabledNistCompliance(RNG_TypeDef *RNGx)
333 {
334 return ((READ_BIT(RNGx->CR, RNG_CR_NISTC) != (RNG_CR_NISTC)) ? 1UL : 0UL);
335 }
336
337 /**
338 * @brief Set RNG Config1 Configuration field value
339 * @rmtoll CR RNG_CONFIG1 LL_RNG_SetConfig1
340 * @param RNGx RNG Instance
341 * @param Config1 Value between 0 and 0x3F
342 * @retval None
343 */
LL_RNG_SetConfig1(RNG_TypeDef * RNGx,uint32_t Config1)344 __STATIC_INLINE void LL_RNG_SetConfig1(RNG_TypeDef *RNGx, uint32_t Config1)
345 {
346 MODIFY_REG(RNGx->CR, RNG_CR_RNG_CONFIG1, Config1 << RNG_CR_RNG_CONFIG1_Pos);
347 }
348
349 /**
350 * @brief Get RNG Config1 Configuration field value
351 * @rmtoll CR RNG_CONFIG1 LL_RNG_GetConfig1
352 * @param RNGx RNG Instance
353 * @retval Returned Value expressed on 6 bits : Value between 0 and 0x3F
354 */
LL_RNG_GetConfig1(RNG_TypeDef * RNGx)355 __STATIC_INLINE uint32_t LL_RNG_GetConfig1(RNG_TypeDef *RNGx)
356 {
357 return (uint32_t)(READ_BIT(RNGx->CR, RNG_CR_RNG_CONFIG1) >> RNG_CR_RNG_CONFIG1_Pos);
358 }
359
360 /**
361 * @brief Set RNG Config2 Configuration field value
362 * @rmtoll CR RNG_CONFIG2 LL_RNG_SetConfig2
363 * @param RNGx RNG Instance
364 * @param Config2 Value between 0 and 0x7
365 * @retval None
366 */
LL_RNG_SetConfig2(RNG_TypeDef * RNGx,uint32_t Config2)367 __STATIC_INLINE void LL_RNG_SetConfig2(RNG_TypeDef *RNGx, uint32_t Config2)
368 {
369 MODIFY_REG(RNGx->CR, RNG_CR_RNG_CONFIG2, Config2 << RNG_CR_RNG_CONFIG2_Pos);
370 }
371
372 /**
373 * @brief Get RNG Config2 Configuration field value
374 * @rmtoll CR RNG_CONFIG2 LL_RNG_GetConfig2
375 * @param RNGx RNG Instance
376 * @retval Returned Value expressed on 3 bits : Value between 0 and 0x7
377 */
LL_RNG_GetConfig2(RNG_TypeDef * RNGx)378 __STATIC_INLINE uint32_t LL_RNG_GetConfig2(RNG_TypeDef *RNGx)
379 {
380 return (uint32_t)(READ_BIT(RNGx->CR, RNG_CR_RNG_CONFIG2) >> RNG_CR_RNG_CONFIG2_Pos);
381 }
382
383 /**
384 * @brief Set RNG Config3 Configuration field value
385 * @rmtoll CR RNG_CONFIG3 LL_RNG_SetConfig3
386 * @param RNGx RNG Instance
387 * @param Config3 Value between 0 and 0xF
388 * @retval None
389 */
LL_RNG_SetConfig3(RNG_TypeDef * RNGx,uint32_t Config3)390 __STATIC_INLINE void LL_RNG_SetConfig3(RNG_TypeDef *RNGx, uint32_t Config3)
391 {
392 MODIFY_REG(RNGx->CR, RNG_CR_RNG_CONFIG3, Config3 << RNG_CR_RNG_CONFIG3_Pos);
393 }
394
395 /**
396 * @brief Get RNG Config3 Configuration field value
397 * @rmtoll CR RNG_CONFIG3 LL_RNG_GetConfig3
398 * @param RNGx RNG Instance
399 * @retval Returned Value expressed on 4 bits : Value between 0 and 0xF
400 */
LL_RNG_GetConfig3(RNG_TypeDef * RNGx)401 __STATIC_INLINE uint32_t LL_RNG_GetConfig3(RNG_TypeDef *RNGx)
402 {
403 return (uint32_t)(READ_BIT(RNGx->CR, RNG_CR_RNG_CONFIG3) >> RNG_CR_RNG_CONFIG3_Pos);
404 }
405
406 /**
407 * @brief Set RNG Clock divider factor
408 * @rmtoll CR CLKDIV LL_RNG_SetClockDivider
409 * @param RNGx RNG Instance
410 * @param Divider can be one of the following values:
411 * @arg @ref LL_RNG_CLKDIV_BY_1
412 * @arg @ref LL_RNG_CLKDIV_BY_2
413 * @arg @ref LL_RNG_CLKDIV_BY_4
414 * @arg @ref LL_RNG_CLKDIV_BY_8
415 * @arg @ref LL_RNG_CLKDIV_BY_16
416 * @arg @ref LL_RNG_CLKDIV_BY_32
417 * @arg @ref LL_RNG_CLKDIV_BY_64
418 * @arg @ref LL_RNG_CLKDIV_BY_128
419 * @arg @ref LL_RNG_CLKDIV_BY_256
420 * @arg @ref LL_RNG_CLKDIV_BY_512
421 * @arg @ref LL_RNG_CLKDIV_BY_1024
422 * @arg @ref LL_RNG_CLKDIV_BY_2048
423 * @arg @ref LL_RNG_CLKDIV_BY_4096
424 * @arg @ref LL_RNG_CLKDIV_BY_8192
425 * @arg @ref LL_RNG_CLKDIV_BY_16384
426 * @arg @ref LL_RNG_CLKDIV_BY_32768
427 * @retval None
428 */
LL_RNG_SetClockDivider(RNG_TypeDef * RNGx,uint32_t Divider)429 __STATIC_INLINE void LL_RNG_SetClockDivider(RNG_TypeDef *RNGx, uint32_t Divider)
430 {
431 MODIFY_REG(RNGx->CR, RNG_CR_CLKDIV, Divider << RNG_CR_CLKDIV_Pos);
432 }
433
434 /**
435 * @brief Get RNG Clock divider factor
436 * @rmtoll CR CLKDIV LL_RNG_GetClockDivider
437 * @param RNGx RNG Instance
438 * @retval Returned value can be one of the following values:
439 * @arg @ref LL_RNG_CLKDIV_BY_1
440 * @arg @ref LL_RNG_CLKDIV_BY_2
441 * @arg @ref LL_RNG_CLKDIV_BY_4
442 * @arg @ref LL_RNG_CLKDIV_BY_8
443 * @arg @ref LL_RNG_CLKDIV_BY_16
444 * @arg @ref LL_RNG_CLKDIV_BY_32
445 * @arg @ref LL_RNG_CLKDIV_BY_64
446 * @arg @ref LL_RNG_CLKDIV_BY_128
447 * @arg @ref LL_RNG_CLKDIV_BY_256
448 * @arg @ref LL_RNG_CLKDIV_BY_512
449 * @arg @ref LL_RNG_CLKDIV_BY_1024
450 * @arg @ref LL_RNG_CLKDIV_BY_2048
451 * @arg @ref LL_RNG_CLKDIV_BY_4096
452 * @arg @ref LL_RNG_CLKDIV_BY_8192
453 * @arg @ref LL_RNG_CLKDIV_BY_16384
454 * @arg @ref LL_RNG_CLKDIV_BY_32768
455 */
LL_RNG_GetClockDivider(RNG_TypeDef * RNGx)456 __STATIC_INLINE uint32_t LL_RNG_GetClockDivider(RNG_TypeDef *RNGx)
457 {
458 return (uint32_t)READ_BIT(RNGx->CR, RNG_CR_CLKDIV);
459 }
460 /**
461 * @}
462 */
463
464 /** @defgroup RNG_LL_EF_FLAG_Management FLAG Management
465 * @{
466 */
467
468 /**
469 * @brief Indicate if the RNG Data ready Flag is set or not
470 * @rmtoll SR DRDY LL_RNG_IsActiveFlag_DRDY
471 * @param RNGx RNG Instance
472 * @retval State of bit (1 or 0).
473 */
LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef * RNGx)474 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef *RNGx)
475 {
476 return ((READ_BIT(RNGx->SR, RNG_SR_DRDY) == (RNG_SR_DRDY)) ? 1UL : 0UL);
477 }
478
479 /**
480 * @brief Indicate if the Clock Error Current Status Flag is set or not
481 * @rmtoll SR CECS LL_RNG_IsActiveFlag_CECS
482 * @param RNGx RNG Instance
483 * @retval State of bit (1 or 0).
484 */
LL_RNG_IsActiveFlag_CECS(RNG_TypeDef * RNGx)485 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(RNG_TypeDef *RNGx)
486 {
487 return ((READ_BIT(RNGx->SR, RNG_SR_CECS) == (RNG_SR_CECS)) ? 1UL : 0UL);
488 }
489
490 /**
491 * @brief Indicate if the Seed Error Current Status Flag is set or not
492 * @rmtoll SR SECS LL_RNG_IsActiveFlag_SECS
493 * @param RNGx RNG Instance
494 * @retval State of bit (1 or 0).
495 */
LL_RNG_IsActiveFlag_SECS(RNG_TypeDef * RNGx)496 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(RNG_TypeDef *RNGx)
497 {
498 return ((READ_BIT(RNGx->SR, RNG_SR_SECS) == (RNG_SR_SECS)) ? 1UL : 0UL);
499 }
500
501 /**
502 * @brief Indicate if the Clock Error Interrupt Status Flag is set or not
503 * @rmtoll SR CEIS LL_RNG_IsActiveFlag_CEIS
504 * @param RNGx RNG Instance
505 * @retval State of bit (1 or 0).
506 */
LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef * RNGx)507 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef *RNGx)
508 {
509 return ((READ_BIT(RNGx->SR, RNG_SR_CEIS) == (RNG_SR_CEIS)) ? 1UL : 0UL);
510 }
511
512 /**
513 * @brief Indicate if the Seed Error Interrupt Status Flag is set or not
514 * @rmtoll SR SEIS LL_RNG_IsActiveFlag_SEIS
515 * @param RNGx RNG Instance
516 * @retval State of bit (1 or 0).
517 */
LL_RNG_IsActiveFlag_SEIS(RNG_TypeDef * RNGx)518 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SEIS(RNG_TypeDef *RNGx)
519 {
520 return ((READ_BIT(RNGx->SR, RNG_SR_SEIS) == (RNG_SR_SEIS)) ? 1UL : 0UL);
521 }
522
523 /**
524 * @brief Clear Clock Error interrupt Status (CEIS) Flag
525 * @rmtoll SR CEIS LL_RNG_ClearFlag_CEIS
526 * @param RNGx RNG Instance
527 * @retval None
528 */
LL_RNG_ClearFlag_CEIS(RNG_TypeDef * RNGx)529 __STATIC_INLINE void LL_RNG_ClearFlag_CEIS(RNG_TypeDef *RNGx)
530 {
531 WRITE_REG(RNGx->SR, ~RNG_SR_CEIS);
532 }
533
534 /**
535 * @brief Clear Seed Error interrupt Status (SEIS) Flag
536 * @rmtoll SR SEIS LL_RNG_ClearFlag_SEIS
537 * @param RNGx RNG Instance
538 * @retval None
539 */
LL_RNG_ClearFlag_SEIS(RNG_TypeDef * RNGx)540 __STATIC_INLINE void LL_RNG_ClearFlag_SEIS(RNG_TypeDef *RNGx)
541 {
542 WRITE_REG(RNGx->SR, ~RNG_SR_SEIS);
543 }
544
545 /**
546 * @}
547 */
548
549 /** @defgroup RNG_LL_EF_IT_Management IT Management
550 * @{
551 */
552
553 /**
554 * @brief Enable Random Number Generator Interrupt
555 * (applies for either Seed error, Clock Error or Data ready interrupts)
556 * @rmtoll CR IE LL_RNG_EnableIT
557 * @param RNGx RNG Instance
558 * @retval None
559 */
LL_RNG_EnableIT(RNG_TypeDef * RNGx)560 __STATIC_INLINE void LL_RNG_EnableIT(RNG_TypeDef *RNGx)
561 {
562 SET_BIT(RNGx->CR, RNG_CR_IE);
563 }
564
565 /**
566 * @brief Disable Random Number Generator Interrupt
567 * (applies for either Seed error, Clock Error or Data ready interrupts)
568 * @rmtoll CR IE LL_RNG_DisableIT
569 * @param RNGx RNG Instance
570 * @retval None
571 */
LL_RNG_DisableIT(RNG_TypeDef * RNGx)572 __STATIC_INLINE void LL_RNG_DisableIT(RNG_TypeDef *RNGx)
573 {
574 CLEAR_BIT(RNGx->CR, RNG_CR_IE);
575 }
576
577 /**
578 * @brief Check if Random Number Generator Interrupt is enabled
579 * (applies for either Seed error, Clock Error or Data ready interrupts)
580 * @rmtoll CR IE LL_RNG_IsEnabledIT
581 * @param RNGx RNG Instance
582 * @retval State of bit (1 or 0).
583 */
LL_RNG_IsEnabledIT(RNG_TypeDef * RNGx)584 __STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(RNG_TypeDef *RNGx)
585 {
586 return ((READ_BIT(RNGx->CR, RNG_CR_IE) == (RNG_CR_IE)) ? 1UL : 0UL);
587 }
588
589 /**
590 * @}
591 */
592
593 /** @defgroup RNG_LL_EF_Data_Management Data Management
594 * @{
595 */
596
597 /**
598 * @brief Return32-bit Random Number value
599 * @rmtoll DR RNDATA LL_RNG_ReadRandData32
600 * @param RNGx RNG Instance
601 * @retval Generated 32-bit random value
602 */
LL_RNG_ReadRandData32(RNG_TypeDef * RNGx)603 __STATIC_INLINE uint32_t LL_RNG_ReadRandData32(RNG_TypeDef *RNGx)
604 {
605 return (uint32_t)(READ_REG(RNGx->DR));
606 }
607
608 /**
609 * @}
610 */
611
612 #if defined(RNG_VER_3_2) || defined(RNG_VER_3_1) || defined(RNG_VER_3_0)
613 /** @defgroup RNG_LL_EF_Health_Test_Control Health Test Control
614 * @{
615 */
616
617 /**
618 * @brief Set RNG Health Test Control
619 * @rmtoll HTCR HTCFG LL_RNG_SetHealthConfig
620 * @param RNGx RNG Instance
621 * @param HTCFG can be values of 32 bits
622 * @retval None
623 */
LL_RNG_SetHealthConfig(RNG_TypeDef * RNGx,uint32_t HTCFG)624 __STATIC_INLINE void LL_RNG_SetHealthConfig(RNG_TypeDef *RNGx, uint32_t HTCFG)
625 {
626 WRITE_REG(RNGx->HTCR, HTCFG);
627 }
628
629 /**
630 * @brief Get RNG Health Test Control
631 * @rmtoll HTCR HTCFG LL_RNG_GetHealthConfig
632 * @param RNGx RNG Instance
633 * @retval Return 32-bit RNG Health Test configuration
634 */
LL_RNG_GetHealthConfig(RNG_TypeDef * RNGx)635 __STATIC_INLINE uint32_t LL_RNG_GetHealthConfig(RNG_TypeDef *RNGx)
636 {
637 return (uint32_t)READ_REG(RNGx->HTCR);
638 }
639
640 /**
641 * @}
642 */
643 #endif /* RNG_VER_3_2, RNG_VER_3_1 or RNG_VER_3_0 */
644 #if defined(USE_FULL_LL_DRIVER)
645 /** @defgroup RNG_LL_EF_Init Initialization and de-initialization functions
646 * @{
647 */
648 ErrorStatus LL_RNG_Init(RNG_TypeDef *RNGx, LL_RNG_InitTypeDef *RNG_InitStruct);
649 void LL_RNG_StructInit(LL_RNG_InitTypeDef *RNG_InitStruct);
650 ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx);
651
652 /**
653 * @}
654 */
655 #endif /* USE_FULL_LL_DRIVER */
656
657 /**
658 * @}
659 */
660
661 /**
662 * @}
663 */
664
665 #endif /* RNG */
666
667 /**
668 * @}
669 */
670
671 #ifdef __cplusplus
672 }
673 #endif
674
675 #endif /* __STM32WLxx_LL_RNG_H */
676
