1 /**
2 ******************************************************************************
3 * @file stm32wlxx_ll_dmamux.h
4 * @author MCD Application Team
5 * @brief Header file of DMAMUX LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2020 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32WLxx_LL_DMAMUX_H
21 #define STM32WLxx_LL_DMAMUX_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32wlxx.h"
29
30 /** @addtogroup STM32WLxx_LL_Driver
31 * @{
32 */
33
34 #if defined (DMAMUX1)
35
36 /** @defgroup DMAMUX_LL DMAMUX
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /** @defgroup DMAMUX_LL_Private_Constants DMAMUX Private Constants
44 * @{
45 */
46 /* Define used to get DMAMUX CCR register size */
47 #define DMAMUX_CCR_SIZE 0x00000004UL
48
49 /* Define used to get DMAMUX RGCR register size */
50 #define DMAMUX_RGCR_SIZE 0x00000004UL
51 /**
52 * @}
53 */
54
55 /* Private macros ------------------------------------------------------------*/
56 /* Exported types ------------------------------------------------------------*/
57 /* Exported constants --------------------------------------------------------*/
58 /** @defgroup DMAMUX_LL_Exported_Constants DMAMUX Exported Constants
59 * @{
60 */
61 /** @defgroup DMAMUX_LL_EC_CLEAR_FLAG Clear Flags Defines
62 * @brief Flags defines which can be used with LL_DMAMUX_WriteReg function
63 * @{
64 */
65 #define LL_DMAMUX_CFR_CSOF0 DMAMUX_CFR_CSOF0 /*!< Synchronization Event Overrun Flag Channel 0 */
66 #define LL_DMAMUX_CFR_CSOF1 DMAMUX_CFR_CSOF1 /*!< Synchronization Event Overrun Flag Channel 1 */
67 #define LL_DMAMUX_CFR_CSOF2 DMAMUX_CFR_CSOF2 /*!< Synchronization Event Overrun Flag Channel 2 */
68 #define LL_DMAMUX_CFR_CSOF3 DMAMUX_CFR_CSOF3 /*!< Synchronization Event Overrun Flag Channel 3 */
69 #define LL_DMAMUX_CFR_CSOF4 DMAMUX_CFR_CSOF4 /*!< Synchronization Event Overrun Flag Channel 4 */
70 #define LL_DMAMUX_CFR_CSOF5 DMAMUX_CFR_CSOF5 /*!< Synchronization Event Overrun Flag Channel 5 */
71 #define LL_DMAMUX_CFR_CSOF6 DMAMUX_CFR_CSOF6 /*!< Synchronization Event Overrun Flag Channel 6 */
72 #define LL_DMAMUX_CFR_CSOF7 DMAMUX_CFR_CSOF7 /*!< Synchronization Event Overrun Flag Channel 7 */
73 #define LL_DMAMUX_CFR_CSOF8 DMAMUX_CFR_CSOF8 /*!< Synchronization Event Overrun Flag Channel 8 */
74 #define LL_DMAMUX_CFR_CSOF9 DMAMUX_CFR_CSOF9 /*!< Synchronization Event Overrun Flag Channel 9 */
75 #define LL_DMAMUX_CFR_CSOF10 DMAMUX_CFR_CSOF10 /*!< Synchronization Event Overrun Flag Channel 10 */
76 #define LL_DMAMUX_CFR_CSOF11 DMAMUX_CFR_CSOF11 /*!< Synchronization Event Overrun Flag Channel 11 */
77 #define LL_DMAMUX_CFR_CSOF12 DMAMUX_CFR_CSOF12 /*!< Synchronization Event Overrun Flag Channel 12 */
78 #define LL_DMAMUX_CFR_CSOF13 DMAMUX_CFR_CSOF13 /*!< Synchronization Event Overrun Flag Channel 13 */
79 #define LL_DMAMUX_RGCFR_RGCOF0 DMAMUX_RGCFR_COF0 /*!< Request Generator 0 Trigger Event Overrun Flag */
80 #define LL_DMAMUX_RGCFR_RGCOF1 DMAMUX_RGCFR_COF1 /*!< Request Generator 1 Trigger Event Overrun Flag */
81 #define LL_DMAMUX_RGCFR_RGCOF2 DMAMUX_RGCFR_COF2 /*!< Request Generator 2 Trigger Event Overrun Flag */
82 #define LL_DMAMUX_RGCFR_RGCOF3 DMAMUX_RGCFR_COF3 /*!< Request Generator 3 Trigger Event Overrun Flag */
83 /**
84 * @}
85 */
86
87 /** @defgroup DMAMUX_LL_EC_GET_FLAG Get Flags Defines
88 * @brief Flags defines which can be used with LL_DMAMUX_ReadReg function
89 * @{
90 */
91 #define LL_DMAMUX_CSR_SOF0 DMAMUX_CSR_SOF0 /*!< Synchronization Event Overrun Flag Channel 0 */
92 #define LL_DMAMUX_CSR_SOF1 DMAMUX_CSR_SOF1 /*!< Synchronization Event Overrun Flag Channel 1 */
93 #define LL_DMAMUX_CSR_SOF2 DMAMUX_CSR_SOF2 /*!< Synchronization Event Overrun Flag Channel 2 */
94 #define LL_DMAMUX_CSR_SOF3 DMAMUX_CSR_SOF3 /*!< Synchronization Event Overrun Flag Channel 3 */
95 #define LL_DMAMUX_CSR_SOF4 DMAMUX_CSR_SOF4 /*!< Synchronization Event Overrun Flag Channel 4 */
96 #define LL_DMAMUX_CSR_SOF5 DMAMUX_CSR_SOF5 /*!< Synchronization Event Overrun Flag Channel 5 */
97 #define LL_DMAMUX_CSR_SOF6 DMAMUX_CSR_SOF6 /*!< Synchronization Event Overrun Flag Channel 6 */
98 #define LL_DMAMUX_CSR_SOF7 DMAMUX_CSR_SOF7 /*!< Synchronization Event Overrun Flag Channel 7 */
99 #define LL_DMAMUX_CSR_SOF8 DMAMUX_CSR_SOF8 /*!< Synchronization Event Overrun Flag Channel 8 */
100 #define LL_DMAMUX_CSR_SOF9 DMAMUX_CSR_SOF9 /*!< Synchronization Event Overrun Flag Channel 9 */
101 #define LL_DMAMUX_CSR_SOF10 DMAMUX_CSR_SOF10 /*!< Synchronization Event Overrun Flag Channel 10 */
102 #define LL_DMAMUX_CSR_SOF11 DMAMUX_CSR_SOF11 /*!< Synchronization Event Overrun Flag Channel 11 */
103 #define LL_DMAMUX_CSR_SOF12 DMAMUX_CSR_SOF12 /*!< Synchronization Event Overrun Flag Channel 12 */
104 #define LL_DMAMUX_CSR_SOF13 DMAMUX_CSR_SOF13 /*!< Synchronization Event Overrun Flag Channel 13 */
105 #define LL_DMAMUX_RGSR_RGOF0 DMAMUX_RGSR_OF0 /*!< Request Generator 0 Trigger Event Overrun Flag */
106 #define LL_DMAMUX_RGSR_RGOF1 DMAMUX_RGSR_OF1 /*!< Request Generator 1 Trigger Event Overrun Flag */
107 #define LL_DMAMUX_RGSR_RGOF2 DMAMUX_RGSR_OF2 /*!< Request Generator 2 Trigger Event Overrun Flag */
108 #define LL_DMAMUX_RGSR_RGOF3 DMAMUX_RGSR_OF3 /*!< Request Generator 3 Trigger Event Overrun Flag */
109 /**
110 * @}
111 */
112
113 /** @defgroup DMAMUX_LL_EC_IT IT Defines
114 * @brief IT defines which can be used with LL_DMA_ReadReg and LL_DMAMUX_WriteReg functions
115 * @{
116 */
117 #define LL_DMAMUX_CCR_SOIE DMAMUX_CxCR_SOIE /*!< Synchronization Event Overrun Interrupt */
118 #define LL_DMAMUX_RGCR_RGOIE DMAMUX_RGxCR_OIE /*!< Request Generation Trigger Event Overrun Interrupt */
119 /**
120 * @}
121 */
122
123 /** @defgroup DMAMUX_LL_EC_REQUEST Transfer request
124 * @{
125 */
126 #define LL_DMAMUX_REQ_MEM2MEM 0x00000000U /*!< memory to memory transfer */
127 #define LL_DMAMUX_REQ_GENERATOR0 0x00000001U /*!< DMAMUX request generator 0 */
128 #define LL_DMAMUX_REQ_GENERATOR1 0x00000002U /*!< DMAMUX request generator 1 */
129 #define LL_DMAMUX_REQ_GENERATOR2 0x00000003U /*!< DMAMUX request generator 2 */
130 #define LL_DMAMUX_REQ_GENERATOR3 0x00000004U /*!< DMAMUX request generator 3 */
131 #define LL_DMAMUX_REQ_ADC 0x00000005U /*!< DMAMUX ADC request */
132 #define LL_DMAMUX_REQ_DAC_OUT1 0x00000006U /*!< DMAMUX DAC OUT request */
133 #define LL_DMAMUX_REQ_SPI1_RX 0x00000007U /*!< DMAMUX SPI1 RX request */
134 #define LL_DMAMUX_REQ_SPI1_TX 0x00000008U /*!< DMAMUX SPI1 TX request */
135 #define LL_DMAMUX_REQ_SPI2_RX 0x00000009U /*!< DMAMUX SPI2 RX request */
136 #define LL_DMAMUX_REQ_SPI2_TX 0x0000000AU /*!< DMAMUX SPI2 TX request */
137 #define LL_DMAMUX_REQ_I2C1_RX 0x0000000BU /*!< DMAMUX I2C1 RX request */
138 #define LL_DMAMUX_REQ_I2C1_TX 0x0000000CU /*!< DMAMUX I2C1 TX request */
139 #define LL_DMAMUX_REQ_I2C2_RX 0x0000000DU /*!< DMAMUX I2C2 RX request */
140 #define LL_DMAMUX_REQ_I2C2_TX 0x0000000EU /*!< DMAMUX I2C2 TX request */
141 #define LL_DMAMUX_REQ_I2C3_RX 0x0000000FU /*!< DMAMUX I2C3 RX request */
142 #define LL_DMAMUX_REQ_I2C3_TX 0x00000010U /*!< DMAMUX I2C3 TX request */
143 #define LL_DMAMUX_REQ_USART1_RX 0x00000011U /*!< DMAMUX USART1 RX request */
144 #define LL_DMAMUX_REQ_USART1_TX 0x00000012U /*!< DMAMUX USART1 TX request */
145 #define LL_DMAMUX_REQ_USART2_RX 0x00000013U /*!< DMAMUX USART2 RX request */
146 #define LL_DMAMUX_REQ_USART2_TX 0x00000014U /*!< DMAMUX USART2 TX request */
147 #define LL_DMAMUX_REQ_LPUART1_RX 0x00000015U /*!< DMAMUX LPUART1 RX request */
148 #define LL_DMAMUX_REQ_LPUART1_TX 0x00000016U /*!< DMAMUX LPUART1 TX request */
149 #define LL_DMAMUX_REQ_TIM1_CH1 0x00000017U /*!< DMAMUX TIM1 CH1 request */
150 #define LL_DMAMUX_REQ_TIM1_CH2 0x00000018U /*!< DMAMUX TIM1 CH2 request */
151 #define LL_DMAMUX_REQ_TIM1_CH3 0x00000019U /*!< DMAMUX TIM1 CH3 request */
152 #define LL_DMAMUX_REQ_TIM1_CH4 0x0000001AU /*!< DMAMUX TIM1 CH4 request */
153 #define LL_DMAMUX_REQ_TIM1_UP 0x0000001BU /*!< DMAMUX TIM1 UP request */
154 #define LL_DMAMUX_REQ_TIM1_TRIG 0x0000001CU /*!< DMAMUX TIM1 TRIG request */
155 #define LL_DMAMUX_REQ_TIM1_COM 0x0000001DU /*!< DMAMUX TIM1 COM request */
156 #define LL_DMAMUX_REQ_TIM2_CH1 0x0000001EU /*!< DMAMUX TIM2 CH1 request */
157 #define LL_DMAMUX_REQ_TIM2_CH2 0x0000001FU /*!< DMAMUX TIM2 CH2 request */
158 #define LL_DMAMUX_REQ_TIM2_CH3 0x00000020U /*!< DMAMUX TIM2 CH3 request */
159 #define LL_DMAMUX_REQ_TIM2_CH4 0x00000021U /*!< DMAMUX TIM2 CH4 request */
160 #define LL_DMAMUX_REQ_TIM2_UP 0x00000022U /*!< DMAMUX TIM2 UP request */
161 #define LL_DMAMUX_REQ_TIM16_CH1 0x00000023U /*!< DMAMUX TIM16 CH1 request */
162 #define LL_DMAMUX_REQ_TIM16_UP 0x00000024U /*!< DMAMUX TIM16 UP request */
163 #define LL_DMAMUX_REQ_TIM17_CH1 0x00000025U /*!< DMAMUX TIM17 CH1 request */
164 #define LL_DMAMUX_REQ_TIM17_UP 0x00000026U /*!< DMAMUX TIM17 UP request */
165 #define LL_DMAMUX_REQ_AES_IN 0x00000027U /*!< DMAMUX AES_IN request */
166 #define LL_DMAMUX_REQ_AES_OUT 0x00000028U /*!< DMAMUX AES_OUT request */
167 #define LL_DMAMUX_REQ_SUBGHZSPI_RX 0x00000029U /*!< DMAMUX SUBGHZSPI RX request*/
168 #define LL_DMAMUX_REQ_SUBGHZSPI_TX 0x0000002AU /*!< DMAMUX SUBGHZSPI TX request*/
169
170 #define LL_DMAMUX_MAX_REQ LL_DMAMUX_REQ_SUBGHZSPI_TX
171 /**
172 * @}
173 */
174
175 /** @defgroup DMAMUX_LL_EC_CHANNEL DMAMUX Channel
176 * @{
177 */
178 #define LL_DMAMUX_CHANNEL_0 0x00000000U /*!< DMAMUX Channel 0 connected to DMA1 Channel 1 */
179 #define LL_DMAMUX_CHANNEL_1 0x00000001U /*!< DMAMUX Channel 1 connected to DMA1 Channel 2 */
180 #define LL_DMAMUX_CHANNEL_2 0x00000002U /*!< DMAMUX Channel 2 connected to DMA1 Channel 3 */
181 #define LL_DMAMUX_CHANNEL_3 0x00000003U /*!< DMAMUX Channel 3 connected to DMA1 Channel 4 */
182 #define LL_DMAMUX_CHANNEL_4 0x00000004U /*!< DMAMUX Channel 4 connected to DMA1 Channel 5 */
183 #define LL_DMAMUX_CHANNEL_5 0x00000005U /*!< DMAMUX Channel 5 connected to DMA1 Channel 6 */
184 #define LL_DMAMUX_CHANNEL_6 0x00000006U /*!< DMAMUX Channel 6 connected to DMA1 Channel 7 */
185 #define LL_DMAMUX_CHANNEL_7 0x00000007U /*!< DMAMUX Channel 7 connected to DMA2 Channel 1 */
186 #define LL_DMAMUX_CHANNEL_8 0x00000008U /*!< DMAMUX Channel 8 connected to DMA2 Channel 2 */
187 #define LL_DMAMUX_CHANNEL_9 0x00000009U /*!< DMAMUX Channel 9 connected to DMA2 Channel 3 */
188 #define LL_DMAMUX_CHANNEL_10 0x0000000AU /*!< DMAMUX Channel 10 connected to DMA2 Channel 4 */
189 #define LL_DMAMUX_CHANNEL_11 0x0000000BU /*!< DMAMUX Channel 11 connected to DMA2 Channel 5 */
190 #define LL_DMAMUX_CHANNEL_12 0x0000000CU /*!< DMAMUX Channel 12 connected to DMA2 Channel 6 */
191 #define LL_DMAMUX_CHANNEL_13 0x0000000DU /*!< DMAMUX Channel 13 connected to DMA2 Channel 7 */
192 /**
193 * @}
194 */
195
196 /** @defgroup DMAMUX_LL_EC_SYNC_NO Synchronization Signal Polarity
197 * @{
198 */
199 #define LL_DMAMUX_SYNC_NO_EVENT 0x00000000U /*!< All requests are blocked */
200 #define LL_DMAMUX_SYNC_POL_RISING DMAMUX_CxCR_SPOL_0 /*!< Synchronization on event on rising edge */
201 #define LL_DMAMUX_SYNC_POL_FALLING DMAMUX_CxCR_SPOL_1 /*!< Synchronization on event on falling edge */
202 #define LL_DMAMUX_SYNC_POL_RISING_FALLING (DMAMUX_CxCR_SPOL_0 | DMAMUX_CxCR_SPOL_1) /*!< Synchronization on event on rising and falling edge */
203 /**
204 * @}
205 */
206
207 /** @defgroup DMAMUX_LL_EC_SYNC_EVT Synchronization Signal Event
208 * @{
209 */
210 #define LL_DMAMUX_SYNC_EXTI_LINE0 0x00000000U /*!< Synchronization signal from EXTI Line0 */
211 #define LL_DMAMUX_SYNC_EXTI_LINE1 DMAMUX_CxCR_SYNC_ID_0 /*!< Synchronization signal from EXTI Line1 */
212 #define LL_DMAMUX_SYNC_EXTI_LINE2 DMAMUX_CxCR_SYNC_ID_1 /*!< Synchronization signal from EXTI Line2 */
213 #define LL_DMAMUX_SYNC_EXTI_LINE3 (DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line3 */
214 #define LL_DMAMUX_SYNC_EXTI_LINE4 DMAMUX_CxCR_SYNC_ID_2 /*!< Synchronization signal from EXTI Line4 */
215 #define LL_DMAMUX_SYNC_EXTI_LINE5 (DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line5 */
216 #define LL_DMAMUX_SYNC_EXTI_LINE6 (DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from EXTI Line6 */
217 #define LL_DMAMUX_SYNC_EXTI_LINE7 (DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line7 */
218 #define LL_DMAMUX_SYNC_EXTI_LINE8 DMAMUX_CxCR_SYNC_ID_3 /*!< Synchronization signal from EXTI Line8 */
219 #define LL_DMAMUX_SYNC_EXTI_LINE9 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line9 */
220 #define LL_DMAMUX_SYNC_EXTI_LINE10 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from EXTI Line10 */
221 #define LL_DMAMUX_SYNC_EXTI_LINE11 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line11 */
222 #define LL_DMAMUX_SYNC_EXTI_LINE12 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2) /*!< Synchronization signal from EXTI Line12 */
223 #define LL_DMAMUX_SYNC_EXTI_LINE13 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line13 */
224 #define LL_DMAMUX_SYNC_EXTI_LINE14 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from EXTI Line14 */
225 #define LL_DMAMUX_SYNC_EXTI_LINE15 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line15 */
226 #define LL_DMAMUX_SYNC_DMAMUX_CH0 DMAMUX_CxCR_SYNC_ID_4 /*!< Synchronization signal from DMAMUX channel0 Event */
227 #define LL_DMAMUX_SYNC_DMAMUX_CH1 (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from DMAMUX channel1 Event */
228 #define LL_DMAMUX_SYNC_LPTIM1_OUT (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from LPTIM1 Output */
229 #define LL_DMAMUX_SYNC_LPTIM2_OUT (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from LPTIM2 Output */
230 #define LL_DMAMUX_SYNC_LPTIM3_OUT (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_2) /*!< Synchronization signal from LPTIM3 Output */
231 /**
232 * @}
233 */
234
235 /** @defgroup DMAMUX_LL_EC_REQUEST_GENERATOR Request Generator Channel
236 * @{
237 */
238 #define LL_DMAMUX_REQ_GEN_0 0x00000000U
239 #define LL_DMAMUX_REQ_GEN_1 0x00000001U
240 #define LL_DMAMUX_REQ_GEN_2 0x00000002U
241 #define LL_DMAMUX_REQ_GEN_3 0x00000003U
242 /**
243 * @}
244 */
245
246 /** @defgroup DMAMUX_LL_EC_REQUEST_GEN_POLARITY External Request Signal Generation Polarity
247 * @{
248 */
249 #define LL_DMAMUX_REQ_GEN_NO_EVENT 0x00000000U /*!< No external DMA request generation */
250 #define LL_DMAMUX_REQ_GEN_POL_RISING DMAMUX_RGxCR_GPOL_0 /*!< External DMA request generation on event on rising edge */
251 #define LL_DMAMUX_REQ_GEN_POL_FALLING DMAMUX_RGxCR_GPOL_1 /*!< External DMA request generation on event on falling edge */
252 #define LL_DMAMUX_REQ_GEN_POL_RISING_FALLING (DMAMUX_RGxCR_GPOL_0 | DMAMUX_RGxCR_GPOL_1) /*!< External DMA request generation on rising and falling edge */
253 /**
254 * @}
255 */
256
257 /** @defgroup DMAMUX_LL_EC_REQUEST_GEN External Request Signal Generation
258 * @{
259 */
260 #define LL_DMAMUX_REQ_GEN_EXTI_LINE0 0x00000000U /*!< Request signal generation from EXTI Line0 */
261 #define LL_DMAMUX_REQ_GEN_EXTI_LINE1 DMAMUX_RGxCR_SIG_ID_0 /*!< Request signal generation from EXTI Line1 */
262 #define LL_DMAMUX_REQ_GEN_EXTI_LINE2 DMAMUX_RGxCR_SIG_ID_1 /*!< Request signal generation from EXTI Line2 */
263 #define LL_DMAMUX_REQ_GEN_EXTI_LINE3 (DMAMUX_RGxCR_SIG_ID_1 |DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line3 */
264 #define LL_DMAMUX_REQ_GEN_EXTI_LINE4 DMAMUX_RGxCR_SIG_ID_2 /*!< Request signal generation from EXTI Line4 */
265 #define LL_DMAMUX_REQ_GEN_EXTI_LINE5 (DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line5 */
266 #define LL_DMAMUX_REQ_GEN_EXTI_LINE6 (DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from EXTI Line6 */
267 #define LL_DMAMUX_REQ_GEN_EXTI_LINE7 (DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line7 */
268 #define LL_DMAMUX_REQ_GEN_EXTI_LINE8 DMAMUX_RGxCR_SIG_ID_3 /*!< Request signal generation from EXTI Line8 */
269 #define LL_DMAMUX_REQ_GEN_EXTI_LINE9 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line9 */
270 #define LL_DMAMUX_REQ_GEN_EXTI_LINE10 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from EXTI Line10 */
271 #define LL_DMAMUX_REQ_GEN_EXTI_LINE11 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line11 */
272 #define LL_DMAMUX_REQ_GEN_EXTI_LINE12 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2) /*!< Request signal generation from EXTI Line12 */
273 #define LL_DMAMUX_REQ_GEN_EXTI_LINE13 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line13 */
274 #define LL_DMAMUX_REQ_GEN_EXTI_LINE14 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from EXTI Line14 */
275 #define LL_DMAMUX_REQ_GEN_EXTI_LINE15 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line15 */
276 #define LL_DMAMUX_REQ_GEN_DMAMUX_CH0 DMAMUX_RGxCR_SIG_ID_4 /*!< Request signal generation from DMAMUX channel0 Event */
277 #define LL_DMAMUX_REQ_GEN_DMAMUX_CH1 (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from DMAMUX channel1 Event */
278 #define LL_DMAMUX_REQ_GEN_LPTIM1_OUT (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from LPTIM1 Output */
279 #define LL_DMAMUX_REQ_GEN_LPTIM2_OUT (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from LPTIM2 Output */
280 #define LL_DMAMUX_REQ_GEN_LPTIM3_OUT (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_2) /*!< Request signal generation from LPTIM3 Output */
281 /**
282 * @}
283 */
284
285 /**
286 * @}
287 */
288
289 /* Exported macro ------------------------------------------------------------*/
290 /** @defgroup DMAMUX_LL_Exported_Macros DMAMUX Exported Macros
291 * @{
292 */
293
294 /** @defgroup DMAMUX_LL_EM_WRITE_READ Common Write and read registers macros
295 * @{
296 */
297 /**
298 * @brief Write a value in DMAMUX register
299 * @param __INSTANCE__ DMAMUX Instance
300 * @param __REG__ Register to be written
301 * @param __VALUE__ Value to be written in the register
302 * @retval None
303 */
304 #define LL_DMAMUX_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
305
306 /**
307 * @brief Read a value in DMAMUX register
308 * @param __INSTANCE__ DMAMUX Instance
309 * @param __REG__ Register to be read
310 * @retval Register value
311 */
312 #define LL_DMAMUX_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
313 /**
314 * @}
315 */
316
317 /**
318 * @}
319 */
320
321 /* Exported functions --------------------------------------------------------*/
322 /** @defgroup DMAMUX_LL_Exported_Functions DMAMUX Exported Functions
323 * @{
324 */
325
326 /** @defgroup DMAMUX_LL_EF_Configuration Configuration
327 * @{
328 */
329 /**
330 * @brief Set DMAMUX request ID for DMAMUX Channel x.
331 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
332 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
333 * @rmtoll CxCR DMAREQ_ID LL_DMAMUX_SetRequestID
334 * @param DMAMUXx DMAMUXx Instance
335 * @param Channel This parameter can be one of the following values:
336 * @arg @ref LL_DMAMUX_CHANNEL_0
337 * @arg @ref LL_DMAMUX_CHANNEL_1
338 * @arg @ref LL_DMAMUX_CHANNEL_2
339 * @arg @ref LL_DMAMUX_CHANNEL_3
340 * @arg @ref LL_DMAMUX_CHANNEL_4
341 * @arg @ref LL_DMAMUX_CHANNEL_5
342 * @arg @ref LL_DMAMUX_CHANNEL_6
343 * @arg @ref LL_DMAMUX_CHANNEL_7
344 * @arg @ref LL_DMAMUX_CHANNEL_8
345 * @arg @ref LL_DMAMUX_CHANNEL_9
346 * @arg @ref LL_DMAMUX_CHANNEL_10
347 * @arg @ref LL_DMAMUX_CHANNEL_11
348 * @arg @ref LL_DMAMUX_CHANNEL_12
349 * @arg @ref LL_DMAMUX_CHANNEL_13
350 * @param Request This parameter can be one of the following values:
351 * @arg @ref LL_DMAMUX_REQ_MEM2MEM
352 * @arg @ref LL_DMAMUX_REQ_GENERATOR0
353 * @arg @ref LL_DMAMUX_REQ_GENERATOR1
354 * @arg @ref LL_DMAMUX_REQ_GENERATOR2
355 * @arg @ref LL_DMAMUX_REQ_GENERATOR3
356 * @arg @ref LL_DMAMUX_REQ_ADC
357 * @arg @ref LL_DMAMUX_REQ_DAC_OUT1
358 * @arg @ref LL_DMAMUX_REQ_SPI1_RX
359 * @arg @ref LL_DMAMUX_REQ_SPI1_TX
360 * @arg @ref LL_DMAMUX_REQ_SPI2_RX
361 * @arg @ref LL_DMAMUX_REQ_SPI2_TX
362 * @arg @ref LL_DMAMUX_REQ_I2C1_RX
363 * @arg @ref LL_DMAMUX_REQ_I2C1_TX
364 * @arg @ref LL_DMAMUX_REQ_I2C2_RX
365 * @arg @ref LL_DMAMUX_REQ_I2C2_TX
366 * @arg @ref LL_DMAMUX_REQ_I2C3_RX
367 * @arg @ref LL_DMAMUX_REQ_I2C3_TX
368 * @arg @ref LL_DMAMUX_REQ_USART1_RX
369 * @arg @ref LL_DMAMUX_REQ_USART1_TX
370 * @arg @ref LL_DMAMUX_REQ_USART2_RX
371 * @arg @ref LL_DMAMUX_REQ_USART2_TX
372 * @arg @ref LL_DMAMUX_REQ_LPUART1_RX
373 * @arg @ref LL_DMAMUX_REQ_LPUART1_TX
374 * @arg @ref LL_DMAMUX_REQ_TIM1_CH1
375 * @arg @ref LL_DMAMUX_REQ_TIM1_CH2
376 * @arg @ref LL_DMAMUX_REQ_TIM1_CH3
377 * @arg @ref LL_DMAMUX_REQ_TIM1_CH4
378 * @arg @ref LL_DMAMUX_REQ_TIM1_UP
379 * @arg @ref LL_DMAMUX_REQ_TIM1_TRIG
380 * @arg @ref LL_DMAMUX_REQ_TIM1_COM
381 * @arg @ref LL_DMAMUX_REQ_TIM2_CH1
382 * @arg @ref LL_DMAMUX_REQ_TIM2_CH2
383 * @arg @ref LL_DMAMUX_REQ_TIM2_CH3
384 * @arg @ref LL_DMAMUX_REQ_TIM2_CH4
385 * @arg @ref LL_DMAMUX_REQ_TIM2_UP
386 * @arg @ref LL_DMAMUX_REQ_TIM16_CH1
387 * @arg @ref LL_DMAMUX_REQ_TIM16_UP
388 * @arg @ref LL_DMAMUX_REQ_TIM17_CH1
389 * @arg @ref LL_DMAMUX_REQ_TIM17_UP
390 * @arg @ref LL_DMAMUX_REQ_AES_IN
391 * @arg @ref LL_DMAMUX_REQ_AES_OUT
392 * @arg @ref LL_DMAMUX_REQ_SUBGHZSPI_RX
393 * @arg @ref LL_DMAMUX_REQ_SUBGHZSPI_TX
394 * @retval None
395 */
LL_DMAMUX_SetRequestID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel,uint32_t Request)396 __STATIC_INLINE void LL_DMAMUX_SetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Request)
397 {
398 (void)(DMAMUXx);
399 MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_DMAREQ_ID, Request);
400 }
401
402 /**
403 * @brief Get DMAMUX request ID for DMAMUX Channel x.
404 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
405 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
406 * @rmtoll CxCR DMAREQ_ID LL_DMAMUX_GetRequestID
407 * @param DMAMUXx DMAMUXx Instance
408 * @param Channel This parameter can be one of the following values:
409 * @arg @ref LL_DMAMUX_CHANNEL_0
410 * @arg @ref LL_DMAMUX_CHANNEL_1
411 * @arg @ref LL_DMAMUX_CHANNEL_2
412 * @arg @ref LL_DMAMUX_CHANNEL_3
413 * @arg @ref LL_DMAMUX_CHANNEL_4
414 * @arg @ref LL_DMAMUX_CHANNEL_5
415 * @arg @ref LL_DMAMUX_CHANNEL_6
416 * @arg @ref LL_DMAMUX_CHANNEL_7
417 * @arg @ref LL_DMAMUX_CHANNEL_8
418 * @arg @ref LL_DMAMUX_CHANNEL_9
419 * @arg @ref LL_DMAMUX_CHANNEL_10
420 * @arg @ref LL_DMAMUX_CHANNEL_11
421 * @arg @ref LL_DMAMUX_CHANNEL_12
422 * @arg @ref LL_DMAMUX_CHANNEL_13
423 * @retval Returned value can be one of the following values:
424 * @arg @ref LL_DMAMUX_REQ_MEM2MEM
425 * @arg @ref LL_DMAMUX_REQ_GENERATOR0
426 * @arg @ref LL_DMAMUX_REQ_GENERATOR1
427 * @arg @ref LL_DMAMUX_REQ_GENERATOR2
428 * @arg @ref LL_DMAMUX_REQ_GENERATOR3
429 * @arg @ref LL_DMAMUX_REQ_ADC
430 * @arg @ref LL_DMAMUX_REQ_DAC_OUT1
431 * @arg @ref LL_DMAMUX_REQ_SPI1_RX
432 * @arg @ref LL_DMAMUX_REQ_SPI1_TX
433 * @arg @ref LL_DMAMUX_REQ_SPI2_RX
434 * @arg @ref LL_DMAMUX_REQ_SPI2_TX
435 * @arg @ref LL_DMAMUX_REQ_I2C1_RX
436 * @arg @ref LL_DMAMUX_REQ_I2C1_TX
437 * @arg @ref LL_DMAMUX_REQ_I2C2_RX
438 * @arg @ref LL_DMAMUX_REQ_I2C2_TX
439 * @arg @ref LL_DMAMUX_REQ_I2C3_RX
440 * @arg @ref LL_DMAMUX_REQ_I2C3_TX
441 * @arg @ref LL_DMAMUX_REQ_USART1_RX
442 * @arg @ref LL_DMAMUX_REQ_USART1_TX
443 * @arg @ref LL_DMAMUX_REQ_USART2_RX
444 * @arg @ref LL_DMAMUX_REQ_USART2_TX
445 * @arg @ref LL_DMAMUX_REQ_LPUART1_RX
446 * @arg @ref LL_DMAMUX_REQ_LPUART1_TX
447 * @arg @ref LL_DMAMUX_REQ_TIM1_CH1
448 * @arg @ref LL_DMAMUX_REQ_TIM1_CH2
449 * @arg @ref LL_DMAMUX_REQ_TIM1_CH3
450 * @arg @ref LL_DMAMUX_REQ_TIM1_CH4
451 * @arg @ref LL_DMAMUX_REQ_TIM1_UP
452 * @arg @ref LL_DMAMUX_REQ_TIM1_TRIG
453 * @arg @ref LL_DMAMUX_REQ_TIM1_COM
454 * @arg @ref LL_DMAMUX_REQ_TIM2_CH1
455 * @arg @ref LL_DMAMUX_REQ_TIM2_CH2
456 * @arg @ref LL_DMAMUX_REQ_TIM2_CH3
457 * @arg @ref LL_DMAMUX_REQ_TIM2_CH4
458 * @arg @ref LL_DMAMUX_REQ_TIM2_UP
459 * @arg @ref LL_DMAMUX_REQ_TIM16_CH1
460 * @arg @ref LL_DMAMUX_REQ_TIM16_UP
461 * @arg @ref LL_DMAMUX_REQ_TIM17_CH1
462 * @arg @ref LL_DMAMUX_REQ_TIM17_UP
463 * @arg @ref LL_DMAMUX_REQ_AES_IN
464 * @arg @ref LL_DMAMUX_REQ_AES_OUT
465 * @arg @ref LL_DMAMUX_REQ_SUBGHZSPI_RX
466 * @arg @ref LL_DMAMUX_REQ_SUBGHZSPI_TX
467 */
LL_DMAMUX_GetRequestID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)468 __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
469 {
470 (void)(DMAMUXx);
471 return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_DMAREQ_ID));
472 }
473
474 /**
475 * @brief Set the number of DMA request that will be autorized after a synchronization event and/or the number of DMA request needed to generate an event.
476 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
477 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
478 * @rmtoll CxCR NBREQ LL_DMAMUX_SetSyncRequestNb
479 * @param DMAMUXx DMAMUXx Instance
480 * @param Channel This parameter can be one of the following values:
481 * @arg @ref LL_DMAMUX_CHANNEL_0
482 * @arg @ref LL_DMAMUX_CHANNEL_1
483 * @arg @ref LL_DMAMUX_CHANNEL_2
484 * @arg @ref LL_DMAMUX_CHANNEL_3
485 * @arg @ref LL_DMAMUX_CHANNEL_4
486 * @arg @ref LL_DMAMUX_CHANNEL_5
487 * @arg @ref LL_DMAMUX_CHANNEL_6
488 * @arg @ref LL_DMAMUX_CHANNEL_7
489 * @arg @ref LL_DMAMUX_CHANNEL_8
490 * @arg @ref LL_DMAMUX_CHANNEL_9
491 * @arg @ref LL_DMAMUX_CHANNEL_10
492 * @arg @ref LL_DMAMUX_CHANNEL_11
493 * @arg @ref LL_DMAMUX_CHANNEL_12
494 * @arg @ref LL_DMAMUX_CHANNEL_13
495 * @param RequestNb This parameter must be a value between Min_Data = 1 and Max_Data = 32.
496 * @retval None
497 */
LL_DMAMUX_SetSyncRequestNb(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel,uint32_t RequestNb)498 __STATIC_INLINE void LL_DMAMUX_SetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t RequestNb)
499 {
500 (void)(DMAMUXx);
501 MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_NBREQ, ((RequestNb - 1U) << DMAMUX_CxCR_NBREQ_Pos));
502 }
503
504 /**
505 * @brief Get the number of DMA request that will be autorized after a synchronization event and/or the number of DMA request needed to generate an event.
506 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
507 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
508 * @rmtoll CxCR NBREQ LL_DMAMUX_GetSyncRequestNb
509 * @param DMAMUXx DMAMUXx Instance
510 * @param Channel This parameter can be one of the following values:
511 * @arg @ref LL_DMAMUX_CHANNEL_0
512 * @arg @ref LL_DMAMUX_CHANNEL_1
513 * @arg @ref LL_DMAMUX_CHANNEL_2
514 * @arg @ref LL_DMAMUX_CHANNEL_3
515 * @arg @ref LL_DMAMUX_CHANNEL_4
516 * @arg @ref LL_DMAMUX_CHANNEL_5
517 * @arg @ref LL_DMAMUX_CHANNEL_6
518 * @arg @ref LL_DMAMUX_CHANNEL_7
519 * @arg @ref LL_DMAMUX_CHANNEL_8
520 * @arg @ref LL_DMAMUX_CHANNEL_9
521 * @arg @ref LL_DMAMUX_CHANNEL_10
522 * @arg @ref LL_DMAMUX_CHANNEL_11
523 * @arg @ref LL_DMAMUX_CHANNEL_12
524 * @arg @ref LL_DMAMUX_CHANNEL_13
525 * @retval Between Min_Data = 1 and Max_Data = 32
526 */
LL_DMAMUX_GetSyncRequestNb(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)527 __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
528 {
529 (void)(DMAMUXx);
530 return (uint32_t)(((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_NBREQ)) >> DMAMUX_CxCR_NBREQ_Pos) + 1U);
531 }
532
533 /**
534 * @brief Set the polarity of the signal on which the DMA request is synchronized.
535 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
536 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
537 * @rmtoll CxCR SPOL LL_DMAMUX_SetSyncPolarity
538 * @param DMAMUXx DMAMUXx Instance
539 * @param Channel This parameter can be one of the following values:
540 * @arg @ref LL_DMAMUX_CHANNEL_0
541 * @arg @ref LL_DMAMUX_CHANNEL_1
542 * @arg @ref LL_DMAMUX_CHANNEL_2
543 * @arg @ref LL_DMAMUX_CHANNEL_3
544 * @arg @ref LL_DMAMUX_CHANNEL_4
545 * @arg @ref LL_DMAMUX_CHANNEL_5
546 * @arg @ref LL_DMAMUX_CHANNEL_6
547 * @arg @ref LL_DMAMUX_CHANNEL_7
548 * @arg @ref LL_DMAMUX_CHANNEL_8
549 * @arg @ref LL_DMAMUX_CHANNEL_9
550 * @arg @ref LL_DMAMUX_CHANNEL_10
551 * @arg @ref LL_DMAMUX_CHANNEL_11
552 * @arg @ref LL_DMAMUX_CHANNEL_12
553 * @arg @ref LL_DMAMUX_CHANNEL_13
554 * @param Polarity This parameter can be one of the following values:
555 * @arg @ref LL_DMAMUX_SYNC_NO_EVENT
556 * @arg @ref LL_DMAMUX_SYNC_POL_RISING
557 * @arg @ref LL_DMAMUX_SYNC_POL_FALLING
558 * @arg @ref LL_DMAMUX_SYNC_POL_RISING_FALLING
559 * @retval None
560 */
LL_DMAMUX_SetSyncPolarity(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel,uint32_t Polarity)561 __STATIC_INLINE void LL_DMAMUX_SetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Polarity)
562 {
563 (void)(DMAMUXx);
564 MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SPOL, Polarity);
565 }
566
567 /**
568 * @brief Get the polarity of the signal on which the DMA request is synchronized.
569 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
570 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
571 * @rmtoll CxCR SPOL LL_DMAMUX_GetSyncPolarity
572 * @param DMAMUXx DMAMUXx Instance
573 * @param Channel This parameter can be one of the following values:
574 * @arg @ref LL_DMAMUX_CHANNEL_0
575 * @arg @ref LL_DMAMUX_CHANNEL_1
576 * @arg @ref LL_DMAMUX_CHANNEL_2
577 * @arg @ref LL_DMAMUX_CHANNEL_3
578 * @arg @ref LL_DMAMUX_CHANNEL_4
579 * @arg @ref LL_DMAMUX_CHANNEL_5
580 * @arg @ref LL_DMAMUX_CHANNEL_6
581 * @arg @ref LL_DMAMUX_CHANNEL_7
582 * @arg @ref LL_DMAMUX_CHANNEL_8
583 * @arg @ref LL_DMAMUX_CHANNEL_9
584 * @arg @ref LL_DMAMUX_CHANNEL_10
585 * @arg @ref LL_DMAMUX_CHANNEL_11
586 * @arg @ref LL_DMAMUX_CHANNEL_12
587 * @arg @ref LL_DMAMUX_CHANNEL_13
588 * @retval Returned value can be one of the following values:
589 * @arg @ref LL_DMAMUX_SYNC_NO_EVENT
590 * @arg @ref LL_DMAMUX_SYNC_POL_RISING
591 * @arg @ref LL_DMAMUX_SYNC_POL_FALLING
592 * @arg @ref LL_DMAMUX_SYNC_POL_RISING_FALLING
593 */
LL_DMAMUX_GetSyncPolarity(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)594 __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
595 {
596 (void)(DMAMUXx);
597 return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SPOL));
598 }
599
600 /**
601 * @brief Enable the Event Generation on DMAMUX channel x.
602 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
603 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
604 * @rmtoll CxCR EGE LL_DMAMUX_EnableEventGeneration
605 * @param DMAMUXx DMAMUXx Instance
606 * @param Channel This parameter can be one of the following values:
607 * @arg @ref LL_DMAMUX_CHANNEL_0
608 * @arg @ref LL_DMAMUX_CHANNEL_1
609 * @arg @ref LL_DMAMUX_CHANNEL_2
610 * @arg @ref LL_DMAMUX_CHANNEL_3
611 * @arg @ref LL_DMAMUX_CHANNEL_4
612 * @arg @ref LL_DMAMUX_CHANNEL_5
613 * @arg @ref LL_DMAMUX_CHANNEL_6
614 * @arg @ref LL_DMAMUX_CHANNEL_7
615 * @arg @ref LL_DMAMUX_CHANNEL_8
616 * @arg @ref LL_DMAMUX_CHANNEL_9
617 * @arg @ref LL_DMAMUX_CHANNEL_10
618 * @arg @ref LL_DMAMUX_CHANNEL_11
619 * @arg @ref LL_DMAMUX_CHANNEL_12
620 * @arg @ref LL_DMAMUX_CHANNEL_13
621 * @retval None
622 */
LL_DMAMUX_EnableEventGeneration(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)623 __STATIC_INLINE void LL_DMAMUX_EnableEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
624 {
625 (void)(DMAMUXx);
626 SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE);
627 }
628
629 /**
630 * @brief Disable the Event Generation on DMAMUX channel x.
631 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
632 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
633 * @rmtoll CxCR EGE LL_DMAMUX_DisableEventGeneration
634 * @param DMAMUXx DMAMUXx Instance
635 * @param Channel This parameter can be one of the following values:
636 * @arg @ref LL_DMAMUX_CHANNEL_0
637 * @arg @ref LL_DMAMUX_CHANNEL_1
638 * @arg @ref LL_DMAMUX_CHANNEL_2
639 * @arg @ref LL_DMAMUX_CHANNEL_3
640 * @arg @ref LL_DMAMUX_CHANNEL_4
641 * @arg @ref LL_DMAMUX_CHANNEL_5
642 * @arg @ref LL_DMAMUX_CHANNEL_6
643 * @arg @ref LL_DMAMUX_CHANNEL_7
644 * @arg @ref LL_DMAMUX_CHANNEL_8
645 * @arg @ref LL_DMAMUX_CHANNEL_9
646 * @arg @ref LL_DMAMUX_CHANNEL_10
647 * @arg @ref LL_DMAMUX_CHANNEL_11
648 * @arg @ref LL_DMAMUX_CHANNEL_12
649 * @arg @ref LL_DMAMUX_CHANNEL_13
650 * @retval None
651 */
LL_DMAMUX_DisableEventGeneration(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)652 __STATIC_INLINE void LL_DMAMUX_DisableEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
653 {
654 (void)(DMAMUXx);
655 CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE);
656 }
657
658 /**
659 * @brief Check if the Event Generation on DMAMUX channel x is enabled or disabled.
660 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
661 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
662 * @rmtoll CxCR EGE LL_DMAMUX_IsEnabledEventGeneration
663 * @param DMAMUXx DMAMUXx Instance
664 * @param Channel This parameter can be one of the following values:
665 * @arg @ref LL_DMAMUX_CHANNEL_0
666 * @arg @ref LL_DMAMUX_CHANNEL_1
667 * @arg @ref LL_DMAMUX_CHANNEL_2
668 * @arg @ref LL_DMAMUX_CHANNEL_3
669 * @arg @ref LL_DMAMUX_CHANNEL_4
670 * @arg @ref LL_DMAMUX_CHANNEL_5
671 * @arg @ref LL_DMAMUX_CHANNEL_6
672 * @arg @ref LL_DMAMUX_CHANNEL_7
673 * @arg @ref LL_DMAMUX_CHANNEL_8
674 * @arg @ref LL_DMAMUX_CHANNEL_9
675 * @arg @ref LL_DMAMUX_CHANNEL_10
676 * @arg @ref LL_DMAMUX_CHANNEL_11
677 * @arg @ref LL_DMAMUX_CHANNEL_12
678 * @arg @ref LL_DMAMUX_CHANNEL_13
679 * @retval State of bit (1 or 0).
680 */
LL_DMAMUX_IsEnabledEventGeneration(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)681 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
682 {
683 (void)(DMAMUXx);
684 return ((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE) == (DMAMUX_CxCR_EGE)) ? 1UL : 0UL);
685 }
686
687 /**
688 * @brief Enable the synchronization mode.
689 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
690 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
691 * @rmtoll CxCR SE LL_DMAMUX_EnableSync
692 * @param DMAMUXx DMAMUXx Instance
693 * @param Channel This parameter can be one of the following values:
694 * @arg @ref LL_DMAMUX_CHANNEL_0
695 * @arg @ref LL_DMAMUX_CHANNEL_1
696 * @arg @ref LL_DMAMUX_CHANNEL_2
697 * @arg @ref LL_DMAMUX_CHANNEL_3
698 * @arg @ref LL_DMAMUX_CHANNEL_4
699 * @arg @ref LL_DMAMUX_CHANNEL_5
700 * @arg @ref LL_DMAMUX_CHANNEL_6
701 * @arg @ref LL_DMAMUX_CHANNEL_7
702 * @arg @ref LL_DMAMUX_CHANNEL_8
703 * @arg @ref LL_DMAMUX_CHANNEL_9
704 * @arg @ref LL_DMAMUX_CHANNEL_10
705 * @arg @ref LL_DMAMUX_CHANNEL_11
706 * @arg @ref LL_DMAMUX_CHANNEL_12
707 * @arg @ref LL_DMAMUX_CHANNEL_13
708 * @retval None
709 */
LL_DMAMUX_EnableSync(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)710 __STATIC_INLINE void LL_DMAMUX_EnableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
711 {
712 (void)(DMAMUXx);
713 SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE);
714 }
715
716 /**
717 * @brief Disable the synchronization mode.
718 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
719 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
720 * @rmtoll CxCR SE LL_DMAMUX_DisableSync
721 * @param DMAMUXx DMAMUXx Instance
722 * @param Channel This parameter can be one of the following values:
723 * @arg @ref LL_DMAMUX_CHANNEL_0
724 * @arg @ref LL_DMAMUX_CHANNEL_1
725 * @arg @ref LL_DMAMUX_CHANNEL_2
726 * @arg @ref LL_DMAMUX_CHANNEL_3
727 * @arg @ref LL_DMAMUX_CHANNEL_4
728 * @arg @ref LL_DMAMUX_CHANNEL_5
729 * @arg @ref LL_DMAMUX_CHANNEL_6
730 * @arg @ref LL_DMAMUX_CHANNEL_7
731 * @arg @ref LL_DMAMUX_CHANNEL_8
732 * @arg @ref LL_DMAMUX_CHANNEL_9
733 * @arg @ref LL_DMAMUX_CHANNEL_10
734 * @arg @ref LL_DMAMUX_CHANNEL_11
735 * @arg @ref LL_DMAMUX_CHANNEL_12
736 * @arg @ref LL_DMAMUX_CHANNEL_13
737 * @retval None
738 */
LL_DMAMUX_DisableSync(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)739 __STATIC_INLINE void LL_DMAMUX_DisableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
740 {
741 (void)(DMAMUXx);
742 CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE);
743 }
744
745 /**
746 * @brief Check if the synchronization mode is enabled or disabled.
747 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
748 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
749 * @rmtoll CxCR SE LL_DMAMUX_IsEnabledSync
750 * @param DMAMUXx DMAMUXx Instance
751 * @param Channel This parameter can be one of the following values:
752 * @arg @ref LL_DMAMUX_CHANNEL_0
753 * @arg @ref LL_DMAMUX_CHANNEL_1
754 * @arg @ref LL_DMAMUX_CHANNEL_2
755 * @arg @ref LL_DMAMUX_CHANNEL_3
756 * @arg @ref LL_DMAMUX_CHANNEL_4
757 * @arg @ref LL_DMAMUX_CHANNEL_5
758 * @arg @ref LL_DMAMUX_CHANNEL_6
759 * @arg @ref LL_DMAMUX_CHANNEL_7
760 * @arg @ref LL_DMAMUX_CHANNEL_8
761 * @arg @ref LL_DMAMUX_CHANNEL_9
762 * @arg @ref LL_DMAMUX_CHANNEL_10
763 * @arg @ref LL_DMAMUX_CHANNEL_11
764 * @arg @ref LL_DMAMUX_CHANNEL_12
765 * @arg @ref LL_DMAMUX_CHANNEL_13
766 * @retval State of bit (1 or 0).
767 */
LL_DMAMUX_IsEnabledSync(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)768 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
769 {
770 (void)(DMAMUXx);
771 return ((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE) == (DMAMUX_CxCR_SE)) ? 1UL : 0UL);
772 }
773
774 /**
775 * @brief Set DMAMUX synchronization ID on DMAMUX Channel x.
776 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
777 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
778 * @rmtoll CxCR SYNC_ID LL_DMAMUX_SetSyncID
779 * @param DMAMUXx DMAMUXx Instance
780 * @param Channel This parameter can be one of the following values:
781 * @arg @ref LL_DMAMUX_CHANNEL_0
782 * @arg @ref LL_DMAMUX_CHANNEL_1
783 * @arg @ref LL_DMAMUX_CHANNEL_2
784 * @arg @ref LL_DMAMUX_CHANNEL_3
785 * @arg @ref LL_DMAMUX_CHANNEL_4
786 * @arg @ref LL_DMAMUX_CHANNEL_5
787 * @arg @ref LL_DMAMUX_CHANNEL_6
788 * @arg @ref LL_DMAMUX_CHANNEL_7
789 * @arg @ref LL_DMAMUX_CHANNEL_8
790 * @arg @ref LL_DMAMUX_CHANNEL_9
791 * @arg @ref LL_DMAMUX_CHANNEL_10
792 * @arg @ref LL_DMAMUX_CHANNEL_11
793 * @arg @ref LL_DMAMUX_CHANNEL_12
794 * @arg @ref LL_DMAMUX_CHANNEL_13
795 * @param SyncID This parameter can be one of the following values:
796 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE0
797 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE1
798 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE2
799 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE3
800 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE4
801 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE5
802 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE6
803 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE7
804 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE8
805 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE9
806 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE10
807 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE11
808 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE12
809 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE13
810 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE14
811 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE15
812 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH0
813 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH1
814 * @arg @ref LL_DMAMUX_SYNC_LPTIM1_OUT
815 * @arg @ref LL_DMAMUX_SYNC_LPTIM2_OUT
816 * @arg @ref LL_DMAMUX_SYNC_LPTIM3_OUT
817 * @retval None
818 */
LL_DMAMUX_SetSyncID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel,uint32_t SyncID)819 __STATIC_INLINE void LL_DMAMUX_SetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t SyncID)
820 {
821 (void)(DMAMUXx);
822 MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SYNC_ID, SyncID);
823 }
824
825 /**
826 * @brief Get DMAMUX synchronization ID on DMAMUX Channel x.
827 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
828 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
829 * @rmtoll CxCR SYNC_ID LL_DMAMUX_GetSyncID
830 * @param DMAMUXx DMAMUXx Instance
831 * @param Channel This parameter can be one of the following values:
832 * @arg @ref LL_DMAMUX_CHANNEL_0
833 * @arg @ref LL_DMAMUX_CHANNEL_1
834 * @arg @ref LL_DMAMUX_CHANNEL_2
835 * @arg @ref LL_DMAMUX_CHANNEL_3
836 * @arg @ref LL_DMAMUX_CHANNEL_4
837 * @arg @ref LL_DMAMUX_CHANNEL_5
838 * @arg @ref LL_DMAMUX_CHANNEL_6
839 * @arg @ref LL_DMAMUX_CHANNEL_7
840 * @arg @ref LL_DMAMUX_CHANNEL_8
841 * @arg @ref LL_DMAMUX_CHANNEL_9
842 * @arg @ref LL_DMAMUX_CHANNEL_10
843 * @arg @ref LL_DMAMUX_CHANNEL_11
844 * @arg @ref LL_DMAMUX_CHANNEL_12
845 * @arg @ref LL_DMAMUX_CHANNEL_13
846 * @retval Returned value can be one of the following values:
847 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE0
848 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE1
849 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE2
850 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE3
851 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE4
852 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE5
853 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE6
854 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE7
855 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE8
856 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE9
857 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE10
858 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE11
859 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE12
860 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE13
861 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE14
862 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE15
863 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH0
864 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH1
865 * @arg @ref LL_DMAMUX_SYNC_LPTIM1_OUT
866 * @arg @ref LL_DMAMUX_SYNC_LPTIM2_OUT
867 * @arg @ref LL_DMAMUX_SYNC_LPTIM3_OUT
868 */
LL_DMAMUX_GetSyncID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)869 __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
870 {
871 (void)(DMAMUXx);
872 return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SYNC_ID));
873 }
874
875 /**
876 * @brief Enable the Request Generator.
877 * @rmtoll RGxCR GE LL_DMAMUX_EnableRequestGen
878 * @param DMAMUXx DMAMUXx Instance
879 * @param RequestGenChannel This parameter can be one of the following values:
880 * @arg @ref LL_DMAMUX_REQ_GEN_0
881 * @arg @ref LL_DMAMUX_REQ_GEN_1
882 * @arg @ref LL_DMAMUX_REQ_GEN_2
883 * @arg @ref LL_DMAMUX_REQ_GEN_3
884 * @retval None
885 */
LL_DMAMUX_EnableRequestGen(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)886 __STATIC_INLINE void LL_DMAMUX_EnableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
887 {
888 (void)(DMAMUXx);
889 SET_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE);
890 }
891
892 /**
893 * @brief Disable the Request Generator.
894 * @rmtoll RGxCR GE LL_DMAMUX_DisableRequestGen
895 * @param DMAMUXx DMAMUXx Instance
896 * @param RequestGenChannel This parameter can be one of the following values:
897 * @arg @ref LL_DMAMUX_REQ_GEN_0
898 * @arg @ref LL_DMAMUX_REQ_GEN_1
899 * @arg @ref LL_DMAMUX_REQ_GEN_2
900 * @arg @ref LL_DMAMUX_REQ_GEN_3
901 * @retval None
902 */
LL_DMAMUX_DisableRequestGen(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)903 __STATIC_INLINE void LL_DMAMUX_DisableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
904 {
905 (void)(DMAMUXx);
906 CLEAR_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE);
907 }
908
909 /**
910 * @brief Check if the Request Generator is enabled or disabled.
911 * @rmtoll RGxCR GE LL_DMAMUX_IsEnabledRequestGen
912 * @param DMAMUXx DMAMUXx Instance
913 * @param RequestGenChannel This parameter can be one of the following values:
914 * @arg @ref LL_DMAMUX_REQ_GEN_0
915 * @arg @ref LL_DMAMUX_REQ_GEN_1
916 * @arg @ref LL_DMAMUX_REQ_GEN_2
917 * @arg @ref LL_DMAMUX_REQ_GEN_3
918 * @retval State of bit (1 or 0).
919 */
LL_DMAMUX_IsEnabledRequestGen(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)920 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
921 {
922 (void)(DMAMUXx);
923 return ((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE) == (DMAMUX_RGxCR_GE)) ? 1UL : 0UL);
924 }
925
926 /**
927 * @brief Set the polarity of the signal on which the DMA request is generated.
928 * @rmtoll RGxCR GPOL LL_DMAMUX_SetRequestGenPolarity
929 * @param DMAMUXx DMAMUXx Instance
930 * @param RequestGenChannel This parameter can be one of the following values:
931 * @arg @ref LL_DMAMUX_REQ_GEN_0
932 * @arg @ref LL_DMAMUX_REQ_GEN_1
933 * @arg @ref LL_DMAMUX_REQ_GEN_2
934 * @arg @ref LL_DMAMUX_REQ_GEN_3
935 * @param Polarity This parameter can be one of the following values:
936 * @arg @ref LL_DMAMUX_REQ_GEN_NO_EVENT
937 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING
938 * @arg @ref LL_DMAMUX_REQ_GEN_POL_FALLING
939 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING_FALLING
940 * @retval None
941 */
LL_DMAMUX_SetRequestGenPolarity(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel,uint32_t Polarity)942 __STATIC_INLINE void LL_DMAMUX_SetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, uint32_t Polarity)
943 {
944 (void)(DMAMUXx);
945 MODIFY_REG(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GPOL, Polarity);
946 }
947
948 /**
949 * @brief Get the polarity of the signal on which the DMA request is generated.
950 * @rmtoll RGxCR GPOL LL_DMAMUX_GetRequestGenPolarity
951 * @param DMAMUXx DMAMUXx Instance
952 * @param RequestGenChannel This parameter can be one of the following values:
953 * @arg @ref LL_DMAMUX_REQ_GEN_0
954 * @arg @ref LL_DMAMUX_REQ_GEN_1
955 * @arg @ref LL_DMAMUX_REQ_GEN_2
956 * @arg @ref LL_DMAMUX_REQ_GEN_3
957 * @retval Returned value can be one of the following values:
958 * @arg @ref LL_DMAMUX_REQ_GEN_NO_EVENT
959 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING
960 * @arg @ref LL_DMAMUX_REQ_GEN_POL_FALLING
961 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING_FALLING
962 */
LL_DMAMUX_GetRequestGenPolarity(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)963 __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
964 {
965 (void)(DMAMUXx);
966 return (uint32_t)(READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GPOL));
967 }
968
969 /**
970 * @brief Set the number of DMA request that will be autorized after a generation event.
971 * @note This field can only be written when Generator is disabled.
972 * @rmtoll RGxCR GNBREQ LL_DMAMUX_SetGenRequestNb
973 * @param DMAMUXx DMAMUXx Instance
974 * @param RequestGenChannel This parameter can be one of the following values:
975 * @arg @ref LL_DMAMUX_REQ_GEN_0
976 * @arg @ref LL_DMAMUX_REQ_GEN_1
977 * @arg @ref LL_DMAMUX_REQ_GEN_2
978 * @arg @ref LL_DMAMUX_REQ_GEN_3
979 * @param RequestNb This parameter must be a value between Min_Data = 1 and Max_Data = 32.
980 * @retval None
981 */
LL_DMAMUX_SetGenRequestNb(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel,uint32_t RequestNb)982 __STATIC_INLINE void LL_DMAMUX_SetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, uint32_t RequestNb)
983 {
984 (void)(DMAMUXx);
985 MODIFY_REG(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GNBREQ, (RequestNb - 1U) << DMAMUX_RGxCR_GNBREQ_Pos);
986 }
987
988 /**
989 * @brief Get the number of DMA request that will be autorized after a generation event.
990 * @rmtoll RGxCR GNBREQ LL_DMAMUX_GetGenRequestNb
991 * @param DMAMUXx DMAMUXx Instance
992 * @param RequestGenChannel This parameter can be one of the following values:
993 * @arg @ref LL_DMAMUX_REQ_GEN_0
994 * @arg @ref LL_DMAMUX_REQ_GEN_1
995 * @arg @ref LL_DMAMUX_REQ_GEN_2
996 * @arg @ref LL_DMAMUX_REQ_GEN_3
997 * @retval Between Min_Data = 1 and Max_Data = 32
998 */
LL_DMAMUX_GetGenRequestNb(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)999 __STATIC_INLINE uint32_t LL_DMAMUX_GetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1000 {
1001 (void)(DMAMUXx);
1002 return (uint32_t)((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GNBREQ) >> DMAMUX_RGxCR_GNBREQ_Pos) + 1U);
1003 }
1004
1005 /**
1006 * @brief Set DMAMUX external Request Signal ID on DMAMUX Request Generation Trigger Event Channel x.
1007 * @rmtoll RGxCR SIG_ID LL_DMAMUX_SetRequestSignalID
1008 * @param DMAMUXx DMAMUXx Instance
1009 * @param RequestGenChannel This parameter can be one of the following values:
1010 * @arg @ref LL_DMAMUX_REQ_GEN_0
1011 * @arg @ref LL_DMAMUX_REQ_GEN_1
1012 * @arg @ref LL_DMAMUX_REQ_GEN_2
1013 * @arg @ref LL_DMAMUX_REQ_GEN_3
1014 * @param RequestSignalID This parameter can be one of the following values:
1015 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE0
1016 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE1
1017 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE2
1018 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE3
1019 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE4
1020 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE5
1021 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE6
1022 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE7
1023 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE8
1024 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE9
1025 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE10
1026 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE11
1027 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE12
1028 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE13
1029 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE14
1030 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE15
1031 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH0
1032 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH1
1033 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM1_OUT
1034 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM2_OUT
1035 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM3_OUT
1036 * @retval None
1037 */
LL_DMAMUX_SetRequestSignalID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel,uint32_t RequestSignalID)1038 __STATIC_INLINE void LL_DMAMUX_SetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, uint32_t RequestSignalID)
1039 {
1040 (void)(DMAMUXx);
1041 MODIFY_REG(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_SIG_ID, RequestSignalID);
1042 }
1043
1044 /**
1045 * @brief Get DMAMUX external Request Signal ID set on DMAMUX Channel x.
1046 * @rmtoll RGxCR SIG_ID LL_DMAMUX_GetRequestSignalID
1047 * @param DMAMUXx DMAMUXx Instance
1048 * @param RequestGenChannel This parameter can be one of the following values:
1049 * @arg @ref LL_DMAMUX_REQ_GEN_0
1050 * @arg @ref LL_DMAMUX_REQ_GEN_1
1051 * @arg @ref LL_DMAMUX_REQ_GEN_2
1052 * @arg @ref LL_DMAMUX_REQ_GEN_3
1053 * @retval Returned value can be one of the following values:
1054 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE0
1055 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE1
1056 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE2
1057 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE3
1058 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE4
1059 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE5
1060 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE6
1061 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE7
1062 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE8
1063 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE9
1064 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE10
1065 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE11
1066 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE12
1067 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE13
1068 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE14
1069 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE15
1070 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH0
1071 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH1
1072 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM1_OUT
1073 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM2_OUT
1074 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM3_OUT
1075 */
LL_DMAMUX_GetRequestSignalID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1076 __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1077 {
1078 (void)(DMAMUXx);
1079 return (uint32_t)(READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_SIG_ID));
1080 }
1081
1082 /**
1083 * @}
1084 */
1085
1086 /** @defgroup DMAMUX_LL_EF_FLAG_Management FLAG_Management
1087 * @{
1088 */
1089
1090 /**
1091 * @brief Get Synchronization Event Overrun Flag Channel 0.
1092 * @rmtoll CSR SOF0 LL_DMAMUX_IsActiveFlag_SO0
1093 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1094 * @retval State of bit (1 or 0).
1095 */
LL_DMAMUX_IsActiveFlag_SO0(DMAMUX_Channel_TypeDef * DMAMUXx)1096 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO0(DMAMUX_Channel_TypeDef *DMAMUXx)
1097 {
1098 (void)(DMAMUXx);
1099 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF0) == (DMAMUX_CSR_SOF0)) ? 1UL : 0UL);
1100 }
1101
1102 /**
1103 * @brief Get Synchronization Event Overrun Flag Channel 1.
1104 * @rmtoll CSR SOF1 LL_DMAMUX_IsActiveFlag_SO1
1105 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1106 * @retval State of bit (1 or 0).
1107 */
LL_DMAMUX_IsActiveFlag_SO1(DMAMUX_Channel_TypeDef * DMAMUXx)1108 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx)
1109 {
1110 (void)(DMAMUXx);
1111 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF1) == (DMAMUX_CSR_SOF1)) ? 1UL : 0UL);
1112 }
1113
1114 /**
1115 * @brief Get Synchronization Event Overrun Flag Channel 2.
1116 * @rmtoll CSR SOF2 LL_DMAMUX_IsActiveFlag_SO2
1117 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1118 * @retval State of bit (1 or 0).
1119 */
LL_DMAMUX_IsActiveFlag_SO2(DMAMUX_Channel_TypeDef * DMAMUXx)1120 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx)
1121 {
1122 (void)(DMAMUXx);
1123 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF2) == (DMAMUX_CSR_SOF2)) ? 1UL : 0UL);
1124 }
1125
1126 /**
1127 * @brief Get Synchronization Event Overrun Flag Channel 3.
1128 * @rmtoll CSR SOF3 LL_DMAMUX_IsActiveFlag_SO3
1129 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1130 * @retval State of bit (1 or 0).
1131 */
LL_DMAMUX_IsActiveFlag_SO3(DMAMUX_Channel_TypeDef * DMAMUXx)1132 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx)
1133 {
1134 (void)(DMAMUXx);
1135 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF3) == (DMAMUX_CSR_SOF3)) ? 1UL : 0UL);
1136 }
1137
1138 /**
1139 * @brief Get Synchronization Event Overrun Flag Channel 4.
1140 * @rmtoll CSR SOF4 LL_DMAMUX_IsActiveFlag_SO4
1141 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1142 * @retval State of bit (1 or 0).
1143 */
LL_DMAMUX_IsActiveFlag_SO4(DMAMUX_Channel_TypeDef * DMAMUXx)1144 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx)
1145 {
1146 (void)(DMAMUXx);
1147 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF4) == (DMAMUX_CSR_SOF4)) ? 1UL : 0UL);
1148 }
1149
1150 /**
1151 * @brief Get Synchronization Event Overrun Flag Channel 5.
1152 * @rmtoll CSR SOF5 LL_DMAMUX_IsActiveFlag_SO5
1153 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1154 * @retval State of bit (1 or 0).
1155 */
LL_DMAMUX_IsActiveFlag_SO5(DMAMUX_Channel_TypeDef * DMAMUXx)1156 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx)
1157 {
1158 (void)(DMAMUXx);
1159 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF5) == (DMAMUX_CSR_SOF5)) ? 1UL : 0UL);
1160 }
1161
1162 /**
1163 * @brief Get Synchronization Event Overrun Flag Channel 6.
1164 * @rmtoll CSR SOF6 LL_DMAMUX_IsActiveFlag_SO6
1165 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1166 * @retval State of bit (1 or 0).
1167 */
LL_DMAMUX_IsActiveFlag_SO6(DMAMUX_Channel_TypeDef * DMAMUXx)1168 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx)
1169 {
1170 (void)(DMAMUXx);
1171 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF6) == (DMAMUX_CSR_SOF6)) ? 1UL : 0UL);
1172 }
1173
1174 /**
1175 * @brief Get Synchronization Event Overrun Flag Channel 7.
1176 * @rmtoll CSR SOF7 LL_DMAMUX_IsActiveFlag_SO7
1177 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1178 * @retval State of bit (1 or 0).
1179 */
LL_DMAMUX_IsActiveFlag_SO7(DMAMUX_Channel_TypeDef * DMAMUXx)1180 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx)
1181 {
1182 (void)(DMAMUXx);
1183 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF7) == (DMAMUX_CSR_SOF7)) ? 1UL : 0UL);
1184 }
1185
1186 /**
1187 * @brief Get Synchronization Event Overrun Flag Channel 8.
1188 * @rmtoll CSR SOF8 LL_DMAMUX_IsActiveFlag_SO8
1189 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1190 * @retval State of bit (1 or 0).
1191 */
LL_DMAMUX_IsActiveFlag_SO8(DMAMUX_Channel_TypeDef * DMAMUXx)1192 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx)
1193 {
1194 (void)(DMAMUXx);
1195 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF8) == (DMAMUX_CSR_SOF8)) ? 1UL : 0UL);
1196 }
1197
1198 /**
1199 * @brief Get Synchronization Event Overrun Flag Channel 9.
1200 * @rmtoll CSR SOF9 LL_DMAMUX_IsActiveFlag_SO9
1201 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1202 * @retval State of bit (1 or 0).
1203 */
LL_DMAMUX_IsActiveFlag_SO9(DMAMUX_Channel_TypeDef * DMAMUXx)1204 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx)
1205 {
1206 (void)(DMAMUXx);
1207 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF9) == (DMAMUX_CSR_SOF9)) ? 1UL : 0UL);
1208 }
1209
1210 /**
1211 * @brief Get Synchronization Event Overrun Flag Channel 10.
1212 * @rmtoll CSR SOF10 LL_DMAMUX_IsActiveFlag_SO10
1213 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1214 * @retval State of bit (1 or 0).
1215 */
LL_DMAMUX_IsActiveFlag_SO10(DMAMUX_Channel_TypeDef * DMAMUXx)1216 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx)
1217 {
1218 (void)(DMAMUXx);
1219 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF10) == (DMAMUX_CSR_SOF10)) ? 1UL : 0UL);
1220 }
1221
1222 /**
1223 * @brief Get Synchronization Event Overrun Flag Channel 11.
1224 * @rmtoll CSR SOF11 LL_DMAMUX_IsActiveFlag_SO11
1225 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1226 * @retval State of bit (1 or 0).
1227 */
LL_DMAMUX_IsActiveFlag_SO11(DMAMUX_Channel_TypeDef * DMAMUXx)1228 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx)
1229 {
1230 (void)(DMAMUXx);
1231 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF11) == (DMAMUX_CSR_SOF11)) ? 1UL : 0UL);
1232 }
1233
1234 /**
1235 * @brief Get Synchronization Event Overrun Flag Channel 12.
1236 * @rmtoll CSR SOF12 LL_DMAMUX_IsActiveFlag_SO12
1237 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1238 * @retval State of bit (1 or 0).
1239 */
LL_DMAMUX_IsActiveFlag_SO12(DMAMUX_Channel_TypeDef * DMAMUXx)1240 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx)
1241 {
1242 (void)(DMAMUXx);
1243 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF12) == (DMAMUX_CSR_SOF12)) ? 1UL : 0UL);
1244 }
1245
1246 /**
1247 * @brief Get Synchronization Event Overrun Flag Channel 13.
1248 * @rmtoll CSR SOF13 LL_DMAMUX_IsActiveFlag_SO13
1249 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1250 * @retval State of bit (1 or 0).
1251 */
LL_DMAMUX_IsActiveFlag_SO13(DMAMUX_Channel_TypeDef * DMAMUXx)1252 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx)
1253 {
1254 (void)(DMAMUXx);
1255 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF13) == (DMAMUX_CSR_SOF13)) ? 1UL : 0UL);
1256 }
1257
1258 /**
1259 * @brief Get Request Generator 0 Trigger Event Overrun Flag.
1260 * @rmtoll RGSR OF0 LL_DMAMUX_IsActiveFlag_RGO0
1261 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1262 * @retval State of bit (1 or 0).
1263 */
LL_DMAMUX_IsActiveFlag_RGO0(DMAMUX_Channel_TypeDef * DMAMUXx)1264 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx)
1265 {
1266 (void)(DMAMUXx);
1267 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF0) == (DMAMUX_RGSR_OF0)) ? 1UL : 0UL);
1268 }
1269
1270 /**
1271 * @brief Get Request Generator 1 Trigger Event Overrun Flag.
1272 * @rmtoll RGSR OF1 LL_DMAMUX_IsActiveFlag_RGO1
1273 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1274 * @retval State of bit (1 or 0).
1275 */
LL_DMAMUX_IsActiveFlag_RGO1(DMAMUX_Channel_TypeDef * DMAMUXx)1276 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx)
1277 {
1278 (void)(DMAMUXx);
1279 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF1) == (DMAMUX_RGSR_OF1)) ? 1UL : 0UL);
1280 }
1281
1282 /**
1283 * @brief Get Request Generator 2 Trigger Event Overrun Flag.
1284 * @rmtoll RGSR OF2 LL_DMAMUX_IsActiveFlag_RGO2
1285 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1286 * @retval State of bit (1 or 0).
1287 */
LL_DMAMUX_IsActiveFlag_RGO2(DMAMUX_Channel_TypeDef * DMAMUXx)1288 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx)
1289 {
1290 (void)(DMAMUXx);
1291 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF2) == (DMAMUX_RGSR_OF2)) ? 1UL : 0UL);
1292 }
1293
1294 /**
1295 * @brief Get Request Generator 3 Trigger Event Overrun Flag.
1296 * @rmtoll RGSR OF3 LL_DMAMUX_IsActiveFlag_RGO3
1297 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1298 * @retval State of bit (1 or 0).
1299 */
LL_DMAMUX_IsActiveFlag_RGO3(DMAMUX_Channel_TypeDef * DMAMUXx)1300 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx)
1301 {
1302 (void)(DMAMUXx);
1303 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF3) == (DMAMUX_RGSR_OF3)) ? 1UL : 0UL);
1304 }
1305
1306 /**
1307 * @brief Clear Synchronization Event Overrun Flag Channel 0.
1308 * @rmtoll CFR CSOF0 LL_DMAMUX_ClearFlag_SO0
1309 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1310 * @retval None
1311 */
LL_DMAMUX_ClearFlag_SO0(DMAMUX_Channel_TypeDef * DMAMUXx)1312 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO0(DMAMUX_Channel_TypeDef *DMAMUXx)
1313 {
1314 (void)(DMAMUXx);
1315 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF0);
1316 }
1317
1318 /**
1319 * @brief Clear Synchronization Event Overrun Flag Channel 1.
1320 * @rmtoll CFR CSOF1 LL_DMAMUX_ClearFlag_SO1
1321 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1322 * @retval None
1323 */
LL_DMAMUX_ClearFlag_SO1(DMAMUX_Channel_TypeDef * DMAMUXx)1324 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx)
1325 {
1326 (void)(DMAMUXx);
1327 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF1);
1328 }
1329
1330 /**
1331 * @brief Clear Synchronization Event Overrun Flag Channel 2.
1332 * @rmtoll CFR CSOF2 LL_DMAMUX_ClearFlag_SO2
1333 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1334 * @retval None
1335 */
LL_DMAMUX_ClearFlag_SO2(DMAMUX_Channel_TypeDef * DMAMUXx)1336 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx)
1337 {
1338 (void)(DMAMUXx);
1339 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF2);
1340 }
1341
1342 /**
1343 * @brief Clear Synchronization Event Overrun Flag Channel 3.
1344 * @rmtoll CFR CSOF3 LL_DMAMUX_ClearFlag_SO3
1345 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1346 * @retval None
1347 */
LL_DMAMUX_ClearFlag_SO3(DMAMUX_Channel_TypeDef * DMAMUXx)1348 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx)
1349 {
1350 (void)(DMAMUXx);
1351 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF3);
1352 }
1353
1354 /**
1355 * @brief Clear Synchronization Event Overrun Flag Channel 4.
1356 * @rmtoll CFR CSOF4 LL_DMAMUX_ClearFlag_SO4
1357 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1358 * @retval None
1359 */
LL_DMAMUX_ClearFlag_SO4(DMAMUX_Channel_TypeDef * DMAMUXx)1360 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx)
1361 {
1362 (void)(DMAMUXx);
1363 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF4);
1364 }
1365
1366 /**
1367 * @brief Clear Synchronization Event Overrun Flag Channel 5.
1368 * @rmtoll CFR CSOF5 LL_DMAMUX_ClearFlag_SO5
1369 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1370 * @retval None
1371 */
LL_DMAMUX_ClearFlag_SO5(DMAMUX_Channel_TypeDef * DMAMUXx)1372 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx)
1373 {
1374 (void)(DMAMUXx);
1375 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF5);
1376 }
1377
1378 /**
1379 * @brief Clear Synchronization Event Overrun Flag Channel 6.
1380 * @rmtoll CFR CSOF6 LL_DMAMUX_ClearFlag_SO6
1381 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1382 * @retval None
1383 */
LL_DMAMUX_ClearFlag_SO6(DMAMUX_Channel_TypeDef * DMAMUXx)1384 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx)
1385 {
1386 (void)(DMAMUXx);
1387 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF6);
1388 }
1389
1390 /**
1391 * @brief Clear Synchronization Event Overrun Flag Channel 7.
1392 * @rmtoll CFR CSOF7 LL_DMAMUX_ClearFlag_SO7
1393 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1394 * @retval None
1395 */
LL_DMAMUX_ClearFlag_SO7(DMAMUX_Channel_TypeDef * DMAMUXx)1396 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx)
1397 {
1398 (void)(DMAMUXx);
1399 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF7);
1400 }
1401
1402 /**
1403 * @brief Clear Synchronization Event Overrun Flag Channel 8.
1404 * @rmtoll CFR CSOF8 LL_DMAMUX_ClearFlag_SO8
1405 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1406 * @retval None
1407 */
LL_DMAMUX_ClearFlag_SO8(DMAMUX_Channel_TypeDef * DMAMUXx)1408 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx)
1409 {
1410 (void)(DMAMUXx);
1411 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF8);
1412 }
1413
1414 /**
1415 * @brief Clear Synchronization Event Overrun Flag Channel 9.
1416 * @rmtoll CFR CSOF9 LL_DMAMUX_ClearFlag_SO9
1417 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1418 * @retval None
1419 */
LL_DMAMUX_ClearFlag_SO9(DMAMUX_Channel_TypeDef * DMAMUXx)1420 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx)
1421 {
1422 (void)(DMAMUXx);
1423 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF9);
1424 }
1425
1426 /**
1427 * @brief Clear Synchronization Event Overrun Flag Channel 10.
1428 * @rmtoll CFR CSOF10 LL_DMAMUX_ClearFlag_SO10
1429 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1430 * @retval None
1431 */
LL_DMAMUX_ClearFlag_SO10(DMAMUX_Channel_TypeDef * DMAMUXx)1432 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx)
1433 {
1434 (void)(DMAMUXx);
1435 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF10);
1436 }
1437
1438 /**
1439 * @brief Clear Synchronization Event Overrun Flag Channel 11.
1440 * @rmtoll CFR CSOF11 LL_DMAMUX_ClearFlag_SO11
1441 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1442 * @retval None
1443 */
LL_DMAMUX_ClearFlag_SO11(DMAMUX_Channel_TypeDef * DMAMUXx)1444 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx)
1445 {
1446 (void)(DMAMUXx);
1447 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF11);
1448 }
1449
1450 /**
1451 * @brief Clear Synchronization Event Overrun Flag Channel 12.
1452 * @rmtoll CFR CSOF12 LL_DMAMUX_ClearFlag_SO12
1453 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1454 * @retval None
1455 */
LL_DMAMUX_ClearFlag_SO12(DMAMUX_Channel_TypeDef * DMAMUXx)1456 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx)
1457 {
1458 (void)(DMAMUXx);
1459 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF12);
1460 }
1461
1462 /**
1463 * @brief Clear Synchronization Event Overrun Flag Channel 13.
1464 * @rmtoll CFR CSOF13 LL_DMAMUX_ClearFlag_SO13
1465 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1466 * @retval None
1467 */
LL_DMAMUX_ClearFlag_SO13(DMAMUX_Channel_TypeDef * DMAMUXx)1468 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx)
1469 {
1470 (void)(DMAMUXx);
1471 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF13);
1472 }
1473
1474 /**
1475 * @brief Clear Request Generator 0 Trigger Event Overrun Flag.
1476 * @rmtoll RGCFR COF0 LL_DMAMUX_ClearFlag_RGO0
1477 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1478 * @retval None
1479 */
LL_DMAMUX_ClearFlag_RGO0(DMAMUX_Channel_TypeDef * DMAMUXx)1480 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx)
1481 {
1482 (void)(DMAMUXx);
1483 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF0);
1484 }
1485
1486 /**
1487 * @brief Clear Request Generator 1 Trigger Event Overrun Flag.
1488 * @rmtoll RGCFR COF1 LL_DMAMUX_ClearFlag_RGO1
1489 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1490 * @retval None
1491 */
LL_DMAMUX_ClearFlag_RGO1(DMAMUX_Channel_TypeDef * DMAMUXx)1492 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx)
1493 {
1494 (void)(DMAMUXx);
1495 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF1);
1496 }
1497
1498 /**
1499 * @brief Clear Request Generator 2 Trigger Event Overrun Flag.
1500 * @rmtoll RGCFR COF2 LL_DMAMUX_ClearFlag_RGO2
1501 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1502 * @retval None
1503 */
LL_DMAMUX_ClearFlag_RGO2(DMAMUX_Channel_TypeDef * DMAMUXx)1504 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx)
1505 {
1506 (void)(DMAMUXx);
1507 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF2);
1508 }
1509
1510 /**
1511 * @brief Clear Request Generator 3 Trigger Event Overrun Flag.
1512 * @rmtoll RGCFR COF3 LL_DMAMUX_ClearFlag_RGO3
1513 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1514 * @retval None
1515 */
LL_DMAMUX_ClearFlag_RGO3(DMAMUX_Channel_TypeDef * DMAMUXx)1516 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx)
1517 {
1518 (void)(DMAMUXx);
1519 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF3);
1520 }
1521
1522 /**
1523 * @}
1524 */
1525
1526 /** @defgroup DMAMUX_LL_EF_IT_Management IT_Management
1527 * @{
1528 */
1529
1530 /**
1531 * @brief Enable the Synchronization Event Overrun Interrupt on DMAMUX channel x.
1532 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
1533 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
1534 * @rmtoll CxCR SOIE LL_DMAMUX_EnableIT_SO
1535 * @param DMAMUXx DMAMUXx Instance
1536 * @param Channel This parameter can be one of the following values:
1537 * @arg @ref LL_DMAMUX_CHANNEL_0
1538 * @arg @ref LL_DMAMUX_CHANNEL_1
1539 * @arg @ref LL_DMAMUX_CHANNEL_2
1540 * @arg @ref LL_DMAMUX_CHANNEL_3
1541 * @arg @ref LL_DMAMUX_CHANNEL_4
1542 * @arg @ref LL_DMAMUX_CHANNEL_5
1543 * @arg @ref LL_DMAMUX_CHANNEL_6
1544 * @arg @ref LL_DMAMUX_CHANNEL_7
1545 * @arg @ref LL_DMAMUX_CHANNEL_8
1546 * @arg @ref LL_DMAMUX_CHANNEL_9
1547 * @arg @ref LL_DMAMUX_CHANNEL_10
1548 * @arg @ref LL_DMAMUX_CHANNEL_11
1549 * @arg @ref LL_DMAMUX_CHANNEL_12
1550 * @arg @ref LL_DMAMUX_CHANNEL_13
1551 * @retval None
1552 */
LL_DMAMUX_EnableIT_SO(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)1553 __STATIC_INLINE void LL_DMAMUX_EnableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1554 {
1555 (void)(DMAMUXx);
1556 SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE);
1557 }
1558
1559 /**
1560 * @brief Disable the Synchronization Event Overrun Interrupt on DMAMUX channel x.
1561 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
1562 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
1563 * @rmtoll CxCR SOIE LL_DMAMUX_DisableIT_SO
1564 * @param DMAMUXx DMAMUXx Instance
1565 * @param Channel This parameter can be one of the following values:
1566 * @arg @ref LL_DMAMUX_CHANNEL_0
1567 * @arg @ref LL_DMAMUX_CHANNEL_1
1568 * @arg @ref LL_DMAMUX_CHANNEL_2
1569 * @arg @ref LL_DMAMUX_CHANNEL_3
1570 * @arg @ref LL_DMAMUX_CHANNEL_4
1571 * @arg @ref LL_DMAMUX_CHANNEL_5
1572 * @arg @ref LL_DMAMUX_CHANNEL_6
1573 * @arg @ref LL_DMAMUX_CHANNEL_7
1574 * @arg @ref LL_DMAMUX_CHANNEL_8
1575 * @arg @ref LL_DMAMUX_CHANNEL_9
1576 * @arg @ref LL_DMAMUX_CHANNEL_10
1577 * @arg @ref LL_DMAMUX_CHANNEL_11
1578 * @arg @ref LL_DMAMUX_CHANNEL_12
1579 * @arg @ref LL_DMAMUX_CHANNEL_13
1580 * @retval None
1581 */
LL_DMAMUX_DisableIT_SO(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)1582 __STATIC_INLINE void LL_DMAMUX_DisableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1583 {
1584 (void)(DMAMUXx);
1585 CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE);
1586 }
1587
1588 /**
1589 * @brief Check if the Synchronization Event Overrun Interrupt on DMAMUX channel x is enabled or disabled.
1590 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
1591 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
1592 * @rmtoll CxCR SOIE LL_DMAMUX_IsEnabledIT_SO
1593 * @param DMAMUXx DMAMUXx Instance
1594 * @param Channel This parameter can be one of the following values:
1595 * @arg @ref LL_DMAMUX_CHANNEL_0
1596 * @arg @ref LL_DMAMUX_CHANNEL_1
1597 * @arg @ref LL_DMAMUX_CHANNEL_2
1598 * @arg @ref LL_DMAMUX_CHANNEL_3
1599 * @arg @ref LL_DMAMUX_CHANNEL_4
1600 * @arg @ref LL_DMAMUX_CHANNEL_5
1601 * @arg @ref LL_DMAMUX_CHANNEL_6
1602 * @arg @ref LL_DMAMUX_CHANNEL_7
1603 * @arg @ref LL_DMAMUX_CHANNEL_8
1604 * @arg @ref LL_DMAMUX_CHANNEL_9
1605 * @arg @ref LL_DMAMUX_CHANNEL_10
1606 * @arg @ref LL_DMAMUX_CHANNEL_11
1607 * @arg @ref LL_DMAMUX_CHANNEL_12
1608 * @arg @ref LL_DMAMUX_CHANNEL_13
1609 * @retval State of bit (1 or 0).
1610 */
LL_DMAMUX_IsEnabledIT_SO(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)1611 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1612 {
1613 (void)(DMAMUXx);
1614 return (((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE)) == (DMAMUX_CxCR_SOIE)) ? 1UL : 0UL);
1615 }
1616
1617 /**
1618 * @brief Enable the Request Generation Trigger Event Overrun Interrupt on DMAMUX channel x.
1619 * @rmtoll RGxCR OIE LL_DMAMUX_EnableIT_RGO
1620 * @param DMAMUXx DMAMUXx Instance
1621 * @param RequestGenChannel This parameter can be one of the following values:
1622 * @arg @ref LL_DMAMUX_REQ_GEN_0
1623 * @arg @ref LL_DMAMUX_REQ_GEN_1
1624 * @arg @ref LL_DMAMUX_REQ_GEN_2
1625 * @arg @ref LL_DMAMUX_REQ_GEN_3
1626 * @retval None
1627 */
LL_DMAMUX_EnableIT_RGO(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1628 __STATIC_INLINE void LL_DMAMUX_EnableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1629 {
1630 (void)(DMAMUXx);
1631 SET_BIT((DMAMUX1_RequestGenerator0 + RequestGenChannel)->RGCR, DMAMUX_RGxCR_OIE);
1632 }
1633
1634 /**
1635 * @brief Disable the Request Generation Trigger Event Overrun Interrupt on DMAMUX channel x.
1636 * @rmtoll RGxCR OIE LL_DMAMUX_DisableIT_RGO
1637 * @param DMAMUXx DMAMUXx Instance
1638 * @param RequestGenChannel This parameter can be one of the following values:
1639 * @arg @ref LL_DMAMUX_REQ_GEN_0
1640 * @arg @ref LL_DMAMUX_REQ_GEN_1
1641 * @arg @ref LL_DMAMUX_REQ_GEN_2
1642 * @arg @ref LL_DMAMUX_REQ_GEN_3
1643 * @retval None
1644 */
LL_DMAMUX_DisableIT_RGO(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1645 __STATIC_INLINE void LL_DMAMUX_DisableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1646 {
1647 (void)(DMAMUXx);
1648 CLEAR_BIT((DMAMUX1_RequestGenerator0 + RequestGenChannel)->RGCR, DMAMUX_RGxCR_OIE);
1649 }
1650
1651 /**
1652 * @brief Check if the Request Generation Trigger Event Overrun Interrupt on DMAMUX channel x is enabled or disabled.
1653 * @rmtoll RGxCR OIE LL_DMAMUX_IsEnabledIT_RGO
1654 * @param DMAMUXx DMAMUXx Instance
1655 * @param RequestGenChannel This parameter can be one of the following values:
1656 * @arg @ref LL_DMAMUX_REQ_GEN_0
1657 * @arg @ref LL_DMAMUX_REQ_GEN_1
1658 * @arg @ref LL_DMAMUX_REQ_GEN_2
1659 * @arg @ref LL_DMAMUX_REQ_GEN_3
1660 * @retval State of bit (1 or 0).
1661 */
LL_DMAMUX_IsEnabledIT_RGO(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1662 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1663 {
1664 (void)(DMAMUXx);
1665 return ((READ_BIT((DMAMUX1_RequestGenerator0 + RequestGenChannel)->RGCR, DMAMUX_RGxCR_OIE) == (DMAMUX_RGxCR_OIE)) ? 1UL : 0UL);
1666 }
1667
1668 /**
1669 * @}
1670 */
1671
1672 /**
1673 * @}
1674 */
1675
1676 /**
1677 * @}
1678 */
1679
1680 #endif /* DMAMUX1 */
1681
1682 /**
1683 * @}
1684 */
1685
1686 #ifdef __cplusplus
1687 }
1688 #endif
1689
1690 #endif /* STM32WLxx_LL_DMAMUX_H */
1691
