1 /** 2 ****************************************************************************** 3 * @file stm32wlxx_hal_subghz.h 4 * @author MCD Application Team 5 * @brief Header file of SUBGHZ HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2020 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32WLxx_HAL_SUBGHZ_H 21 #define STM32WLxx_HAL_SUBGHZ_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32wlxx_hal_def.h" 29 30 /* Include low level driver */ 31 #include "stm32wlxx_ll_spi.h" 32 33 /** @addtogroup STM32WLxx_HAL_Driver 34 * @{ 35 */ 36 37 /** @addtogroup SUBGHZ 38 * @{ 39 */ 40 41 /* Exported types ------------------------------------------------------------*/ 42 /** @defgroup SUBGHZ_Exported_Types SUBGHZ Exported Types 43 * @{ 44 */ 45 46 /** 47 * @brief SPI Configuration Structure definition 48 */ 49 typedef struct 50 { 51 uint32_t BaudratePrescaler; /*!< Specifies the Baud Rate prescaler value which will be 52 used to configure SUBGHZSPI clock. 53 This parameter can be a value of @ref SUBGHZ_SPI_BAUDRATE_Prescaler */ 54 } SUBGHZ_InitTypeDef; 55 56 /** 57 * @brief HAL SUBGHZ State structure definition 58 */ 59 typedef enum 60 { 61 HAL_SUBGHZ_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */ 62 HAL_SUBGHZ_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 63 HAL_SUBGHZ_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ 64 HAL_SUBGHZ_STATE_RESET_RF_READY = 0x03U, /*!< Peripheral not Initialized but RF is */ 65 } HAL_SUBGHZ_StateTypeDef; 66 67 /** 68 * @brief HAL SUBGHZ CAD Status structure definition 69 */ 70 typedef enum 71 { 72 HAL_SUBGHZ_CAD_CLEAR = 0x00U, /*!< Channel activity cleared */ 73 HAL_SUBGHZ_CAD_DETECTED = 0x01U, /*!< Channel activity detected */ 74 } HAL_SUBGHZ_CadStatusTypeDef; 75 76 /** 77 * @brief SUBGHZ handle Structure definition 78 */ 79 #if (USE_HAL_SUBGHZ_REGISTER_CALLBACKS == 1) 80 typedef struct __SUBGHZ_HandleTypeDef 81 #else 82 typedef struct 83 #endif /* USE_HAL_SUBGHZ_REGISTER_CALLBACKS */ 84 { 85 SUBGHZ_InitTypeDef Init; /*!< SUBGHZ communication parameters */ 86 87 uint8_t DeepSleep; /*!< SUBGHZ deep sleep state */ 88 89 HAL_LockTypeDef Lock; /*!< Locking object */ 90 91 __IO HAL_SUBGHZ_StateTypeDef State; /*!< SUBGHZ communication state */ 92 93 __IO uint32_t ErrorCode; /*!< SUBGHZ Error code */ 94 95 #if (USE_HAL_SUBGHZ_REGISTER_CALLBACKS == 1) 96 void (* TxCpltCallback)(struct __SUBGHZ_HandleTypeDef *hsubghz); /*!< SUBGHZ Tx Completed callback */ 97 void (* RxCpltCallback)(struct __SUBGHZ_HandleTypeDef *hsubghz); /*!< SUBGHZ Rx Completed callback */ 98 void (* PreambleDetectedCallback)(struct __SUBGHZ_HandleTypeDef *hsubghz); /*!< SUBGHZ Preamble detected callback */ 99 void (* SyncWordValidCallback)(struct __SUBGHZ_HandleTypeDef *hsubghz); /*!< SUBGHZ Synchro word valid callback */ 100 void (* HeaderValidCallback)(struct __SUBGHZ_HandleTypeDef *hsubghz); /*!< SUBGHZ Header valid callback */ 101 void (* HeaderErrorCallback)(struct __SUBGHZ_HandleTypeDef *hsubghz); /*!< SUBGHZ Header error callback */ 102 void (* CRCErrorCallback)(struct __SUBGHZ_HandleTypeDef *hsubghz); /*!< SUBGHZ CRC Error callback */ 103 void (* CADStatusCallback)(struct __SUBGHZ_HandleTypeDef *hsubghz, HAL_SUBGHZ_CadStatusTypeDef cadstatus); /*!< SUBGHZ CAD Status callback */ 104 void (* RxTxTimeoutCallback)(struct __SUBGHZ_HandleTypeDef *hsubghz); /*!< SUBGHZ Rx Tx Timeout callback */ 105 void (* MspInitCallback)(struct __SUBGHZ_HandleTypeDef *hsubghz); /*!< SUBGHZ Msp Init callback */ 106 void (* MspDeInitCallback)(struct __SUBGHZ_HandleTypeDef *hsubghz); /*!< SUBGHZ Msp DeInit callback */ 107 void (* LrFhssHopCallback)(struct __SUBGHZ_HandleTypeDef *hsubghz); /*!< SUBGHZ LR FHSS Hop callback */ 108 #endif /* USE_HAL_SUBGHZ_REGISTER_CALLBACKS */ 109 } SUBGHZ_HandleTypeDef; 110 111 #if (USE_HAL_SUBGHZ_REGISTER_CALLBACKS == 1) 112 /** 113 * @brief HAL SUBGHZ Callback ID enumeration definition 114 */ 115 typedef enum 116 { 117 HAL_SUBGHZ_TX_COMPLETE_CB_ID = 0x00U, /*!< SUBGHZ Tx Completed callback ID */ 118 HAL_SUBGHZ_RX_COMPLETE_CB_ID = 0x01U, /*!< SUBGHZ Rx Completed callback ID */ 119 HAL_SUBGHZ_PREAMBLE_DETECTED_CB_ID = 0x02U, /*!< SUBGHZ Preamble detected callback ID */ 120 HAL_SUBGHZ_SYNCWORD_VALID_CB_ID = 0x03U, /*!< SUBGHZ Synchro word valid callback ID */ 121 HAL_SUBGHZ_HEADER_VALID_CB_ID = 0x04U, /*!< SUBGHZ Header valid callback ID */ 122 HAL_SUBGHZ_HEADER_ERROR_CB_ID = 0x05U, /*!< SUBGHZ Header error callback ID */ 123 HAL_SUBGHZ_CRC_ERROR_CB_ID = 0x06U, /*!< SUBGHZ CRC error callback ID */ 124 HAL_SUBGHZ_RX_TX_TIMEOUT_CB_ID = 0x07U, /*!< SUBGHZ Rx Tx timeout callback ID */ 125 HAL_SUBGHZ_MSPINIT_CB_ID = 0x08U, /*!< SUBGHZ Msp Init callback ID */ 126 HAL_SUBGHZ_MSPDEINIT_CB_ID = 0x09U, /*!< SUBGHZ Msp DeInit callback ID */ 127 HAL_SUBGHZ_LR_FHSS_HOP_CB_ID = 0x0AU, /*!< SUBGHZ LR FHSS Hop callback ID */ 128 } HAL_SUBGHZ_CallbackIDTypeDef; 129 130 /** 131 * @brief HAL SUBGHZ Callback pointer definition 132 */ 133 typedef void (*pSUBGHZ_CallbackTypeDef)(SUBGHZ_HandleTypeDef *hsubghz); /*!< pointer to an SUBGHZ callback function */ 134 typedef void (*pSUBGHZ_CadStatusCallbackTypeDef)(SUBGHZ_HandleTypeDef *hsubghz, HAL_SUBGHZ_CadStatusTypeDef cadstatus); /*!< pointer to an CAD Status callback function */ 135 #endif /* USE_HAL_SUBGHZ_REGISTER_CALLBACKS */ 136 137 /* 138 * @brief HAL SUBGHZ Radio Set Command enumeration definition 139 */ 140 typedef enum 141 { 142 RADIO_SET_SLEEP = 0x84U, 143 RADIO_SET_STANDBY = 0x80U, 144 RADIO_SET_FS = 0xC1U, 145 RADIO_SET_TX = 0x83U, 146 RADIO_SET_RX = 0x82U, 147 RADIO_SET_RXDUTYCYCLE = 0x94U, 148 RADIO_SET_CAD = 0xC5U, 149 RADIO_SET_TXCONTINUOUSWAVE = 0xD1U, 150 RADIO_SET_TXCONTINUOUSPREAMBLE = 0xD2U, 151 RADIO_SET_PACKETTYPE = 0x8AU, 152 RADIO_SET_RFFREQUENCY = 0x86U, 153 RADIO_SET_TXPARAMS = 0x8EU, 154 RADIO_SET_PACONFIG = 0x95U, 155 RADIO_SET_CADPARAMS = 0x88U, 156 RADIO_SET_BUFFERBASEADDRESS = 0x8FU, 157 RADIO_SET_MODULATIONPARAMS = 0x8BU, 158 RADIO_SET_PACKETPARAMS = 0x8CU, 159 RADIO_RESET_STATS = 0x00U, 160 RADIO_CFG_DIOIRQ = 0x08U, 161 RADIO_CLR_IRQSTATUS = 0x02U, 162 RADIO_CALIBRATE = 0x89U, 163 RADIO_CALIBRATEIMAGE = 0x98U, 164 RADIO_SET_REGULATORMODE = 0x96U, 165 RADIO_SET_TCXOMODE = 0x97U, 166 RADIO_SET_TXFALLBACKMODE = 0x93U, 167 RADIO_SET_RFSWITCHMODE = 0x9DU, 168 RADIO_SET_STOPRXTIMERONPREAMBLE = 0x9FU, 169 RADIO_SET_LORASYMBTIMEOUT = 0xA0U, 170 RADIO_CLR_ERROR = 0x07U 171 } SUBGHZ_RadioSetCmd_t; 172 173 174 /** 175 * @brief HAL SUBGHZ Radio Get Command enumeration definition 176 */ 177 typedef enum 178 { 179 RADIO_GET_STATUS = 0xC0U, 180 RADIO_GET_PACKETTYPE = 0x11U, 181 RADIO_GET_RXBUFFERSTATUS = 0x13U, 182 RADIO_GET_PACKETSTATUS = 0x14U, 183 RADIO_GET_RSSIINST = 0x15U, 184 RADIO_GET_STATS = 0x10U, 185 RADIO_GET_IRQSTATUS = 0x12U, 186 RADIO_GET_ERROR = 0x17U 187 } SUBGHZ_RadioGetCmd_t; 188 /** 189 * @} 190 */ 191 192 /* Exported constants --------------------------------------------------------*/ 193 /** @defgroup SUBGHZ_Exported_Constants SUBGHZ Exported Constants 194 * @{ 195 */ 196 197 /** @defgroup SUBGHZ_Error_Code SUBGHZ Error Code definition 198 * @brief SUBGHZ Error Code definition 199 * @{ 200 */ 201 #define HAL_SUBGHZ_ERROR_NONE (0x00000000U) /*!< No error */ 202 #define HAL_SUBGHZ_ERROR_TIMEOUT (0x00000001U) /*!< Timeout Error */ 203 #define HAL_SUBGHZ_ERROR_RF_BUSY (0x00000002U) /*!< RF Busy Error */ 204 #if (USE_HAL_SUBGHZ_REGISTER_CALLBACKS == 1) 205 #define HAL_SUBGHZ_ERROR_INVALID_CALLBACK (0x00000080U) /*!< Invalid Callback error */ 206 #endif /* USE_HAL_SUBGHZ_REGISTER_CALLBACKS */ 207 /** 208 * @} 209 */ 210 211 /** @defgroup SUBGHZ_SPI_BAUDRATE_Prescaler SUBGHZ BaudRate Prescaler 212 * @{ 213 */ 214 #define SUBGHZSPI_BAUDRATEPRESCALER_2 (0x00000000U) 215 #define SUBGHZSPI_BAUDRATEPRESCALER_4 (SPI_CR1_BR_0) 216 #define SUBGHZSPI_BAUDRATEPRESCALER_8 (SPI_CR1_BR_1) 217 #define SUBGHZSPI_BAUDRATEPRESCALER_16 (SPI_CR1_BR_1 | SPI_CR1_BR_0) 218 #define SUBGHZSPI_BAUDRATEPRESCALER_32 (SPI_CR1_BR_2) 219 #define SUBGHZSPI_BAUDRATEPRESCALER_64 (SPI_CR1_BR_2 | SPI_CR1_BR_0) 220 #define SUBGHZSPI_BAUDRATEPRESCALER_128 (SPI_CR1_BR_2 | SPI_CR1_BR_1) 221 #define SUBGHZSPI_BAUDRATEPRESCALER_256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) 222 /** 223 * @} 224 */ 225 226 /** 227 * @} 228 */ 229 230 /* Private constants ---------------------------------------------------------*/ 231 /** @defgroup SUBGHZ_Private_Constants SUBGHZ Private Constants 232 * @{ 233 */ 234 235 /** 236 * @brief SUBGHZSPI_Interrupts SUBGHZSPI Interrupts 237 */ 238 #define SUBGHZ_IT_TX_CPLT 0x0001U 239 #define SUBGHZ_IT_RX_CPLT 0x0002U 240 #define SUBGHZ_IT_PREAMBLE_DETECTED 0x0004U 241 #define SUBGHZ_IT_SYNCWORD_VALID 0x0008U 242 #define SUBGHZ_IT_HEADER_VALID 0x0010U 243 #define SUBGHZ_IT_HEADER_ERROR 0x0020U 244 #define SUBGHZ_IT_CRC_ERROR 0x0040U 245 #define SUBGHZ_IT_CAD_DONE 0x0080U 246 #define SUBGHZ_IT_CAD_ACTIVITY_DETECTED 0x0100U 247 #define SUBGHZ_IT_RX_TX_TIMEOUT 0x0200U 248 #define SUBGHZ_IT_LR_FHSS_HOP 0x4000U 249 /** 250 * @brief SUBGHZ Radio Read/Write Command definition 251 */ 252 #define SUBGHZ_RADIO_WRITE_REGISTER 0x0DU 253 #define SUBGHZ_RADIO_READ_REGISTER 0x1DU 254 #define SUBGHZ_RADIO_WRITE_BUFFER 0x0EU 255 #define SUBGHZ_RADIO_READ_BUFFER 0x1EU 256 /** 257 * @} 258 */ 259 260 261 /* Exported macros -----------------------------------------------------------*/ 262 /** @defgroup SUBGHZ_Exported_Macros SUBGHZ Exported Macros 263 * @{ 264 */ 265 266 /** @brief Reset SUBGHZ handle state. 267 * @param __HANDLE__ specifies the SUBGHZ Handle. 268 * @retval None 269 */ 270 #if (USE_HAL_SUBGHZ_REGISTER_CALLBACKS == 1) 271 #define __HAL_SUBGHZ_RESET_HANDLE_STATE(__HANDLE__) \ 272 do{ \ 273 (__HANDLE__)->State = HAL_SUBGHZ_STATE_RESET; \ 274 (__HANDLE__)->MspInitCallback = NULL; \ 275 (__HANDLE__)->MspDeInitCallback = NULL; \ 276 } while(0U) 277 278 #define __HAL_SUBGHZ_RESET_HANDLE_STATE_RF_READY(__HANDLE__) \ 279 do{ \ 280 (__HANDLE__)->State = HAL_SUBGHZ_STATE_RESET_RF_READY; \ 281 (__HANDLE__)->MspInitCallback = NULL; \ 282 (__HANDLE__)->MspDeInitCallback = NULL; \ 283 } while(0U) 284 #else 285 #define __HAL_SUBGHZ_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SUBGHZ_STATE_RESET) 286 #define __HAL_SUBGHZ_RESET_HANDLE_STATE_RF_READY(__HANDLE__) ((__HANDLE__)->State = HAL_SUBGHZ_STATE_RESET_RF_READY) 287 #endif /* USE_HAL_SUBGHZ_REGISTER_CALLBACKS */ 288 /** 289 * @} 290 */ 291 292 /* Private macros -----------------------------------------------------------*/ 293 /** @defgroup SUBGHZ_Private_Macros SUBGHZ Private Macros 294 * @{ 295 */ 296 297 /** @brief Check whether the specified SPI Interrupt is set or not. 298 * @param __SUBGHZ_IRQ__ copy of SUBGHZ IRQ Register. 299 * @param __INTERRUPT__ specifies the SUBGHZ interrupt source to check. 300 * This parameter can be one of the following values: 301 * @arg SUBGHZ_IT_TX_DONE 302 * @arg SUBGHZ_IT_RX_DONE 303 * @arg SUBGHZ_IT_PREAMBLE_DETECTED 304 * @arg SUBGHZ_IT_SYNCWORD_VALID 305 * @arg SUBGHZ_IT_HEADER_VALID 306 * @arg SUBGHZ_IT_HEADER_ERROR 307 * @arg SUBGHZ_IT_CRC_ERROR 308 * @arg SUBGHZ_IT_CAD_DONE 309 * @arg SUBGHZ_IT_CAD_ACTIVITY_DETECTED 310 * @arg SUBGHZ_IT_RX_TX_TIMEOUT 311 * @arg SUBGHZ_IT_LR_FHSS_HOP 312 * @retval SET or RESET. 313 */ 314 #define SUBGHZ_CHECK_IT_SOURCE(__SUBGHZ_IRQ__, __INTERRUPT__) \ 315 ((((__SUBGHZ_IRQ__) & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 316 317 /** @brief Checks if SUBGHZSPI Baudrate prescaler parameter is in allowed range. 318 * @param __PRESCALER__ specifies the SUBGHZSPI Baudrate prescaler. 319 * This parameter can be a value of @ref SUBGHZ_SPI_BAUDRATE_Prescaler 320 * @retval None 321 */ 322 #define IS_SUBGHZSPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SUBGHZSPI_BAUDRATEPRESCALER_2) || \ 323 ((__PRESCALER__) == SUBGHZSPI_BAUDRATEPRESCALER_4) || \ 324 ((__PRESCALER__) == SUBGHZSPI_BAUDRATEPRESCALER_8) || \ 325 ((__PRESCALER__) == SUBGHZSPI_BAUDRATEPRESCALER_16) || \ 326 ((__PRESCALER__) == SUBGHZSPI_BAUDRATEPRESCALER_32) || \ 327 ((__PRESCALER__) == SUBGHZSPI_BAUDRATEPRESCALER_64) || \ 328 ((__PRESCALER__) == SUBGHZSPI_BAUDRATEPRESCALER_128) || \ 329 ((__PRESCALER__) == SUBGHZSPI_BAUDRATEPRESCALER_256)) 330 /** 331 * @} 332 */ 333 334 /* Exported functions ------------------------------------------------------- */ 335 /** @addtogroup SUBGHZ_Exported_Functions 336 * @{ 337 */ 338 339 /** @addtogroup SUBGHZ_Exported_Functions_Group1 340 * @{ 341 */ 342 /* Initialization/de-initialization functions ********************************/ 343 HAL_StatusTypeDef HAL_SUBGHZ_Init(SUBGHZ_HandleTypeDef *hsubghz); 344 HAL_StatusTypeDef HAL_SUBGHZ_DeInit(SUBGHZ_HandleTypeDef *hsubghz); 345 void HAL_SUBGHZ_MspInit(SUBGHZ_HandleTypeDef *hsubghz); 346 void HAL_SUBGHZ_MspDeInit(SUBGHZ_HandleTypeDef *hsubghz); 347 348 /* Callbacks Register/UnRegister functions ***********************************/ 349 #if (USE_HAL_SUBGHZ_REGISTER_CALLBACKS == 1) 350 HAL_StatusTypeDef HAL_SUBGHZ_RegisterCallback(SUBGHZ_HandleTypeDef *hsubghz, 351 HAL_SUBGHZ_CallbackIDTypeDef CallbackID, 352 pSUBGHZ_CallbackTypeDef pCallback); 353 HAL_StatusTypeDef HAL_SUBGHZ_UnRegisterCallback(SUBGHZ_HandleTypeDef *hsubghz, 354 HAL_SUBGHZ_CallbackIDTypeDef CallbackID); 355 HAL_StatusTypeDef HAL_SUBGHZ_RegisterCadStatusCallback(SUBGHZ_HandleTypeDef *hsubghz, 356 pSUBGHZ_CadStatusCallbackTypeDef pCallback); 357 HAL_StatusTypeDef HAL_SUBGHZ_UnRegisterCadStatusCallback(SUBGHZ_HandleTypeDef *hsubghz); 358 #endif /* USE_HAL_SUBGHZ_REGISTER_CALLBACKS */ 359 /** 360 * @} 361 */ 362 363 /** @addtogroup SUBGHZ_Exported_Functions_Group2 364 * @{ 365 */ 366 /* I/O operation functions ***************************************************/ 367 HAL_StatusTypeDef HAL_SUBGHZ_ExecSetCmd(SUBGHZ_HandleTypeDef *hsubghz, SUBGHZ_RadioSetCmd_t Command, uint8_t *pBuffer, 368 uint16_t Size); 369 HAL_StatusTypeDef HAL_SUBGHZ_ExecGetCmd(SUBGHZ_HandleTypeDef *hsubghz, SUBGHZ_RadioGetCmd_t Command, uint8_t *pBuffer, 370 uint16_t Size); 371 HAL_StatusTypeDef HAL_SUBGHZ_WriteBuffer(SUBGHZ_HandleTypeDef *hsubghz, uint8_t Offset, uint8_t *pBuffer, 372 uint16_t Size); 373 HAL_StatusTypeDef HAL_SUBGHZ_ReadBuffer(SUBGHZ_HandleTypeDef *hsubghz, uint8_t Offset, uint8_t *pBuffer, 374 uint16_t Size); 375 HAL_StatusTypeDef HAL_SUBGHZ_WriteRegisters(SUBGHZ_HandleTypeDef *hsubghz, uint16_t Address, uint8_t *pBuffer, 376 uint16_t Size); 377 HAL_StatusTypeDef HAL_SUBGHZ_ReadRegisters(SUBGHZ_HandleTypeDef *hsubghz, uint16_t Address, uint8_t *pBuffer, 378 uint16_t Size); 379 380 HAL_StatusTypeDef HAL_SUBGHZ_WriteRegister(SUBGHZ_HandleTypeDef *hsubghz, uint16_t Address, uint8_t Value); 381 HAL_StatusTypeDef HAL_SUBGHZ_ReadRegister(SUBGHZ_HandleTypeDef *hsubghz, uint16_t Address, uint8_t *pValue); 382 383 void HAL_SUBGHZ_IRQHandler(SUBGHZ_HandleTypeDef *hsubghz); 384 void HAL_SUBGHZ_TxCpltCallback(SUBGHZ_HandleTypeDef *hsubghz); 385 void HAL_SUBGHZ_RxCpltCallback(SUBGHZ_HandleTypeDef *hsubghz); 386 void HAL_SUBGHZ_PreambleDetectedCallback(SUBGHZ_HandleTypeDef *hsubghz); 387 void HAL_SUBGHZ_SyncWordValidCallback(SUBGHZ_HandleTypeDef *hsubghz); 388 void HAL_SUBGHZ_HeaderValidCallback(SUBGHZ_HandleTypeDef *hsubghz); 389 void HAL_SUBGHZ_HeaderErrorCallback(SUBGHZ_HandleTypeDef *hsubghz); 390 void HAL_SUBGHZ_CRCErrorCallback(SUBGHZ_HandleTypeDef *hsubghz); 391 void HAL_SUBGHZ_CADStatusCallback(SUBGHZ_HandleTypeDef *hsubghz, HAL_SUBGHZ_CadStatusTypeDef cadstatus); 392 void HAL_SUBGHZ_RxTxTimeoutCallback(SUBGHZ_HandleTypeDef *hsubghz); 393 void HAL_SUBGHZ_LrFhssHopCallback(SUBGHZ_HandleTypeDef *hsubghz); 394 /** 395 * @} 396 */ 397 398 /** @addtogroup SUBGHZ_Exported_Functions_Group3 399 * @{ 400 */ 401 /* Peripheral State and Error functions ***************************************/ 402 HAL_SUBGHZ_StateTypeDef HAL_SUBGHZ_GetState(SUBGHZ_HandleTypeDef *hsubghz); 403 uint32_t HAL_SUBGHZ_GetError(SUBGHZ_HandleTypeDef *hsubghz); 404 /** 405 * @} 406 */ 407 408 /** 409 * @} 410 */ 411 412 /** 413 * @} 414 */ 415 416 /** 417 * @} 418 */ 419 420 #ifdef __cplusplus 421 } 422 #endif 423 424 #endif /* STM32WLxx_HAL_SUBGHZ_H */ 425 426
