1 /** 2 ****************************************************************************** 3 * @file stm32wlxx_hal_rcc_ex.h 4 * @author MCD Application Team 5 * @brief Header file of RCC HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2020 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32WLxx_HAL_RCC_EX_H 21 #define STM32WLxx_HAL_RCC_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32wlxx_hal_def.h" 29 #include "stm32wlxx_ll_exti.h" 30 #include "stm32wlxx_ll_pwr.h" 31 32 /** @addtogroup STM32WLxx_HAL_Driver 33 * @{ 34 */ 35 36 /** @addtogroup RCCEx 37 * @{ 38 */ 39 /* Private constants ---------------------------------------------------------*/ 40 /** @addtogroup RCCEx_Private_Constants 41 * @{ 42 */ 43 /* Define used for IS_RCC_* macros below */ 44 #define RCC_PERIPHCLOCK_ALL (RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_I2S2 | \ 45 RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | \ 46 RCC_PERIPHCLK_I2C3 | RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | \ 47 RCC_PERIPHCLK_LPTIM3 | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_RNG | \ 48 RCC_PERIPHCLK_RTC ) 49 /** 50 * @} 51 */ 52 53 /* Private macros ------------------------------------------------------------*/ 54 /** @addtogroup RCCEx_Private_Macros 55 * @{ 56 */ 57 58 #define IS_RCC_LSCOSOURCE(__SOURCE__) (((__SOURCE__) == RCC_LSCOSOURCE_LSI) || \ 59 ((__SOURCE__) == RCC_LSCOSOURCE_LSE)) 60 61 #define IS_RCC_PERIPHCLOCK(__SELECTION__) ((((__SELECTION__) & RCC_PERIPHCLOCK_ALL) != 0x00u) && \ 62 (((__SELECTION__) & ~RCC_PERIPHCLOCK_ALL) == 0x00u)) 63 64 #define IS_RCC_USART1CLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_USART1CLKSOURCE_PCLK2) || \ 65 ((__SOURCE__) == RCC_USART1CLKSOURCE_SYSCLK) || \ 66 ((__SOURCE__) == RCC_USART1CLKSOURCE_LSE) || \ 67 ((__SOURCE__) == RCC_USART1CLKSOURCE_HSI)) 68 69 #define IS_RCC_USART2CLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_USART2CLKSOURCE_PCLK1) || \ 70 ((__SOURCE__) == RCC_USART2CLKSOURCE_SYSCLK) || \ 71 ((__SOURCE__) == RCC_USART2CLKSOURCE_LSE) || \ 72 ((__SOURCE__) == RCC_USART2CLKSOURCE_HSI)) 73 74 #define IS_RCC_I2S2CLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_I2S2CLKSOURCE_PLL) || \ 75 ((__SOURCE__) == RCC_I2S2CLKSOURCE_HSI) || \ 76 ((__SOURCE__) == RCC_I2S2CLKSOURCE_PIN)) 77 78 #define IS_RCC_LPUART1CLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_LPUART1CLKSOURCE_PCLK1) || \ 79 ((__SOURCE__) == RCC_LPUART1CLKSOURCE_SYSCLK) || \ 80 ((__SOURCE__) == RCC_LPUART1CLKSOURCE_LSE) || \ 81 ((__SOURCE__) == RCC_LPUART1CLKSOURCE_HSI)) 82 83 #define IS_RCC_I2C1CLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_I2C1CLKSOURCE_PCLK1) || \ 84 ((__SOURCE__) == RCC_I2C1CLKSOURCE_SYSCLK)|| \ 85 ((__SOURCE__) == RCC_I2C1CLKSOURCE_HSI)) 86 87 #define IS_RCC_I2C2CLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_I2C2CLKSOURCE_PCLK1) || \ 88 ((__SOURCE__) == RCC_I2C2CLKSOURCE_SYSCLK)|| \ 89 ((__SOURCE__) == RCC_I2C2CLKSOURCE_HSI)) 90 91 92 #define IS_RCC_I2C3CLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_I2C3CLKSOURCE_PCLK1) || \ 93 ((__SOURCE__) == RCC_I2C3CLKSOURCE_SYSCLK)|| \ 94 ((__SOURCE__) == RCC_I2C3CLKSOURCE_HSI)) 95 96 #define IS_RCC_LPTIM1CLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_LPTIM1CLKSOURCE_PCLK1) || \ 97 ((__SOURCE__) == RCC_LPTIM1CLKSOURCE_LSI) || \ 98 ((__SOURCE__) == RCC_LPTIM1CLKSOURCE_HSI) || \ 99 ((__SOURCE__) == RCC_LPTIM1CLKSOURCE_LSE)) 100 101 #define IS_RCC_LPTIM2CLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_LPTIM2CLKSOURCE_PCLK1) || \ 102 ((__SOURCE__) == RCC_LPTIM2CLKSOURCE_LSI) || \ 103 ((__SOURCE__) == RCC_LPTIM2CLKSOURCE_HSI) || \ 104 ((__SOURCE__) == RCC_LPTIM2CLKSOURCE_LSE)) 105 106 #define IS_RCC_LPTIM3CLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_LPTIM3CLKSOURCE_PCLK1) || \ 107 ((__SOURCE__) == RCC_LPTIM3CLKSOURCE_LSI) || \ 108 ((__SOURCE__) == RCC_LPTIM3CLKSOURCE_HSI) || \ 109 ((__SOURCE__) == RCC_LPTIM3CLKSOURCE_LSE)) 110 111 #define IS_RCC_RNGCLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_RNGCLKSOURCE_PLL) || \ 112 ((__SOURCE__) == RCC_RNGCLKSOURCE_LSI) || \ 113 ((__SOURCE__) == RCC_RNGCLKSOURCE_LSE) || \ 114 ((__SOURCE__) == RCC_RNGCLKSOURCE_MSI)) 115 116 #define IS_RCC_ADCCLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_ADCCLKSOURCE_NONE) || \ 117 ((__SOURCE__) == RCC_ADCCLKSOURCE_HSI) || \ 118 ((__SOURCE__) == RCC_ADCCLKSOURCE_PLL) || \ 119 ((__SOURCE__) == RCC_ADCCLKSOURCE_SYSCLK)) 120 121 /** 122 * @} 123 */ 124 125 /* Exported types ------------------------------------------------------------*/ 126 127 /** @defgroup RCCEx_Exported_Types RCCEx Exported Types 128 * @{ 129 */ 130 131 /** 132 * @brief RCC extended clocks structure definition 133 */ 134 typedef struct 135 { 136 uint32_t PeriphClockSelection; /*!< The Extended Clock to be configured. 137 This parameter can be a value of @ref RCCEx_Periph_Clock_Selection */ 138 139 uint32_t Usart1ClockSelection; /*!< Specifies USART1 clock source. 140 This parameter can be a value of @ref RCCEx_USART1_Clock_Source */ 141 142 uint32_t Usart2ClockSelection; /*!< Specifies USART2 clock source. 143 This parameter can be a value of @ref RCCEx_USART2_Clock_Source */ 144 145 uint32_t I2s2ClockSelection; /*!< Specifies I2S2 clock source. 146 This parameter can be a value of @ref RCCEx_I2S2_Clock_Source */ 147 148 uint32_t Lpuart1ClockSelection; /*!< Specifies LPUART1 clock source. 149 This parameter can be a value of @ref RCCEx_LPUART1_Clock_Source */ 150 151 uint32_t I2c1ClockSelection; /*!< Specifies I2C1 clock source. 152 This parameter can be a value of @ref RCCEx_I2C1_Clock_Source */ 153 154 uint32_t I2c2ClockSelection; /*!< Specifies I2C2 clock source. 155 This parameter can be a value of @ref RCCEx_I2C2_Clock_Source */ 156 157 uint32_t I2c3ClockSelection; /*!< Specifies I2C3 clock source. 158 This parameter can be a value of @ref RCCEx_I2C3_Clock_Source */ 159 160 uint32_t Lptim1ClockSelection; /*!< Specifies LPTIM1 clock source. 161 This parameter can be a value of @ref RCCEx_LPTIM1_Clock_Source */ 162 163 uint32_t Lptim2ClockSelection; /*!< Specifies LPTIM2 clock source. 164 This parameter can be a value of @ref RCCEx_LPTIM2_Clock_Source */ 165 166 uint32_t Lptim3ClockSelection; /*!< Specifies LPTIM3 clock source. 167 This parameter can be a value of @ref RCCEx_LPTIM3_Clock_Source */ 168 169 uint32_t AdcClockSelection; /*!< Specifies ADC interface clock source. 170 This parameter can be a value of @ref RCCEx_ADC_Clock_Source */ 171 172 uint32_t RngClockSelection; /*!< Specifies RNG clock source. 173 This parameter can be a value of @ref RCCEx_RNG_Clock_Source */ 174 175 uint32_t RTCClockSelection; /*!< Specifies RTC clock source. 176 This parameter can be a value of @ref RCC_RTC_Clock_Source */ 177 178 } RCC_PeriphCLKInitTypeDef; 179 180 /** 181 * @} 182 */ 183 184 /* Exported constants --------------------------------------------------------*/ 185 /** @defgroup RCCEx_Exported_Constants RCCEx Exported Constants 186 * @{ 187 */ 188 189 /** @defgroup RCCEx_LSCO_Clock_Source Low Speed Clock Source 190 * @{ 191 */ 192 #define RCC_LSCOSOURCE_LSI LL_RCC_LSCO_CLKSOURCE_LSI /*!< LSI selection for low speed clock output */ 193 #define RCC_LSCOSOURCE_LSE LL_RCC_LSCO_CLKSOURCE_LSE /*!< LSE selection for low speed clock output */ 194 /** 195 * @} 196 */ 197 198 /** @defgroup RCCEx_Periph_Clock_Selection Periph Clock Selection 199 * @{ 200 */ 201 #define RCC_PERIPHCLK_USART1 0x00000001U /*!< USART1 Peripheral Clock Selection */ 202 #define RCC_PERIPHCLK_USART2 0x00000002U /*!< USART2 Peripheral Clock Selection */ 203 #define RCC_PERIPHCLK_I2S2 0x00000010U /*!< I2S2 Peripheral Clock Selection */ 204 #define RCC_PERIPHCLK_LPUART1 0x00000020U /*!< LPUART1 Peripheral Clock Selection */ 205 #define RCC_PERIPHCLK_I2C1 0x00000040U /*!< I2C1 Peripheral Clock Selection */ 206 #define RCC_PERIPHCLK_I2C2 0x00000080U /*!< I2C2 Peripheral Clock Selection */ 207 #define RCC_PERIPHCLK_I2C3 0x00000100U /*!< I2C3 Peripheral Clock Selection */ 208 #define RCC_PERIPHCLK_LPTIM1 0x00000200U /*!< LPTIM1 Peripheral Clock Selection */ 209 #define RCC_PERIPHCLK_LPTIM2 0x00000400U /*!< LPTIM2 Peripheral Clock Selection */ 210 #define RCC_PERIPHCLK_LPTIM3 0x00000800U /*!< LPTIM3 Peripheral Clock Selection */ 211 #define RCC_PERIPHCLK_ADC 0x00004000U /*!< ADC Peripheral Clock Selection */ 212 #define RCC_PERIPHCLK_RNG 0x00008000U /*!< RNG Peripheral Clock Selection */ 213 #define RCC_PERIPHCLK_RTC 0x00010000U /*!< RTC Peripheral Clock Selection */ 214 /** 215 * @} 216 */ 217 218 /** @defgroup RCCEx_USART1_Clock_Source USART1 Clock Source 219 * @{ 220 */ 221 #define RCC_USART1CLKSOURCE_PCLK2 LL_RCC_USART1_CLKSOURCE_PCLK2 /*!< APB2 clock selected as USART1 clock */ 222 #define RCC_USART1CLKSOURCE_SYSCLK LL_RCC_USART1_CLKSOURCE_SYSCLK /*!< SYSCLK clock selected as USART1 clock */ 223 #define RCC_USART1CLKSOURCE_HSI LL_RCC_USART1_CLKSOURCE_HSI /*!< HSI clock selected as USART1 clock */ 224 #define RCC_USART1CLKSOURCE_LSE LL_RCC_USART1_CLKSOURCE_LSE /*!< LSE clock selected as USART1 clock */ 225 /** 226 * @} 227 */ 228 229 /** @defgroup RCCEx_USART2_Clock_Source USART2 Clock Source 230 * @{ 231 */ 232 #define RCC_USART2CLKSOURCE_PCLK1 LL_RCC_USART2_CLKSOURCE_PCLK1 /*!< APB1 clock selected as USART2 clock*/ 233 #define RCC_USART2CLKSOURCE_SYSCLK LL_RCC_USART2_CLKSOURCE_SYSCLK /*!< SYSCLK clock selected as USART2 clock*/ 234 #define RCC_USART2CLKSOURCE_HSI LL_RCC_USART2_CLKSOURCE_HSI /*!< HSI clock selected as USART2 clock*/ 235 #define RCC_USART2CLKSOURCE_LSE LL_RCC_USART2_CLKSOURCE_LSE /*!< LSE clock selected as USART2 clock*/ 236 /** 237 * @} 238 */ 239 240 /** @defgroup RCCEx_I2S2_Clock_Source I2S Clock Source 241 * @{ 242 */ 243 #define RCC_I2S2CLKSOURCE_PLL LL_RCC_I2S2_CLKSOURCE_PLL /*!< PLL "Q" clock selected as I2S2 clock source */ 244 #define RCC_I2S2CLKSOURCE_HSI LL_RCC_I2S2_CLKSOURCE_HSI /*!< HSI clock selected as I2S2 clock */ 245 #define RCC_I2S2CLKSOURCE_PIN LL_RCC_I2S2_CLKSOURCE_PIN /*!< External clock selected as I2S2 clock */ 246 /** 247 * @} 248 */ 249 250 /** @defgroup RCCEx_LPUART1_Clock_Source LPUART1 Clock Source 251 * @{ 252 */ 253 #define RCC_LPUART1CLKSOURCE_PCLK1 LL_RCC_LPUART1_CLKSOURCE_PCLK1 /*!< APB1 clock selected as LPUART1 clock*/ 254 #define RCC_LPUART1CLKSOURCE_SYSCLK LL_RCC_LPUART1_CLKSOURCE_SYSCLK /*!< SYSCLK clock selected as LPUART1 clock*/ 255 #define RCC_LPUART1CLKSOURCE_HSI LL_RCC_LPUART1_CLKSOURCE_HSI /*!< HSI clock selected as LPUART1 clock*/ 256 #define RCC_LPUART1CLKSOURCE_LSE LL_RCC_LPUART1_CLKSOURCE_LSE /*!< LSE clock selected as LPUART1 clock*/ 257 /** 258 * @} 259 */ 260 261 /** @defgroup RCCEx_I2C1_Clock_Source I2C1 Clock Source 262 * @{ 263 */ 264 #define RCC_I2C1CLKSOURCE_PCLK1 LL_RCC_I2C1_CLKSOURCE_PCLK1 /*!< APB1 clock selected as I2C1 clock */ 265 #define RCC_I2C1CLKSOURCE_SYSCLK LL_RCC_I2C1_CLKSOURCE_SYSCLK /*!< SYSCLK clock selected as I2C1 clock */ 266 #define RCC_I2C1CLKSOURCE_HSI LL_RCC_I2C1_CLKSOURCE_HSI /*!< HSI clock selected as I2C1 clock */ 267 /** 268 * @} 269 */ 270 271 /** @defgroup RCCEx_I2C2_Clock_Source I2C2 Clock Source 272 * @{ 273 */ 274 #define RCC_I2C2CLKSOURCE_PCLK1 LL_RCC_I2C2_CLKSOURCE_PCLK1 /*!< APB1 clock selected as I2C2 clock */ 275 #define RCC_I2C2CLKSOURCE_SYSCLK LL_RCC_I2C2_CLKSOURCE_SYSCLK /*!< SYSCLK clock selected as I2C2 clock */ 276 #define RCC_I2C2CLKSOURCE_HSI LL_RCC_I2C2_CLKSOURCE_HSI /*!< HSI clock selected as I2C2 clock */ 277 /** 278 * @} 279 */ 280 281 /** @defgroup RCCEx_I2C3_Clock_Source I2C3 Clock Source 282 * @{ 283 */ 284 #define RCC_I2C3CLKSOURCE_PCLK1 LL_RCC_I2C3_CLKSOURCE_PCLK1 /*!< APB1 clock selected as I2C3 clock */ 285 #define RCC_I2C3CLKSOURCE_SYSCLK LL_RCC_I2C3_CLKSOURCE_SYSCLK /*!< SYSCLK clock selected as I2C3 clock */ 286 #define RCC_I2C3CLKSOURCE_HSI LL_RCC_I2C3_CLKSOURCE_HSI /*!< HSI clock selected as I2C3 clock */ 287 /** 288 * @} 289 */ 290 291 /** @defgroup RCCEx_LPTIM1_Clock_Source LPTIM1 Clock Source 292 * @{ 293 */ 294 #define RCC_LPTIM1CLKSOURCE_PCLK1 LL_RCC_LPTIM1_CLKSOURCE_PCLK1 /*!< APB1 clock selected as LPTIM1 clock */ 295 #define RCC_LPTIM1CLKSOURCE_LSI LL_RCC_LPTIM1_CLKSOURCE_LSI /*!< LSI clock selected as LPTIM1 clock */ 296 #define RCC_LPTIM1CLKSOURCE_HSI LL_RCC_LPTIM1_CLKSOURCE_HSI /*!< HSI clock selected as LPTIM1 clock */ 297 #define RCC_LPTIM1CLKSOURCE_LSE LL_RCC_LPTIM1_CLKSOURCE_LSE /*!< LSE clock selected as LPTIM1 clock */ 298 /** 299 * @} 300 */ 301 302 /** @defgroup RCCEx_LPTIM2_Clock_Source LPTIM2 Clock Source 303 * @{ 304 */ 305 #define RCC_LPTIM2CLKSOURCE_PCLK1 LL_RCC_LPTIM2_CLKSOURCE_PCLK1 /*!< APB1 clock selected as LPTIM2 clock */ 306 #define RCC_LPTIM2CLKSOURCE_LSI LL_RCC_LPTIM2_CLKSOURCE_LSI /*!< LSI clock selected as LPTIM2 clock */ 307 #define RCC_LPTIM2CLKSOURCE_HSI LL_RCC_LPTIM2_CLKSOURCE_HSI /*!< HSI clock selected as LPTIM2 clock */ 308 #define RCC_LPTIM2CLKSOURCE_LSE LL_RCC_LPTIM2_CLKSOURCE_LSE /*!< LSE clock selected as LPTIM2 clock */ 309 /** 310 * @} 311 */ 312 313 /** @defgroup RCCEx_LPTIM3_Clock_Source LPTIM3 Clock Source 314 * @{ 315 */ 316 #define RCC_LPTIM3CLKSOURCE_PCLK1 LL_RCC_LPTIM3_CLKSOURCE_PCLK1 /*!< APB1 clock selected as LPTIM3 clock */ 317 #define RCC_LPTIM3CLKSOURCE_LSI LL_RCC_LPTIM3_CLKSOURCE_LSI /*!< LSI clock selected as LPTIM3 clock */ 318 #define RCC_LPTIM3CLKSOURCE_HSI LL_RCC_LPTIM3_CLKSOURCE_HSI /*!< HSI clock selected as LPTIM3 clock */ 319 #define RCC_LPTIM3CLKSOURCE_LSE LL_RCC_LPTIM3_CLKSOURCE_LSE /*!< LSE clock selected as LPTIM3 clock */ 320 /** 321 * @} 322 */ 323 324 /** @defgroup RCCEx_RNG_Clock_Source RNG Clock Source 325 * @{ 326 */ 327 #define RCC_RNGCLKSOURCE_PLL LL_RCC_RNG_CLKSOURCE_PLL /*!< PLL "Q" clock selected as RNG clock */ 328 #define RCC_RNGCLKSOURCE_LSI LL_RCC_RNG_CLKSOURCE_LSI /*!< LSI clock selected as RNG clock */ 329 #define RCC_RNGCLKSOURCE_LSE LL_RCC_RNG_CLKSOURCE_LSE /*!< LSE clock selected as RNG clock */ 330 #define RCC_RNGCLKSOURCE_MSI LL_RCC_RNG_CLKSOURCE_MSI /*!< MSI clock selected as RNG clock */ 331 /** 332 * @} 333 */ 334 335 /** @defgroup RCCEx_ADC_Clock_Source ADC Clock Source 336 * @{ 337 */ 338 #define RCC_ADCCLKSOURCE_NONE LL_RCC_ADC_CLKSOURCE_NONE /*!< None clock selected as ADC clock */ 339 #define RCC_ADCCLKSOURCE_HSI LL_RCC_ADC_CLKSOURCE_HSI /*!< HSI clock selected as ADC clock */ 340 #define RCC_ADCCLKSOURCE_PLL LL_RCC_ADC_CLKSOURCE_PLL /*!< PLL "P" clock selected as ADC clock */ 341 #define RCC_ADCCLKSOURCE_SYSCLK LL_RCC_ADC_CLKSOURCE_SYSCLK /*!< SYSCLK clock selected as ADC clock */ 342 /** 343 * @} 344 */ 345 346 /** @defgroup RCCEx_EXTI_LINE_LSECSS RCC LSE CSS external interrupt line 347 * @{ 348 */ 349 #define RCC_EXTI_LINE_LSECSS EXTI_IMR1_IM19 /*!< External interrupt line 18 connected to the LSE CSS EXTI Line */ 350 /** 351 * @} 352 */ 353 354 /** @defgroup RCCEx_EXTI_LINE_HSECSS RCC HSE CSS external interrupt line 355 * @{ 356 */ 357 #define RCC_EXTI_LINE_HSECSS EXTI_IMR2_IM43 /*!< External interrupt line 43 connected to the HSE CSS EXTI Line */ 358 /** 359 * @} 360 */ 361 362 363 /** 364 * @} 365 */ 366 367 /* Exported macros -----------------------------------------------------------*/ 368 /** @defgroup RCCEx_Exported_Macros RCCEx Exported Macros 369 * @{ 370 */ 371 372 /*============================================================================*/ 373 374 /** @brief Macro to configure the USART1 clock (USART1CLK). 375 * @param __USART1_CLKSOURCE__ specifies the USART1 clock source. 376 * This parameter can be one of the following values: 377 * @arg @ref RCC_USART1CLKSOURCE_PCLK2 PCLK2 selected as USART1 clock 378 * @arg @ref RCC_USART1CLKSOURCE_HSI HSI selected as USART1 clock 379 * @arg @ref RCC_USART1CLKSOURCE_SYSCLK System Clock selected as USART1 clock 380 * @arg @ref RCC_USART1CLKSOURCE_LSE LSE selected as USART1 clock 381 * @retval None 382 */ 383 #define __HAL_RCC_USART1_CONFIG(__USART1_CLKSOURCE__) LL_RCC_SetUSARTClockSource(__USART1_CLKSOURCE__) 384 385 /** @brief Macro to get the USART1 clock source. 386 * @retval The clock source can be one of the following values: 387 * @arg @ref RCC_USART1CLKSOURCE_PCLK2 PCLK2 selected as USART1 clock 388 * @arg @ref RCC_USART1CLKSOURCE_HSI HSI selected as USART1 clock 389 * @arg @ref RCC_USART1CLKSOURCE_SYSCLK System Clock selected as USART1 clock 390 * @arg @ref RCC_USART1CLKSOURCE_LSE LSE selected as USART1 clock 391 */ 392 #define __HAL_RCC_GET_USART1_SOURCE() LL_RCC_GetUSARTClockSource(LL_RCC_USART1_CLKSOURCE) 393 394 /** @brief Macro to configure the USART2 clock (USART2CLK). 395 * @param __USART2_CLKSOURCE__ specifies the USART2 clock source. 396 * This parameter can be one of the following values: 397 * @arg @ref RCC_USART2CLKSOURCE_PCLK1 PCLK1 selected as USART2 clock 398 * @arg @ref RCC_USART2CLKSOURCE_HSI HSI selected as USART2 clock 399 * @arg @ref RCC_USART2CLKSOURCE_SYSCLK System Clock selected as USART2 clock 400 * @arg @ref RCC_USART2CLKSOURCE_LSE LSE selected as USART2 clock 401 * @retval None 402 */ 403 #define __HAL_RCC_USART2_CONFIG(__USART2_CLKSOURCE__) LL_RCC_SetUSARTClockSource(__USART2_CLKSOURCE__) 404 405 /** @brief Macro to get the USART2 clock source. 406 * @retval The clock source can be one of the following values: 407 * @arg @ref RCC_USART2CLKSOURCE_PCLK1 PCLK1 selected as USART2 clock 408 * @arg @ref RCC_USART2CLKSOURCE_HSI HSI selected as USART2 clock 409 * @arg @ref RCC_USART2CLKSOURCE_SYSCLK System Clock selected as USART2 clock 410 * @arg @ref RCC_USART2CLKSOURCE_LSE LSE selected as USART2 clock 411 */ 412 #define __HAL_RCC_GET_USART2_SOURCE() LL_RCC_GetUSARTClockSource(LL_RCC_USART2_CLKSOURCE) 413 414 /** @brief Macro to configure the I2S2 clock (I2S2CLK). 415 * @param __I2S2_CLKSOURCE__ specifies the I2S2 clock source. 416 * This parameter can be one of the following values: 417 * @arg @ref RCC_I2S2CLKSOURCE_PLL PLL "Q" selected as I2S2 clock 418 * @arg @ref RCC_I2S2CLKSOURCE_HSI HSI selected as I2S2 clock 419 * @arg @ref RCC_I2S2CLKSOURCE_PIN External clock selected as I2S2 clock 420 * @retval None 421 */ 422 #define __HAL_RCC_I2S2_CONFIG(__I2S2_CLKSOURCE__) LL_RCC_SetI2SClockSource(__I2S2_CLKSOURCE__) 423 424 /** @brief Macro to get the I2S2 clock source. 425 * @retval The clock source can be one of the following values: 426 * @arg @ref RCC_I2S2CLKSOURCE_PLL PLL "Q" selected as I2S2 clock 427 * @arg @ref RCC_I2S2CLKSOURCE_HSI HSI selected as I2S2 clock 428 * @arg @ref RCC_I2S2CLKSOURCE_PIN External clock selected as I2S2 clock 429 */ 430 #define __HAL_RCC_GET_I2S2_SOURCE() LL_RCC_GetI2SClockSource(LL_RCC_I2S2_CLKSOURCE) 431 432 /** @brief Macro to configure the LPUART clock (LPUART1CLK). 433 * @param __LPUART1_CLKSOURCE__ specifies the LPUART1 clock source. 434 * This parameter can be one of the following values: 435 * @arg @ref RCC_LPUART1CLKSOURCE_PCLK1 PCLK1 selected as LPUART1 clock 436 * @arg @ref RCC_LPUART1CLKSOURCE_HSI HSI selected as LPUART1 clock 437 * @arg @ref RCC_LPUART1CLKSOURCE_SYSCLK System Clock selected as LPUART1 clock 438 * @arg @ref RCC_LPUART1CLKSOURCE_LSE LSE selected as LPUART1 clock 439 * @retval None 440 */ 441 #define __HAL_RCC_LPUART1_CONFIG(__LPUART1_CLKSOURCE__) LL_RCC_SetLPUARTClockSource(__LPUART1_CLKSOURCE__) 442 443 /** @brief Macro to get the LPUART1 clock source. 444 * @retval The clock source can be one of the following values: 445 * @arg @ref RCC_LPUART1CLKSOURCE_PCLK1 PCLK1 selected as LPUART1 clock 446 * @arg @ref RCC_LPUART1CLKSOURCE_HSI HSI selected as LPUART1 clock 447 * @arg @ref RCC_LPUART1CLKSOURCE_SYSCLK System Clock selected as LPUART1 clock 448 * @arg @ref RCC_LPUART1CLKSOURCE_LSE LSE selected as LPUART1 clock 449 */ 450 #define __HAL_RCC_GET_LPUART1_SOURCE() LL_RCC_GetLPUARTClockSource(LL_RCC_LPUART1_CLKSOURCE) 451 452 /** @brief Macro to configure the I2C1 clock (I2C1CLK). 453 * @param __I2C1_CLKSOURCE__ specifies the I2C1 clock source. 454 * This parameter can be one of the following values: 455 * @arg @ref RCC_I2C1CLKSOURCE_PCLK1 PCLK1 selected as I2C1 clock 456 * @arg @ref RCC_I2C1CLKSOURCE_HSI HSI selected as I2C1 clock 457 * @arg @ref RCC_I2C1CLKSOURCE_SYSCLK System Clock selected as I2C1 clock 458 * @retval None 459 */ 460 #define __HAL_RCC_I2C1_CONFIG(__I2C1_CLKSOURCE__) LL_RCC_SetI2CClockSource(__I2C1_CLKSOURCE__) 461 462 /** @brief Macro to get the I2C1 clock source. 463 * @retval The clock source can be one of the following values: 464 * @arg @ref RCC_I2C1CLKSOURCE_PCLK1 PCLK1 selected as I2C1 clock 465 * @arg @ref RCC_I2C1CLKSOURCE_HSI HSI selected as I2C1 clock 466 * @arg @ref RCC_I2C1CLKSOURCE_SYSCLK System Clock selected as I2C1 clock 467 */ 468 #define __HAL_RCC_GET_I2C1_SOURCE() LL_RCC_GetI2CClockSource(LL_RCC_I2C1_CLKSOURCE) 469 470 /** @brief Macro to configure the I2C2 clock (I2C2CLK). 471 * @param __I2C2_CLKSOURCE__ specifies the I2C2 clock source. 472 * This parameter can be one of the following values: 473 * @arg @ref RCC_I2C2CLKSOURCE_PCLK1 PCLK1 selected as I2C2 clock 474 * @arg @ref RCC_I2C2CLKSOURCE_HSI HSI selected as I2C2 clock 475 * @arg @ref RCC_I2C2CLKSOURCE_SYSCLK System Clock selected as I2C2 clock 476 * @retval None 477 */ 478 #define __HAL_RCC_I2C2_CONFIG(__I2C2_CLKSOURCE__) LL_RCC_SetI2CClockSource(__I2C2_CLKSOURCE__) 479 480 /** @brief Macro to get the I2C2 clock source. 481 * @retval The clock source can be one of the following values: 482 * @arg @ref RCC_I2C2CLKSOURCE_PCLK1 PCLK1 selected as I2C2 clock 483 * @arg @ref RCC_I2C2CLKSOURCE_HSI HSI selected as I2C2 clock 484 * @arg @ref RCC_I2C2CLKSOURCE_SYSCLK System Clock selected as I2C2 clock 485 */ 486 #define __HAL_RCC_GET_I2C2_SOURCE() LL_RCC_GetI2CClockSource(LL_RCC_I2C2_CLKSOURCE) 487 488 /** @brief Macro to configure the I2C3 clock (I2C3CLK). 489 * @param __I2C3_CLKSOURCE__ specifies the I2C3 clock source. 490 * This parameter can be one of the following values: 491 * @arg @ref RCC_I2C3CLKSOURCE_PCLK1 PCLK1 selected as I2C3 clock 492 * @arg @ref RCC_I2C3CLKSOURCE_HSI HSI selected as I2C3 clock 493 * @arg @ref RCC_I2C3CLKSOURCE_SYSCLK System Clock selected as I2C3 clock 494 * @retval None 495 */ 496 #define __HAL_RCC_I2C3_CONFIG(__I2C3_CLKSOURCE__) LL_RCC_SetI2CClockSource(__I2C3_CLKSOURCE__) 497 498 /** @brief Macro to get the I2C3 clock source. 499 * @retval The clock source can be one of the following values: 500 * @arg @ref RCC_I2C3CLKSOURCE_PCLK1 PCLK1 selected as I2C3 clock 501 * @arg @ref RCC_I2C3CLKSOURCE_HSI HSI selected as I2C3 clock 502 * @arg @ref RCC_I2C3CLKSOURCE_SYSCLK System Clock selected as I2C3 clock 503 */ 504 #define __HAL_RCC_GET_I2C3_SOURCE() LL_RCC_GetI2CClockSource(LL_RCC_I2C3_CLKSOURCE) 505 506 /** @brief Macro to configure the LPTIM1 clock (LPTIM1CLK). 507 * @param __LPTIM1_CLKSOURCE__ specifies the LPTIM1 clock source. 508 * This parameter can be one of the following values: 509 * @arg @ref RCC_LPTIM1CLKSOURCE_PCLK1 PCLK selected as LPTIM1 clock 510 * @arg @ref RCC_LPTIM1CLKSOURCE_LSI HSI selected as LPTIM1 clock 511 * @arg @ref RCC_LPTIM1CLKSOURCE_HSI LSI selected as LPTIM1 clock 512 * @arg @ref RCC_LPTIM1CLKSOURCE_LSE LSE selected as LPTIM1 clock 513 * @retval None 514 */ 515 #define __HAL_RCC_LPTIM1_CONFIG(__LPTIM1_CLKSOURCE__) LL_RCC_SetLPTIMClockSource(__LPTIM1_CLKSOURCE__) 516 517 /** @brief Macro to get the LPTIM1 clock source. 518 * @retval The clock source can be one of the following values: 519 * @arg @ref RCC_LPTIM1CLKSOURCE_PCLK1 PCLK selected as LPTIM1 clock 520 * @arg @ref RCC_LPTIM1CLKSOURCE_LSI HSI selected as LPTIM1 clock 521 * @arg @ref RCC_LPTIM1CLKSOURCE_HSI System Clock selected as LPTIM1 clock 522 * @arg @ref RCC_LPTIM1CLKSOURCE_LSE LSE selected as LPTIM1 clock 523 */ 524 #define __HAL_RCC_GET_LPTIM1_SOURCE() LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE) 525 526 /** @brief Macro to configure the LPTIM2 clock (LPTIM2CLK). 527 * @param __LPTIM2_CLKSOURCE__ specifies the LPTIM2 clock source. 528 * This parameter can be one of the following values: 529 * @arg @ref RCC_LPTIM2CLKSOURCE_PCLK1 PCLK selected as LPTIM2 clock 530 * @arg @ref RCC_LPTIM2CLKSOURCE_LSI HSI selected as LPTIM2 clock 531 * @arg @ref RCC_LPTIM2CLKSOURCE_HSI LSI selected as LPTIM2 clock 532 * @arg @ref RCC_LPTIM2CLKSOURCE_LSE LSE selected as LPTIM2 clock 533 * @retval None 534 */ 535 #define __HAL_RCC_LPTIM2_CONFIG(__LPTIM2_CLKSOURCE__) LL_RCC_SetLPTIMClockSource(__LPTIM2_CLKSOURCE__) 536 537 /** @brief Macro to get the LPTIM2 clock source. 538 * @retval The clock source can be one of the following values: 539 * @arg @ref RCC_LPTIM2CLKSOURCE_PCLK1 PCLK selected as LPTIM2 clock 540 * @arg @ref RCC_LPTIM2CLKSOURCE_LSI HSI selected as LPTIM2 clock 541 * @arg @ref RCC_LPTIM2CLKSOURCE_HSI System Clock selected as LPTIM2 clock 542 * @arg @ref RCC_LPTIM2CLKSOURCE_LSE LSE selected as LPTIM2 clock 543 */ 544 #define __HAL_RCC_GET_LPTIM2_SOURCE() LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM2_CLKSOURCE) 545 546 /** @brief Macro to configure the LPTIM3 clock (LPTIM3CLK). 547 * @param __LPTIM3_CLKSOURCE__ specifies the LPTIM3 clock source. 548 * This parameter can be one of the following values: 549 * @arg @ref RCC_LPTIM3CLKSOURCE_PCLK1 PCLK selected as LPTIM3 clock 550 * @arg @ref RCC_LPTIM3CLKSOURCE_LSI HSI selected as LPTIM3 clock 551 * @arg @ref RCC_LPTIM3CLKSOURCE_HSI LSI selected as LPTIM3 clock 552 * @arg @ref RCC_LPTIM3CLKSOURCE_LSE LSE selected as LPTIM3 clock 553 * @retval None 554 */ 555 #define __HAL_RCC_LPTIM3_CONFIG(__LPTIM3_CLKSOURCE__) LL_RCC_SetLPTIMClockSource(__LPTIM3_CLKSOURCE__) 556 557 /** @brief Macro to get the LPTIM3 clock source. 558 * @retval The clock source can be one of the following values: 559 * @arg @ref RCC_LPTIM3CLKSOURCE_PCLK1 PCLK selected as LPTIM3 clock 560 * @arg @ref RCC_LPTIM3CLKSOURCE_LSI HSI selected as LPTIM3 clock 561 * @arg @ref RCC_LPTIM3CLKSOURCE_HSI System Clock selected as LPTIM3 clock 562 * @arg @ref RCC_LPTIM3CLKSOURCE_LSE LSE selected as LPTIM3 clock 563 */ 564 #define __HAL_RCC_GET_LPTIM3_SOURCE() LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM3_CLKSOURCE) 565 566 /** @brief Macro to configure the RNG clock. 567 * @param __RNG_CLKSOURCE__ specifies the RNG clock source. 568 * This parameter can be one of the following values: 569 * @arg @ref RCC_RNGCLKSOURCE_PLL PLL "Q" Clock selected as RNG clock 570 * @arg @ref RCC_RNGCLKSOURCE_LSI LSI selected as RNG clock 571 * @arg @ref RCC_RNGCLKSOURCE_LSE LSE selected as RNG clock 572 * @arg @ref RCC_RNGCLKSOURCE_MSI MSI selected as RNG clock 573 * @retval None 574 */ 575 #define __HAL_RCC_RNG_CONFIG(__RNG_CLKSOURCE__) LL_RCC_SetRNGClockSource(__RNG_CLKSOURCE__) 576 577 /** @brief Macro to get the RNG clock. 578 * @retval The clock source can be one of the following values: 579 * @arg @ref RCC_RNGCLKSOURCE_PLL PLL "Q" Clock selected as RNG clock 580 * @arg @ref RCC_RNGCLKSOURCE_LSI LSI selected as RNG clock 581 * @arg @ref RCC_RNGCLKSOURCE_LSE LSE selected as RNG clock 582 * @arg @ref RCC_RNGCLKSOURCE_MSI MSI selected as RNG clock 583 */ 584 #define __HAL_RCC_GET_RNG_SOURCE() LL_RCC_GetRNGClockSource(LL_RCC_RNG_CLKSOURCE) 585 586 /** @brief Macro to configure the ADC interface clock. 587 * @param __ADC_CLKSOURCE__ specifies the ADC digital interface clock source. 588 * This parameter can be one of the following values: 589 * @arg @ref RCC_ADCCLKSOURCE_NONE No clock selected as ADC clock 590 * @arg @ref RCC_ADCCLKSOURCE_HSI HSI Clock selected as ADC clock 591 * @arg @ref RCC_ADCCLKSOURCE_PLL PLL "P" Clock selected as ADC clock 592 * @arg @ref RCC_ADCCLKSOURCE_SYSCLK System Clock selected as ADC clock 593 * @retval None 594 */ 595 #define __HAL_RCC_ADC_CONFIG(__ADC_CLKSOURCE__) LL_RCC_SetADCClockSource(__ADC_CLKSOURCE__) 596 597 /** @brief Macro to get the ADC clock source. 598 * @retval The clock source can be one of the following values: 599 * @arg @ref RCC_ADCCLKSOURCE_NONE No clock selected as ADC clock 600 * @arg @ref RCC_ADCCLKSOURCE_HSI HSI Clock selected as ADC clock 601 * @arg @ref RCC_ADCCLKSOURCE_PLL PLL "P" Clock selected as ADC clock 602 * @arg @ref RCC_ADCCLKSOURCE_SYSCLK System Clock selected as ADC clock 603 */ 604 #define __HAL_RCC_GET_ADC_SOURCE() LL_RCC_GetADCClockSource(LL_RCC_ADC_CLKSOURCE) 605 606 607 #if defined(DUAL_CORE) 608 609 #if defined(CORE_CM0PLUS) 610 #define __HAL_RCC_LSECSS_EXTI_ENABLE_IT() LL_C2_EXTI_EnableIT_0_31(RCC_EXTI_LINE_LSECSS) 611 #define __HAL_RCC_LSECSS_EXTI_DISABLE_IT() LL_C2_EXTI_DisableIT_0_31(RCC_EXTI_LINE_LSECSS) 612 #define __HAL_RCC_LSECSS_EXTI_ENABLE_EVENT() LL_C2_EXTI_EnableEvent_0_31(RCC_EXTI_LINE_LSECSS) 613 #define __HAL_RCC_LSECSS_EXTI_DISABLE_EVENT() LL_C2_EXTI_DisableEvent_0_31(RCC_EXTI_LINE_LSECSS) 614 615 #define __HAL_RCC_HSECSS_EXTI_ENABLE_IT() LL_C2_EXTI_EnableIT_32_63(RCC_EXTI_LINE_HSECSS) 616 #define __HAL_RCC_HSECSS_EXTI_DISABLE_IT() LL_C2_EXTI_DisableIT_32_63(RCC_EXTI_LINE_HSECSS) 617 #else 618 #define __HAL_RCC_LSECSS_EXTI_ENABLE_IT() LL_EXTI_EnableIT_0_31(RCC_EXTI_LINE_LSECSS) 619 #define __HAL_RCC_LSECSS_EXTI_DISABLE_IT() LL_EXTI_DisableIT_0_31(RCC_EXTI_LINE_LSECSS) 620 #define __HAL_RCC_LSECSS_EXTI_ENABLE_EVENT() LL_EXTI_EnableEvent_0_31(RCC_EXTI_LINE_LSECSS) 621 #define __HAL_RCC_LSECSS_EXTI_DISABLE_EVENT() LL_EXTI_DisableEvent_0_31(RCC_EXTI_LINE_LSECSS) 622 623 #define __HAL_RCC_HSECSS_EXTI_ENABLE_IT() LL_EXTI_EnableIT_32_63(RCC_EXTI_LINE_HSECSS) 624 #define __HAL_RCC_HSECSS_EXTI_DISABLE_IT() LL_EXTI_DisableIT_32_63(RCC_EXTI_LINE_HSECSS) 625 #endif /* CORE_CM0PLUS */ 626 627 #else 628 629 #define __HAL_RCC_LSECSS_EXTI_ENABLE_IT() LL_EXTI_EnableIT_0_31(RCC_EXTI_LINE_LSECSS) 630 #define __HAL_RCC_LSECSS_EXTI_DISABLE_IT() LL_EXTI_DisableIT_0_31(RCC_EXTI_LINE_LSECSS) 631 #define __HAL_RCC_LSECSS_EXTI_ENABLE_EVENT() LL_EXTI_EnableEvent_0_31(RCC_EXTI_LINE_LSECSS) 632 #define __HAL_RCC_LSECSS_EXTI_DISABLE_EVENT() LL_EXTI_DisableEvent_0_31(RCC_EXTI_LINE_LSECSS) 633 634 #define __HAL_RCC_HSECSS_EXTI_ENABLE_IT() LL_EXTI_EnableIT_32_63(RCC_EXTI_LINE_HSECSS) 635 #define __HAL_RCC_HSECSS_EXTI_DISABLE_IT() LL_EXTI_DisableIT_32_63(RCC_EXTI_LINE_HSECSS) 636 637 #endif /* DUAL_CORE */ 638 639 /** 640 * @} 641 */ 642 643 644 /* Exported functions --------------------------------------------------------*/ 645 /** @addtogroup RCCEx_Exported_Functions 646 * @{ 647 */ 648 649 /** @addtogroup RCCEx_Exported_Functions_Group1 650 * @{ 651 */ 652 653 HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit); 654 void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit); 655 uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk); 656 657 /** 658 * @} 659 */ 660 661 /** @addtogroup RCCEx_Exported_Functions_Group2 662 * @{ 663 */ 664 665 void HAL_RCCEx_WakeUpStopCLKConfig(uint32_t WakeUpClk); 666 667 void HAL_RCCEx_EnableLSECSS(void); 668 void HAL_RCCEx_DisableLSECSS(void); 669 void HAL_RCCEx_EnableLSECSS_IT(void); 670 void HAL_RCCEx_LSECSS_IRQHandler(void); 671 void HAL_RCCEx_LSECSS_Callback(void); 672 673 void HAL_RCCEx_EnableLSCO(uint32_t LSCOSource); 674 void HAL_RCCEx_DisableLSCO(void); 675 676 void HAL_RCCEx_EnableMSIPLLMode(void); 677 void HAL_RCCEx_DisableMSIPLLMode(void); 678 679 680 /** 681 * @} 682 */ 683 684 685 /** 686 * @} 687 */ 688 689 /** 690 * @} 691 */ 692 693 /** 694 * @} 695 */ 696 697 #ifdef __cplusplus 698 } 699 #endif 700 701 #endif /* STM32WLxx_HAL_RCC_EX_H */ 702
