1 /** 2 ****************************************************************************** 3 * @file stm32wlxx_hal_ipcc.h 4 * @author MCD Application Team 5 * @brief Header file of Mailbox HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2020 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32WLxx_HAL_IPCC_H 21 #define STM32WLxx_HAL_IPCC_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32wlxx_hal_def.h" 29 30 #if defined(IPCC) 31 32 /** @addtogroup STM32WLxx_HAL_Driver 33 * @{ 34 */ 35 36 /** @defgroup IPCC IPCC 37 * @brief IPCC HAL module driver 38 * @{ 39 */ 40 41 /* Exported constants --------------------------------------------------------*/ 42 43 /** @defgroup IPCC_Exported_Constants IPCC Exported Constants 44 * @{ 45 */ 46 47 /** @defgroup IPCC_Channel IPCC Channel 48 * @{ 49 */ 50 #define IPCC_CHANNEL_1 0x00000000U 51 #define IPCC_CHANNEL_2 0x00000001U 52 #define IPCC_CHANNEL_3 0x00000002U 53 #define IPCC_CHANNEL_4 0x00000003U 54 #define IPCC_CHANNEL_5 0x00000004U 55 #define IPCC_CHANNEL_6 0x00000005U 56 /** 57 * @} 58 */ 59 60 /** 61 * @} 62 */ 63 64 /* Exported types ------------------------------------------------------------*/ 65 /** @defgroup IPCC_Exported_Types IPCC Exported Types 66 * @{ 67 */ 68 69 /** 70 * @brief HAL IPCC State structures definition 71 */ 72 typedef enum 73 { 74 HAL_IPCC_STATE_RESET = 0x00U, /*!< IPCC not yet initialized or disabled */ 75 HAL_IPCC_STATE_READY = 0x01U, /*!< IPCC initialized and ready for use */ 76 HAL_IPCC_STATE_BUSY = 0x02U /*!< IPCC internal processing is ongoing */ 77 } HAL_IPCC_StateTypeDef; 78 79 /** 80 * @brief IPCC channel direction structure definition 81 */ 82 typedef enum 83 { 84 IPCC_CHANNEL_DIR_TX = 0x00U, /*!< Channel direction Tx is used by an MCU to transmit */ 85 IPCC_CHANNEL_DIR_RX = 0x01U /*!< Channel direction Rx is used by an MCU to receive */ 86 } IPCC_CHANNELDirTypeDef; 87 88 /** 89 * @brief IPCC channel status structure definition 90 */ 91 typedef enum 92 { 93 IPCC_CHANNEL_STATUS_FREE = 0x00U, /*!< Means that a new msg can be posted on that channel */ 94 IPCC_CHANNEL_STATUS_OCCUPIED = 0x01U /*!< An MCU has posted a msg the other MCU hasn't retrieved */ 95 } IPCC_CHANNELStatusTypeDef; 96 97 /** 98 * @brief IPCC handle structure definition 99 */ 100 typedef struct __IPCC_HandleTypeDef 101 { 102 IPCC_TypeDef *Instance; /*!< IPCC registers base address */ 103 void (* ChannelCallbackRx[IPCC_CHANNEL_NUMBER])(struct __IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir); /*!< Rx Callback registration table */ 104 void (* ChannelCallbackTx[IPCC_CHANNEL_NUMBER])(struct __IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir); /*!< Tx Callback registration table */ 105 uint32_t callbackRequest; /*!< Store information about callback notification by channel */ 106 __IO HAL_IPCC_StateTypeDef State; /*!< IPCC State: initialized or not */ 107 } IPCC_HandleTypeDef; 108 109 /** 110 * @brief IPCC callback typedef 111 */ 112 typedef void ChannelCb(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir); 113 114 /** 115 * @} 116 */ 117 118 /* Exported macros -----------------------------------------------------------*/ 119 /** @defgroup IPCC_Exported_Macros IPCC Exported Macros 120 * @{ 121 */ 122 123 /** 124 * @brief Enable the specified interrupt. 125 * @param __HANDLE__ specifies the IPCC Handle 126 * @param __CHDIRECTION__ specifies the channels Direction 127 * This parameter can be one of the following values: 128 * @arg @ref IPCC_CHANNEL_DIR_TX Transmit channel free interrupt enable 129 * @arg @ref IPCC_CHANNEL_DIR_RX Receive channel occupied interrupt enable 130 */ 131 #if defined(CORE_CM0PLUS) 132 #define __HAL_IPCC_ENABLE_IT(__HANDLE__, __CHDIRECTION__) \ 133 (((__CHDIRECTION__) == IPCC_CHANNEL_DIR_RX) ? \ 134 ((__HANDLE__)->Instance->C2CR |= IPCC_C2CR_RXOIE) : \ 135 ((__HANDLE__)->Instance->C2CR |= IPCC_C2CR_TXFIE)) 136 #else 137 #define __HAL_IPCC_ENABLE_IT(__HANDLE__, __CHDIRECTION__) \ 138 (((__CHDIRECTION__) == IPCC_CHANNEL_DIR_RX) ? \ 139 ((__HANDLE__)->Instance->C1CR |= IPCC_C1CR_RXOIE) : \ 140 ((__HANDLE__)->Instance->C1CR |= IPCC_C1CR_TXFIE)) 141 #endif 142 143 /** 144 * @brief Disable the specified interrupt. 145 * @param __HANDLE__ specifies the IPCC Handle 146 * @param __CHDIRECTION__ specifies the channels Direction 147 * This parameter can be one of the following values: 148 * @arg @ref IPCC_CHANNEL_DIR_TX Transmit channel free interrupt enable 149 * @arg @ref IPCC_CHANNEL_DIR_RX Receive channel occupied interrupt enable 150 */ 151 #if defined(CORE_CM0PLUS) 152 #define __HAL_IPCC_DISABLE_IT(__HANDLE__, __CHDIRECTION__) \ 153 (((__CHDIRECTION__) == IPCC_CHANNEL_DIR_RX) ? \ 154 ((__HANDLE__)->Instance->C2CR &= ~IPCC_C2CR_RXOIE) : \ 155 ((__HANDLE__)->Instance->C2CR &= ~IPCC_C2CR_TXFIE)) 156 #else 157 #define __HAL_IPCC_DISABLE_IT(__HANDLE__, __CHDIRECTION__) \ 158 (((__CHDIRECTION__) == IPCC_CHANNEL_DIR_RX) ? \ 159 ((__HANDLE__)->Instance->C1CR &= ~IPCC_C1CR_RXOIE) : \ 160 ((__HANDLE__)->Instance->C1CR &= ~IPCC_C1CR_TXFIE)) 161 #endif 162 163 /** 164 * @brief Mask the specified interrupt. 165 * @param __HANDLE__ specifies the IPCC Handle 166 * @param __CHDIRECTION__ specifies the channels Direction 167 * This parameter can be one of the following values: 168 * @arg @ref IPCC_CHANNEL_DIR_TX Transmit channel free interrupt enable 169 * @arg @ref IPCC_CHANNEL_DIR_RX Receive channel occupied interrupt enable 170 * @param __CHINDEX__ specifies the channels number: 171 * This parameter can be one of the following values: 172 * @arg IPCC_CHANNEL_1: IPCC Channel 1 173 * @arg IPCC_CHANNEL_2: IPCC Channel 2 174 * @arg IPCC_CHANNEL_3: IPCC Channel 3 175 * @arg IPCC_CHANNEL_4: IPCC Channel 4 176 * @arg IPCC_CHANNEL_5: IPCC Channel 5 177 * @arg IPCC_CHANNEL_6: IPCC Channel 6 178 */ 179 #if defined(CORE_CM0PLUS) 180 #define __HAL_IPCC_MASK_CHANNEL_IT(__HANDLE__, __CHDIRECTION__, __CHINDEX__) \ 181 (((__CHDIRECTION__) == IPCC_CHANNEL_DIR_RX) ? \ 182 ((__HANDLE__)->Instance->C2MR |= (IPCC_C1MR_CH1OM_Msk << (__CHINDEX__))) : \ 183 ((__HANDLE__)->Instance->C2MR |= (IPCC_C1MR_CH1FM_Msk << (__CHINDEX__)))) 184 #else 185 #define __HAL_IPCC_MASK_CHANNEL_IT(__HANDLE__, __CHDIRECTION__, __CHINDEX__) \ 186 (((__CHDIRECTION__) == IPCC_CHANNEL_DIR_RX) ? \ 187 ((__HANDLE__)->Instance->C1MR |= (IPCC_C1MR_CH1OM_Msk << (__CHINDEX__))) : \ 188 ((__HANDLE__)->Instance->C1MR |= (IPCC_C1MR_CH1FM_Msk << (__CHINDEX__)))) 189 #endif 190 191 /** 192 * @brief Unmask the specified interrupt. 193 * @param __HANDLE__ specifies the IPCC Handle 194 * @param __CHDIRECTION__ specifies the channels Direction 195 * This parameter can be one of the following values: 196 * @arg @ref IPCC_CHANNEL_DIR_TX Transmit channel free interrupt enable 197 * @arg @ref IPCC_CHANNEL_DIR_RX Receive channel occupied interrupt enable 198 * @param __CHINDEX__ specifies the channels number: 199 * This parameter can be one of the following values: 200 * @arg IPCC_CHANNEL_1: IPCC Channel 1 201 * @arg IPCC_CHANNEL_2: IPCC Channel 2 202 * @arg IPCC_CHANNEL_3: IPCC Channel 3 203 * @arg IPCC_CHANNEL_4: IPCC Channel 4 204 * @arg IPCC_CHANNEL_5: IPCC Channel 5 205 * @arg IPCC_CHANNEL_6: IPCC Channel 6 206 */ 207 #if defined(CORE_CM0PLUS) 208 #define __HAL_IPCC_UNMASK_CHANNEL_IT(__HANDLE__, __CHDIRECTION__, __CHINDEX__) \ 209 (((__CHDIRECTION__) == IPCC_CHANNEL_DIR_RX) ? \ 210 ((__HANDLE__)->Instance->C2MR &= ~(IPCC_C1MR_CH1OM_Msk << (__CHINDEX__))) : \ 211 ((__HANDLE__)->Instance->C2MR &= ~(IPCC_C1MR_CH1FM_Msk << (__CHINDEX__)))) 212 #else 213 #define __HAL_IPCC_UNMASK_CHANNEL_IT(__HANDLE__, __CHDIRECTION__, __CHINDEX__) \ 214 (((__CHDIRECTION__) == IPCC_CHANNEL_DIR_RX) ? \ 215 ((__HANDLE__)->Instance->C1MR &= ~(IPCC_C1MR_CH1OM_Msk << (__CHINDEX__))) : \ 216 ((__HANDLE__)->Instance->C1MR &= ~(IPCC_C1MR_CH1FM_Msk << (__CHINDEX__)))) 217 #endif 218 219 /** 220 * @} 221 */ 222 223 /* Exported functions --------------------------------------------------------*/ 224 /** @defgroup IPCC_Exported_Functions IPCC Exported Functions 225 * @{ 226 */ 227 228 /* Initialization and de-initialization functions *******************************/ 229 /** @defgroup IPCC_Exported_Functions_Group1 Initialization and deinitialization functions 230 * @{ 231 */ 232 HAL_StatusTypeDef HAL_IPCC_Init(IPCC_HandleTypeDef *hipcc); 233 HAL_StatusTypeDef HAL_IPCC_DeInit(IPCC_HandleTypeDef *hipcc); 234 void HAL_IPCC_MspInit(IPCC_HandleTypeDef *hipcc); 235 void HAL_IPCC_MspDeInit(IPCC_HandleTypeDef *hipcc); 236 /** 237 * @} 238 */ 239 240 /** @defgroup IPCC_Exported_Functions_Group2 Communication functions 241 * @{ 242 */ 243 /* IO operation functions *****************************************************/ 244 HAL_StatusTypeDef HAL_IPCC_ActivateNotification(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir, ChannelCb cb); 245 HAL_StatusTypeDef HAL_IPCC_DeActivateNotification(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir); 246 IPCC_CHANNELStatusTypeDef HAL_IPCC_GetChannelStatus(IPCC_HandleTypeDef const *const hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir); 247 HAL_StatusTypeDef HAL_IPCC_NotifyCPU(IPCC_HandleTypeDef const *const hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir); 248 /** 249 * @} 250 */ 251 252 /** @defgroup IPCC_Exported_Functions_Group3 Peripheral State and Error functions 253 * @{ 254 */ 255 /* Peripheral State and Error functions ****************************************/ 256 HAL_IPCC_StateTypeDef HAL_IPCC_GetState(IPCC_HandleTypeDef const *const hipcc); 257 /** 258 * @} 259 */ 260 261 /** @defgroup IPCC_IRQ_Handler_and_Callbacks Peripheral IRQ Handler and Callbacks 262 * @{ 263 */ 264 /* IRQHandler and Callbacks used in non blocking modes ************************/ 265 void HAL_IPCC_TX_IRQHandler(IPCC_HandleTypeDef *const hipcc); 266 void HAL_IPCC_RX_IRQHandler(IPCC_HandleTypeDef *const hipcc); 267 void HAL_IPCC_TxCallback(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir); 268 void HAL_IPCC_RxCallback(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir); 269 /** 270 * @} 271 */ 272 273 /** 274 * @} 275 */ 276 277 /** 278 * @} 279 */ 280 281 /** 282 * @} 283 */ 284 #endif /* IPCC */ 285 #ifdef __cplusplus 286 } 287 #endif 288 289 #endif /* STM32WLxx_HAL_IPCC_H */ 290 291
