1 /** 2 ****************************************************************************** 3 * @file stm32wlxx_hal_dac.h 4 * @author MCD Application Team 5 * @brief Header file of DAC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2020 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32WLxx_HAL_DAC_H 21 #define STM32WLxx_HAL_DAC_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /** @addtogroup STM32WLxx_HAL_Driver 28 * @{ 29 */ 30 31 /* Includes ------------------------------------------------------------------*/ 32 #include "stm32wlxx_hal_def.h" 33 34 #if defined(DAC) 35 36 /** @addtogroup DAC 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 42 /** @defgroup DAC_Exported_Types DAC Exported Types 43 * @{ 44 */ 45 46 /** 47 * @brief HAL State structures definition 48 */ 49 typedef enum 50 { 51 HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */ 52 HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */ 53 HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */ 54 HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */ 55 HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */ 56 57 } HAL_DAC_StateTypeDef; 58 59 /** 60 * @brief DAC handle Structure definition 61 */ 62 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 63 typedef struct __DAC_HandleTypeDef 64 #else 65 typedef struct 66 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 67 { 68 DAC_TypeDef *Instance; /*!< Register base address */ 69 70 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ 71 72 HAL_LockTypeDef Lock; /*!< DAC locking object */ 73 74 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ 75 76 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ 77 78 __IO uint32_t ErrorCode; /*!< DAC Error code */ 79 80 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 81 void (* ConvCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 82 void (* ConvHalfCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 83 void (* ErrorCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 84 void (* DMAUnderrunCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 85 86 void (* MspInitCallback)(struct __DAC_HandleTypeDef *hdac); 87 void (* MspDeInitCallback)(struct __DAC_HandleTypeDef *hdac); 88 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 89 90 } DAC_HandleTypeDef; 91 92 /** 93 * @brief DAC Configuration sample and hold Channel structure definition 94 */ 95 typedef struct 96 { 97 uint32_t DAC_SampleTime ; /*!< Specifies the Sample time for the selected channel. 98 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 99 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 100 101 uint32_t DAC_HoldTime ; /*!< Specifies the hold time for the selected channel 102 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 103 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 104 105 uint32_t DAC_RefreshTime ; /*!< Specifies the refresh time for the selected channel 106 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 107 This parameter must be a number between Min_Data = 0 and Max_Data = 255 */ 108 } DAC_SampleAndHoldConfTypeDef; 109 110 /** 111 * @brief DAC Configuration regular Channel structure definition 112 */ 113 typedef struct 114 { 115 uint32_t DAC_SampleAndHold; /*!< Specifies whether the DAC mode. 116 This parameter can be a value of @ref DAC_SampleAndHold */ 117 118 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. 119 This parameter can be a value of @ref DAC_trigger_selection */ 120 121 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. 122 This parameter can be a value of @ref DAC_output_buffer */ 123 124 uint32_t DAC_ConnectOnChipPeripheral ; /*!< Specifies whether the DAC output is connected or not to on chip peripheral. 125 This parameter can be a value of @ref DAC_ConnectOnChipPeripheral */ 126 127 uint32_t DAC_UserTrimming; /*!< Specifies the trimming mode 128 This parameter must be a value of @ref DAC_UserTrimming 129 DAC_UserTrimming is either factory or user trimming */ 130 131 uint32_t DAC_TrimmingValue; /*!< Specifies the offset trimming value 132 i.e. when DAC_SampleAndHold is DAC_TRIMMING_USER. 133 This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ 134 DAC_SampleAndHoldConfTypeDef DAC_SampleAndHoldConfig; /*!< Sample and Hold settings */ 135 } DAC_ChannelConfTypeDef; 136 137 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 138 /** 139 * @brief HAL DAC Callback ID enumeration definition 140 */ 141 typedef enum 142 { 143 HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /*!< DAC CH1 Complete Callback ID */ 144 HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /*!< DAC CH1 half Complete Callback ID */ 145 HAL_DAC_CH1_ERROR_ID = 0x02U, /*!< DAC CH1 error Callback ID */ 146 HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /*!< DAC CH1 underrun Callback ID */ 147 HAL_DAC_MSPINIT_CB_ID = 0x08U, /*!< DAC MspInit Callback ID */ 148 HAL_DAC_MSPDEINIT_CB_ID = 0x09U, /*!< DAC MspDeInit Callback ID */ 149 HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */ 150 } HAL_DAC_CallbackIDTypeDef; 151 152 /** 153 * @brief HAL DAC Callback pointer definition 154 */ 155 typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac); 156 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 157 158 /** 159 * @} 160 */ 161 162 /* Exported constants --------------------------------------------------------*/ 163 164 /** @defgroup DAC_Exported_Constants DAC Exported Constants 165 * @{ 166 */ 167 168 /** @defgroup DAC_Error_Code DAC Error Code 169 * @{ 170 */ 171 #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */ 172 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */ 173 #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */ 174 #define HAL_DAC_ERROR_TIMEOUT 0x08U /*!< Timeout error */ 175 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 176 #define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /*!< Invalid callback error */ 177 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 178 179 /** 180 * @} 181 */ 182 183 /** @defgroup DAC_trigger_selection DAC trigger selection 184 * @{ 185 */ 186 #define DAC_TRIGGER_NONE (0x00000000UL) /*!< Conversion is automatic once the DAC_DHRxxxx register has been loaded, and not by external trigger */ 187 #define DAC_TRIGGER_SOFTWARE (DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */ 188 #define DAC_TRIGGER_T1_TRGO (DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM1 TRGO selected as external conversion trigger for DAC channel */ 189 #define DAC_TRIGGER_T2_TRGO (DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 190 #define DAC_TRIGGER_LPTIM1_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< LPTIM1_OUT selected as external conversion trigger for DAC channel */ 191 #define DAC_TRIGGER_LPTIM2_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< LPTIM2_OUT selected as external conversion trigger for DAC channel */ 192 #define DAC_TRIGGER_LPTIM3_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< LPTIM3_OUT selected as external conversion trigger for DAC channel */ 193 #define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 194 195 /** 196 * @} 197 */ 198 199 /** @defgroup DAC_output_buffer DAC output buffer 200 * @{ 201 */ 202 #define DAC_OUTPUTBUFFER_ENABLE 0x00000000U 203 #define DAC_OUTPUTBUFFER_DISABLE (DAC_MCR_MODE1_1) 204 205 /** 206 * @} 207 */ 208 209 /** @defgroup DAC_Channel_selection DAC Channel selection 210 * @{ 211 */ 212 #define DAC_CHANNEL_1 0x00000000U 213 /** 214 * @} 215 */ 216 217 /** @defgroup DAC_data_alignment DAC data alignment 218 * @{ 219 */ 220 #define DAC_ALIGN_12B_R 0x00000000U 221 #define DAC_ALIGN_12B_L 0x00000004U 222 #define DAC_ALIGN_8B_R 0x00000008U 223 224 /** 225 * @} 226 */ 227 228 /** @defgroup DAC_flags_definition DAC flags definition 229 * @{ 230 */ 231 #define DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1) 232 233 /** 234 * @} 235 */ 236 237 /** @defgroup DAC_IT_definition DAC IT definition 238 * @{ 239 */ 240 #define DAC_IT_DMAUDR1 (DAC_SR_DMAUDR1) 241 242 /** 243 * @} 244 */ 245 246 /** @defgroup DAC_ConnectOnChipPeripheral DAC ConnectOnChipPeripheral 247 * @{ 248 */ 249 #define DAC_CHIPCONNECT_DISABLE (0x00000000UL) 250 #define DAC_CHIPCONNECT_ENABLE (DAC_MCR_MODE1_0) 251 252 /** 253 * @} 254 */ 255 256 /** @defgroup DAC_UserTrimming DAC User Trimming 257 * @{ 258 */ 259 #define DAC_TRIMMING_FACTORY (0x00000000UL) /*!< Factory trimming */ 260 #define DAC_TRIMMING_USER (0x00000001UL) /*!< User trimming */ 261 /** 262 * @} 263 */ 264 265 /** @defgroup DAC_SampleAndHold DAC power mode 266 * @{ 267 */ 268 #define DAC_SAMPLEANDHOLD_DISABLE (0x00000000UL) 269 #define DAC_SAMPLEANDHOLD_ENABLE (DAC_MCR_MODE1_2) 270 271 /** 272 * @} 273 */ 274 /** 275 * @} 276 */ 277 278 /* Delay for DAC channel voltage settling time from DAC channel startup */ 279 /* (transition from disable to enable). */ 280 /* Note: DAC channel startup time depends on board application environment: */ 281 /* impedance connected to DAC channel output. */ 282 /* The delay below is specified under conditions: */ 283 /* - voltage maximum transition (lowest to highest value) */ 284 /* - until voltage reaches final value +-1LSB */ 285 /* - DAC channel output buffer enabled */ 286 /* - load impedance of 5kOhm (min), 50pF (max) */ 287 /* Literal set to maximum value (refer to device datasheet, */ 288 /* parameter "tWAKEUP"). */ 289 /* Unit: us */ 290 #define DAC_DELAY_STARTUP_US (8UL) /*!< Delay for DAC channel voltage settling time from DAC channel startup (transition from disable to enable) */ 291 292 /* Exported macro ------------------------------------------------------------*/ 293 294 /** @defgroup DAC_Exported_Macros DAC Exported Macros 295 * @{ 296 */ 297 298 /** @brief Reset DAC handle state. 299 * @param __HANDLE__ specifies the DAC handle. 300 * @retval None 301 */ 302 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 303 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \ 304 (__HANDLE__)->State = HAL_DAC_STATE_RESET; \ 305 (__HANDLE__)->MspInitCallback = NULL; \ 306 (__HANDLE__)->MspDeInitCallback = NULL; \ 307 } while(0) 308 #else 309 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) 310 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 311 312 /** @brief Enable the DAC channel. 313 * @param __HANDLE__ specifies the DAC handle. 314 * @param __DAC_Channel__ specifies the DAC channel 315 * @retval None 316 */ 317 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ 318 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) 319 320 /** @brief Disable the DAC channel. 321 * @param __HANDLE__ specifies the DAC handle 322 * @param __DAC_Channel__ specifies the DAC channel. 323 * @retval None 324 */ 325 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ 326 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) 327 328 /** @brief Set DHR12R1 alignment. 329 * @param __ALIGNMENT__ specifies the DAC alignment 330 * @retval None 331 */ 332 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008UL + (__ALIGNMENT__)) 333 334 335 /** @brief Set DHR12RD alignment. 336 * @param __ALIGNMENT__ specifies the DAC alignment 337 * @retval None 338 */ 339 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020UL + (__ALIGNMENT__)) 340 341 /** @brief Enable the DAC interrupt. 342 * @param __HANDLE__ specifies the DAC handle 343 * @param __INTERRUPT__ specifies the DAC interrupt. 344 * This parameter can be any combination of the following values: 345 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt 346 * @retval None 347 */ 348 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) 349 350 /** @brief Disable the DAC interrupt. 351 * @param __HANDLE__ specifies the DAC handle 352 * @param __INTERRUPT__ specifies the DAC interrupt. 353 * This parameter can be any combination of the following values: 354 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt 355 * @retval None 356 */ 357 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) 358 359 /** @brief Check whether the specified DAC interrupt source is enabled or not. 360 * @param __HANDLE__ DAC handle 361 * @param __INTERRUPT__ DAC interrupt source to check 362 * This parameter can be any combination of the following values: 363 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt 364 * @retval State of interruption (SET or RESET) 365 */ 366 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR\ 367 & (__INTERRUPT__)) == (__INTERRUPT__)) 368 369 /** @brief Get the selected DAC's flag status. 370 * @param __HANDLE__ specifies the DAC handle. 371 * @param __FLAG__ specifies the DAC flag to get. 372 * This parameter can be any combination of the following values: 373 * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag 374 * @retval None 375 */ 376 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 377 378 /** @brief Clear the DAC's flag. 379 * @param __HANDLE__ specifies the DAC handle. 380 * @param __FLAG__ specifies the DAC flag to clear. 381 * This parameter can be any combination of the following values: 382 * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag 383 * @retval None 384 */ 385 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) 386 387 /** 388 * @} 389 */ 390 391 /* Private macro -------------------------------------------------------------*/ 392 393 /** @defgroup DAC_Private_Macros DAC Private Macros 394 * @{ 395 */ 396 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ 397 ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) 398 399 #define IS_DAC_CHANNEL(CHANNEL) ((CHANNEL) == DAC_CHANNEL_1) 400 401 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ 402 ((ALIGN) == DAC_ALIGN_12B_L) || \ 403 ((ALIGN) == DAC_ALIGN_8B_R)) 404 405 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0UL) 406 407 #define IS_DAC_REFRESHTIME(TIME) ((TIME) <= 0x000000FFUL) 408 409 /** 410 * @} 411 */ 412 413 /* Include DAC HAL Extended module */ 414 #include "stm32wlxx_hal_dac_ex.h" 415 416 /* Exported functions --------------------------------------------------------*/ 417 418 /** @addtogroup DAC_Exported_Functions 419 * @{ 420 */ 421 422 /** @addtogroup DAC_Exported_Functions_Group1 423 * @{ 424 */ 425 /* Initialization and de-initialization functions *****************************/ 426 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac); 427 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac); 428 void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac); 429 void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac); 430 431 /** 432 * @} 433 */ 434 435 /** @addtogroup DAC_Exported_Functions_Group2 436 * @{ 437 */ 438 /* IO operation functions *****************************************************/ 439 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel); 440 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel); 441 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, const uint32_t *pData, uint32_t Length, 442 uint32_t Alignment); 443 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel); 444 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac); 445 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); 446 447 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac); 448 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac); 449 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); 450 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); 451 452 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 453 /* DAC callback registering/unregistering */ 454 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, 455 pDAC_CallbackTypeDef pCallback); 456 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID); 457 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 458 459 /** 460 * @} 461 */ 462 463 /** @addtogroup DAC_Exported_Functions_Group3 464 * @{ 465 */ 466 /* Peripheral Control functions ***********************************************/ 467 uint32_t HAL_DAC_GetValue(const DAC_HandleTypeDef *hdac, uint32_t Channel); 468 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, 469 const DAC_ChannelConfTypeDef *sConfig, uint32_t Channel); 470 /** 471 * @} 472 */ 473 474 /** @addtogroup DAC_Exported_Functions_Group4 475 * @{ 476 */ 477 /* Peripheral State and Error functions ***************************************/ 478 HAL_DAC_StateTypeDef HAL_DAC_GetState(const DAC_HandleTypeDef *hdac); 479 uint32_t HAL_DAC_GetError(const DAC_HandleTypeDef *hdac); 480 481 /** 482 * @} 483 */ 484 485 /** 486 * @} 487 */ 488 489 /** @defgroup DAC_Private_Functions DAC Private Functions 490 * @{ 491 */ 492 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma); 493 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma); 494 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma); 495 /** 496 * @} 497 */ 498 499 /** 500 * @} 501 */ 502 503 #endif /* DAC */ 504 505 /** 506 * @} 507 */ 508 509 #ifdef __cplusplus 510 } 511 #endif 512 513 514 #endif /* STM32WLxx_HAL_DAC_H */ 515
