1 /**
2   ******************************************************************************
3   * @file    stm32wbxx_ll_pwr.c
4   * @author  MCD Application Team
5   * @brief   PWR LL module driver.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2019 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 #if defined(USE_FULL_LL_DRIVER)
19 
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32wbxx_ll_pwr.h"
22 #include "stm32wbxx_ll_bus.h"
23 
24 /** @addtogroup STM32WBxx_LL_Driver
25   * @{
26   */
27 
28 #if defined(PWR)
29 
30 /** @defgroup PWR_LL PWR
31   * @{
32   */
33 
34 /* Private types -------------------------------------------------------------*/
35 /* Private variables ---------------------------------------------------------*/
36 /* Private constants ---------------------------------------------------------*/
37 
38 /** @defgroup PWR_LL_Private_Constants PWR Private Constants
39   * @{
40   */
41 /* Definitions of PWR registers reset value */
42 #define PWR_CR1_RESET_VALUE   (0x00000200)
43 #define PWR_CR2_RESET_VALUE   (0x00000000)
44 #define PWR_CR3_RESET_VALUE   (0x00008000)
45 #define PWR_CR4_RESET_VALUE   (0x00000000)
46 #define PWR_CR5_RESET_VALUE   (0x00004272)
47 #define PWR_PUCRA_RESET_VALUE (0x00000000)
48 #define PWR_PDCRA_RESET_VALUE (0x00000000)
49 #define PWR_PUCRB_RESET_VALUE (0x00000000)
50 #define PWR_PDCRB_RESET_VALUE (0x00000000)
51 #define PWR_PUCRC_RESET_VALUE (0x00000000)
52 #define PWR_PDCRC_RESET_VALUE (0x00000000)
53 #define PWR_PUCRD_RESET_VALUE (0x00000000)
54 #define PWR_PDCRD_RESET_VALUE (0x00000000)
55 #define PWR_PUCRE_RESET_VALUE (0x00000000)
56 #define PWR_PDCRE_RESET_VALUE (0x00000000)
57 #define PWR_PUCRH_RESET_VALUE (0x00000000)
58 #define PWR_PDCRH_RESET_VALUE (0x00000000)
59 #define PWR_C2CR1_RESET_VALUE (0x00000000)
60 #define PWR_C2CR3_RESET_VALUE (0x00008000)
61 /**
62   * @}
63   */
64 
65 /* Private macros ------------------------------------------------------------*/
66 /* Private function prototypes -----------------------------------------------*/
67 
68 /* Exported functions --------------------------------------------------------*/
69 /** @addtogroup PWR_LL_Exported_Functions
70   * @{
71   */
72 
73 /** @addtogroup PWR_LL_EF_Init
74   * @{
75   */
76 
77 /**
78   * @brief  De-initialize the PWR registers to their default reset values.
79   * @retval An ErrorStatus enumeration value:
80   *          - SUCCESS: PWR registers are de-initialized
81   *          - ERROR: not applicable
82   */
LL_PWR_DeInit(void)83 ErrorStatus LL_PWR_DeInit(void)
84 {
85   /* Apply reset values to all PWR registers */
86   LL_PWR_WriteReg(CR1, PWR_CR1_RESET_VALUE);
87   LL_PWR_WriteReg(CR2, PWR_CR2_RESET_VALUE);
88   LL_PWR_WriteReg(CR3, PWR_CR3_RESET_VALUE);
89   LL_PWR_WriteReg(CR4, PWR_CR4_RESET_VALUE);
90   LL_PWR_WriteReg(CR5, PWR_CR5_RESET_VALUE);
91   LL_PWR_WriteReg(PUCRA, PWR_PUCRA_RESET_VALUE);
92   LL_PWR_WriteReg(PDCRA, PWR_PDCRA_RESET_VALUE);
93   LL_PWR_WriteReg(PUCRB, PWR_PUCRB_RESET_VALUE);
94   LL_PWR_WriteReg(PDCRB, PWR_PDCRB_RESET_VALUE);
95   LL_PWR_WriteReg(PUCRC, PWR_PUCRC_RESET_VALUE);
96   LL_PWR_WriteReg(PDCRC, PWR_PDCRC_RESET_VALUE);
97 #if defined(GPIOD)
98   LL_PWR_WriteReg(PUCRD, PWR_PUCRD_RESET_VALUE);
99   LL_PWR_WriteReg(PDCRD, PWR_PDCRD_RESET_VALUE);
100 #endif /* GPIOD */
101   LL_PWR_WriteReg(PUCRE, PWR_PUCRE_RESET_VALUE);
102   LL_PWR_WriteReg(PDCRE, PWR_PDCRE_RESET_VALUE);
103   LL_PWR_WriteReg(PUCRH, PWR_PUCRH_RESET_VALUE);
104   LL_PWR_WriteReg(PDCRH, PWR_PDCRH_RESET_VALUE);
105   LL_PWR_WriteReg(C2CR1, PWR_C2CR1_RESET_VALUE);
106   LL_PWR_WriteReg(C2CR3, PWR_C2CR3_RESET_VALUE);
107 
108   /* Clear all flags */
109   LL_PWR_WriteReg(SCR,
110                   LL_PWR_SCR_CC2HF
111                   | LL_PWR_SCR_CBLEAF
112                   | LL_PWR_SCR_CCRPEF
113 #if defined(PWR_CR3_E802A)
114                   | LL_PWR_SCR_C802AF
115                   | LL_PWR_SCR_C802WUF
116 #endif /* PWR_CR3_E802A */
117                   | LL_PWR_SCR_CBLEWUF
118 #if defined(PWR_CR5_SMPSEN)
119                   | LL_PWR_SCR_CBORHF
120                   | LL_PWR_SCR_CSMPSFBF
121 #endif /* PWR_CR5_SMPSEN */
122                   | LL_PWR_SCR_CWUF
123                  );
124 
125   LL_PWR_WriteReg(EXTSCR,
126                   LL_PWR_EXTSCR_CCRPF
127                   | LL_PWR_EXTSCR_C2CSSF
128                   | LL_PWR_EXTSCR_C1CSSF
129                  );
130 
131   return SUCCESS;
132 }
133 
134 /**
135   * @}
136   */
137 
138 /**
139   * @}
140   */
141 
142 /**
143   * @}
144   */
145 #endif /* PWR */
146 /**
147   * @}
148   */
149 
150 #endif /* USE_FULL_LL_DRIVER */
151 
152