1 /** 2 ****************************************************************************** 3 * @file stm32wbxx_ll_lptim.c 4 * @author MCD Application Team 5 * @brief LPTIM LL module driver. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 #if defined(USE_FULL_LL_DRIVER) 19 20 /* Includes ------------------------------------------------------------------*/ 21 #include "stm32wbxx_ll_lptim.h" 22 #include "stm32wbxx_ll_bus.h" 23 #include "stm32wbxx_ll_rcc.h" 24 25 26 #ifdef USE_FULL_ASSERT 27 #include "stm32_assert.h" 28 #else 29 #define assert_param(expr) ((void)0U) 30 #endif /* USE_FULL_ASSERT */ 31 32 /** @addtogroup STM32WBxx_LL_Driver 33 * @{ 34 */ 35 36 #if defined (LPTIM1) || defined (LPTIM2) 37 38 /** @addtogroup LPTIM_LL 39 * @{ 40 */ 41 42 /* Private types -------------------------------------------------------------*/ 43 /* Private variables ---------------------------------------------------------*/ 44 /* Private constants ---------------------------------------------------------*/ 45 /* Private macros ------------------------------------------------------------*/ 46 /** @addtogroup LPTIM_LL_Private_Macros 47 * @{ 48 */ 49 #define IS_LL_LPTIM_CLOCK_SOURCE(__VALUE__) (((__VALUE__) == LL_LPTIM_CLK_SOURCE_INTERNAL) \ 50 || ((__VALUE__) == LL_LPTIM_CLK_SOURCE_EXTERNAL)) 51 52 #define IS_LL_LPTIM_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPTIM_PRESCALER_DIV1) \ 53 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV2) \ 54 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV4) \ 55 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV8) \ 56 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV16) \ 57 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV32) \ 58 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV64) \ 59 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV128)) 60 61 #define IS_LL_LPTIM_WAVEFORM(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_PWM) \ 62 || ((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_SETONCE)) 63 64 #define IS_LL_LPTIM_OUTPUT_POLARITY(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_REGULAR) \ 65 || ((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_INVERSE)) 66 /** 67 * @} 68 */ 69 70 71 /* Private function prototypes -----------------------------------------------*/ 72 /* Private functions ---------------------------------------------------------*/ 73 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions 74 * @{ 75 */ 76 /** 77 * @} 78 */ 79 /* Exported functions --------------------------------------------------------*/ 80 /** @addtogroup LPTIM_LL_Exported_Functions 81 * @{ 82 */ 83 84 /** @addtogroup LPTIM_LL_EF_Init 85 * @{ 86 */ 87 88 /** 89 * @brief Set LPTIMx registers to their reset values. 90 * @param LPTIMx LP Timer instance 91 * @retval An ErrorStatus enumeration value: 92 * - SUCCESS: LPTIMx registers are de-initialized 93 * - ERROR: invalid LPTIMx instance 94 */ LL_LPTIM_DeInit(const LPTIM_TypeDef * LPTIMx)95ErrorStatus LL_LPTIM_DeInit(const LPTIM_TypeDef *LPTIMx) 96 { 97 ErrorStatus result = SUCCESS; 98 99 /* Check the parameters */ 100 assert_param(IS_LPTIM_INSTANCE(LPTIMx)); 101 102 if (LPTIMx == LPTIM1) 103 { 104 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_LPTIM1); 105 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_LPTIM1); 106 } 107 #if defined(LPTIM2) 108 else if (LPTIMx == LPTIM2) 109 { 110 LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_LPTIM2); 111 LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_LPTIM2); 112 } 113 #endif /* LPTIM2 */ 114 else 115 { 116 result = ERROR; 117 } 118 119 return result; 120 } 121 122 /** 123 * @brief Set each fields of the LPTIM_InitStruct structure to its default 124 * value. 125 * @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure 126 * @retval None 127 */ LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef * LPTIM_InitStruct)128void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct) 129 { 130 /* Set the default configuration */ 131 LPTIM_InitStruct->ClockSource = LL_LPTIM_CLK_SOURCE_INTERNAL; 132 LPTIM_InitStruct->Prescaler = LL_LPTIM_PRESCALER_DIV1; 133 LPTIM_InitStruct->Waveform = LL_LPTIM_OUTPUT_WAVEFORM_PWM; 134 LPTIM_InitStruct->Polarity = LL_LPTIM_OUTPUT_POLARITY_REGULAR; 135 } 136 137 /** 138 * @brief Configure the LPTIMx peripheral according to the specified parameters. 139 * @note LL_LPTIM_Init can only be called when the LPTIM instance is disabled. 140 * @note LPTIMx can be disabled using unitary function @ref LL_LPTIM_Disable(). 141 * @param LPTIMx LP Timer Instance 142 * @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure 143 * @retval An ErrorStatus enumeration value: 144 * - SUCCESS: LPTIMx instance has been initialized 145 * - ERROR: LPTIMx instance hasn't been initialized 146 */ LL_LPTIM_Init(LPTIM_TypeDef * LPTIMx,const LL_LPTIM_InitTypeDef * LPTIM_InitStruct)147ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, const LL_LPTIM_InitTypeDef *LPTIM_InitStruct) 148 { 149 ErrorStatus result = SUCCESS; 150 /* Check the parameters */ 151 assert_param(IS_LPTIM_INSTANCE(LPTIMx)); 152 assert_param(IS_LL_LPTIM_CLOCK_SOURCE(LPTIM_InitStruct->ClockSource)); 153 assert_param(IS_LL_LPTIM_CLOCK_PRESCALER(LPTIM_InitStruct->Prescaler)); 154 assert_param(IS_LL_LPTIM_WAVEFORM(LPTIM_InitStruct->Waveform)); 155 assert_param(IS_LL_LPTIM_OUTPUT_POLARITY(LPTIM_InitStruct->Polarity)); 156 157 /* The LPTIMx_CFGR register must only be modified when the LPTIM is disabled 158 (ENABLE bit is reset to 0). 159 */ 160 if (LL_LPTIM_IsEnabled(LPTIMx) == 1UL) 161 { 162 result = ERROR; 163 } 164 else 165 { 166 /* Set CKSEL bitfield according to ClockSource value */ 167 /* Set PRESC bitfield according to Prescaler value */ 168 /* Set WAVE bitfield according to Waveform value */ 169 /* Set WAVEPOL bitfield according to Polarity value */ 170 MODIFY_REG(LPTIMx->CFGR, 171 (LPTIM_CFGR_CKSEL | LPTIM_CFGR_PRESC | LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL), 172 LPTIM_InitStruct->ClockSource | \ 173 LPTIM_InitStruct->Prescaler | \ 174 LPTIM_InitStruct->Waveform | \ 175 LPTIM_InitStruct->Polarity); 176 } 177 178 return result; 179 } 180 181 /** 182 * @brief Disable the LPTIM instance 183 * @rmtoll CR ENABLE LL_LPTIM_Disable 184 * @param LPTIMx Low-Power Timer instance 185 * @note The following sequence is required to solve LPTIM disable HW limitation. 186 * Please check Errata Sheet ES0335 for more details under "MCU may remain 187 * stuck in LPTIM interrupt when entering Stop mode" section. 188 * @retval None 189 */ LL_LPTIM_Disable(LPTIM_TypeDef * LPTIMx)190void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx) 191 { 192 LL_RCC_ClocksTypeDef rcc_clock; 193 uint32_t tmpclksource = 0; 194 uint32_t tmpIER; 195 uint32_t tmpCFGR; 196 uint32_t tmpCMP; 197 uint32_t tmpARR; 198 uint32_t primask_bit; 199 #if defined(LPTIM_OR_OR) 200 uint32_t tmpOR; 201 #endif 202 203 /* Check the parameters */ 204 assert_param(IS_LPTIM_INSTANCE(LPTIMx)); 205 206 /* Enter critical section */ 207 primask_bit = __get_PRIMASK(); 208 __set_PRIMASK(1) ; 209 210 /********** Save LPTIM Config *********/ 211 /* Save LPTIM source clock */ 212 switch ((uint32_t)LPTIMx) 213 { 214 case LPTIM1_BASE: 215 tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE); 216 break; 217 #if defined(LPTIM2) 218 case LPTIM2_BASE: 219 tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM2_CLKSOURCE); 220 break; 221 #endif /* LPTIM2 */ 222 default: 223 break; 224 } 225 226 /* Save LPTIM configuration registers */ 227 tmpIER = LPTIMx->IER; 228 tmpCFGR = LPTIMx->CFGR; 229 tmpCMP = LPTIMx->CMP; 230 tmpARR = LPTIMx->ARR; 231 #if defined(LPTIM_OR_OR) 232 tmpOR = LPTIMx->OR; 233 #endif 234 235 /************* Reset LPTIM ************/ 236 (void)LL_LPTIM_DeInit(LPTIMx); 237 238 /********* Restore LPTIM Config *******/ 239 LL_RCC_GetSystemClocksFreq(&rcc_clock); 240 241 if ((tmpCMP != 0UL) || (tmpARR != 0UL)) 242 { 243 /* Force LPTIM source kernel clock from APB */ 244 switch ((uint32_t)LPTIMx) 245 { 246 case LPTIM1_BASE: 247 LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE_PCLK1); 248 break; 249 #if defined(LPTIM2) 250 case LPTIM2_BASE: 251 LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM2_CLKSOURCE_PCLK1); 252 break; 253 #endif /* LPTIM2 */ 254 default: 255 break; 256 } 257 258 if (tmpCMP != 0UL) 259 { 260 /* Restore CMP and ARR registers (LPTIM should be enabled first) */ 261 LPTIMx->CR |= LPTIM_CR_ENABLE; 262 LPTIMx->CMP = tmpCMP; 263 264 /* Polling on CMP write ok status after above restore operation */ 265 do 266 { 267 rcc_clock.SYSCLK_Frequency--; /* Used for timeout */ 268 } while (((LL_LPTIM_IsActiveFlag_CMPOK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL)); 269 270 LL_LPTIM_ClearFlag_CMPOK(LPTIMx); 271 } 272 273 if (tmpARR != 0UL) 274 { 275 LPTIMx->CR |= LPTIM_CR_ENABLE; 276 LPTIMx->ARR = tmpARR; 277 278 LL_RCC_GetSystemClocksFreq(&rcc_clock); 279 /* Polling on ARR write ok status after above restore operation */ 280 do 281 { 282 rcc_clock.SYSCLK_Frequency--; /* Used for timeout */ 283 } while (((LL_LPTIM_IsActiveFlag_ARROK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL)); 284 285 LL_LPTIM_ClearFlag_ARROK(LPTIMx); 286 } 287 288 289 /* Restore LPTIM source kernel clock */ 290 LL_RCC_SetLPTIMClockSource(tmpclksource); 291 } 292 293 /* Restore configuration registers (LPTIM should be disabled first) */ 294 LPTIMx->CR &= ~(LPTIM_CR_ENABLE); 295 LPTIMx->IER = tmpIER; 296 LPTIMx->CFGR = tmpCFGR; 297 #if defined(LPTIM_OR_OR) 298 LPTIMx->OR = tmpOR; 299 #endif 300 301 /* Exit critical section: restore previous priority mask */ 302 __set_PRIMASK(primask_bit); 303 } 304 305 /** 306 * @} 307 */ 308 309 /** 310 * @} 311 */ 312 313 /** 314 * @} 315 */ 316 317 #endif /* LPTIM1 || LPTIM2 */ 318 319 /** 320 * @} 321 */ 322 323 #endif /* USE_FULL_LL_DRIVER */ 324
