1 /**
2 ******************************************************************************
3 * @file stm32wbxx_hal_lptim.c
4 * @author MCD Application Team
5 * @brief LPTIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Low Power Timer (LPTIM) peripheral:
8 * + Initialization and de-initialization functions.
9 * + Start/Stop operation functions in polling mode.
10 * + Start/Stop operation functions in interrupt mode.
11 * + Reading operation functions.
12 * + Peripheral State functions.
13 *
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2019 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### How to use this driver #####
28 ==============================================================================
29 [..]
30 The LPTIM HAL driver can be used as follows:
31
32 (#)Initialize the LPTIM low level resources by implementing the
33 HAL_LPTIM_MspInit():
34 (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
35 (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
36 (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
37 (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
38 (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
39
40 (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
41 configures mainly:
42 (++) The instance: LPTIM1 or LPTIM2.
43 (++) Clock: the counter clock.
44 (+++) Source : it can be either the ULPTIM input (IN1) or one of
45 the internal clock; (APB, LSE, LSI or MSI).
46 CAUTION: if LSI2 is selected as LPTIM cock source, LSI1 has
47 to be enabled as well (for further information please
48 refer to errata sheet ES0394).
49 (+++) Prescaler: select the clock divider.
50 (++) UltraLowPowerClock : To be used only if the ULPTIM is selected
51 as counter clock source.
52 (+++) Polarity: polarity of the active edge for the counter unit
53 if the ULPTIM input is selected.
54 (+++) SampleTime: clock sampling time to configure the clock glitch
55 filter.
56 (++) Trigger: How the counter start.
57 (+++) Source: trigger can be software or one of the hardware triggers.
58 (+++) ActiveEdge : only for hardware trigger.
59 (+++) SampleTime : trigger sampling time to configure the trigger
60 glitch filter.
61 (++) OutputPolarity : 2 opposite polarities are possible.
62 (++) UpdateMode: specifies whether the update of the autoreload and
63 the compare values is done immediately or after the end of current
64 period.
65 (++) Input1Source: Source selected for input1 (GPIO or comparator output).
66 (++) Input2Source: Source selected for input2 (GPIO or comparator output).
67 Input2 is used only for encoder feature so is used only for LPTIM1 instance.
68
69 (#)Six modes are available:
70
71 (++) PWM Mode: To generate a PWM signal with specified period and pulse,
72 call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
73 mode.
74
75 (++) One Pulse Mode: To generate pulse with specified width in response
76 to a stimulus, call HAL_LPTIM_OnePulse_Start() or
77 HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
78
79 (++) Set once Mode: In this mode, the output changes the level (from
80 low level to high level if the output polarity is configured high, else
81 the opposite) when a compare match occurs. To start this mode, call
82 HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
83 interruption mode.
84
85 (++) Encoder Mode: To use the encoder interface call
86 HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
87 interruption mode. Only available for LPTIM1 instance.
88
89 (++) Time out Mode: an active edge on one selected trigger input rests
90 the counter. The first trigger event will start the timer, any
91 successive trigger event will reset the counter and the timer will
92 restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
93 HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
94
95 (++) Counter Mode: counter can be used to count external events on
96 the LPTIM Input1 or it can be used to count internal clock cycles.
97 To start this mode, call HAL_LPTIM_Counter_Start() or
98 HAL_LPTIM_Counter_Start_IT() for interruption mode.
99
100
101 (#) User can stop any process by calling the corresponding API:
102 HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
103 already started in interruption mode.
104
105 (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
106
107 *** Callback registration ***
108 =============================================
109 [..]
110 The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
111 allows the user to configure dynamically the driver callbacks.
112 [..]
113 Use Function HAL_LPTIM_RegisterCallback() to register a callback.
114 HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
115 the Callback ID and a pointer to the user callback function.
116 [..]
117 Use function HAL_LPTIM_UnRegisterCallback() to reset a callback to the
118 default weak function.
119 HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
120 and the Callback ID.
121 [..]
122 These functions allow to register/unregister following callbacks:
123
124 (+) MspInitCallback : LPTIM Base Msp Init Callback.
125 (+) MspDeInitCallback : LPTIM Base Msp DeInit Callback.
126 (+) CompareMatchCallback : Compare match Callback.
127 (+) AutoReloadMatchCallback : Auto-reload match Callback.
128 (+) TriggerCallback : External trigger event detection Callback.
129 (+) CompareWriteCallback : Compare register write complete Callback.
130 (+) AutoReloadWriteCallback : Auto-reload register write complete Callback.
131 (+) DirectionUpCallback : Up-counting direction change Callback.
132 (+) DirectionDownCallback : Down-counting direction change Callback.
133
134 [..]
135 By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
136 all interrupt callbacks are set to the corresponding weak functions:
137 examples HAL_LPTIM_TriggerCallback(), HAL_LPTIM_CompareMatchCallback().
138
139 [..]
140 Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
141 functionalities in the Init/DeInit only when these callbacks are null
142 (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit
143 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
144
145 [..]
146 Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
147 Exception done MspInit/MspDeInit that can be registered/unregistered
148 in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
149 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
150 In that case first register the MspInit/MspDeInit user callbacks
151 using HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
152
153 [..]
154 When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
155 not defined, the callback registration feature is not available and all callbacks
156 are set to the corresponding weak functions.
157
158 @endverbatim
159 ******************************************************************************
160 */
161
162 /* Includes ------------------------------------------------------------------*/
163 #include "stm32wbxx_hal.h"
164
165 /** @addtogroup STM32WBxx_HAL_Driver
166 * @{
167 */
168
169 /** @defgroup LPTIM LPTIM
170 * @brief LPTIM HAL module driver.
171 * @{
172 */
173
174 #ifdef HAL_LPTIM_MODULE_ENABLED
175
176 #if defined (LPTIM1) || defined (LPTIM2)
177
178 /* Private typedef -----------------------------------------------------------*/
179 /* Private define ------------------------------------------------------------*/
180 /** @addtogroup LPTIM_Private_Constants
181 * @{
182 */
183 #define TIMEOUT 1000UL /* Timeout is 1s */
184 /**
185 * @}
186 */
187
188 /* Private macro -------------------------------------------------------------*/
189 /** @addtogroup LPTIM_Private_Macros
190 * @{
191 */
192 #if defined(LPTIM2)
193 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(__INSTANCE__) \
194 (((__INSTANCE__) == LPTIM1) ? __HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT() : __HAL_LPTIM_LPTIM2_EXTI_ENABLE_IT())
195
196 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(__INSTANCE__) \
197 (((__INSTANCE__) == LPTIM1) ? __HAL_LPTIM_LPTIM1_EXTI_DISABLE_IT() : __HAL_LPTIM_LPTIM2_EXTI_DISABLE_IT())
198 #else
199 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(__INSTANCE__) __HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT()
200
201 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(__INSTANCE__) __HAL_LPTIM_LPTIM1_EXTI_DISABLE_IT()
202 #endif /* LPTIM2 */
203 /**
204 * @}
205 */
206
207 /* Private variables ---------------------------------------------------------*/
208 /* Private function prototypes -----------------------------------------------*/
209 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
210 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
211 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
212 static HAL_StatusTypeDef LPTIM_WaitForFlag(const LPTIM_HandleTypeDef *hlptim, uint32_t flag);
213
214 /* Exported functions --------------------------------------------------------*/
215
216 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
217 * @{
218 */
219
220 /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
221 * @brief Initialization and Configuration functions.
222 *
223 @verbatim
224 ==============================================================================
225 ##### Initialization and de-initialization functions #####
226 ==============================================================================
227 [..] This section provides functions allowing to:
228 (+) Initialize the LPTIM according to the specified parameters in the
229 LPTIM_InitTypeDef and initialize the associated handle.
230 (+) DeInitialize the LPTIM peripheral.
231 (+) Initialize the LPTIM MSP.
232 (+) DeInitialize the LPTIM MSP.
233
234 @endverbatim
235 * @{
236 */
237
238 /**
239 * @brief Initialize the LPTIM according to the specified parameters in the
240 * LPTIM_InitTypeDef and initialize the associated handle.
241 * @param hlptim LPTIM handle
242 * @retval HAL status
243 */
HAL_LPTIM_Init(LPTIM_HandleTypeDef * hlptim)244 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
245 {
246 uint32_t tmpcfgr;
247
248 /* Check the LPTIM handle allocation */
249 if (hlptim == NULL)
250 {
251 return HAL_ERROR;
252 }
253
254 /* Check the parameters */
255 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
256
257 assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
258 assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
259 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
260 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
261 {
262 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
263 assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
264 }
265 assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
266 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
267 {
268 assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
269 assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
270 }
271 assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
272 assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
273 assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
274
275 if (hlptim->State == HAL_LPTIM_STATE_RESET)
276 {
277 /* Allocate lock resource and initialize it */
278 hlptim->Lock = HAL_UNLOCKED;
279
280 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
281 /* Reset interrupt callbacks to legacy weak callbacks */
282 LPTIM_ResetCallback(hlptim);
283
284 if (hlptim->MspInitCallback == NULL)
285 {
286 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
287 }
288
289 /* Init the low level hardware : GPIO, CLOCK, NVIC */
290 hlptim->MspInitCallback(hlptim);
291 #else
292 /* Init the low level hardware : GPIO, CLOCK, NVIC */
293 HAL_LPTIM_MspInit(hlptim);
294 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
295 }
296
297 /* Change the LPTIM state */
298 hlptim->State = HAL_LPTIM_STATE_BUSY;
299
300 /* Get the LPTIMx CFGR value */
301 tmpcfgr = hlptim->Instance->CFGR;
302
303 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
304 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
305 {
306 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
307 }
308 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
309 {
310 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
311 }
312
313 /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
314 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
315 LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
316
317 /* Set initialization parameters */
318 tmpcfgr |= (hlptim->Init.Clock.Source |
319 hlptim->Init.Clock.Prescaler |
320 hlptim->Init.OutputPolarity |
321 hlptim->Init.UpdateMode |
322 hlptim->Init.CounterSource);
323
324 /* Glitch filters for internal triggers and external inputs are configured
325 * only if an internal clock source is provided to the LPTIM
326 */
327 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)
328 {
329 tmpcfgr |= (hlptim->Init.Trigger.SampleTime |
330 hlptim->Init.UltraLowPowerClock.SampleTime);
331 }
332
333 /* Configure LPTIM external clock polarity and digital filter */
334 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
335 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
336 {
337 tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
338 hlptim->Init.UltraLowPowerClock.SampleTime);
339 }
340
341 /* Configure LPTIM external trigger */
342 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
343 {
344 /* Enable External trigger and set the trigger source */
345 tmpcfgr |= (hlptim->Init.Trigger.Source |
346 hlptim->Init.Trigger.ActiveEdge |
347 hlptim->Init.Trigger.SampleTime);
348 }
349
350 /* Write to LPTIMx CFGR */
351 hlptim->Instance->CFGR = tmpcfgr;
352 #if defined(LPTIM_OR_OR)
353
354 /* Configure LPTIM input sources */
355 if (hlptim->Instance == LPTIM1)
356 {
357 #if defined(LPTIM_OR_OR_1)
358 /* Check LPTIM Input1 and Input2 sources */
359 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
360 assert_param(IS_LPTIM_INPUT2_SOURCE(hlptim->Instance, hlptim->Init.Input2Source));
361
362 /* Configure LPTIM Input1 and Input2 sources */
363 hlptim->Instance->OR = (hlptim->Init.Input1Source | hlptim->Init.Input2Source);
364 #else
365 /* Check LPTIM Input1 source */
366 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
367
368 /* Configure LPTIM Input1 source */
369 hlptim->Instance->OR = hlptim->Init.Input1Source;
370 #endif /* LPTIM_OR_OR_1 */
371 }
372 else
373 {
374 /* Check LPTIM Input1 source */
375 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
376
377 /* Configure LPTIM Input1 source */
378 hlptim->Instance->OR = hlptim->Init.Input1Source;
379 }
380 #endif /* LPTIM_OR_OR */
381
382 /* Change the LPTIM state */
383 hlptim->State = HAL_LPTIM_STATE_READY;
384
385 /* Return function status */
386 return HAL_OK;
387 }
388
389 /**
390 * @brief DeInitialize the LPTIM peripheral.
391 * @param hlptim LPTIM handle
392 * @retval HAL status
393 */
HAL_LPTIM_DeInit(LPTIM_HandleTypeDef * hlptim)394 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
395 {
396 /* Check the LPTIM handle allocation */
397 if (hlptim == NULL)
398 {
399 return HAL_ERROR;
400 }
401
402 /* Change the LPTIM state */
403 hlptim->State = HAL_LPTIM_STATE_BUSY;
404
405 /* Disable the LPTIM Peripheral Clock */
406 __HAL_LPTIM_DISABLE(hlptim);
407
408 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
409 {
410 return HAL_TIMEOUT;
411 }
412
413 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
414 if (hlptim->MspDeInitCallback == NULL)
415 {
416 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
417 }
418
419 /* DeInit the low level hardware: CLOCK, NVIC.*/
420 hlptim->MspDeInitCallback(hlptim);
421 #else
422 /* DeInit the low level hardware: CLOCK, NVIC.*/
423 HAL_LPTIM_MspDeInit(hlptim);
424 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
425
426 /* Change the LPTIM state */
427 hlptim->State = HAL_LPTIM_STATE_RESET;
428
429 /* Release Lock */
430 __HAL_UNLOCK(hlptim);
431
432 /* Return function status */
433 return HAL_OK;
434 }
435
436 /**
437 * @brief Initialize the LPTIM MSP.
438 * @param hlptim LPTIM handle
439 * @retval None
440 */
HAL_LPTIM_MspInit(LPTIM_HandleTypeDef * hlptim)441 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
442 {
443 /* Prevent unused argument(s) compilation warning */
444 UNUSED(hlptim);
445
446 /* NOTE : This function should not be modified, when the callback is needed,
447 the HAL_LPTIM_MspInit could be implemented in the user file
448 */
449 }
450
451 /**
452 * @brief DeInitialize LPTIM MSP.
453 * @param hlptim LPTIM handle
454 * @retval None
455 */
HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef * hlptim)456 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
457 {
458 /* Prevent unused argument(s) compilation warning */
459 UNUSED(hlptim);
460
461 /* NOTE : This function should not be modified, when the callback is needed,
462 the HAL_LPTIM_MspDeInit could be implemented in the user file
463 */
464 }
465
466 /**
467 * @}
468 */
469
470 /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
471 * @brief Start-Stop operation functions.
472 *
473 @verbatim
474 ==============================================================================
475 ##### LPTIM Start Stop operation functions #####
476 ==============================================================================
477 [..] This section provides functions allowing to:
478 (+) Start the PWM mode.
479 (+) Stop the PWM mode.
480 (+) Start the One pulse mode.
481 (+) Stop the One pulse mode.
482 (+) Start the Set once mode.
483 (+) Stop the Set once mode.
484 (+) Start the Encoder mode.
485 (+) Stop the Encoder mode.
486 (+) Start the Timeout mode.
487 (+) Stop the Timeout mode.
488 (+) Start the Counter mode.
489 (+) Stop the Counter mode.
490
491
492 @endverbatim
493 * @{
494 */
495
496 /**
497 * @brief Start the LPTIM PWM generation.
498 * @param hlptim LPTIM handle
499 * @param Period Specifies the Autoreload value.
500 * This parameter must be a value between 0x0001 and 0xFFFF.
501 * @param Pulse Specifies the compare value.
502 * This parameter must be a value between 0x0000 and 0xFFFF.
503 * @retval HAL status
504 */
HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)505 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
506 {
507 /* Check the parameters */
508 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
509 assert_param(IS_LPTIM_PERIOD(Period));
510 assert_param(IS_LPTIM_PULSE(Pulse));
511
512 /* Set the LPTIM state */
513 hlptim->State = HAL_LPTIM_STATE_BUSY;
514
515 /* Reset WAVE bit to set PWM mode */
516 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
517
518 /* Enable the Peripheral */
519 __HAL_LPTIM_ENABLE(hlptim);
520
521 /* Clear flag */
522 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
523
524 /* Load the period value in the autoreload register */
525 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
526
527 /* Wait for the completion of the write operation to the LPTIM_ARR register */
528 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
529 {
530 return HAL_TIMEOUT;
531 }
532
533 /* Clear flag */
534 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
535
536 /* Load the pulse value in the compare register */
537 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
538
539 /* Wait for the completion of the write operation to the LPTIM_CMP register */
540 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
541 {
542 return HAL_TIMEOUT;
543 }
544
545 /* Start timer in continuous mode */
546 __HAL_LPTIM_START_CONTINUOUS(hlptim);
547
548 /* Change the LPTIM state */
549 hlptim->State = HAL_LPTIM_STATE_READY;
550
551 /* Return function status */
552 return HAL_OK;
553 }
554
555 /**
556 * @brief Stop the LPTIM PWM generation.
557 * @param hlptim LPTIM handle
558 * @retval HAL status
559 */
HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef * hlptim)560 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
561 {
562 /* Check the parameters */
563 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
564
565 /* Change the LPTIM state */
566 hlptim->State = HAL_LPTIM_STATE_BUSY;
567
568 /* Disable the Peripheral */
569 __HAL_LPTIM_DISABLE(hlptim);
570
571 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
572 {
573 return HAL_TIMEOUT;
574 }
575
576 /* Change the LPTIM state */
577 hlptim->State = HAL_LPTIM_STATE_READY;
578
579 /* Return function status */
580 return HAL_OK;
581 }
582
583 /**
584 * @brief Start the LPTIM PWM generation in interrupt mode.
585 * @param hlptim LPTIM handle
586 * @param Period Specifies the Autoreload value.
587 * This parameter must be a value between 0x0001 and 0xFFFF
588 * @param Pulse Specifies the compare value.
589 * This parameter must be a value between 0x0000 and 0xFFFF
590 * @retval HAL status
591 */
HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)592 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
593 {
594 /* Check the parameters */
595 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
596 assert_param(IS_LPTIM_PERIOD(Period));
597 assert_param(IS_LPTIM_PULSE(Pulse));
598
599 /* Set the LPTIM state */
600 hlptim->State = HAL_LPTIM_STATE_BUSY;
601
602 /* Reset WAVE bit to set PWM mode */
603 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
604
605 /* Enable the Peripheral */
606 __HAL_LPTIM_ENABLE(hlptim);
607
608 /* Clear flag */
609 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
610
611 /* Load the period value in the autoreload register */
612 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
613
614 /* Wait for the completion of the write operation to the LPTIM_ARR register */
615 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
616 {
617 return HAL_TIMEOUT;
618 }
619
620 /* Clear flag */
621 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
622
623 /* Load the pulse value in the compare register */
624 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
625
626 /* Wait for the completion of the write operation to the LPTIM_CMP register */
627 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
628 {
629 return HAL_TIMEOUT;
630 }
631
632 /* Disable the Peripheral */
633 __HAL_LPTIM_DISABLE(hlptim);
634
635 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
636 {
637 return HAL_TIMEOUT;
638 }
639
640 /* Enable Autoreload write complete interrupt */
641 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
642
643 /* Enable Compare write complete interrupt */
644 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
645
646 /* Enable Autoreload match interrupt */
647 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
648
649 /* Enable Compare match interrupt */
650 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
651
652 /* If external trigger source is used, then enable external trigger interrupt */
653 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
654 {
655 /* Enable external trigger interrupt */
656 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
657 }
658
659 /* Enable the Peripheral */
660 __HAL_LPTIM_ENABLE(hlptim);
661
662 /* Start timer in continuous mode */
663 __HAL_LPTIM_START_CONTINUOUS(hlptim);
664
665 /* Change the LPTIM state */
666 hlptim->State = HAL_LPTIM_STATE_READY;
667
668 /* Return function status */
669 return HAL_OK;
670 }
671
672 /**
673 * @brief Stop the LPTIM PWM generation in interrupt mode.
674 * @param hlptim LPTIM handle
675 * @retval HAL status
676 */
HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef * hlptim)677 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
678 {
679 /* Check the parameters */
680 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
681
682 /* Change the LPTIM state */
683 hlptim->State = HAL_LPTIM_STATE_BUSY;
684
685 /* Disable the Peripheral */
686 __HAL_LPTIM_DISABLE(hlptim);
687
688 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
689 {
690 return HAL_TIMEOUT;
691 }
692
693 /* Disable Autoreload write complete interrupt */
694 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
695
696 /* Disable Compare write complete interrupt */
697 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
698
699 /* Disable Autoreload match interrupt */
700 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
701
702 /* Disable Compare match interrupt */
703 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
704
705 /* If external trigger source is used, then disable external trigger interrupt */
706 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
707 {
708 /* Disable external trigger interrupt */
709 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
710 }
711
712 /* Change the LPTIM state */
713 hlptim->State = HAL_LPTIM_STATE_READY;
714
715 /* Return function status */
716 return HAL_OK;
717 }
718
719 /**
720 * @brief Start the LPTIM One pulse generation.
721 * @param hlptim LPTIM handle
722 * @param Period Specifies the Autoreload value.
723 * This parameter must be a value between 0x0001 and 0xFFFF.
724 * @param Pulse Specifies the compare value.
725 * This parameter must be a value between 0x0000 and 0xFFFF.
726 * @retval HAL status
727 */
HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)728 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
729 {
730 /* Check the parameters */
731 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
732 assert_param(IS_LPTIM_PERIOD(Period));
733 assert_param(IS_LPTIM_PULSE(Pulse));
734
735 /* Set the LPTIM state */
736 hlptim->State = HAL_LPTIM_STATE_BUSY;
737
738 /* Reset WAVE bit to set one pulse mode */
739 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
740
741 /* Enable the Peripheral */
742 __HAL_LPTIM_ENABLE(hlptim);
743
744 /* Clear flag */
745 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
746
747 /* Load the period value in the autoreload register */
748 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
749
750 /* Wait for the completion of the write operation to the LPTIM_ARR register */
751 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
752 {
753 return HAL_TIMEOUT;
754 }
755
756 /* Clear flag */
757 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
758
759 /* Load the pulse value in the compare register */
760 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
761
762 /* Wait for the completion of the write operation to the LPTIM_CMP register */
763 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
764 {
765 return HAL_TIMEOUT;
766 }
767
768 /* Start timer in single (one shot) mode */
769 __HAL_LPTIM_START_SINGLE(hlptim);
770
771 /* Change the LPTIM state */
772 hlptim->State = HAL_LPTIM_STATE_READY;
773
774 /* Return function status */
775 return HAL_OK;
776 }
777
778 /**
779 * @brief Stop the LPTIM One pulse generation.
780 * @param hlptim LPTIM handle
781 * @retval HAL status
782 */
HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef * hlptim)783 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
784 {
785 /* Check the parameters */
786 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
787
788 /* Set the LPTIM state */
789 hlptim->State = HAL_LPTIM_STATE_BUSY;
790
791 /* Disable the Peripheral */
792 __HAL_LPTIM_DISABLE(hlptim);
793
794 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
795 {
796 return HAL_TIMEOUT;
797 }
798
799 /* Change the LPTIM state */
800 hlptim->State = HAL_LPTIM_STATE_READY;
801
802 /* Return function status */
803 return HAL_OK;
804 }
805
806 /**
807 * @brief Start the LPTIM One pulse generation in interrupt mode.
808 * @param hlptim LPTIM handle
809 * @param Period Specifies the Autoreload value.
810 * This parameter must be a value between 0x0001 and 0xFFFF.
811 * @param Pulse Specifies the compare value.
812 * This parameter must be a value between 0x0000 and 0xFFFF.
813 * @retval HAL status
814 */
HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)815 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
816 {
817 /* Check the parameters */
818 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
819 assert_param(IS_LPTIM_PERIOD(Period));
820 assert_param(IS_LPTIM_PULSE(Pulse));
821
822 /* Set the LPTIM state */
823 hlptim->State = HAL_LPTIM_STATE_BUSY;
824
825 /* Reset WAVE bit to set one pulse mode */
826 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
827
828 /* Enable the Peripheral */
829 __HAL_LPTIM_ENABLE(hlptim);
830
831 /* Clear flag */
832 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
833
834 /* Load the period value in the autoreload register */
835 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
836
837 /* Wait for the completion of the write operation to the LPTIM_ARR register */
838 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
839 {
840 return HAL_TIMEOUT;
841 }
842
843 /* Clear flag */
844 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
845
846 /* Load the pulse value in the compare register */
847 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
848
849 /* Wait for the completion of the write operation to the LPTIM_CMP register */
850 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
851 {
852 return HAL_TIMEOUT;
853 }
854
855 /* Disable the Peripheral */
856 __HAL_LPTIM_DISABLE(hlptim);
857
858 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
859 {
860 return HAL_TIMEOUT;
861 }
862
863 /* Enable Autoreload write complete interrupt */
864 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
865
866 /* Enable Compare write complete interrupt */
867 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
868
869 /* Enable Autoreload match interrupt */
870 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
871
872 /* Enable Compare match interrupt */
873 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
874
875 /* If external trigger source is used, then enable external trigger interrupt */
876 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
877 {
878 /* Enable external trigger interrupt */
879 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
880 }
881
882 /* Enable the Peripheral */
883 __HAL_LPTIM_ENABLE(hlptim);
884
885 /* Start timer in single (one shot) mode */
886 __HAL_LPTIM_START_SINGLE(hlptim);
887
888 /* Change the LPTIM state */
889 hlptim->State = HAL_LPTIM_STATE_READY;
890
891 /* Return function status */
892 return HAL_OK;
893 }
894
895 /**
896 * @brief Stop the LPTIM One pulse generation in interrupt mode.
897 * @param hlptim LPTIM handle
898 * @retval HAL status
899 */
HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef * hlptim)900 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
901 {
902 /* Check the parameters */
903 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
904
905 /* Set the LPTIM state */
906 hlptim->State = HAL_LPTIM_STATE_BUSY;
907
908
909 /* Disable the Peripheral */
910 __HAL_LPTIM_DISABLE(hlptim);
911
912 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
913 {
914 return HAL_TIMEOUT;
915 }
916
917 /* Disable Autoreload write complete interrupt */
918 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
919
920 /* Disable Compare write complete interrupt */
921 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
922
923 /* Disable Autoreload match interrupt */
924 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
925
926 /* Disable Compare match interrupt */
927 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
928
929 /* If external trigger source is used, then disable external trigger interrupt */
930 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
931 {
932 /* Disable external trigger interrupt */
933 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
934 }
935
936 /* Change the LPTIM state */
937 hlptim->State = HAL_LPTIM_STATE_READY;
938
939 /* Return function status */
940 return HAL_OK;
941 }
942
943 /**
944 * @brief Start the LPTIM in Set once mode.
945 * @param hlptim LPTIM handle
946 * @param Period Specifies the Autoreload value.
947 * This parameter must be a value between 0x0001 and 0xFFFF.
948 * @param Pulse Specifies the compare value.
949 * This parameter must be a value between 0x0000 and 0xFFFF.
950 * @retval HAL status
951 */
HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)952 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
953 {
954 /* Check the parameters */
955 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
956 assert_param(IS_LPTIM_PERIOD(Period));
957 assert_param(IS_LPTIM_PULSE(Pulse));
958
959 /* Set the LPTIM state */
960 hlptim->State = HAL_LPTIM_STATE_BUSY;
961
962 /* Set WAVE bit to enable the set once mode */
963 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
964
965 /* Enable the Peripheral */
966 __HAL_LPTIM_ENABLE(hlptim);
967
968 /* Clear flag */
969 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
970
971 /* Load the period value in the autoreload register */
972 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
973
974 /* Wait for the completion of the write operation to the LPTIM_ARR register */
975 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
976 {
977 return HAL_TIMEOUT;
978 }
979
980 /* Clear flag */
981 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
982
983 /* Load the pulse value in the compare register */
984 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
985
986 /* Wait for the completion of the write operation to the LPTIM_CMP register */
987 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
988 {
989 return HAL_TIMEOUT;
990 }
991
992 /* Start timer in single (one shot) mode */
993 __HAL_LPTIM_START_SINGLE(hlptim);
994
995 /* Change the LPTIM state */
996 hlptim->State = HAL_LPTIM_STATE_READY;
997
998 /* Return function status */
999 return HAL_OK;
1000 }
1001
1002 /**
1003 * @brief Stop the LPTIM Set once mode.
1004 * @param hlptim LPTIM handle
1005 * @retval HAL status
1006 */
HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef * hlptim)1007 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
1008 {
1009 /* Check the parameters */
1010 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1011
1012 /* Set the LPTIM state */
1013 hlptim->State = HAL_LPTIM_STATE_BUSY;
1014
1015 /* Disable the Peripheral */
1016 __HAL_LPTIM_DISABLE(hlptim);
1017
1018 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1019 {
1020 return HAL_TIMEOUT;
1021 }
1022
1023 /* Change the LPTIM state */
1024 hlptim->State = HAL_LPTIM_STATE_READY;
1025
1026 /* Return function status */
1027 return HAL_OK;
1028 }
1029
1030 /**
1031 * @brief Start the LPTIM Set once mode in interrupt mode.
1032 * @param hlptim LPTIM handle
1033 * @param Period Specifies the Autoreload value.
1034 * This parameter must be a value between 0x0000 and 0xFFFF.
1035 * @param Pulse Specifies the compare value.
1036 * This parameter must be a value between 0x0000 and 0xFFFF.
1037 * @retval HAL status
1038 */
HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)1039 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
1040 {
1041 /* Check the parameters */
1042 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1043 assert_param(IS_LPTIM_PERIOD(Period));
1044 assert_param(IS_LPTIM_PULSE(Pulse));
1045
1046 /* Set the LPTIM state */
1047 hlptim->State = HAL_LPTIM_STATE_BUSY;
1048
1049 /* Set WAVE bit to enable the set once mode */
1050 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
1051
1052 /* Enable the Peripheral */
1053 __HAL_LPTIM_ENABLE(hlptim);
1054
1055 /* Clear flag */
1056 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1057
1058 /* Load the period value in the autoreload register */
1059 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1060
1061 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1062 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1063 {
1064 return HAL_TIMEOUT;
1065 }
1066
1067 /* Clear flag */
1068 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1069
1070 /* Load the pulse value in the compare register */
1071 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1072
1073 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1074 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1075 {
1076 return HAL_TIMEOUT;
1077 }
1078
1079 /* Disable the Peripheral */
1080 __HAL_LPTIM_DISABLE(hlptim);
1081
1082 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1083 {
1084 return HAL_TIMEOUT;
1085 }
1086
1087 /* Enable Autoreload write complete interrupt */
1088 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1089
1090 /* Enable Compare write complete interrupt */
1091 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
1092
1093 /* Enable Autoreload match interrupt */
1094 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1095
1096 /* Enable Compare match interrupt */
1097 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1098
1099 /* If external trigger source is used, then enable external trigger interrupt */
1100 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1101 {
1102 /* Enable external trigger interrupt */
1103 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1104 }
1105
1106 /* Enable the Peripheral */
1107 __HAL_LPTIM_ENABLE(hlptim);
1108
1109 /* Start timer in single (one shot) mode */
1110 __HAL_LPTIM_START_SINGLE(hlptim);
1111
1112 /* Change the LPTIM state */
1113 hlptim->State = HAL_LPTIM_STATE_READY;
1114
1115 /* Return function status */
1116 return HAL_OK;
1117 }
1118
1119 /**
1120 * @brief Stop the LPTIM Set once mode in interrupt mode.
1121 * @param hlptim LPTIM handle
1122 * @retval HAL status
1123 */
HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef * hlptim)1124 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1125 {
1126 /* Check the parameters */
1127 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1128
1129 /* Set the LPTIM state */
1130 hlptim->State = HAL_LPTIM_STATE_BUSY;
1131
1132 /* Disable the Peripheral */
1133 __HAL_LPTIM_DISABLE(hlptim);
1134
1135 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1136 {
1137 return HAL_TIMEOUT;
1138 }
1139
1140 /* Disable Autoreload write complete interrupt */
1141 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1142
1143 /* Disable Compare write complete interrupt */
1144 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
1145
1146 /* Disable Autoreload match interrupt */
1147 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1148
1149 /* Disable Compare match interrupt */
1150 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1151
1152 /* If external trigger source is used, then disable external trigger interrupt */
1153 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1154 {
1155 /* Disable external trigger interrupt */
1156 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1157 }
1158
1159 /* Change the LPTIM state */
1160 hlptim->State = HAL_LPTIM_STATE_READY;
1161
1162 /* Return function status */
1163 return HAL_OK;
1164 }
1165
1166 /**
1167 * @brief Start the Encoder interface.
1168 * @param hlptim LPTIM handle
1169 * @param Period Specifies the Autoreload value.
1170 * This parameter must be a value between 0x0001 and 0xFFFF.
1171 * @retval HAL status
1172 */
HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1173 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1174 {
1175 uint32_t tmpcfgr;
1176
1177 /* Check the parameters */
1178 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1179 assert_param(IS_LPTIM_PERIOD(Period));
1180 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1181 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1182 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1183
1184 /* Set the LPTIM state */
1185 hlptim->State = HAL_LPTIM_STATE_BUSY;
1186
1187 /* Get the LPTIMx CFGR value */
1188 tmpcfgr = hlptim->Instance->CFGR;
1189
1190 /* Clear CKPOL bits */
1191 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1192
1193 /* Set Input polarity */
1194 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1195
1196 /* Write to LPTIMx CFGR */
1197 hlptim->Instance->CFGR = tmpcfgr;
1198
1199 /* Set ENC bit to enable the encoder interface */
1200 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1201
1202 /* Enable the Peripheral */
1203 __HAL_LPTIM_ENABLE(hlptim);
1204
1205 /* Clear flag */
1206 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1207
1208 /* Load the period value in the autoreload register */
1209 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1210
1211 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1212 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1213 {
1214 return HAL_TIMEOUT;
1215 }
1216
1217 /* Start timer in continuous mode */
1218 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1219
1220 /* Change the LPTIM state */
1221 hlptim->State = HAL_LPTIM_STATE_READY;
1222
1223 /* Return function status */
1224 return HAL_OK;
1225 }
1226
1227 /**
1228 * @brief Stop the Encoder interface.
1229 * @param hlptim LPTIM handle
1230 * @retval HAL status
1231 */
HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef * hlptim)1232 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
1233 {
1234 /* Check the parameters */
1235 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1236
1237 /* Set the LPTIM state */
1238 hlptim->State = HAL_LPTIM_STATE_BUSY;
1239
1240 /* Disable the Peripheral */
1241 __HAL_LPTIM_DISABLE(hlptim);
1242
1243 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1244 {
1245 return HAL_TIMEOUT;
1246 }
1247
1248 /* Reset ENC bit to disable the encoder interface */
1249 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1250
1251 /* Change the LPTIM state */
1252 hlptim->State = HAL_LPTIM_STATE_READY;
1253
1254 /* Return function status */
1255 return HAL_OK;
1256 }
1257
1258 /**
1259 * @brief Start the Encoder interface in interrupt mode.
1260 * @param hlptim LPTIM handle
1261 * @param Period Specifies the Autoreload value.
1262 * This parameter must be a value between 0x0000 and 0xFFFF.
1263 * @retval HAL status
1264 */
HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1265 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1266 {
1267 uint32_t tmpcfgr;
1268
1269 /* Check the parameters */
1270 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1271 assert_param(IS_LPTIM_PERIOD(Period));
1272 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1273 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1274 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1275
1276 /* Set the LPTIM state */
1277 hlptim->State = HAL_LPTIM_STATE_BUSY;
1278
1279 /* Configure edge sensitivity for encoder mode */
1280 /* Get the LPTIMx CFGR value */
1281 tmpcfgr = hlptim->Instance->CFGR;
1282
1283 /* Clear CKPOL bits */
1284 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1285
1286 /* Set Input polarity */
1287 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1288
1289 /* Write to LPTIMx CFGR */
1290 hlptim->Instance->CFGR = tmpcfgr;
1291
1292 /* Set ENC bit to enable the encoder interface */
1293 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1294
1295 /* Enable the Peripheral */
1296 __HAL_LPTIM_ENABLE(hlptim);
1297
1298 /* Clear flag */
1299 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1300
1301 /* Load the period value in the autoreload register */
1302 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1303
1304 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1305 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1306 {
1307 return HAL_TIMEOUT;
1308 }
1309
1310 /* Disable the Peripheral */
1311 __HAL_LPTIM_DISABLE(hlptim);
1312
1313 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1314 {
1315 return HAL_TIMEOUT;
1316 }
1317
1318 /* Enable "switch to down direction" interrupt */
1319 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
1320
1321 /* Enable "switch to up direction" interrupt */
1322 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
1323
1324 /* Enable the Peripheral */
1325 __HAL_LPTIM_ENABLE(hlptim);
1326
1327 /* Start timer in continuous mode */
1328 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1329
1330 /* Change the LPTIM state */
1331 hlptim->State = HAL_LPTIM_STATE_READY;
1332
1333 /* Return function status */
1334 return HAL_OK;
1335 }
1336
1337 /**
1338 * @brief Stop the Encoder interface in interrupt mode.
1339 * @param hlptim LPTIM handle
1340 * @retval HAL status
1341 */
HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef * hlptim)1342 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1343 {
1344 /* Check the parameters */
1345 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1346
1347 /* Set the LPTIM state */
1348 hlptim->State = HAL_LPTIM_STATE_BUSY;
1349
1350 /* Disable the Peripheral */
1351 __HAL_LPTIM_DISABLE(hlptim);
1352
1353 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1354 {
1355 return HAL_TIMEOUT;
1356 }
1357
1358 /* Reset ENC bit to disable the encoder interface */
1359 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1360
1361 /* Disable "switch to down direction" interrupt */
1362 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
1363
1364 /* Disable "switch to up direction" interrupt */
1365 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
1366
1367 /* Change the LPTIM state */
1368 hlptim->State = HAL_LPTIM_STATE_READY;
1369
1370 /* Return function status */
1371 return HAL_OK;
1372 }
1373
1374 /**
1375 * @brief Start the Timeout function.
1376 * @note The first trigger event will start the timer, any successive
1377 * trigger event will reset the counter and the timer restarts.
1378 * @param hlptim LPTIM handle
1379 * @param Period Specifies the Autoreload value.
1380 * This parameter must be a value between 0x0001 and 0xFFFF.
1381 * @param Timeout Specifies the TimeOut value to reset the counter.
1382 * This parameter must be a value between 0x0000 and 0xFFFF.
1383 * @retval HAL status
1384 */
HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1385 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1386 {
1387 /* Check the parameters */
1388 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1389 assert_param(IS_LPTIM_PERIOD(Period));
1390 assert_param(IS_LPTIM_PULSE(Timeout));
1391
1392 /* Set the LPTIM state */
1393 hlptim->State = HAL_LPTIM_STATE_BUSY;
1394
1395 /* Set TIMOUT bit to enable the timeout function */
1396 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1397
1398 /* Enable the Peripheral */
1399 __HAL_LPTIM_ENABLE(hlptim);
1400
1401 /* Clear flag */
1402 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1403
1404 /* Load the period value in the autoreload register */
1405 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1406
1407 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1408 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1409 {
1410 return HAL_TIMEOUT;
1411 }
1412
1413 /* Clear flag */
1414 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1415
1416 /* Load the Timeout value in the compare register */
1417 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1418
1419 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1420 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1421 {
1422 return HAL_TIMEOUT;
1423 }
1424
1425 /* Start timer in continuous mode */
1426 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1427
1428 /* Change the LPTIM state */
1429 hlptim->State = HAL_LPTIM_STATE_READY;
1430
1431 /* Return function status */
1432 return HAL_OK;
1433 }
1434
1435 /**
1436 * @brief Stop the Timeout function.
1437 * @param hlptim LPTIM handle
1438 * @retval HAL status
1439 */
HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef * hlptim)1440 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
1441 {
1442 /* Check the parameters */
1443 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1444
1445 /* Set the LPTIM state */
1446 hlptim->State = HAL_LPTIM_STATE_BUSY;
1447
1448 /* Disable the Peripheral */
1449 __HAL_LPTIM_DISABLE(hlptim);
1450
1451 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1452 {
1453 return HAL_TIMEOUT;
1454 }
1455
1456 /* Reset TIMOUT bit to enable the timeout function */
1457 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1458
1459 /* Change the LPTIM state */
1460 hlptim->State = HAL_LPTIM_STATE_READY;
1461
1462 /* Return function status */
1463 return HAL_OK;
1464 }
1465
1466 /**
1467 * @brief Start the Timeout function in interrupt mode.
1468 * @note The first trigger event will start the timer, any successive
1469 * trigger event will reset the counter and the timer restarts.
1470 * @param hlptim LPTIM handle
1471 * @param Period Specifies the Autoreload value.
1472 * This parameter must be a value between 0x0001 and 0xFFFF.
1473 * @param Timeout Specifies the TimeOut value to reset the counter.
1474 * This parameter must be a value between 0x0000 and 0xFFFF.
1475 * @retval HAL status
1476 */
HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1477 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1478 {
1479 /* Check the parameters */
1480 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1481 assert_param(IS_LPTIM_PERIOD(Period));
1482 assert_param(IS_LPTIM_PULSE(Timeout));
1483
1484 /* Set the LPTIM state */
1485 hlptim->State = HAL_LPTIM_STATE_BUSY;
1486
1487 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1488 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(hlptim->Instance);
1489
1490 /* Set TIMOUT bit to enable the timeout function */
1491 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1492
1493 /* Enable the Peripheral */
1494 __HAL_LPTIM_ENABLE(hlptim);
1495
1496 /* Clear flag */
1497 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1498
1499 /* Load the period value in the autoreload register */
1500 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1501
1502 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1503 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1504 {
1505 return HAL_TIMEOUT;
1506 }
1507
1508 /* Clear flag */
1509 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1510
1511 /* Load the Timeout value in the compare register */
1512 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1513
1514 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1515 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1516 {
1517 return HAL_TIMEOUT;
1518 }
1519
1520 /* Disable the Peripheral */
1521 __HAL_LPTIM_DISABLE(hlptim);
1522
1523 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1524 {
1525 return HAL_TIMEOUT;
1526 }
1527
1528 /* Enable Compare match interrupt */
1529 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1530
1531 /* Enable the Peripheral */
1532 __HAL_LPTIM_ENABLE(hlptim);
1533
1534 /* Start timer in continuous mode */
1535 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1536
1537 /* Change the LPTIM state */
1538 hlptim->State = HAL_LPTIM_STATE_READY;
1539
1540 /* Return function status */
1541 return HAL_OK;
1542 }
1543
1544 /**
1545 * @brief Stop the Timeout function in interrupt mode.
1546 * @param hlptim LPTIM handle
1547 * @retval HAL status
1548 */
HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef * hlptim)1549 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1550 {
1551 /* Check the parameters */
1552 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1553
1554
1555 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1556 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(hlptim->Instance);
1557
1558 /* Set the LPTIM state */
1559 hlptim->State = HAL_LPTIM_STATE_BUSY;
1560
1561 /* Disable the Peripheral */
1562 __HAL_LPTIM_DISABLE(hlptim);
1563
1564 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1565 {
1566 return HAL_TIMEOUT;
1567 }
1568
1569 /* Reset TIMOUT bit to enable the timeout function */
1570 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1571
1572 /* Disable Compare match interrupt */
1573 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1574
1575 /* Change the LPTIM state */
1576 hlptim->State = HAL_LPTIM_STATE_READY;
1577
1578 /* Return function status */
1579 return HAL_OK;
1580 }
1581
1582 /**
1583 * @brief Start the Counter mode.
1584 * @param hlptim LPTIM handle
1585 * @param Period Specifies the Autoreload value.
1586 * This parameter must be a value between 0x0001 and 0xFFFF.
1587 * @retval HAL status
1588 */
HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1589 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1590 {
1591 /* Check the parameters */
1592 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1593 assert_param(IS_LPTIM_PERIOD(Period));
1594
1595 /* Set the LPTIM state */
1596 hlptim->State = HAL_LPTIM_STATE_BUSY;
1597
1598 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1599 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1600 && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1601 {
1602 /* Check if clock is prescaled */
1603 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1604 /* Set clock prescaler to 0 */
1605 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1606 }
1607
1608 /* Enable the Peripheral */
1609 __HAL_LPTIM_ENABLE(hlptim);
1610
1611 /* Clear flag */
1612 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1613
1614 /* Load the period value in the autoreload register */
1615 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1616
1617 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1618 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1619 {
1620 return HAL_TIMEOUT;
1621 }
1622
1623 /* Start timer in continuous mode */
1624 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1625
1626 /* Change the LPTIM state */
1627 hlptim->State = HAL_LPTIM_STATE_READY;
1628
1629 /* Return function status */
1630 return HAL_OK;
1631 }
1632
1633 /**
1634 * @brief Stop the Counter mode.
1635 * @param hlptim LPTIM handle
1636 * @retval HAL status
1637 */
HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef * hlptim)1638 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
1639 {
1640 /* Check the parameters */
1641 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1642
1643 /* Set the LPTIM state */
1644 hlptim->State = HAL_LPTIM_STATE_BUSY;
1645
1646 /* Disable the Peripheral */
1647 __HAL_LPTIM_DISABLE(hlptim);
1648
1649 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1650 {
1651 return HAL_TIMEOUT;
1652 }
1653
1654 /* Change the LPTIM state */
1655 hlptim->State = HAL_LPTIM_STATE_READY;
1656
1657 /* Return function status */
1658 return HAL_OK;
1659 }
1660
1661 /**
1662 * @brief Start the Counter mode in interrupt mode.
1663 * @param hlptim LPTIM handle
1664 * @param Period Specifies the Autoreload value.
1665 * This parameter must be a value between 0x0001 and 0xFFFF.
1666 * @retval HAL status
1667 */
HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1668 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1669 {
1670 /* Check the parameters */
1671 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1672 assert_param(IS_LPTIM_PERIOD(Period));
1673
1674 /* Set the LPTIM state */
1675 hlptim->State = HAL_LPTIM_STATE_BUSY;
1676
1677 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1678 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(hlptim->Instance);
1679
1680 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1681 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1682 && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1683 {
1684 /* Check if clock is prescaled */
1685 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1686 /* Set clock prescaler to 0 */
1687 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1688 }
1689
1690 /* Enable the Peripheral */
1691 __HAL_LPTIM_ENABLE(hlptim);
1692
1693 /* Clear flag */
1694 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1695
1696 /* Load the period value in the autoreload register */
1697 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1698
1699 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1700 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1701 {
1702 return HAL_TIMEOUT;
1703 }
1704
1705 /* Disable the Peripheral */
1706 __HAL_LPTIM_DISABLE(hlptim);
1707
1708 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1709 {
1710 return HAL_TIMEOUT;
1711 }
1712
1713 /* Enable Autoreload write complete interrupt */
1714 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1715
1716 /* Enable Autoreload match interrupt */
1717 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1718
1719 /* Enable the Peripheral */
1720 __HAL_LPTIM_ENABLE(hlptim);
1721
1722 /* Start timer in continuous mode */
1723 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1724
1725 /* Change the LPTIM state */
1726 hlptim->State = HAL_LPTIM_STATE_READY;
1727
1728 /* Return function status */
1729 return HAL_OK;
1730 }
1731
1732 /**
1733 * @brief Stop the Counter mode in interrupt mode.
1734 * @param hlptim LPTIM handle
1735 * @retval HAL status
1736 */
HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef * hlptim)1737 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1738 {
1739 /* Check the parameters */
1740 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1741
1742
1743 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1744 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(hlptim->Instance);
1745
1746 /* Set the LPTIM state */
1747 hlptim->State = HAL_LPTIM_STATE_BUSY;
1748
1749 /* Disable the Peripheral */
1750 __HAL_LPTIM_DISABLE(hlptim);
1751
1752 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1753 {
1754 return HAL_TIMEOUT;
1755 }
1756
1757 /* Disable Autoreload write complete interrupt */
1758 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1759
1760 /* Disable Autoreload match interrupt */
1761 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1762 /* Change the LPTIM state */
1763 hlptim->State = HAL_LPTIM_STATE_READY;
1764
1765 /* Return function status */
1766 return HAL_OK;
1767 }
1768
1769 /**
1770 * @}
1771 */
1772
1773 /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
1774 * @brief Read operation functions.
1775 *
1776 @verbatim
1777 ==============================================================================
1778 ##### LPTIM Read operation functions #####
1779 ==============================================================================
1780 [..] This section provides LPTIM Reading functions.
1781 (+) Read the counter value.
1782 (+) Read the period (Auto-reload) value.
1783 (+) Read the pulse (Compare)value.
1784 @endverbatim
1785 * @{
1786 */
1787
1788 /**
1789 * @brief Return the current counter value.
1790 * @param hlptim LPTIM handle
1791 * @retval Counter value.
1792 */
HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef * hlptim)1793 uint32_t HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef *hlptim)
1794 {
1795 /* Check the parameters */
1796 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1797
1798 return (hlptim->Instance->CNT);
1799 }
1800
1801 /**
1802 * @brief Return the current Autoreload (Period) value.
1803 * @param hlptim LPTIM handle
1804 * @retval Autoreload value.
1805 */
HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef * hlptim)1806 uint32_t HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef *hlptim)
1807 {
1808 /* Check the parameters */
1809 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1810
1811 return (hlptim->Instance->ARR);
1812 }
1813
1814 /**
1815 * @brief Return the current Compare (Pulse) value.
1816 * @param hlptim LPTIM handle
1817 * @retval Compare value.
1818 */
HAL_LPTIM_ReadCompare(const LPTIM_HandleTypeDef * hlptim)1819 uint32_t HAL_LPTIM_ReadCompare(const LPTIM_HandleTypeDef *hlptim)
1820 {
1821 /* Check the parameters */
1822 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1823
1824 return (hlptim->Instance->CMP);
1825 }
1826
1827 /**
1828 * @}
1829 */
1830
1831 /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks
1832 * @brief LPTIM IRQ handler.
1833 *
1834 @verbatim
1835 ==============================================================================
1836 ##### LPTIM IRQ handler and callbacks #####
1837 ==============================================================================
1838 [..] This section provides LPTIM IRQ handler and callback functions called within
1839 the IRQ handler:
1840 (+) LPTIM interrupt request handler
1841 (+) Compare match Callback
1842 (+) Auto-reload match Callback
1843 (+) External trigger event detection Callback
1844 (+) Compare register write complete Callback
1845 (+) Auto-reload register write complete Callback
1846 (+) Up-counting direction change Callback
1847 (+) Down-counting direction change Callback
1848
1849 @endverbatim
1850 * @{
1851 */
1852
1853 /**
1854 * @brief Handle LPTIM interrupt request.
1855 * @param hlptim LPTIM handle
1856 * @retval None
1857 */
HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef * hlptim)1858 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
1859 {
1860 /* Compare match interrupt */
1861 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
1862 {
1863 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
1864 {
1865 /* Clear Compare match flag */
1866 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
1867
1868 /* Compare match Callback */
1869 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1870 hlptim->CompareMatchCallback(hlptim);
1871 #else
1872 HAL_LPTIM_CompareMatchCallback(hlptim);
1873 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1874 }
1875 }
1876
1877 /* Autoreload match interrupt */
1878 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
1879 {
1880 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
1881 {
1882 /* Clear Autoreload match flag */
1883 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
1884
1885 /* Autoreload match Callback */
1886 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1887 hlptim->AutoReloadMatchCallback(hlptim);
1888 #else
1889 HAL_LPTIM_AutoReloadMatchCallback(hlptim);
1890 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1891 }
1892 }
1893
1894 /* Trigger detected interrupt */
1895 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
1896 {
1897 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
1898 {
1899 /* Clear Trigger detected flag */
1900 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
1901
1902 /* Trigger detected callback */
1903 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1904 hlptim->TriggerCallback(hlptim);
1905 #else
1906 HAL_LPTIM_TriggerCallback(hlptim);
1907 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1908 }
1909 }
1910
1911 /* Compare write interrupt */
1912 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
1913 {
1914 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
1915 {
1916 /* Clear Compare write flag */
1917 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1918
1919 /* Compare write Callback */
1920 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1921 hlptim->CompareWriteCallback(hlptim);
1922 #else
1923 HAL_LPTIM_CompareWriteCallback(hlptim);
1924 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1925 }
1926 }
1927
1928 /* Autoreload write interrupt */
1929 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
1930 {
1931 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
1932 {
1933 /* Clear Autoreload write flag */
1934 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1935
1936 /* Autoreload write Callback */
1937 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1938 hlptim->AutoReloadWriteCallback(hlptim);
1939 #else
1940 HAL_LPTIM_AutoReloadWriteCallback(hlptim);
1941 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1942 }
1943 }
1944
1945 /* Direction counter changed from Down to Up interrupt */
1946 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
1947 {
1948 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
1949 {
1950 /* Clear Direction counter changed from Down to Up flag */
1951 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
1952
1953 /* Direction counter changed from Down to Up Callback */
1954 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1955 hlptim->DirectionUpCallback(hlptim);
1956 #else
1957 HAL_LPTIM_DirectionUpCallback(hlptim);
1958 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1959 }
1960 }
1961
1962 /* Direction counter changed from Up to Down interrupt */
1963 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
1964 {
1965 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
1966 {
1967 /* Clear Direction counter changed from Up to Down flag */
1968 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
1969
1970 /* Direction counter changed from Up to Down Callback */
1971 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1972 hlptim->DirectionDownCallback(hlptim);
1973 #else
1974 HAL_LPTIM_DirectionDownCallback(hlptim);
1975 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1976 }
1977 }
1978 }
1979
1980 /**
1981 * @brief Compare match callback in non-blocking mode.
1982 * @param hlptim LPTIM handle
1983 * @retval None
1984 */
HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef * hlptim)1985 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
1986 {
1987 /* Prevent unused argument(s) compilation warning */
1988 UNUSED(hlptim);
1989
1990 /* NOTE : This function should not be modified, when the callback is needed,
1991 the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
1992 */
1993 }
1994
1995 /**
1996 * @brief Autoreload match callback in non-blocking mode.
1997 * @param hlptim LPTIM handle
1998 * @retval None
1999 */
HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef * hlptim)2000 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
2001 {
2002 /* Prevent unused argument(s) compilation warning */
2003 UNUSED(hlptim);
2004
2005 /* NOTE : This function should not be modified, when the callback is needed,
2006 the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
2007 */
2008 }
2009
2010 /**
2011 * @brief Trigger detected callback in non-blocking mode.
2012 * @param hlptim LPTIM handle
2013 * @retval None
2014 */
HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef * hlptim)2015 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
2016 {
2017 /* Prevent unused argument(s) compilation warning */
2018 UNUSED(hlptim);
2019
2020 /* NOTE : This function should not be modified, when the callback is needed,
2021 the HAL_LPTIM_TriggerCallback could be implemented in the user file
2022 */
2023 }
2024
2025 /**
2026 * @brief Compare write callback in non-blocking mode.
2027 * @param hlptim LPTIM handle
2028 * @retval None
2029 */
HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef * hlptim)2030 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
2031 {
2032 /* Prevent unused argument(s) compilation warning */
2033 UNUSED(hlptim);
2034
2035 /* NOTE : This function should not be modified, when the callback is needed,
2036 the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
2037 */
2038 }
2039
2040 /**
2041 * @brief Autoreload write callback in non-blocking mode.
2042 * @param hlptim LPTIM handle
2043 * @retval None
2044 */
HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef * hlptim)2045 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
2046 {
2047 /* Prevent unused argument(s) compilation warning */
2048 UNUSED(hlptim);
2049
2050 /* NOTE : This function should not be modified, when the callback is needed,
2051 the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
2052 */
2053 }
2054
2055 /**
2056 * @brief Direction counter changed from Down to Up callback in non-blocking mode.
2057 * @param hlptim LPTIM handle
2058 * @retval None
2059 */
HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef * hlptim)2060 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
2061 {
2062 /* Prevent unused argument(s) compilation warning */
2063 UNUSED(hlptim);
2064
2065 /* NOTE : This function should not be modified, when the callback is needed,
2066 the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
2067 */
2068 }
2069
2070 /**
2071 * @brief Direction counter changed from Up to Down callback in non-blocking mode.
2072 * @param hlptim LPTIM handle
2073 * @retval None
2074 */
HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef * hlptim)2075 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
2076 {
2077 /* Prevent unused argument(s) compilation warning */
2078 UNUSED(hlptim);
2079
2080 /* NOTE : This function should not be modified, when the callback is needed,
2081 the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
2082 */
2083 }
2084
2085 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2086 /**
2087 * @brief Register a User LPTIM callback to be used instead of the weak predefined callback
2088 * @param hlptim LPTIM handle
2089 * @param CallbackID ID of the callback to be registered
2090 * This parameter can be one of the following values:
2091 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2092 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2093 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2094 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2095 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2096 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2097 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2098 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2099 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2100 * @param pCallback pointer to the callback function
2101 * @retval status
2102 */
HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID,pLPTIM_CallbackTypeDef pCallback)2103 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim,
2104 HAL_LPTIM_CallbackIDTypeDef CallbackID,
2105 pLPTIM_CallbackTypeDef pCallback)
2106 {
2107 HAL_StatusTypeDef status = HAL_OK;
2108
2109 if (pCallback == NULL)
2110 {
2111 return HAL_ERROR;
2112 }
2113
2114 if (hlptim->State == HAL_LPTIM_STATE_READY)
2115 {
2116 switch (CallbackID)
2117 {
2118 case HAL_LPTIM_MSPINIT_CB_ID :
2119 hlptim->MspInitCallback = pCallback;
2120 break;
2121
2122 case HAL_LPTIM_MSPDEINIT_CB_ID :
2123 hlptim->MspDeInitCallback = pCallback;
2124 break;
2125
2126 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2127 hlptim->CompareMatchCallback = pCallback;
2128 break;
2129
2130 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2131 hlptim->AutoReloadMatchCallback = pCallback;
2132 break;
2133
2134 case HAL_LPTIM_TRIGGER_CB_ID :
2135 hlptim->TriggerCallback = pCallback;
2136 break;
2137
2138 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2139 hlptim->CompareWriteCallback = pCallback;
2140 break;
2141
2142 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2143 hlptim->AutoReloadWriteCallback = pCallback;
2144 break;
2145
2146 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2147 hlptim->DirectionUpCallback = pCallback;
2148 break;
2149
2150 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2151 hlptim->DirectionDownCallback = pCallback;
2152 break;
2153
2154 default :
2155 /* Return error status */
2156 status = HAL_ERROR;
2157 break;
2158 }
2159 }
2160 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2161 {
2162 switch (CallbackID)
2163 {
2164 case HAL_LPTIM_MSPINIT_CB_ID :
2165 hlptim->MspInitCallback = pCallback;
2166 break;
2167
2168 case HAL_LPTIM_MSPDEINIT_CB_ID :
2169 hlptim->MspDeInitCallback = pCallback;
2170 break;
2171
2172 default :
2173 /* Return error status */
2174 status = HAL_ERROR;
2175 break;
2176 }
2177 }
2178 else
2179 {
2180 /* Return error status */
2181 status = HAL_ERROR;
2182 }
2183
2184 return status;
2185 }
2186
2187 /**
2188 * @brief Unregister a LPTIM callback
2189 * LLPTIM callback is redirected to the weak predefined callback
2190 * @param hlptim LPTIM handle
2191 * @param CallbackID ID of the callback to be unregistered
2192 * This parameter can be one of the following values:
2193 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2194 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2195 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2196 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2197 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2198 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2199 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2200 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2201 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2202 * @retval status
2203 */
HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID)2204 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim,
2205 HAL_LPTIM_CallbackIDTypeDef CallbackID)
2206 {
2207 HAL_StatusTypeDef status = HAL_OK;
2208
2209 if (hlptim->State == HAL_LPTIM_STATE_READY)
2210 {
2211 switch (CallbackID)
2212 {
2213 case HAL_LPTIM_MSPINIT_CB_ID :
2214 /* Legacy weak MspInit Callback */
2215 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
2216 break;
2217
2218 case HAL_LPTIM_MSPDEINIT_CB_ID :
2219 /* Legacy weak Msp DeInit Callback */
2220 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
2221 break;
2222
2223 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2224 /* Legacy weak Compare match Callback */
2225 hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
2226 break;
2227
2228 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2229 /* Legacy weak Auto-reload match Callback */
2230 hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
2231 break;
2232
2233 case HAL_LPTIM_TRIGGER_CB_ID :
2234 /* Legacy weak External trigger event detection Callback */
2235 hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
2236 break;
2237
2238 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2239 /* Legacy weak Compare register write complete Callback */
2240 hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
2241 break;
2242
2243 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2244 /* Legacy weak Auto-reload register write complete Callback */
2245 hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
2246 break;
2247
2248 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2249 /* Legacy weak Up-counting direction change Callback */
2250 hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
2251 break;
2252
2253 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2254 /* Legacy weak Down-counting direction change Callback */
2255 hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
2256 break;
2257
2258 default :
2259 /* Return error status */
2260 status = HAL_ERROR;
2261 break;
2262 }
2263 }
2264 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2265 {
2266 switch (CallbackID)
2267 {
2268 case HAL_LPTIM_MSPINIT_CB_ID :
2269 /* Legacy weak MspInit Callback */
2270 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
2271 break;
2272
2273 case HAL_LPTIM_MSPDEINIT_CB_ID :
2274 /* Legacy weak Msp DeInit Callback */
2275 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
2276 break;
2277
2278 default :
2279 /* Return error status */
2280 status = HAL_ERROR;
2281 break;
2282 }
2283 }
2284 else
2285 {
2286 /* Return error status */
2287 status = HAL_ERROR;
2288 }
2289
2290 return status;
2291 }
2292 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2293
2294 /**
2295 * @}
2296 */
2297
2298 /** @defgroup LPTIM_Group5 Peripheral State functions
2299 * @brief Peripheral State functions.
2300 *
2301 @verbatim
2302 ==============================================================================
2303 ##### Peripheral State functions #####
2304 ==============================================================================
2305 [..]
2306 This subsection permits to get in run-time the status of the peripheral.
2307
2308 @endverbatim
2309 * @{
2310 */
2311
2312 /**
2313 * @brief Return the LPTIM handle state.
2314 * @param hlptim LPTIM handle
2315 * @retval HAL state
2316 */
HAL_LPTIM_GetState(const LPTIM_HandleTypeDef * hlptim)2317 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(const LPTIM_HandleTypeDef *hlptim)
2318 {
2319 /* Return LPTIM handle state */
2320 return hlptim->State;
2321 }
2322
2323 /**
2324 * @}
2325 */
2326
2327
2328 /**
2329 * @}
2330 */
2331
2332 /* Private functions ---------------------------------------------------------*/
2333
2334 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
2335 * @{
2336 */
2337 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2338 /**
2339 * @brief Reset interrupt callbacks to the legacy weak callbacks.
2340 * @param lptim pointer to a LPTIM_HandleTypeDef structure that contains
2341 * the configuration information for LPTIM module.
2342 * @retval None
2343 */
LPTIM_ResetCallback(LPTIM_HandleTypeDef * lptim)2344 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
2345 {
2346 /* Reset the LPTIM callback to the legacy weak callbacks */
2347 lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
2348 lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
2349 lptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
2350 lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
2351 lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
2352 lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
2353 lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
2354 }
2355 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2356
2357 /**
2358 * @brief LPTimer Wait for flag set
2359 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2360 * the configuration information for LPTIM module.
2361 * @param flag The lptim flag
2362 * @retval HAL status
2363 */
LPTIM_WaitForFlag(const LPTIM_HandleTypeDef * hlptim,uint32_t flag)2364 static HAL_StatusTypeDef LPTIM_WaitForFlag(const LPTIM_HandleTypeDef *hlptim, uint32_t flag)
2365 {
2366 HAL_StatusTypeDef result = HAL_OK;
2367 uint32_t count = TIMEOUT * (SystemCoreClock / 20UL / 1000UL);
2368 do
2369 {
2370 count--;
2371 if (count == 0UL)
2372 {
2373 result = HAL_TIMEOUT;
2374 }
2375 } while ((!(__HAL_LPTIM_GET_FLAG((hlptim), (flag)))) && (count != 0UL));
2376
2377 return result;
2378 }
2379
2380 /**
2381 * @brief Disable LPTIM HW instance.
2382 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2383 * the configuration information for LPTIM module.
2384 * @note The following sequence is required to solve LPTIM disable HW limitation.
2385 * Please check Errata Sheet ES0335 for more details under "MCU may remain
2386 * stuck in LPTIM interrupt when entering Stop mode" section.
2387 * @retval None
2388 */
LPTIM_Disable(LPTIM_HandleTypeDef * hlptim)2389 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
2390 {
2391 uint32_t tmpclksource = 0;
2392 uint32_t tmpIER;
2393 uint32_t tmpCFGR;
2394 uint32_t tmpCMP;
2395 uint32_t tmpARR;
2396 uint32_t primask_bit;
2397 #if defined(LPTIM_OR_OR)
2398 uint32_t tmpOR;
2399 #endif /* LPTIM_OR_OR */
2400
2401 /* Enter critical section */
2402 primask_bit = __get_PRIMASK();
2403 __set_PRIMASK(1) ;
2404
2405 /*********** Save LPTIM Config ***********/
2406 /* Save LPTIM source clock */
2407 switch ((uint32_t)hlptim->Instance)
2408 {
2409 case LPTIM1_BASE:
2410 tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
2411 break;
2412 #if defined(LPTIM2)
2413 case LPTIM2_BASE:
2414 tmpclksource = __HAL_RCC_GET_LPTIM2_SOURCE();
2415 break;
2416 #endif /* LPTIM2 */
2417 default:
2418 break;
2419 }
2420
2421 /* Save LPTIM configuration registers */
2422 tmpIER = hlptim->Instance->IER;
2423 tmpCFGR = hlptim->Instance->CFGR;
2424 tmpCMP = hlptim->Instance->CMP;
2425 tmpARR = hlptim->Instance->ARR;
2426 #if defined(LPTIM_OR_OR)
2427 tmpOR = hlptim->Instance->OR;
2428 #endif /* LPTIM_OR_OR */
2429
2430 /*********** Reset LPTIM ***********/
2431 switch ((uint32_t)hlptim->Instance)
2432 {
2433 case LPTIM1_BASE:
2434 __HAL_RCC_LPTIM1_FORCE_RESET();
2435 __HAL_RCC_LPTIM1_RELEASE_RESET();
2436 break;
2437 #if defined(LPTIM2)
2438 case LPTIM2_BASE:
2439 __HAL_RCC_LPTIM2_FORCE_RESET();
2440 __HAL_RCC_LPTIM2_RELEASE_RESET();
2441 break;
2442 #endif /* LPTIM2 */
2443 default:
2444 break;
2445 }
2446
2447 /*********** Restore LPTIM Config ***********/
2448 if ((tmpCMP != 0UL) || (tmpARR != 0UL))
2449 {
2450 /* Force LPTIM source kernel clock from APB */
2451 switch ((uint32_t)hlptim->Instance)
2452 {
2453 case LPTIM1_BASE:
2454 __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_PCLK1);
2455 break;
2456 #if defined(LPTIM2)
2457 case LPTIM2_BASE:
2458 __HAL_RCC_LPTIM2_CONFIG(RCC_LPTIM2CLKSOURCE_PCLK1);
2459 break;
2460 #endif /* LPTIM2 */
2461 default:
2462 break;
2463 }
2464
2465 if (tmpCMP != 0UL)
2466 {
2467 /* Restore CMP register (LPTIM should be enabled first) */
2468 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2469 hlptim->Instance->CMP = tmpCMP;
2470
2471 /* Wait for the completion of the write operation to the LPTIM_CMP register */
2472 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
2473 {
2474 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2475 }
2476 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
2477 }
2478
2479 if (tmpARR != 0UL)
2480 {
2481 /* Restore ARR register (LPTIM should be enabled first) */
2482 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2483 hlptim->Instance->ARR = tmpARR;
2484
2485 /* Wait for the completion of the write operation to the LPTIM_ARR register */
2486 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
2487 {
2488 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2489 }
2490
2491 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
2492 }
2493
2494 /* Restore LPTIM source kernel clock */
2495 switch ((uint32_t)hlptim->Instance)
2496 {
2497 case LPTIM1_BASE:
2498 __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
2499 break;
2500 #if defined(LPTIM2)
2501 case LPTIM2_BASE:
2502 __HAL_RCC_LPTIM2_CONFIG(tmpclksource);
2503 break;
2504 #endif /* LPTIM2 */
2505 default:
2506 break;
2507 }
2508 }
2509
2510 /* Restore configuration registers (LPTIM should be disabled first) */
2511 hlptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
2512 hlptim->Instance->IER = tmpIER;
2513 hlptim->Instance->CFGR = tmpCFGR;
2514 #if defined(LPTIM_OR_OR)
2515 hlptim->Instance->OR = tmpOR;
2516 #endif /* LPTIM_OR_OR */
2517
2518 /* Exit critical section: restore previous priority mask */
2519 __set_PRIMASK(primask_bit);
2520 }
2521 /**
2522 * @}
2523 */
2524 #endif /* LPTIM1 || LPTIM2 */
2525
2526 #endif /* HAL_LPTIM_MODULE_ENABLED */
2527 /**
2528 * @}
2529 */
2530
2531 /**
2532 * @}
2533 */
2534