1 /**
2 ******************************************************************************
3 * @file stm32wbxx_ll_exti.h
4 * @author MCD Application Team
5 * @brief Header file of EXTI LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2019 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32WBxx_LL_EXTI_H
21 #define STM32WBxx_LL_EXTI_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32wbxx.h"
29
30 /** @addtogroup STM32WBxx_LL_Driver
31 * @{
32 */
33
34 #if defined (EXTI)
35
36 /** @defgroup EXTI_LL EXTI
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /* Private Macros ------------------------------------------------------------*/
44 #if defined(USE_FULL_LL_DRIVER)
45 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
46 * @{
47 */
48 /**
49 * @}
50 */
51 #endif /*USE_FULL_LL_DRIVER*/
52 /* Exported types ------------------------------------------------------------*/
53 #if defined(USE_FULL_LL_DRIVER)
54 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
55 * @{
56 */
57 typedef struct
58 {
59
60 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
61 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
62
63 uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63
64 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
65
66 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
67 This parameter can be set either to ENABLE or DISABLE */
68
69 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
70 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
71
72 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
73 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
74 } LL_EXTI_InitTypeDef;
75
76 /**
77 * @}
78 */
79 #endif /*USE_FULL_LL_DRIVER*/
80
81 /* Exported constants --------------------------------------------------------*/
82 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
83 * @{
84 */
85
86 /** @defgroup EXTI_LL_EC_LINE LINE
87 * @{
88 */
89 #define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */
90 #define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */
91 #define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */
92 #define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */
93 #define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */
94 #define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */
95 #define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */
96 #define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */
97 #define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */
98 #define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */
99 #define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */
100 #define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */
101 #define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */
102 #define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */
103 #define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */
104 #define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */
105 #define LL_EXTI_LINE_16 EXTI_IMR1_IM16 /*!< Extended line 16 */
106 #define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /*!< Extended line 17 */
107 #define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /*!< Extended line 18 */
108 #define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */
109 #if defined (STM32WB55xx) || defined (STM32WB5Mxx) || defined (STM32WB35xx) || defined (STM32WB15xx) || defined(STM32WB1Mxx)
110 #define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /*!< Extended line 20 */
111 #endif /* STM32WB55xx || STM32WB5Mxx || ... */
112 #if defined (STM32WB55xx) || defined (STM32WB5Mxx) || defined (STM32WB35xx)
113 #define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /*!< Extended line 21 */
114 #endif /* STM32WB55xx || STM32WB5Mxx || STM32WB35xx */
115 #define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /*!< Extended line 22 */
116 #if defined (STM32WB55xx) || defined (STM32WB5Mxx) || defined (STM32WB35xx)
117 #define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */
118 #endif /* STM32WB55xx || STM32WB5Mxx || STM32WB35xx */
119 #define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /*!< Extended line 24 */
120 #if defined (STM32WB55xx) || defined (STM32WB5Mxx) || defined (STM32WB35xx) || defined (STM32WB15xx) || defined(STM32WB1Mxx)
121 #define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */
122 #endif /* STM32WB55xx || STM32WB5Mxx || ... */
123 #if defined (STM32WB55xx) || defined (STM32WB5Mxx) || defined (STM32WB35xx)
124 #define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /*!< Extended line 28 */
125 #endif /* STM32WB55xx || STM32WB5Mxx || STM32WB35xx */
126 #define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /*!< Extended line 29 */
127 #define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /*!< Extended line 30 */
128 #if defined (STM32WB55xx) || defined (STM32WB5Mxx) || defined (STM32WB35xx) || defined (STM32WB15xx) || defined(STM32WB1Mxx)
129 #define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */
130 #endif /* STM32WB55xx || STM32WB5Mxx || ... */
131
132 #if defined (STM32WB55xx) || defined (STM32WB5Mxx) || defined (STM32WB35xx)
133 #define LL_EXTI_LINE_ALL_0_31 (LL_EXTI_LINE_0 | LL_EXTI_LINE_1 | LL_EXTI_LINE_2 | \
134 LL_EXTI_LINE_3 | LL_EXTI_LINE_4 | LL_EXTI_LINE_5 | \
135 LL_EXTI_LINE_6 | LL_EXTI_LINE_7 | LL_EXTI_LINE_8 | \
136 LL_EXTI_LINE_9 | LL_EXTI_LINE_10 | LL_EXTI_LINE_11 | \
137 LL_EXTI_LINE_12 | LL_EXTI_LINE_13 | LL_EXTI_LINE_14 | \
138 LL_EXTI_LINE_15 | LL_EXTI_LINE_16 | LL_EXTI_LINE_17 | \
139 LL_EXTI_LINE_18 | LL_EXTI_LINE_19 | LL_EXTI_LINE_20 | \
140 LL_EXTI_LINE_21 | LL_EXTI_LINE_22 | LL_EXTI_LINE_23 | \
141 LL_EXTI_LINE_24 | LL_EXTI_LINE_25 | LL_EXTI_LINE_28 | \
142 LL_EXTI_LINE_29 | LL_EXTI_LINE_30 | LL_EXTI_LINE_31) /*!< All Extended line not reserved*/
143 #elif defined (STM32WB15xx) || defined(STM32WB1Mxx)
144 #define LL_EXTI_LINE_ALL_0_31 (LL_EXTI_LINE_0 | LL_EXTI_LINE_1 | LL_EXTI_LINE_2 | \
145 LL_EXTI_LINE_3 | LL_EXTI_LINE_4 | LL_EXTI_LINE_5 | \
146 LL_EXTI_LINE_6 | LL_EXTI_LINE_7 | LL_EXTI_LINE_8 | \
147 LL_EXTI_LINE_9 | LL_EXTI_LINE_10 | LL_EXTI_LINE_11 | \
148 LL_EXTI_LINE_12 | LL_EXTI_LINE_13 | LL_EXTI_LINE_14 | \
149 LL_EXTI_LINE_15 | LL_EXTI_LINE_16 | LL_EXTI_LINE_17 | \
150 LL_EXTI_LINE_18 | LL_EXTI_LINE_19 | LL_EXTI_LINE_20 | \
151 LL_EXTI_LINE_22 | LL_EXTI_LINE_24 | LL_EXTI_LINE_25 | \
152 LL_EXTI_LINE_29 | LL_EXTI_LINE_30 | LL_EXTI_LINE_31) /*!< All Extended line not reserved*/
153 #else
154 #define LL_EXTI_LINE_ALL_0_31 (LL_EXTI_LINE_0 | LL_EXTI_LINE_1 | LL_EXTI_LINE_2 | \
155 LL_EXTI_LINE_3 | LL_EXTI_LINE_4 | LL_EXTI_LINE_5 | \
156 LL_EXTI_LINE_6 | LL_EXTI_LINE_7 | LL_EXTI_LINE_8 | \
157 LL_EXTI_LINE_9 | LL_EXTI_LINE_10 | LL_EXTI_LINE_11 | \
158 LL_EXTI_LINE_12 | LL_EXTI_LINE_13 | LL_EXTI_LINE_14 | \
159 LL_EXTI_LINE_15 | LL_EXTI_LINE_16 | LL_EXTI_LINE_17 | \
160 LL_EXTI_LINE_18 | LL_EXTI_LINE_19 | LL_EXTI_LINE_22 | \
161 LL_EXTI_LINE_24 | LL_EXTI_LINE_29 | LL_EXTI_LINE_30) /*!< All Extended line not reserved*/
162 #endif /* STM32WB55xx || STM32WB5Mxx || STM32WB35xx */
163
164 #define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /*!< Extended line 33 */
165 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */
166 #define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /*!< Extended line 37 */
167 #define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /*!< Extended line 38 */
168 #define LL_EXTI_LINE_39 EXTI_IMR2_IM39 /*!< Extended line 39 */
169 #define LL_EXTI_LINE_40 EXTI_IMR2_IM40 /*!< Extended line 40 */
170 #define LL_EXTI_LINE_41 EXTI_IMR2_IM41 /*!< Extended line 41 */
171 #define LL_EXTI_LINE_42 EXTI_IMR2_IM42 /*!< Extended line 42 */
172 #if defined (STM32WB55xx) || defined (STM32WB5Mxx)
173 #define LL_EXTI_LINE_43 EXTI_IMR2_IM43 /*!< Extended line 43 */
174 #endif /* STM32WB55xx || STM32WB5Mxx */
175 #define LL_EXTI_LINE_44 EXTI_IMR2_IM44 /*!< Extended line 44 */
176 #define LL_EXTI_LINE_45 EXTI_IMR2_IM45 /*!< Extended line 45 */
177 #if defined (STM32WB55xx) || defined (STM32WB5Mxx) || defined (STM32WB50xx) || defined (STM32WB35xx) || defined (STM32WB30xx)
178 #define LL_EXTI_LINE_46 EXTI_IMR2_IM46 /*!< Extended line 46 */
179 #endif /* STM32WB55xx || STM32WB5Mxx || ... */
180 #define LL_EXTI_LINE_48 EXTI_IMR2_IM48 /*!< Extended line 48 */
181
182 #if defined (STM32WB55xx) || defined (STM32WB5Mxx)
183 #define LL_EXTI_LINE_ALL_32_63 (LL_EXTI_LINE_33 | LL_EXTI_LINE_36 | LL_EXTI_LINE_37 | \
184 LL_EXTI_LINE_38 | LL_EXTI_LINE_39 | LL_EXTI_LINE_40 | \
185 LL_EXTI_LINE_41 | LL_EXTI_LINE_42 | LL_EXTI_LINE_43 | \
186 LL_EXTI_LINE_44 | LL_EXTI_LINE_45 | LL_EXTI_LINE_46 | \
187 LL_EXTI_LINE_48) /*!< All Extended line not reserved*/
188 #elif defined (STM32WB50xx) || defined (STM32WB35xx) || defined (STM32WB30xx)
189 #define LL_EXTI_LINE_ALL_32_63 (LL_EXTI_LINE_33 | LL_EXTI_LINE_36 | LL_EXTI_LINE_37 | \
190 LL_EXTI_LINE_38 | LL_EXTI_LINE_39 | LL_EXTI_LINE_40 | \
191 LL_EXTI_LINE_41 | LL_EXTI_LINE_42 | LL_EXTI_LINE_44 | \
192 LL_EXTI_LINE_45 | LL_EXTI_LINE_46 | LL_EXTI_LINE_48) /*!< All Extended line not reserved*/
193 #else
194 #define LL_EXTI_LINE_ALL_32_63 (LL_EXTI_LINE_33 | LL_EXTI_LINE_36 | LL_EXTI_LINE_37 | \
195 LL_EXTI_LINE_38 | LL_EXTI_LINE_39 | LL_EXTI_LINE_40 | \
196 LL_EXTI_LINE_41 | LL_EXTI_LINE_42 | LL_EXTI_LINE_44 | \
197 LL_EXTI_LINE_45 | LL_EXTI_LINE_48) /*!< All Extended line not reserved*/
198 #endif /* STM32WB55xx || STM32WB5Mxx */
199
200
201 #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */
202
203 #if defined(USE_FULL_LL_DRIVER)
204 #define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */
205 #endif /*USE_FULL_LL_DRIVER*/
206
207 /**
208 * @}
209 */
210 #if defined(USE_FULL_LL_DRIVER)
211
212 /** @defgroup EXTI_LL_EC_MODE Mode
213 * @{
214 */
215 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
216 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
217 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
218 /**
219 * @}
220 */
221
222 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
223 * @{
224 */
225 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
226 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
227 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
228 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
229
230 /**
231 * @}
232 */
233
234
235 #endif /*USE_FULL_LL_DRIVER*/
236
237
238 /**
239 * @}
240 */
241
242 /* Exported macro ------------------------------------------------------------*/
243 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
244 * @{
245 */
246
247 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
248 * @{
249 */
250
251 /**
252 * @brief Write a value in EXTI register
253 * @param __REG__ Register to be written
254 * @param __VALUE__ Value to be written in the register
255 * @retval None
256 */
257 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
258
259 /**
260 * @brief Read a value in EXTI register
261 * @param __REG__ Register to be read
262 * @retval Register value
263 */
264 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
265 /**
266 * @}
267 */
268
269
270 /**
271 * @}
272 */
273
274
275
276 /* Exported functions --------------------------------------------------------*/
277 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
278 * @{
279 */
280 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
281 * @{
282 */
283
284 /**
285 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
286 * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31
287 * @param ExtiLine This parameter can be a combination of the following values:
288 * @arg @ref LL_EXTI_LINE_0
289 * @arg @ref LL_EXTI_LINE_1
290 * @arg @ref LL_EXTI_LINE_2
291 * @arg @ref LL_EXTI_LINE_3
292 * @arg @ref LL_EXTI_LINE_4
293 * @arg @ref LL_EXTI_LINE_5
294 * @arg @ref LL_EXTI_LINE_6
295 * @arg @ref LL_EXTI_LINE_7
296 * @arg @ref LL_EXTI_LINE_8
297 * @arg @ref LL_EXTI_LINE_9
298 * @arg @ref LL_EXTI_LINE_10
299 * @arg @ref LL_EXTI_LINE_11
300 * @arg @ref LL_EXTI_LINE_12
301 * @arg @ref LL_EXTI_LINE_13
302 * @arg @ref LL_EXTI_LINE_14
303 * @arg @ref LL_EXTI_LINE_15
304 * @arg @ref LL_EXTI_LINE_16
305 * @arg @ref LL_EXTI_LINE_17
306 * @arg @ref LL_EXTI_LINE_18
307 * @arg @ref LL_EXTI_LINE_19
308 * @arg @ref LL_EXTI_LINE_20 (*)
309 * @arg @ref LL_EXTI_LINE_21 (*)
310 * @arg @ref LL_EXTI_LINE_22
311 * @arg @ref LL_EXTI_LINE_23 (*)
312 * @arg @ref LL_EXTI_LINE_24
313 * @arg @ref LL_EXTI_LINE_25 (*)
314 * @arg @ref LL_EXTI_LINE_28 (*)
315 * @arg @ref LL_EXTI_LINE_29
316 * @arg @ref LL_EXTI_LINE_30
317 * @arg @ref LL_EXTI_LINE_31 (*)
318 * @arg @ref LL_EXTI_LINE_ALL_0_31
319 * (*) value not defined in all devices
320 * @retval None
321 */
LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)322 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
323 {
324 SET_BIT(EXTI->IMR1, ExtiLine);
325 }
326
327 /**
328 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31 for cpu2
329 * @rmtoll C2IMR1 IMx LL_C2_EXTI_EnableIT_0_31
330 * @param ExtiLine This parameter can be a combination of the following values:
331 * @arg @ref LL_EXTI_LINE_0
332 * @arg @ref LL_EXTI_LINE_1
333 * @arg @ref LL_EXTI_LINE_2
334 * @arg @ref LL_EXTI_LINE_3
335 * @arg @ref LL_EXTI_LINE_4
336 * @arg @ref LL_EXTI_LINE_5
337 * @arg @ref LL_EXTI_LINE_6
338 * @arg @ref LL_EXTI_LINE_7
339 * @arg @ref LL_EXTI_LINE_8
340 * @arg @ref LL_EXTI_LINE_9
341 * @arg @ref LL_EXTI_LINE_10
342 * @arg @ref LL_EXTI_LINE_11
343 * @arg @ref LL_EXTI_LINE_12
344 * @arg @ref LL_EXTI_LINE_13
345 * @arg @ref LL_EXTI_LINE_14
346 * @arg @ref LL_EXTI_LINE_15
347 * @arg @ref LL_EXTI_LINE_16
348 * @arg @ref LL_EXTI_LINE_17
349 * @arg @ref LL_EXTI_LINE_18
350 * @arg @ref LL_EXTI_LINE_19
351 * @arg @ref LL_EXTI_LINE_20 (*)
352 * @arg @ref LL_EXTI_LINE_21 (*)
353 * @arg @ref LL_EXTI_LINE_22
354 * @arg @ref LL_EXTI_LINE_23 (*)
355 * @arg @ref LL_EXTI_LINE_24
356 * @arg @ref LL_EXTI_LINE_25 (*)
357 * @arg @ref LL_EXTI_LINE_28 (*)
358 * @arg @ref LL_EXTI_LINE_29
359 * @arg @ref LL_EXTI_LINE_30
360 * @arg @ref LL_EXTI_LINE_31 (*)
361 * @arg @ref LL_EXTI_LINE_ALL_0_31
362 * (*) value not defined in all devices
363 * @retval None
364 */
LL_C2_EXTI_EnableIT_0_31(uint32_t ExtiLine)365 __STATIC_INLINE void LL_C2_EXTI_EnableIT_0_31(uint32_t ExtiLine)
366 {
367 SET_BIT(EXTI->C2IMR1, ExtiLine);
368 }
369
370 /**
371 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63
372 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63
373 * @param ExtiLine This parameter can be a combination of the following values:
374 * @arg @ref LL_EXTI_LINE_33
375 * @arg @ref LL_EXTI_LINE_36
376 * @arg @ref LL_EXTI_LINE_37
377 * @arg @ref LL_EXTI_LINE_38
378 * @arg @ref LL_EXTI_LINE_39
379 * @arg @ref LL_EXTI_LINE_40
380 * @arg @ref LL_EXTI_LINE_41
381 * @arg @ref LL_EXTI_LINE_42
382 * @arg @ref LL_EXTI_LINE_43 (*)
383 * @arg @ref LL_EXTI_LINE_44
384 * @arg @ref LL_EXTI_LINE_45
385 * @arg @ref LL_EXTI_LINE_46 (*)
386 * @arg @ref LL_EXTI_LINE_48
387 * @arg @ref LL_EXTI_LINE_ALL_32_63
388 * (*) value not defined in all devices
389 * @retval None
390 */
LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)391 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)
392 {
393 SET_BIT(EXTI->IMR2, ExtiLine);
394 }
395
396 /**
397 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63 for cpu2
398 * @rmtoll C2IMR2 IMx LL_C2_EXTI_EnableIT_32_63
399 * @param ExtiLine This parameter can be a combination of the following values:
400 * @arg @ref LL_EXTI_LINE_33
401 * @arg @ref LL_EXTI_LINE_36
402 * @arg @ref LL_EXTI_LINE_37
403 * @arg @ref LL_EXTI_LINE_38
404 * @arg @ref LL_EXTI_LINE_39
405 * @arg @ref LL_EXTI_LINE_40
406 * @arg @ref LL_EXTI_LINE_41
407 * @arg @ref LL_EXTI_LINE_42
408 * @arg @ref LL_EXTI_LINE_43 (*)
409 * @arg @ref LL_EXTI_LINE_44
410 * @arg @ref LL_EXTI_LINE_45
411 * @arg @ref LL_EXTI_LINE_46 (*)
412 * @arg @ref LL_EXTI_LINE_48
413 * @arg @ref LL_EXTI_LINE_ALL_32_63
414 * (*) value not defined in all devices
415 * @retval None
416 */
LL_C2_EXTI_EnableIT_32_63(uint32_t ExtiLine)417 __STATIC_INLINE void LL_C2_EXTI_EnableIT_32_63(uint32_t ExtiLine)
418 {
419 SET_BIT(EXTI->C2IMR2, ExtiLine);
420 }
421
422 /**
423 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
424 * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31
425 * @param ExtiLine This parameter can be a combination of the following values:
426 * @arg @ref LL_EXTI_LINE_0
427 * @arg @ref LL_EXTI_LINE_1
428 * @arg @ref LL_EXTI_LINE_2
429 * @arg @ref LL_EXTI_LINE_3
430 * @arg @ref LL_EXTI_LINE_4
431 * @arg @ref LL_EXTI_LINE_5
432 * @arg @ref LL_EXTI_LINE_6
433 * @arg @ref LL_EXTI_LINE_7
434 * @arg @ref LL_EXTI_LINE_8
435 * @arg @ref LL_EXTI_LINE_9
436 * @arg @ref LL_EXTI_LINE_10
437 * @arg @ref LL_EXTI_LINE_11
438 * @arg @ref LL_EXTI_LINE_12
439 * @arg @ref LL_EXTI_LINE_13
440 * @arg @ref LL_EXTI_LINE_14
441 * @arg @ref LL_EXTI_LINE_15
442 * @arg @ref LL_EXTI_LINE_16
443 * @arg @ref LL_EXTI_LINE_17
444 * @arg @ref LL_EXTI_LINE_18
445 * @arg @ref LL_EXTI_LINE_19
446 * @arg @ref LL_EXTI_LINE_20 (*)
447 * @arg @ref LL_EXTI_LINE_21 (*)
448 * @arg @ref LL_EXTI_LINE_22
449 * @arg @ref LL_EXTI_LINE_23 (*)
450 * @arg @ref LL_EXTI_LINE_24
451 * @arg @ref LL_EXTI_LINE_25 (*)
452 * @arg @ref LL_EXTI_LINE_28 (*)
453 * @arg @ref LL_EXTI_LINE_29
454 * @arg @ref LL_EXTI_LINE_30
455 * @arg @ref LL_EXTI_LINE_31 (*)
456 * @arg @ref LL_EXTI_LINE_ALL_0_31
457 * (*) value not defined in all devices
458 * @retval None
459 */
LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)460 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
461 {
462 CLEAR_BIT(EXTI->IMR1, ExtiLine);
463 }
464
465 /**
466 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31 for cpu2
467 * @rmtoll C2IMR1 IMx LL_C2_EXTI_DisableIT_0_31
468 * @param ExtiLine This parameter can be a combination of the following values:
469 * @arg @ref LL_EXTI_LINE_0
470 * @arg @ref LL_EXTI_LINE_1
471 * @arg @ref LL_EXTI_LINE_2
472 * @arg @ref LL_EXTI_LINE_3
473 * @arg @ref LL_EXTI_LINE_4
474 * @arg @ref LL_EXTI_LINE_5
475 * @arg @ref LL_EXTI_LINE_6
476 * @arg @ref LL_EXTI_LINE_7
477 * @arg @ref LL_EXTI_LINE_8
478 * @arg @ref LL_EXTI_LINE_9
479 * @arg @ref LL_EXTI_LINE_10
480 * @arg @ref LL_EXTI_LINE_11
481 * @arg @ref LL_EXTI_LINE_12
482 * @arg @ref LL_EXTI_LINE_13
483 * @arg @ref LL_EXTI_LINE_14
484 * @arg @ref LL_EXTI_LINE_15
485 * @arg @ref LL_EXTI_LINE_16
486 * @arg @ref LL_EXTI_LINE_17
487 * @arg @ref LL_EXTI_LINE_18
488 * @arg @ref LL_EXTI_LINE_19
489 * @arg @ref LL_EXTI_LINE_20 (*)
490 * @arg @ref LL_EXTI_LINE_21 (*)
491 * @arg @ref LL_EXTI_LINE_22
492 * @arg @ref LL_EXTI_LINE_23 (*)
493 * @arg @ref LL_EXTI_LINE_24
494 * @arg @ref LL_EXTI_LINE_25 (*)
495 * @arg @ref LL_EXTI_LINE_28 (*)
496 * @arg @ref LL_EXTI_LINE_29
497 * @arg @ref LL_EXTI_LINE_30
498 * @arg @ref LL_EXTI_LINE_31 (*)
499 * @arg @ref LL_EXTI_LINE_ALL_0_31
500 * (*) value not defined in all devices
501 * @retval None
502 */
LL_C2_EXTI_DisableIT_0_31(uint32_t ExtiLine)503 __STATIC_INLINE void LL_C2_EXTI_DisableIT_0_31(uint32_t ExtiLine)
504 {
505 CLEAR_BIT(EXTI->C2IMR1, ExtiLine);
506 }
507
508 /**
509 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63
510 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63
511 * @param ExtiLine This parameter can be a combination of the following values:
512 * @arg @ref LL_EXTI_LINE_33
513 * @arg @ref LL_EXTI_LINE_36
514 * @arg @ref LL_EXTI_LINE_37
515 * @arg @ref LL_EXTI_LINE_38
516 * @arg @ref LL_EXTI_LINE_39
517 * @arg @ref LL_EXTI_LINE_40
518 * @arg @ref LL_EXTI_LINE_41
519 * @arg @ref LL_EXTI_LINE_42
520 * @arg @ref LL_EXTI_LINE_43 (*)
521 * @arg @ref LL_EXTI_LINE_44
522 * @arg @ref LL_EXTI_LINE_45
523 * @arg @ref LL_EXTI_LINE_46 (*)
524 * @arg @ref LL_EXTI_LINE_48
525 * @arg @ref LL_EXTI_LINE_ALL_32_63
526 * (*) value not defined in all devices
527 * @retval None
528 */
LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)529 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)
530 {
531 CLEAR_BIT(EXTI->IMR2, ExtiLine);
532 }
533
534 /**
535 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63 for cpu2
536 * @rmtoll C2IMR2 IMx LL_C2_EXTI_DisableIT_32_63
537 * @param ExtiLine This parameter can be a combination of the following values:
538 * @arg @ref LL_EXTI_LINE_33
539 * @arg @ref LL_EXTI_LINE_36
540 * @arg @ref LL_EXTI_LINE_37
541 * @arg @ref LL_EXTI_LINE_38
542 * @arg @ref LL_EXTI_LINE_39
543 * @arg @ref LL_EXTI_LINE_40
544 * @arg @ref LL_EXTI_LINE_41
545 * @arg @ref LL_EXTI_LINE_42
546 * @arg @ref LL_EXTI_LINE_43 (*)
547 * @arg @ref LL_EXTI_LINE_44
548 * @arg @ref LL_EXTI_LINE_45
549 * @arg @ref LL_EXTI_LINE_46 (*)
550 * @arg @ref LL_EXTI_LINE_48
551 * @arg @ref LL_EXTI_LINE_ALL_32_63
552 * (*) value not defined in all devices
553 * @retval None
554 */
LL_C2_EXTI_DisableIT_32_63(uint32_t ExtiLine)555 __STATIC_INLINE void LL_C2_EXTI_DisableIT_32_63(uint32_t ExtiLine)
556 {
557 CLEAR_BIT(EXTI->C2IMR2, ExtiLine);
558 }
559
560 /**
561 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
562 * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31
563 * @param ExtiLine This parameter can be a combination of the following values:
564 * @arg @ref LL_EXTI_LINE_0
565 * @arg @ref LL_EXTI_LINE_1
566 * @arg @ref LL_EXTI_LINE_2
567 * @arg @ref LL_EXTI_LINE_3
568 * @arg @ref LL_EXTI_LINE_4
569 * @arg @ref LL_EXTI_LINE_5
570 * @arg @ref LL_EXTI_LINE_6
571 * @arg @ref LL_EXTI_LINE_7
572 * @arg @ref LL_EXTI_LINE_8
573 * @arg @ref LL_EXTI_LINE_9
574 * @arg @ref LL_EXTI_LINE_10
575 * @arg @ref LL_EXTI_LINE_11
576 * @arg @ref LL_EXTI_LINE_12
577 * @arg @ref LL_EXTI_LINE_13
578 * @arg @ref LL_EXTI_LINE_14
579 * @arg @ref LL_EXTI_LINE_15
580 * @arg @ref LL_EXTI_LINE_16
581 * @arg @ref LL_EXTI_LINE_17
582 * @arg @ref LL_EXTI_LINE_18
583 * @arg @ref LL_EXTI_LINE_19
584 * @arg @ref LL_EXTI_LINE_20 (*)
585 * @arg @ref LL_EXTI_LINE_21 (*)
586 * @arg @ref LL_EXTI_LINE_22
587 * @arg @ref LL_EXTI_LINE_23 (*)
588 * @arg @ref LL_EXTI_LINE_24
589 * @arg @ref LL_EXTI_LINE_25 (*)
590 * @arg @ref LL_EXTI_LINE_28 (*)
591 * @arg @ref LL_EXTI_LINE_29
592 * @arg @ref LL_EXTI_LINE_30
593 * @arg @ref LL_EXTI_LINE_31 (*)
594 * @arg @ref LL_EXTI_LINE_ALL_0_31
595 * (*) value not defined in all devices
596 * @retval State of bit (1 or 0).
597 */
LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)598 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
599 {
600 return ((READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
601 }
602
603 /**
604 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31 for cpu2
605 * @rmtoll C2IMR1 IMx LL_C2_EXTI_IsEnabledIT_0_31
606 * @param ExtiLine This parameter can be a combination of the following values:
607 * @arg @ref LL_EXTI_LINE_0
608 * @arg @ref LL_EXTI_LINE_1
609 * @arg @ref LL_EXTI_LINE_2
610 * @arg @ref LL_EXTI_LINE_3
611 * @arg @ref LL_EXTI_LINE_4
612 * @arg @ref LL_EXTI_LINE_5
613 * @arg @ref LL_EXTI_LINE_6
614 * @arg @ref LL_EXTI_LINE_7
615 * @arg @ref LL_EXTI_LINE_8
616 * @arg @ref LL_EXTI_LINE_9
617 * @arg @ref LL_EXTI_LINE_10
618 * @arg @ref LL_EXTI_LINE_11
619 * @arg @ref LL_EXTI_LINE_12
620 * @arg @ref LL_EXTI_LINE_13
621 * @arg @ref LL_EXTI_LINE_14
622 * @arg @ref LL_EXTI_LINE_15
623 * @arg @ref LL_EXTI_LINE_16
624 * @arg @ref LL_EXTI_LINE_17
625 * @arg @ref LL_EXTI_LINE_18
626 * @arg @ref LL_EXTI_LINE_19
627 * @arg @ref LL_EXTI_LINE_20 (*)
628 * @arg @ref LL_EXTI_LINE_21 (*)
629 * @arg @ref LL_EXTI_LINE_22
630 * @arg @ref LL_EXTI_LINE_23 (*)
631 * @arg @ref LL_EXTI_LINE_24
632 * @arg @ref LL_EXTI_LINE_25 (*)
633 * @arg @ref LL_EXTI_LINE_28 (*)
634 * @arg @ref LL_EXTI_LINE_29
635 * @arg @ref LL_EXTI_LINE_30
636 * @arg @ref LL_EXTI_LINE_31 (*)
637 * @arg @ref LL_EXTI_LINE_ALL_0_31
638 * (*) value not defined in all devices
639 * @retval State of bit (1 or 0).
640 */
LL_C2_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)641 __STATIC_INLINE uint32_t LL_C2_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
642 {
643 return ((READ_BIT(EXTI->C2IMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
644 }
645
646 /**
647 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63
648 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63
649 * @param ExtiLine This parameter can be a combination of the following values:
650 * @arg @ref LL_EXTI_LINE_33
651 * @arg @ref LL_EXTI_LINE_36
652 * @arg @ref LL_EXTI_LINE_37
653 * @arg @ref LL_EXTI_LINE_38
654 * @arg @ref LL_EXTI_LINE_39
655 * @arg @ref LL_EXTI_LINE_40
656 * @arg @ref LL_EXTI_LINE_41
657 * @arg @ref LL_EXTI_LINE_42
658 * @arg @ref LL_EXTI_LINE_43 (*)
659 * @arg @ref LL_EXTI_LINE_44
660 * @arg @ref LL_EXTI_LINE_45
661 * @arg @ref LL_EXTI_LINE_46 (*)
662 * @arg @ref LL_EXTI_LINE_48
663 * @arg @ref LL_EXTI_LINE_ALL_32_63
664 * (*) value not defined in all devices
665 * @retval State of bit (1 or 0).
666 */
LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)667 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
668 {
669 return ((READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
670 }
671
672 /**
673 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63 for cpu2
674 * @rmtoll C2IMR2 IMx LL_C2_EXTI_IsEnabledIT_32_63
675 * @param ExtiLine This parameter can be a combination of the following values:
676 * @arg @ref LL_EXTI_LINE_33
677 * @arg @ref LL_EXTI_LINE_36
678 * @arg @ref LL_EXTI_LINE_37
679 * @arg @ref LL_EXTI_LINE_38
680 * @arg @ref LL_EXTI_LINE_39
681 * @arg @ref LL_EXTI_LINE_40
682 * @arg @ref LL_EXTI_LINE_41
683 * @arg @ref LL_EXTI_LINE_42
684 * @arg @ref LL_EXTI_LINE_43 (*)
685 * @arg @ref LL_EXTI_LINE_44
686 * @arg @ref LL_EXTI_LINE_45
687 * @arg @ref LL_EXTI_LINE_46 (*)
688 * @arg @ref LL_EXTI_LINE_48
689 * @arg @ref LL_EXTI_LINE_ALL_32_63
690 * (*) value not defined in all devices
691 * @retval State of bit (1 or 0).
692 */
LL_C2_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)693 __STATIC_INLINE uint32_t LL_C2_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
694 {
695 return ((READ_BIT(EXTI->C2IMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
696 }
697
698 /**
699 * @}
700 */
701
702 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
703 * @{
704 */
705
706 /**
707 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
708 * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31
709 * @param ExtiLine This parameter can be a combination of the following values:
710 * @arg @ref LL_EXTI_LINE_0
711 * @arg @ref LL_EXTI_LINE_1
712 * @arg @ref LL_EXTI_LINE_2
713 * @arg @ref LL_EXTI_LINE_3
714 * @arg @ref LL_EXTI_LINE_4
715 * @arg @ref LL_EXTI_LINE_5
716 * @arg @ref LL_EXTI_LINE_6
717 * @arg @ref LL_EXTI_LINE_7
718 * @arg @ref LL_EXTI_LINE_8
719 * @arg @ref LL_EXTI_LINE_9
720 * @arg @ref LL_EXTI_LINE_10
721 * @arg @ref LL_EXTI_LINE_11
722 * @arg @ref LL_EXTI_LINE_12
723 * @arg @ref LL_EXTI_LINE_13
724 * @arg @ref LL_EXTI_LINE_14
725 * @arg @ref LL_EXTI_LINE_15
726 * @arg @ref LL_EXTI_LINE_17
727 * @arg @ref LL_EXTI_LINE_18
728 * @arg @ref LL_EXTI_LINE_19
729 * @arg @ref LL_EXTI_LINE_20 (*)
730 * @arg @ref LL_EXTI_LINE_21 (*)
731 * (*) value not defined in all devices
732 * @retval None
733 */
LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)734 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
735 {
736 SET_BIT(EXTI->EMR1, ExtiLine);
737 }
738
739 /**
740 * @brief Enable ExtiLine Event request for Lines in range 0 to 31 for cpu2
741 * @rmtoll C2EMR1 EMx LL_C2_EXTI_EnableEvent_0_31
742 * @param ExtiLine This parameter can be a combination of the following values:
743 * @arg @ref LL_EXTI_LINE_0
744 * @arg @ref LL_EXTI_LINE_1
745 * @arg @ref LL_EXTI_LINE_2
746 * @arg @ref LL_EXTI_LINE_3
747 * @arg @ref LL_EXTI_LINE_4
748 * @arg @ref LL_EXTI_LINE_5
749 * @arg @ref LL_EXTI_LINE_6
750 * @arg @ref LL_EXTI_LINE_7
751 * @arg @ref LL_EXTI_LINE_8
752 * @arg @ref LL_EXTI_LINE_9
753 * @arg @ref LL_EXTI_LINE_10
754 * @arg @ref LL_EXTI_LINE_11
755 * @arg @ref LL_EXTI_LINE_12
756 * @arg @ref LL_EXTI_LINE_13
757 * @arg @ref LL_EXTI_LINE_14
758 * @arg @ref LL_EXTI_LINE_15
759 * @arg @ref LL_EXTI_LINE_17
760 * @arg @ref LL_EXTI_LINE_18
761 * @arg @ref LL_EXTI_LINE_19
762 * @arg @ref LL_EXTI_LINE_20 (*)
763 * @arg @ref LL_EXTI_LINE_21 (*)
764 * (*) value not defined in all devices
765 * @retval None
766 */
LL_C2_EXTI_EnableEvent_0_31(uint32_t ExtiLine)767 __STATIC_INLINE void LL_C2_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
768 {
769 SET_BIT(EXTI->C2EMR1, ExtiLine);
770 }
771
772 /**
773 * @brief Enable ExtiLine Event request for Lines in range 32 to 63
774 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63
775 * @param ExtiLine This parameter can be a combination of the following values:
776 * @arg @ref LL_EXTI_LINE_40
777 * @arg @ref LL_EXTI_LINE_41
778 * @retval None
779 */
LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)780 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
781 {
782 SET_BIT(EXTI->EMR2, ExtiLine);
783 }
784
785 /**
786 * @brief Enable ExtiLine Event request for Lines in range 32 to 63 for cpu2
787 * @rmtoll C2EMR2 EMx LL_C2_EXTI_EnableEvent_32_63
788 * @param ExtiLine This parameter can be a combination of the following values:
789 * @arg @ref LL_EXTI_LINE_40
790 * @arg @ref LL_EXTI_LINE_41
791 * @retval None
792 */
LL_C2_EXTI_EnableEvent_32_63(uint32_t ExtiLine)793 __STATIC_INLINE void LL_C2_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
794 {
795 SET_BIT(EXTI->C2EMR2, ExtiLine);
796 }
797
798 /**
799 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
800 * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31
801 * @param ExtiLine This parameter can be a combination of the following values:
802 * @arg @ref LL_EXTI_LINE_0
803 * @arg @ref LL_EXTI_LINE_1
804 * @arg @ref LL_EXTI_LINE_2
805 * @arg @ref LL_EXTI_LINE_3
806 * @arg @ref LL_EXTI_LINE_4
807 * @arg @ref LL_EXTI_LINE_5
808 * @arg @ref LL_EXTI_LINE_6
809 * @arg @ref LL_EXTI_LINE_7
810 * @arg @ref LL_EXTI_LINE_8
811 * @arg @ref LL_EXTI_LINE_9
812 * @arg @ref LL_EXTI_LINE_10
813 * @arg @ref LL_EXTI_LINE_11
814 * @arg @ref LL_EXTI_LINE_12
815 * @arg @ref LL_EXTI_LINE_13
816 * @arg @ref LL_EXTI_LINE_14
817 * @arg @ref LL_EXTI_LINE_15
818 * @arg @ref LL_EXTI_LINE_17
819 * @arg @ref LL_EXTI_LINE_18
820 * @arg @ref LL_EXTI_LINE_19
821 * @arg @ref LL_EXTI_LINE_20 (*)
822 * @arg @ref LL_EXTI_LINE_21 (*)
823 * @retval None
824 */
LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)825 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
826 {
827 CLEAR_BIT(EXTI->EMR1, ExtiLine);
828 }
829
830 /**
831 * @brief Disable ExtiLine Event request for Lines in range 0 to 31 for cpu2
832 * @rmtoll C2EMR1 EMx LL_C2_EXTI_DisableEvent_0_31
833 * @param ExtiLine This parameter can be a combination of the following values:
834 * @arg @ref LL_EXTI_LINE_0
835 * @arg @ref LL_EXTI_LINE_1
836 * @arg @ref LL_EXTI_LINE_2
837 * @arg @ref LL_EXTI_LINE_3
838 * @arg @ref LL_EXTI_LINE_4
839 * @arg @ref LL_EXTI_LINE_5
840 * @arg @ref LL_EXTI_LINE_6
841 * @arg @ref LL_EXTI_LINE_7
842 * @arg @ref LL_EXTI_LINE_8
843 * @arg @ref LL_EXTI_LINE_9
844 * @arg @ref LL_EXTI_LINE_10
845 * @arg @ref LL_EXTI_LINE_11
846 * @arg @ref LL_EXTI_LINE_12
847 * @arg @ref LL_EXTI_LINE_13
848 * @arg @ref LL_EXTI_LINE_14
849 * @arg @ref LL_EXTI_LINE_15
850 * @arg @ref LL_EXTI_LINE_17
851 * @arg @ref LL_EXTI_LINE_18
852 * @arg @ref LL_EXTI_LINE_19
853 * @arg @ref LL_EXTI_LINE_20 (*)
854 * @arg @ref LL_EXTI_LINE_21 (*)
855 * (*) value not defined in all devices
856 * @retval None
857 */
LL_C2_EXTI_DisableEvent_0_31(uint32_t ExtiLine)858 __STATIC_INLINE void LL_C2_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
859 {
860 CLEAR_BIT(EXTI->C2EMR1, ExtiLine);
861 }
862
863 /**
864 * @brief Disable ExtiLine Event request for Lines in range 32 to 63
865 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63
866 * @param ExtiLine This parameter can be a combination of the following values:
867 * @arg @ref LL_EXTI_LINE_40
868 * @arg @ref LL_EXTI_LINE_41
869 * (*) value not defined in all devices
870 * @retval None
871 */
LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)872 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
873 {
874 CLEAR_BIT(EXTI->EMR2, ExtiLine);
875 }
876
877 /**
878 * @brief Disable ExtiLine Event request for Lines in range 32 to 63 for cpu2
879 * @rmtoll C2EMR2 EMx LL_C2_EXTI_DisableEvent_32_63
880 * @param ExtiLine This parameter can be a combination of the following values:
881 * @arg @ref LL_EXTI_LINE_40
882 * @arg @ref LL_EXTI_LINE_41
883 * @retval None
884 */
LL_C2_EXTI_DisableEvent_32_63(uint32_t ExtiLine)885 __STATIC_INLINE void LL_C2_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
886 {
887 CLEAR_BIT(EXTI->C2EMR2, ExtiLine);
888 }
889
890 /**
891 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
892 * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31
893 * @param ExtiLine This parameter can be a combination of the following values:
894 * @arg @ref LL_EXTI_LINE_0
895 * @arg @ref LL_EXTI_LINE_1
896 * @arg @ref LL_EXTI_LINE_2
897 * @arg @ref LL_EXTI_LINE_3
898 * @arg @ref LL_EXTI_LINE_4
899 * @arg @ref LL_EXTI_LINE_5
900 * @arg @ref LL_EXTI_LINE_6
901 * @arg @ref LL_EXTI_LINE_7
902 * @arg @ref LL_EXTI_LINE_8
903 * @arg @ref LL_EXTI_LINE_9
904 * @arg @ref LL_EXTI_LINE_10
905 * @arg @ref LL_EXTI_LINE_11
906 * @arg @ref LL_EXTI_LINE_12
907 * @arg @ref LL_EXTI_LINE_13
908 * @arg @ref LL_EXTI_LINE_14
909 * @arg @ref LL_EXTI_LINE_15
910 * @arg @ref LL_EXTI_LINE_17
911 * @arg @ref LL_EXTI_LINE_18
912 * @arg @ref LL_EXTI_LINE_19
913 * @arg @ref LL_EXTI_LINE_20 (*)
914 * @arg @ref LL_EXTI_LINE_21 (*)
915 * (*) value not defined in all devices
916 * @note Please check each device line mapping for EXTI Line availability
917 * @retval State of bit (1 or 0).
918 */
LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)919 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
920 {
921 return ((READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
922 }
923
924 /**
925 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31 for cpu2
926 * @rmtoll C2EMR1 EMx LL_C2_EXTI_IsEnabledEvent_0_31
927 * @param ExtiLine This parameter can be a combination of the following values:
928 * @arg @ref LL_EXTI_LINE_0
929 * @arg @ref LL_EXTI_LINE_1
930 * @arg @ref LL_EXTI_LINE_2
931 * @arg @ref LL_EXTI_LINE_3
932 * @arg @ref LL_EXTI_LINE_4
933 * @arg @ref LL_EXTI_LINE_5
934 * @arg @ref LL_EXTI_LINE_6
935 * @arg @ref LL_EXTI_LINE_7
936 * @arg @ref LL_EXTI_LINE_8
937 * @arg @ref LL_EXTI_LINE_9
938 * @arg @ref LL_EXTI_LINE_10
939 * @arg @ref LL_EXTI_LINE_11
940 * @arg @ref LL_EXTI_LINE_12
941 * @arg @ref LL_EXTI_LINE_13
942 * @arg @ref LL_EXTI_LINE_14
943 * @arg @ref LL_EXTI_LINE_15
944 * @arg @ref LL_EXTI_LINE_17
945 * @arg @ref LL_EXTI_LINE_18
946 * @arg @ref LL_EXTI_LINE_19
947 * @arg @ref LL_EXTI_LINE_20 (*)
948 * @arg @ref LL_EXTI_LINE_21 (*)
949 * (*) value not defined in all devices
950 * @note Please check each device line mapping for EXTI Line availability
951 * @retval State of bit (1 or 0).
952 */
LL_C2_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)953 __STATIC_INLINE uint32_t LL_C2_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
954 {
955 return ((READ_BIT(EXTI->C2EMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
956 }
957
958 /**
959 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63
960 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63
961 * @param ExtiLine This parameter can be a combination of the following values:
962 * @arg @ref LL_EXTI_LINE_40
963 * @arg @ref LL_EXTI_LINE_41
964 * @retval State of bit (1 or 0).
965 */
LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)966 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
967 {
968 return ((READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
969 }
970
971 /**
972 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63 for cpu2
973 * @rmtoll EMR2 EMx LL_C2_EXTI_IsEnabledEvent_32_63
974 * @param ExtiLine This parameter can be a combination of the following values:
975 * @arg @ref LL_EXTI_LINE_40
976 * @arg @ref LL_EXTI_LINE_41
977 * @retval State of bit (1 or 0).
978 */
LL_C2_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)979 __STATIC_INLINE uint32_t LL_C2_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
980 {
981 return ((READ_BIT(EXTI->C2EMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
982 }
983
984 /**
985 * @}
986 */
987
988 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
989 * @{
990 */
991
992 /**
993 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
994 * @note The configurable wakeup lines are edge-triggered. No glitch must be
995 * generated on these lines. If a rising edge on a configurable interrupt
996 * line occurs during a write operation in the EXTI_RTSR register, the
997 * pending bit is not set.
998 * Rising and falling edge triggers can be set for
999 * the same interrupt line. In this case, both generate a trigger
1000 * condition.
1001 * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31
1002 * @param ExtiLine This parameter can be a combination of the following values:
1003 * @arg @ref LL_EXTI_LINE_0
1004 * @arg @ref LL_EXTI_LINE_1
1005 * @arg @ref LL_EXTI_LINE_2
1006 * @arg @ref LL_EXTI_LINE_3
1007 * @arg @ref LL_EXTI_LINE_4
1008 * @arg @ref LL_EXTI_LINE_5
1009 * @arg @ref LL_EXTI_LINE_6
1010 * @arg @ref LL_EXTI_LINE_7
1011 * @arg @ref LL_EXTI_LINE_8
1012 * @arg @ref LL_EXTI_LINE_9
1013 * @arg @ref LL_EXTI_LINE_10
1014 * @arg @ref LL_EXTI_LINE_11
1015 * @arg @ref LL_EXTI_LINE_12
1016 * @arg @ref LL_EXTI_LINE_13
1017 * @arg @ref LL_EXTI_LINE_14
1018 * @arg @ref LL_EXTI_LINE_15
1019 * @arg @ref LL_EXTI_LINE_16
1020 * @arg @ref LL_EXTI_LINE_17
1021 * @arg @ref LL_EXTI_LINE_18
1022 * @arg @ref LL_EXTI_LINE_19
1023 * @arg @ref LL_EXTI_LINE_20 (*)
1024 * @arg @ref LL_EXTI_LINE_21 (*)
1025 * @arg @ref LL_EXTI_LINE_31 (*)
1026 * (*) value not defined in all devices
1027 * @retval None
1028 */
LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)1029 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
1030 {
1031 SET_BIT(EXTI->RTSR1, ExtiLine);
1032
1033 }
1034
1035 /**
1036 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
1037 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1038 * generated on these lines. If a rising edge on a configurable interrupt
1039 * line occurs during a write operation in the EXTI_RTSR register, the
1040 * pending bit is not set.Rising and falling edge triggers can be set for
1041 * the same interrupt line. In this case, both generate a trigger
1042 * condition.
1043 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63
1044 * @param ExtiLine This parameter can be a combination of the following values:
1045 * @arg @ref LL_EXTI_LINE_33 (*)
1046 * @arg @ref LL_EXTI_LINE_40
1047 * @arg @ref LL_EXTI_LINE_41
1048 * (*) value not defined in all devices
1049 * @retval None
1050 */
LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)1051 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)
1052 {
1053 SET_BIT(EXTI->RTSR2, ExtiLine);
1054 }
1055
1056 /**
1057 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
1058 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1059 * generated on these lines. If a rising edge on a configurable interrupt
1060 * line occurs during a write operation in the EXTI_RTSR register, the
1061 * pending bit is not set.
1062 * Rising and falling edge triggers can be set for
1063 * the same interrupt line. In this case, both generate a trigger
1064 * condition.
1065 * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31
1066 * @param ExtiLine This parameter can be a combination of the following values:
1067 * @arg @ref LL_EXTI_LINE_0
1068 * @arg @ref LL_EXTI_LINE_1
1069 * @arg @ref LL_EXTI_LINE_2
1070 * @arg @ref LL_EXTI_LINE_3
1071 * @arg @ref LL_EXTI_LINE_4
1072 * @arg @ref LL_EXTI_LINE_5
1073 * @arg @ref LL_EXTI_LINE_6
1074 * @arg @ref LL_EXTI_LINE_7
1075 * @arg @ref LL_EXTI_LINE_8
1076 * @arg @ref LL_EXTI_LINE_9
1077 * @arg @ref LL_EXTI_LINE_10
1078 * @arg @ref LL_EXTI_LINE_11
1079 * @arg @ref LL_EXTI_LINE_12
1080 * @arg @ref LL_EXTI_LINE_13
1081 * @arg @ref LL_EXTI_LINE_14
1082 * @arg @ref LL_EXTI_LINE_15
1083 * @arg @ref LL_EXTI_LINE_16
1084 * @arg @ref LL_EXTI_LINE_17
1085 * @arg @ref LL_EXTI_LINE_18
1086 * @arg @ref LL_EXTI_LINE_19
1087 * @arg @ref LL_EXTI_LINE_20 (*)
1088 * @arg @ref LL_EXTI_LINE_21 (*)
1089 * @arg @ref LL_EXTI_LINE_31 (*)
1090 * (*) value not defined in all devices
1091 * @retval None
1092 */
LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)1093 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
1094 {
1095 CLEAR_BIT(EXTI->RTSR1, ExtiLine);
1096
1097 }
1098
1099 /**
1100 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
1101 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1102 * generated on these lines. If a rising edge on a configurable interrupt
1103 * line occurs during a write operation in the EXTI_RTSR register, the
1104 * pending bit is not set.
1105 * Rising and falling edge triggers can be set for
1106 * the same interrupt line. In this case, both generate a trigger
1107 * condition.
1108 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63
1109 * @param ExtiLine This parameter can be a combination of the following values:
1110 * @arg @ref LL_EXTI_LINE_33 (*)
1111 * @arg @ref LL_EXTI_LINE_40
1112 * @arg @ref LL_EXTI_LINE_41
1113 * (*) value not defined in all devices
1114 * @retval None
1115 */
LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)1116 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)
1117 {
1118 CLEAR_BIT(EXTI->RTSR2, ExtiLine);
1119 }
1120
1121 /**
1122 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
1123 * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31
1124 * @param ExtiLine This parameter can be a combination of the following values:
1125 * @arg @ref LL_EXTI_LINE_0
1126 * @arg @ref LL_EXTI_LINE_1
1127 * @arg @ref LL_EXTI_LINE_2
1128 * @arg @ref LL_EXTI_LINE_3
1129 * @arg @ref LL_EXTI_LINE_4
1130 * @arg @ref LL_EXTI_LINE_5
1131 * @arg @ref LL_EXTI_LINE_6
1132 * @arg @ref LL_EXTI_LINE_7
1133 * @arg @ref LL_EXTI_LINE_8
1134 * @arg @ref LL_EXTI_LINE_9
1135 * @arg @ref LL_EXTI_LINE_10
1136 * @arg @ref LL_EXTI_LINE_11
1137 * @arg @ref LL_EXTI_LINE_12
1138 * @arg @ref LL_EXTI_LINE_13
1139 * @arg @ref LL_EXTI_LINE_14
1140 * @arg @ref LL_EXTI_LINE_15
1141 * @arg @ref LL_EXTI_LINE_16
1142 * @arg @ref LL_EXTI_LINE_17
1143 * @arg @ref LL_EXTI_LINE_18
1144 * @arg @ref LL_EXTI_LINE_19
1145 * @arg @ref LL_EXTI_LINE_20 (*)
1146 * @arg @ref LL_EXTI_LINE_21 (*)
1147 * @arg @ref LL_EXTI_LINE_31 (*)
1148 * (*) value not defined in all devices
1149 * @retval State of bit (1 or 0).
1150 */
LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)1151 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
1152 {
1153 return ((READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1154 }
1155
1156 /**
1157 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63
1158 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63
1159 * @param ExtiLine This parameter can be a combination of the following values:
1160 * @arg @ref LL_EXTI_LINE_33 (*)
1161 * @arg @ref LL_EXTI_LINE_40
1162 * @arg @ref LL_EXTI_LINE_41
1163 * (*) value not defined in all devices
1164 * @retval State of bit (1 or 0).
1165 */
LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)1166 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)
1167 {
1168 return ((READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1169 }
1170
1171 /**
1172 * @}
1173 */
1174
1175 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
1176 * @{
1177 */
1178
1179 /**
1180 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
1181 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1182 * generated on these lines. If a falling edge on a configurable interrupt
1183 * line occurs during a write operation in the EXTI_FTSR register, the
1184 * pending bit is not set.
1185 * Rising and falling edge triggers can be set for
1186 * the same interrupt line. In this case, both generate a trigger
1187 * condition.
1188 * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31
1189 * @param ExtiLine This parameter can be a combination of the following values:
1190 * @arg @ref LL_EXTI_LINE_0
1191 * @arg @ref LL_EXTI_LINE_1
1192 * @arg @ref LL_EXTI_LINE_2
1193 * @arg @ref LL_EXTI_LINE_3
1194 * @arg @ref LL_EXTI_LINE_4
1195 * @arg @ref LL_EXTI_LINE_5
1196 * @arg @ref LL_EXTI_LINE_6
1197 * @arg @ref LL_EXTI_LINE_7
1198 * @arg @ref LL_EXTI_LINE_8
1199 * @arg @ref LL_EXTI_LINE_9
1200 * @arg @ref LL_EXTI_LINE_10
1201 * @arg @ref LL_EXTI_LINE_11
1202 * @arg @ref LL_EXTI_LINE_12
1203 * @arg @ref LL_EXTI_LINE_13
1204 * @arg @ref LL_EXTI_LINE_14
1205 * @arg @ref LL_EXTI_LINE_15
1206 * @arg @ref LL_EXTI_LINE_16
1207 * @arg @ref LL_EXTI_LINE_17
1208 * @arg @ref LL_EXTI_LINE_18
1209 * @arg @ref LL_EXTI_LINE_19
1210 * @arg @ref LL_EXTI_LINE_20 (*)
1211 * @arg @ref LL_EXTI_LINE_21 (*)
1212 * @arg @ref LL_EXTI_LINE_31 (*)
1213 * (*) value not defined in all devices
1214 * @note Please check each device line mapping for EXTI Line availability
1215 * @retval None
1216 */
LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)1217 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
1218 {
1219 SET_BIT(EXTI->FTSR1, ExtiLine);
1220 }
1221
1222 /**
1223 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
1224 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1225 * generated on these lines. If a Falling edge on a configurable interrupt
1226 * line occurs during a write operation in the EXTI_FTSR register, the
1227 * pending bit is not set.
1228 * Rising and falling edge triggers can be set for
1229 * the same interrupt line. In this case, both generate a trigger
1230 * condition.
1231 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63
1232 * @param ExtiLine This parameter can be a combination of the following values:
1233 * @arg @ref LL_EXTI_LINE_33 (*)
1234 * @arg @ref LL_EXTI_LINE_40
1235 * @arg @ref LL_EXTI_LINE_41
1236 * (*) value not defined in all devices
1237 * @retval None
1238 */
LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)1239 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)
1240 {
1241 SET_BIT(EXTI->FTSR2, ExtiLine);
1242 }
1243
1244 /**
1245 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
1246 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1247 * generated on these lines. If a Falling edge on a configurable interrupt
1248 * line occurs during a write operation in the EXTI_FTSR register, the
1249 * pending bit is not set.
1250 * Rising and falling edge triggers can be set for the same interrupt line.
1251 * In this case, both generate a trigger condition.
1252 * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31
1253 * @param ExtiLine This parameter can be a combination of the following values:
1254 * @arg @ref LL_EXTI_LINE_0
1255 * @arg @ref LL_EXTI_LINE_1
1256 * @arg @ref LL_EXTI_LINE_2
1257 * @arg @ref LL_EXTI_LINE_3
1258 * @arg @ref LL_EXTI_LINE_4
1259 * @arg @ref LL_EXTI_LINE_5
1260 * @arg @ref LL_EXTI_LINE_6
1261 * @arg @ref LL_EXTI_LINE_7
1262 * @arg @ref LL_EXTI_LINE_8
1263 * @arg @ref LL_EXTI_LINE_9
1264 * @arg @ref LL_EXTI_LINE_10
1265 * @arg @ref LL_EXTI_LINE_11
1266 * @arg @ref LL_EXTI_LINE_12
1267 * @arg @ref LL_EXTI_LINE_13
1268 * @arg @ref LL_EXTI_LINE_14
1269 * @arg @ref LL_EXTI_LINE_15
1270 * @arg @ref LL_EXTI_LINE_16
1271 * @arg @ref LL_EXTI_LINE_17
1272 * @arg @ref LL_EXTI_LINE_18
1273 * @arg @ref LL_EXTI_LINE_19
1274 * @arg @ref LL_EXTI_LINE_20 (*)
1275 * @arg @ref LL_EXTI_LINE_21 (*)
1276 * @arg @ref LL_EXTI_LINE_31 (*)
1277 * (*) value not defined in all devices
1278 * @note Please check each device line mapping for EXTI Line availability
1279 * @retval None
1280 */
LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)1281 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
1282 {
1283 CLEAR_BIT(EXTI->FTSR1, ExtiLine);
1284 }
1285
1286 /**
1287 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
1288 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1289 * generated on these lines. If a Falling edge on a configurable interrupt
1290 * line occurs during a write operation in the EXTI_FTSR register, the
1291 * pending bit is not set.
1292 * Rising and falling edge triggers can be set for the same interrupt line.
1293 * In this case, both generate a trigger condition.
1294 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63
1295 * @param ExtiLine This parameter can be a combination of the following values:
1296 * @arg @ref LL_EXTI_LINE_33 (*)
1297 * @arg @ref LL_EXTI_LINE_40
1298 * @arg @ref LL_EXTI_LINE_41
1299 * (*) value not defined in all devices
1300 * @retval None
1301 */
LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)1302 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)
1303 {
1304 CLEAR_BIT(EXTI->FTSR2, ExtiLine);
1305 }
1306
1307 /**
1308 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
1309 * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31
1310 * @param ExtiLine This parameter can be a combination of the following values:
1311 * @arg @ref LL_EXTI_LINE_0
1312 * @arg @ref LL_EXTI_LINE_1
1313 * @arg @ref LL_EXTI_LINE_2
1314 * @arg @ref LL_EXTI_LINE_3
1315 * @arg @ref LL_EXTI_LINE_4
1316 * @arg @ref LL_EXTI_LINE_5
1317 * @arg @ref LL_EXTI_LINE_6
1318 * @arg @ref LL_EXTI_LINE_7
1319 * @arg @ref LL_EXTI_LINE_8
1320 * @arg @ref LL_EXTI_LINE_9
1321 * @arg @ref LL_EXTI_LINE_10
1322 * @arg @ref LL_EXTI_LINE_11
1323 * @arg @ref LL_EXTI_LINE_12
1324 * @arg @ref LL_EXTI_LINE_13
1325 * @arg @ref LL_EXTI_LINE_14
1326 * @arg @ref LL_EXTI_LINE_15
1327 * @arg @ref LL_EXTI_LINE_16
1328 * @arg @ref LL_EXTI_LINE_17
1329 * @arg @ref LL_EXTI_LINE_18
1330 * @arg @ref LL_EXTI_LINE_19
1331 * @arg @ref LL_EXTI_LINE_20 (*)
1332 * @arg @ref LL_EXTI_LINE_21 (*)
1333 * @arg @ref LL_EXTI_LINE_31 (*)
1334 * (*) value not defined in all devices
1335 * @note Please check each device line mapping for EXTI Line availability
1336 * @retval State of bit (1 or 0).
1337 */
LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)1338 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
1339 {
1340 return ((READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1341 }
1342
1343 /**
1344 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63
1345 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63
1346 * @param ExtiLine This parameter can be a combination of the following values:
1347 * @arg @ref LL_EXTI_LINE_33 (*)
1348 * @arg @ref LL_EXTI_LINE_40
1349 * @arg @ref LL_EXTI_LINE_41
1350 * @retval State of bit (1 or 0).
1351 */
LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)1352 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)
1353 {
1354 return ((READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1355 }
1356
1357 /**
1358 * @}
1359 */
1360
1361 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
1362 * @{
1363 */
1364
1365 /**
1366 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
1367 * @note If the interrupt is enabled on this line in the EXTI_IMR1, writing a 1 to
1368 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR1
1369 * resulting in an interrupt request generation.
1370 * This bit is cleared by clearing the corresponding bit in the EXTI_PR1
1371 * register (by writing a 1 into the bit)
1372 * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31
1373 * @param ExtiLine This parameter can be a combination of the following values:
1374 * @arg @ref LL_EXTI_LINE_0
1375 * @arg @ref LL_EXTI_LINE_1
1376 * @arg @ref LL_EXTI_LINE_2
1377 * @arg @ref LL_EXTI_LINE_3
1378 * @arg @ref LL_EXTI_LINE_4
1379 * @arg @ref LL_EXTI_LINE_5
1380 * @arg @ref LL_EXTI_LINE_6
1381 * @arg @ref LL_EXTI_LINE_7
1382 * @arg @ref LL_EXTI_LINE_8
1383 * @arg @ref LL_EXTI_LINE_9
1384 * @arg @ref LL_EXTI_LINE_10
1385 * @arg @ref LL_EXTI_LINE_11
1386 * @arg @ref LL_EXTI_LINE_12
1387 * @arg @ref LL_EXTI_LINE_13
1388 * @arg @ref LL_EXTI_LINE_14
1389 * @arg @ref LL_EXTI_LINE_15
1390 * @arg @ref LL_EXTI_LINE_16
1391 * @arg @ref LL_EXTI_LINE_17
1392 * @arg @ref LL_EXTI_LINE_18
1393 * @arg @ref LL_EXTI_LINE_19
1394 * @arg @ref LL_EXTI_LINE_20 (*)
1395 * @arg @ref LL_EXTI_LINE_21 (*)
1396 * @arg @ref LL_EXTI_LINE_31 (*)
1397 * (*) value not defined in all devices
1398 * @note Please check each device line mapping for EXTI Line availability
1399 * @retval None
1400 */
LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)1401 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
1402 {
1403 SET_BIT(EXTI->SWIER1, ExtiLine);
1404 }
1405
1406 /**
1407 * @brief Generate a software Interrupt Event for Lines in range 32 to 63
1408 * @note If the interrupt is enabled on this line in the EXTI_IMR2, writing a 1 to
1409 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR2
1410 * resulting in an interrupt request generation.
1411 * This bit is cleared by clearing the corresponding bit in the EXTI_PR2
1412 * register (by writing a 1 into the bit)
1413 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63
1414 * @param ExtiLine This parameter can be a combination of the following values:
1415 * @arg @ref LL_EXTI_LINE_33 (*)
1416 * @arg @ref LL_EXTI_LINE_40
1417 * @arg @ref LL_EXTI_LINE_41
1418 * (*) value not defined in all devices
1419 * @retval None
1420 */
LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)1421 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)
1422 {
1423 SET_BIT(EXTI->SWIER2, ExtiLine);
1424 }
1425
1426 /**
1427 * @}
1428 */
1429
1430 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
1431 * @{
1432 */
1433
1434 /**
1435 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
1436 * @note This bit is set when the selected edge event arrives on the interrupt
1437 * line. This bit is cleared by writing a 1 to the bit.
1438 * @rmtoll PR1 PIFx LL_EXTI_IsActiveFlag_0_31
1439 * @param ExtiLine This parameter can be a combination of the following values:
1440 * @arg @ref LL_EXTI_LINE_0
1441 * @arg @ref LL_EXTI_LINE_1
1442 * @arg @ref LL_EXTI_LINE_2
1443 * @arg @ref LL_EXTI_LINE_3
1444 * @arg @ref LL_EXTI_LINE_4
1445 * @arg @ref LL_EXTI_LINE_5
1446 * @arg @ref LL_EXTI_LINE_6
1447 * @arg @ref LL_EXTI_LINE_7
1448 * @arg @ref LL_EXTI_LINE_8
1449 * @arg @ref LL_EXTI_LINE_9
1450 * @arg @ref LL_EXTI_LINE_10
1451 * @arg @ref LL_EXTI_LINE_11
1452 * @arg @ref LL_EXTI_LINE_12
1453 * @arg @ref LL_EXTI_LINE_13
1454 * @arg @ref LL_EXTI_LINE_14
1455 * @arg @ref LL_EXTI_LINE_15
1456 * @arg @ref LL_EXTI_LINE_16
1457 * @arg @ref LL_EXTI_LINE_17
1458 * @arg @ref LL_EXTI_LINE_18
1459 * @arg @ref LL_EXTI_LINE_19
1460 * @arg @ref LL_EXTI_LINE_20 (*)
1461 * @arg @ref LL_EXTI_LINE_21 (*)
1462 * @arg @ref LL_EXTI_LINE_31 (*)
1463 * (*) value not defined in all devices
1464 * @retval State of bit (1 or 0).
1465 */
LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)1466 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
1467 {
1468 return ((READ_BIT(EXTI->PR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1469 }
1470
1471 /**
1472 * @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63
1473 * @note This bit is set when the selected edge event arrives on the interrupt
1474 * line. This bit is cleared by writing a 1 to the bit.
1475 * @rmtoll PR2 PIFx LL_EXTI_IsActiveFlag_32_63
1476 * @param ExtiLine This parameter can be a combination of the following values:
1477 * @arg @ref LL_EXTI_LINE_33 (*)
1478 * @arg @ref LL_EXTI_LINE_40
1479 * @arg @ref LL_EXTI_LINE_41
1480 * (*) value not defined in all devices
1481 * @retval State of bit (1 or 0).
1482 */
LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)1483 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)
1484 {
1485 return ((READ_BIT(EXTI->PR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1486 }
1487
1488 /**
1489 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31
1490 * @note This bit is set when the selected edge event arrives on the interrupt
1491 * line. This bit is cleared by writing a 1 to the bit.
1492 * @rmtoll PR1 PIFx LL_EXTI_ReadFlag_0_31
1493 * @param ExtiLine This parameter can be a combination of the following values:
1494 * @arg @ref LL_EXTI_LINE_0
1495 * @arg @ref LL_EXTI_LINE_1
1496 * @arg @ref LL_EXTI_LINE_2
1497 * @arg @ref LL_EXTI_LINE_3
1498 * @arg @ref LL_EXTI_LINE_4
1499 * @arg @ref LL_EXTI_LINE_5
1500 * @arg @ref LL_EXTI_LINE_6
1501 * @arg @ref LL_EXTI_LINE_7
1502 * @arg @ref LL_EXTI_LINE_8
1503 * @arg @ref LL_EXTI_LINE_9
1504 * @arg @ref LL_EXTI_LINE_10
1505 * @arg @ref LL_EXTI_LINE_11
1506 * @arg @ref LL_EXTI_LINE_12
1507 * @arg @ref LL_EXTI_LINE_13
1508 * @arg @ref LL_EXTI_LINE_14
1509 * @arg @ref LL_EXTI_LINE_15
1510 * @arg @ref LL_EXTI_LINE_16
1511 * @arg @ref LL_EXTI_LINE_17
1512 * @arg @ref LL_EXTI_LINE_18
1513 * @arg @ref LL_EXTI_LINE_19
1514 * @arg @ref LL_EXTI_LINE_20 (*)
1515 * @arg @ref LL_EXTI_LINE_21 (*)
1516 * @arg @ref LL_EXTI_LINE_31 (*)
1517 * (*) value not defined in all devices
1518 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1519 */
LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)1520 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
1521 {
1522 return (uint32_t)(READ_BIT(EXTI->PR1, ExtiLine));
1523 }
1524
1525 /**
1526 * @brief Read ExtLine Combination Flag for Lines in range 32 to 63
1527 * @note This bit is set when the selected edge event arrives on the interrupt
1528 * line. This bit is cleared by writing a 1 to the bit.
1529 * @rmtoll PR2 PIFx LL_EXTI_ReadFlag_32_63
1530 * @param ExtiLine This parameter can be a combination of the following values:
1531 * @arg @ref LL_EXTI_LINE_33 (*)
1532 * @arg @ref LL_EXTI_LINE_40
1533 * @arg @ref LL_EXTI_LINE_41
1534 * (*) value not defined in all devices
1535 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1536 */
LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)1537 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)
1538 {
1539 return (uint32_t)(READ_BIT(EXTI->PR2, ExtiLine));
1540 }
1541
1542 /**
1543 * @brief Clear ExtLine Flags for Lines in range 0 to 31
1544 * @note This bit is set when the selected edge event arrives on the interrupt
1545 * line. This bit is cleared by writing a 1 to the bit.
1546 * @rmtoll PR1 PIFx LL_EXTI_ClearFlag_0_31
1547 * @param ExtiLine This parameter can be a combination of the following values:
1548 * @arg @ref LL_EXTI_LINE_0
1549 * @arg @ref LL_EXTI_LINE_1
1550 * @arg @ref LL_EXTI_LINE_2
1551 * @arg @ref LL_EXTI_LINE_3
1552 * @arg @ref LL_EXTI_LINE_4
1553 * @arg @ref LL_EXTI_LINE_5
1554 * @arg @ref LL_EXTI_LINE_6
1555 * @arg @ref LL_EXTI_LINE_7
1556 * @arg @ref LL_EXTI_LINE_8
1557 * @arg @ref LL_EXTI_LINE_9
1558 * @arg @ref LL_EXTI_LINE_10
1559 * @arg @ref LL_EXTI_LINE_11
1560 * @arg @ref LL_EXTI_LINE_12
1561 * @arg @ref LL_EXTI_LINE_13
1562 * @arg @ref LL_EXTI_LINE_14
1563 * @arg @ref LL_EXTI_LINE_15
1564 * @arg @ref LL_EXTI_LINE_16
1565 * @arg @ref LL_EXTI_LINE_17
1566 * @arg @ref LL_EXTI_LINE_18
1567 * @arg @ref LL_EXTI_LINE_19
1568 * @arg @ref LL_EXTI_LINE_20 (*)
1569 * @arg @ref LL_EXTI_LINE_21 (*)
1570 * @arg @ref LL_EXTI_LINE_31 (*)
1571 * (*) value not defined in all devices
1572 * @retval None
1573 */
LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)1574 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
1575 {
1576 WRITE_REG(EXTI->PR1, ExtiLine);
1577 }
1578
1579 /**
1580 * @brief Clear ExtLine Flags for Lines in range 32 to 63
1581 * @note This bit is set when the selected edge event arrives on the interrupt
1582 * line. This bit is cleared by writing a 1 to the bit.
1583 * @rmtoll PR2 PIFx LL_EXTI_ClearFlag_32_63
1584 * @param ExtiLine This parameter can be a combination of the following values:
1585 * @arg @ref LL_EXTI_LINE_33 (*)
1586 * @arg @ref LL_EXTI_LINE_40
1587 * @arg @ref LL_EXTI_LINE_41
1588 * (*) value not defined in all devices
1589 * @retval None
1590 */
LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)1591 __STATIC_INLINE void LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)
1592 {
1593 WRITE_REG(EXTI->PR2, ExtiLine);
1594 }
1595
1596 /**
1597 * @}
1598 */
1599
1600 #if defined(USE_FULL_LL_DRIVER)
1601 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
1602 * @{
1603 */
1604
1605 ErrorStatus LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1606 ErrorStatus LL_EXTI_DeInit(void);
1607 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1608
1609
1610 /**
1611 * @}
1612 */
1613 #endif /* USE_FULL_LL_DRIVER */
1614
1615 /**
1616 * @}
1617 */
1618
1619 /**
1620 * @}
1621 */
1622
1623 #endif /* EXTI */
1624
1625 /**
1626 * @}
1627 */
1628
1629 #ifdef __cplusplus
1630 }
1631 #endif
1632
1633 #endif /* STM32WBxx_LL_EXTI_H */
1634
