1 /** 2 ****************************************************************************** 3 * @file stm32wbxx_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32WBxx_HAL_UART_H 21 #define STM32WBxx_HAL_UART_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32wbxx_hal_def.h" 29 30 /** @addtogroup STM32WBxx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UART 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UART_Exported_Types UART Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART Init Structure definition 45 */ 46 typedef struct 47 { 48 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 49 The baud rate register is computed using the following formula: 50 #if defined(LPUART1) 51 LPUART: 52 ======= 53 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) 54 where lpuart_ker_ck_pres is the UART input clock divided by a prescaler 55 UART: 56 ===== 57 #endif 58 - If oversampling is 16 or in LIN mode, 59 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) 60 - If oversampling is 8, 61 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / 62 ((huart->Init.BaudRate)))[15:4] 63 Baud Rate Register[3] = 0 64 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / 65 ((huart->Init.BaudRate)))[3:0]) >> 1 66 where uart_ker_ck_pres is the UART input clock divided by a prescaler */ 67 68 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 69 This parameter can be a value of @ref UARTEx_Word_Length. */ 70 71 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 72 This parameter can be a value of @ref UART_Stop_Bits. */ 73 74 uint32_t Parity; /*!< Specifies the parity mode. 75 This parameter can be a value of @ref UART_Parity 76 @note When parity is enabled, the computed parity is inserted 77 at the MSB position of the transmitted data (9th bit when 78 the word length is set to 9 data bits; 8th bit when the 79 word length is set to 8 data bits). */ 80 81 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 82 This parameter can be a value of @ref UART_Mode. */ 83 84 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 85 or disabled. 86 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 87 88 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, 89 to achieve higher speed (up to f_PCLK/8). 90 This parameter can be a value of @ref UART_Over_Sampling. */ 91 92 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 93 Selecting the single sample method increases the receiver tolerance to clock 94 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 95 96 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. 97 This parameter can be a value of @ref UART_ClockPrescaler. */ 98 99 } UART_InitTypeDef; 100 101 /** 102 * @brief UART Advanced Features initialization structure definition 103 */ 104 typedef struct 105 { 106 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 107 Advanced Features may be initialized at the same time . 108 This parameter can be a value of 109 @ref UART_Advanced_Features_Initialization_Type. */ 110 111 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 112 This parameter can be a value of @ref UART_Tx_Inv. */ 113 114 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 115 This parameter can be a value of @ref UART_Rx_Inv. */ 116 117 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 118 vs negative/inverted logic). 119 This parameter can be a value of @ref UART_Data_Inv. */ 120 121 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 122 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 123 124 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 125 This parameter can be a value of @ref UART_Overrun_Disable. */ 126 127 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 128 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 129 130 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 131 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 132 133 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 134 detection is carried out. 135 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 136 137 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 138 This parameter can be a value of @ref UART_MSB_First. */ 139 } UART_AdvFeatureInitTypeDef; 140 141 /** 142 * @brief HAL UART State definition 143 * @note HAL UART State value is a combination of 2 different substates: 144 * gState and RxState (see @ref UART_State_Definition). 145 * - gState contains UART state information related to global Handle management 146 * and also information related to Tx operations. 147 * gState value coding follow below described bitmap : 148 * b7-b6 Error information 149 * 00 : No Error 150 * 01 : (Not Used) 151 * 10 : Timeout 152 * 11 : Error 153 * b5 Peripheral initialization status 154 * 0 : Reset (Peripheral not initialized) 155 * 1 : Init done (Peripheral initialized. HAL UART Init function already called) 156 * b4-b3 (not used) 157 * xx : Should be set to 00 158 * b2 Intrinsic process state 159 * 0 : Ready 160 * 1 : Busy (Peripheral busy with some configuration or internal operations) 161 * b1 (not used) 162 * x : Should be set to 0 163 * b0 Tx state 164 * 0 : Ready (no Tx operation ongoing) 165 * 1 : Busy (Tx operation ongoing) 166 * - RxState contains information related to Rx operations. 167 * RxState value coding follow below described bitmap : 168 * b7-b6 (not used) 169 * xx : Should be set to 00 170 * b5 Peripheral initialization status 171 * 0 : Reset (Peripheral not initialized) 172 * 1 : Init done (Peripheral initialized) 173 * b4-b2 (not used) 174 * xxx : Should be set to 000 175 * b1 Rx state 176 * 0 : Ready (no Rx operation ongoing) 177 * 1 : Busy (Rx operation ongoing) 178 * b0 (not used) 179 * x : Should be set to 0. 180 */ 181 typedef uint32_t HAL_UART_StateTypeDef; 182 183 /** 184 * @brief UART clock sources definition 185 */ 186 typedef enum 187 { 188 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 189 UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ 190 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ 191 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ 192 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ 193 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ 194 } UART_ClockSourceTypeDef; 195 196 /** 197 * @brief HAL UART Reception type definition 198 * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. 199 * This parameter can be a value of @ref UART_Reception_Type_Values : 200 * HAL_UART_RECEPTION_STANDARD = 0x00U, 201 * HAL_UART_RECEPTION_TOIDLE = 0x01U, 202 * HAL_UART_RECEPTION_TORTO = 0x02U, 203 * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U, 204 */ 205 typedef uint32_t HAL_UART_RxTypeTypeDef; 206 207 /** 208 * @brief HAL UART Rx Event type definition 209 * @note HAL UART Rx Event type value aims to identify which type of Event has occurred 210 * leading to call of the RxEvent callback. 211 * This parameter can be a value of @ref UART_RxEvent_Type_Values : 212 * HAL_UART_RXEVENT_TC = 0x00U, 213 * HAL_UART_RXEVENT_HT = 0x01U, 214 * HAL_UART_RXEVENT_IDLE = 0x02U, 215 */ 216 typedef uint32_t HAL_UART_RxEventTypeTypeDef; 217 218 /** 219 * @brief UART handle Structure definition 220 */ 221 typedef struct __UART_HandleTypeDef 222 { 223 USART_TypeDef *Instance; /*!< UART registers base address */ 224 225 UART_InitTypeDef Init; /*!< UART communication parameters */ 226 227 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 228 229 const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 230 231 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 232 233 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 234 235 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 236 237 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 238 239 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 240 241 uint16_t Mask; /*!< UART Rx RDR register mask */ 242 243 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. 244 This parameter can be a value of @ref UARTEx_FIFO_mode. */ 245 246 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 247 248 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 249 250 __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ 251 252 __IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */ 253 254 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 255 256 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 257 258 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 259 260 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 261 262 HAL_LockTypeDef Lock; /*!< Locking object */ 263 264 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 265 and also related to Tx operations. This parameter 266 can be a value of @ref HAL_UART_StateTypeDef */ 267 268 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. This 269 parameter can be a value of @ref HAL_UART_StateTypeDef */ 270 271 __IO uint32_t ErrorCode; /*!< UART Error code */ 272 273 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 274 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 275 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 276 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 277 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 278 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 279 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 280 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 281 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 282 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 283 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ 284 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ 285 void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ 286 287 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 288 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 289 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 290 291 } UART_HandleTypeDef; 292 293 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 294 /** 295 * @brief HAL UART Callback ID enumeration definition 296 */ 297 typedef enum 298 { 299 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 300 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 301 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 302 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 303 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 304 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 305 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 306 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 307 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 308 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ 309 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ 310 311 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 312 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 313 314 } HAL_UART_CallbackIDTypeDef; 315 316 /** 317 * @brief HAL UART Callback pointer definition 318 */ 319 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 320 typedef void (*pUART_RxEventCallbackTypeDef) 321 (struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ 322 323 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 324 325 /** 326 * @} 327 */ 328 329 /* Exported constants --------------------------------------------------------*/ 330 /** @defgroup UART_Exported_Constants UART Exported Constants 331 * @{ 332 */ 333 334 /** @defgroup UART_State_Definition UART State Code Definition 335 * @{ 336 */ 337 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 338 Value is allowed for gState and RxState */ 339 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 340 Value is allowed for gState and RxState */ 341 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 342 Value is allowed for gState only */ 343 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 344 Value is allowed for gState only */ 345 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 346 Value is allowed for RxState only */ 347 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 348 Not to be used for neither gState nor RxState.Value is result 349 of combination (Or) between gState and RxState values */ 350 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 351 Value is allowed for gState only */ 352 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 353 Value is allowed for gState only */ 354 /** 355 * @} 356 */ 357 358 /** @defgroup UART_Error_Definition UART Error Definition 359 * @{ 360 */ 361 #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */ 362 #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */ 363 #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */ 364 #define HAL_UART_ERROR_FE (0x00000004U) /*!< Frame error */ 365 #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */ 366 #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 367 #define HAL_UART_ERROR_RTO (0x00000020U) /*!< Receiver Timeout error */ 368 369 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 370 #define HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */ 371 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 372 /** 373 * @} 374 */ 375 376 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 377 * @{ 378 */ 379 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 380 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 381 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 382 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 383 /** 384 * @} 385 */ 386 387 /** @defgroup UART_Parity UART Parity 388 * @{ 389 */ 390 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 391 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 392 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 393 /** 394 * @} 395 */ 396 397 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 398 * @{ 399 */ 400 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 401 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 402 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 403 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 404 /** 405 * @} 406 */ 407 408 /** @defgroup UART_Mode UART Transfer Mode 409 * @{ 410 */ 411 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 412 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 413 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 414 /** 415 * @} 416 */ 417 418 /** @defgroup UART_State UART State 419 * @{ 420 */ 421 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 422 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 423 /** 424 * @} 425 */ 426 427 /** @defgroup UART_Over_Sampling UART Over Sampling 428 * @{ 429 */ 430 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 431 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 432 /** 433 * @} 434 */ 435 436 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 437 * @{ 438 */ 439 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 440 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 441 /** 442 * @} 443 */ 444 445 /** @defgroup UART_ClockPrescaler UART Clock Prescaler 446 * @{ 447 */ 448 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 449 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 450 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 451 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 452 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 453 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 454 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 455 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 456 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 457 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 458 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 459 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 460 /** 461 * @} 462 */ 463 464 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 465 * @{ 466 */ 467 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection 468 on start bit */ 469 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection 470 on falling edge */ 471 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection 472 on 0x7F frame detection */ 473 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection 474 on 0x55 frame detection */ 475 /** 476 * @} 477 */ 478 479 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout 480 * @{ 481 */ 482 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ 483 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ 484 /** 485 * @} 486 */ 487 488 /** @defgroup UART_LIN UART Local Interconnection Network mode 489 * @{ 490 */ 491 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 492 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 493 /** 494 * @} 495 */ 496 497 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 498 * @{ 499 */ 500 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 501 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 502 /** 503 * @} 504 */ 505 506 /** @defgroup UART_DMA_Tx UART DMA Tx 507 * @{ 508 */ 509 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 510 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 511 /** 512 * @} 513 */ 514 515 /** @defgroup UART_DMA_Rx UART DMA Rx 516 * @{ 517 */ 518 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 519 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 520 /** 521 * @} 522 */ 523 524 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 525 * @{ 526 */ 527 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 528 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 529 /** 530 * @} 531 */ 532 533 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 534 * @{ 535 */ 536 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 537 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 538 /** 539 * @} 540 */ 541 542 /** @defgroup UART_Request_Parameters UART Request Parameters 543 * @{ 544 */ 545 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 546 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 547 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 548 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 549 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 550 /** 551 * @} 552 */ 553 554 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 555 * @{ 556 */ 557 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 558 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 559 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 560 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 561 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 562 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 563 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 564 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 565 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 566 /** 567 * @} 568 */ 569 570 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 571 * @{ 572 */ 573 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 574 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 575 /** 576 * @} 577 */ 578 579 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 580 * @{ 581 */ 582 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 583 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 584 /** 585 * @} 586 */ 587 588 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 589 * @{ 590 */ 591 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 592 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 593 /** 594 * @} 595 */ 596 597 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 598 * @{ 599 */ 600 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 601 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 602 /** 603 * @} 604 */ 605 606 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 607 * @{ 608 */ 609 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 610 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 611 /** 612 * @} 613 */ 614 615 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 616 * @{ 617 */ 618 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 619 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 620 /** 621 * @} 622 */ 623 624 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 625 * @{ 626 */ 627 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 628 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 629 /** 630 * @} 631 */ 632 633 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 634 * @{ 635 */ 636 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received 637 first disable */ 638 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received 639 first enable */ 640 /** 641 * @} 642 */ 643 644 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 645 * @{ 646 */ 647 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 648 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 649 /** 650 * @} 651 */ 652 653 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 654 * @{ 655 */ 656 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 657 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 658 /** 659 * @} 660 */ 661 662 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 663 * @{ 664 */ 665 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 666 /** 667 * @} 668 */ 669 670 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 671 * @{ 672 */ 673 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 674 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 675 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register 676 not empty or RXFIFO is not empty */ 677 /** 678 * @} 679 */ 680 681 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 682 * @{ 683 */ 684 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 685 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 686 /** 687 * @} 688 */ 689 690 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 691 * @{ 692 */ 693 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB 694 position in CR1 register */ 695 /** 696 * @} 697 */ 698 699 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 700 * @{ 701 */ 702 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB 703 position in CR1 register */ 704 /** 705 * @} 706 */ 707 708 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 709 * @{ 710 */ 711 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 712 /** 713 * @} 714 */ 715 716 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 717 * @{ 718 */ 719 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 720 /** 721 * @} 722 */ 723 724 /** @defgroup UART_Flags UART Status Flags 725 * Elements values convention: 0xXXXX 726 * - 0xXXXX : Flag mask in the ISR register 727 * @{ 728 */ 729 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ 730 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ 731 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ 732 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ 733 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 734 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 735 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 736 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 737 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 738 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 739 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 740 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 741 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 742 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 743 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 744 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 745 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 746 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ 747 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ 748 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 749 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ 750 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ 751 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 752 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 753 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 754 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 755 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 756 /** 757 * @} 758 */ 759 760 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 761 * Elements values convention: 000ZZZZZ0XXYYYYYb 762 * - YYYYY : Interrupt source position in the XX register (5bits) 763 * - XX : Interrupt source register (2bits) 764 * - 01: CR1 register 765 * - 10: CR2 register 766 * - 11: CR3 register 767 * - ZZZZZ : Flag position in the ISR register(5bits) 768 * Elements values convention: 000000000XXYYYYYb 769 * - YYYYY : Interrupt source position in the XX register (5bits) 770 * - XX : Interrupt source register (2bits) 771 * - 01: CR1 register 772 * - 10: CR2 register 773 * - 11: CR3 register 774 * Elements values convention: 0000ZZZZ00000000b 775 * - ZZZZ : Flag position in the ISR register(4bits) 776 * @{ 777 */ 778 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 779 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 780 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ 781 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 782 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 783 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ 784 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 785 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 786 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 787 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 788 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 789 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ 790 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ 791 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ 792 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ 793 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ 794 795 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 796 797 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 798 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 799 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 800 /** 801 * @} 802 */ 803 804 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 805 * @{ 806 */ 807 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 808 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 809 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 810 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 811 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 812 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ 813 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 814 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 815 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 816 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 817 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 818 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ 819 /** 820 * @} 821 */ 822 823 /** @defgroup UART_Reception_Type_Values UART Reception type values 824 * @{ 825 */ 826 #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ 827 #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ 828 #define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */ 829 #define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */ 830 /** 831 * @} 832 */ 833 834 /** @defgroup UART_RxEvent_Type_Values UART RxEvent type values 835 * @{ 836 */ 837 #define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */ 838 #define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */ 839 #define HAL_UART_RXEVENT_IDLE (0x00000002U) /*!< RxEvent linked to IDLE event */ 840 /** 841 * @} 842 */ 843 844 /** 845 * @} 846 */ 847 848 /* Exported macros -----------------------------------------------------------*/ 849 /** @defgroup UART_Exported_Macros UART Exported Macros 850 * @{ 851 */ 852 853 /** @brief Reset UART handle states. 854 * @param __HANDLE__ UART handle. 855 * @retval None 856 */ 857 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 858 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 859 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 860 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 861 (__HANDLE__)->MspInitCallback = NULL; \ 862 (__HANDLE__)->MspDeInitCallback = NULL; \ 863 } while(0U) 864 #else 865 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 866 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 867 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 868 } while(0U) 869 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 870 871 /** @brief Flush the UART Data registers. 872 * @param __HANDLE__ specifies the UART Handle. 873 * @retval None 874 */ 875 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 876 do{ \ 877 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 878 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 879 } while(0U) 880 881 /** @brief Clear the specified UART pending flag. 882 * @param __HANDLE__ specifies the UART Handle. 883 * @param __FLAG__ specifies the flag to check. 884 * This parameter can be any combination of the following values: 885 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 886 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 887 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 888 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 889 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 890 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag 891 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 892 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag 893 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 894 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 895 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 896 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 897 * @retval None 898 */ 899 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 900 901 /** @brief Clear the UART PE pending flag. 902 * @param __HANDLE__ specifies the UART Handle. 903 * @retval None 904 */ 905 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 906 907 /** @brief Clear the UART FE pending flag. 908 * @param __HANDLE__ specifies the UART Handle. 909 * @retval None 910 */ 911 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 912 913 /** @brief Clear the UART NE pending flag. 914 * @param __HANDLE__ specifies the UART Handle. 915 * @retval None 916 */ 917 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 918 919 /** @brief Clear the UART ORE pending flag. 920 * @param __HANDLE__ specifies the UART Handle. 921 * @retval None 922 */ 923 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 924 925 /** @brief Clear the UART IDLE pending flag. 926 * @param __HANDLE__ specifies the UART Handle. 927 * @retval None 928 */ 929 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 930 931 /** @brief Clear the UART TX FIFO empty clear flag. 932 * @param __HANDLE__ specifies the UART Handle. 933 * @retval None 934 */ 935 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) 936 937 /** @brief Check whether the specified UART flag is set or not. 938 * @param __HANDLE__ specifies the UART Handle. 939 * @param __FLAG__ specifies the flag to check. 940 * This parameter can be one of the following values: 941 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag 942 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag 943 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag 944 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag 945 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 946 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 947 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 948 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 949 * @arg @ref UART_FLAG_SBKF Send Break flag 950 * @arg @ref UART_FLAG_CMF Character match flag 951 * @arg @ref UART_FLAG_BUSY Busy flag 952 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 953 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 954 * @arg @ref UART_FLAG_CTS CTS Change flag 955 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 956 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 957 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag 958 * @arg @ref UART_FLAG_TC Transmission Complete flag 959 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 960 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag 961 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag 962 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 963 * @arg @ref UART_FLAG_ORE Overrun Error flag 964 * @arg @ref UART_FLAG_NE Noise Error flag 965 * @arg @ref UART_FLAG_FE Framing Error flag 966 * @arg @ref UART_FLAG_PE Parity Error flag 967 * @retval The new state of __FLAG__ (TRUE or FALSE). 968 */ 969 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 970 971 /** @brief Enable the specified UART interrupt. 972 * @param __HANDLE__ specifies the UART Handle. 973 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 974 * This parameter can be one of the following values: 975 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 976 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 977 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 978 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 979 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 980 * @arg @ref UART_IT_CM Character match interrupt 981 * @arg @ref UART_IT_CTS CTS change interrupt 982 * @arg @ref UART_IT_LBD LIN Break detection interrupt 983 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 984 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 985 * @arg @ref UART_IT_TC Transmission complete interrupt 986 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 987 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 988 * @arg @ref UART_IT_RTO Receive Timeout interrupt 989 * @arg @ref UART_IT_IDLE Idle line detection interrupt 990 * @arg @ref UART_IT_PE Parity Error interrupt 991 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 992 * @retval None 993 */ 994 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (\ 995 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 996 ((__HANDLE__)->Instance->CR1 |= (1U <<\ 997 ((__INTERRUPT__) & UART_IT_MASK))): \ 998 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 999 ((__HANDLE__)->Instance->CR2 |= (1U <<\ 1000 ((__INTERRUPT__) & UART_IT_MASK))): \ 1001 ((__HANDLE__)->Instance->CR3 |= (1U <<\ 1002 ((__INTERRUPT__) & UART_IT_MASK)))) 1003 1004 /** @brief Disable the specified UART interrupt. 1005 * @param __HANDLE__ specifies the UART Handle. 1006 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 1007 * This parameter can be one of the following values: 1008 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1009 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1010 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1011 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1012 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1013 * @arg @ref UART_IT_CM Character match interrupt 1014 * @arg @ref UART_IT_CTS CTS change interrupt 1015 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1016 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1017 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1018 * @arg @ref UART_IT_TC Transmission complete interrupt 1019 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1020 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1021 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1022 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1023 * @arg @ref UART_IT_PE Parity Error interrupt 1024 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1025 * @retval None 1026 */ 1027 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1028 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1029 ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\ 1030 ((__INTERRUPT__) & UART_IT_MASK))): \ 1031 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1032 ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\ 1033 ((__INTERRUPT__) & UART_IT_MASK))): \ 1034 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\ 1035 ((__INTERRUPT__) & UART_IT_MASK)))) 1036 1037 /** @brief Check whether the specified UART interrupt has occurred or not. 1038 * @param __HANDLE__ specifies the UART Handle. 1039 * @param __INTERRUPT__ specifies the UART interrupt to check. 1040 * This parameter can be one of the following values: 1041 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1042 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1043 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1044 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1045 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1046 * @arg @ref UART_IT_CM Character match interrupt 1047 * @arg @ref UART_IT_CTS CTS change interrupt 1048 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1049 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1050 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1051 * @arg @ref UART_IT_TC Transmission complete interrupt 1052 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1053 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1054 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1055 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1056 * @arg @ref UART_IT_PE Parity Error interrupt 1057 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1058 * @retval The new state of __INTERRUPT__ (SET or RESET). 1059 */ 1060 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 1061 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 1062 1063 /** @brief Check whether the specified UART interrupt source is enabled or not. 1064 * @param __HANDLE__ specifies the UART Handle. 1065 * @param __INTERRUPT__ specifies the UART interrupt source to check. 1066 * This parameter can be one of the following values: 1067 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1068 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1069 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1070 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1071 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1072 * @arg @ref UART_IT_CM Character match interrupt 1073 * @arg @ref UART_IT_CTS CTS change interrupt 1074 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1075 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1076 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1077 * @arg @ref UART_IT_TC Transmission complete interrupt 1078 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1079 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1080 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1081 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1082 * @arg @ref UART_IT_PE Parity Error interrupt 1083 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1084 * @retval The new state of __INTERRUPT__ (SET or RESET). 1085 */ 1086 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\ 1087 (__HANDLE__)->Instance->CR1 : \ 1088 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\ 1089 (__HANDLE__)->Instance->CR2 : \ 1090 (__HANDLE__)->Instance->CR3)) & (1U <<\ 1091 (((uint16_t)(__INTERRUPT__)) &\ 1092 UART_IT_MASK))) != RESET) ? SET : RESET) 1093 1094 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1095 * @param __HANDLE__ specifies the UART Handle. 1096 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1097 * to clear the corresponding interrupt 1098 * This parameter can be one of the following values: 1099 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1100 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1101 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1102 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1103 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1104 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag 1105 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag 1106 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1107 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1108 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1109 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1110 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1111 * @retval None 1112 */ 1113 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1114 1115 /** @brief Set a specific UART request flag. 1116 * @param __HANDLE__ specifies the UART Handle. 1117 * @param __REQ__ specifies the request flag to set 1118 * This parameter can be one of the following values: 1119 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1120 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1121 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1122 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1123 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1124 * @retval None 1125 */ 1126 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 1127 1128 /** @brief Enable the UART one bit sample method. 1129 * @param __HANDLE__ specifies the UART Handle. 1130 * @retval None 1131 */ 1132 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1133 1134 /** @brief Disable the UART one bit sample method. 1135 * @param __HANDLE__ specifies the UART Handle. 1136 * @retval None 1137 */ 1138 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1139 1140 /** @brief Enable UART. 1141 * @param __HANDLE__ specifies the UART Handle. 1142 * @retval None 1143 */ 1144 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1145 1146 /** @brief Disable UART. 1147 * @param __HANDLE__ specifies the UART Handle. 1148 * @retval None 1149 */ 1150 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1151 1152 /** @brief Enable CTS flow control. 1153 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1154 * without need to call HAL_UART_Init() function. 1155 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1156 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1157 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1158 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1159 * - macro could only be called when corresponding UART instance is disabled 1160 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1161 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1162 * @param __HANDLE__ specifies the UART Handle. 1163 * @retval None 1164 */ 1165 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1166 do{ \ 1167 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1168 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1169 } while(0U) 1170 1171 /** @brief Disable CTS flow control. 1172 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1173 * without need to call HAL_UART_Init() function. 1174 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1175 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1176 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1177 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1178 * - macro could only be called when corresponding UART instance is disabled 1179 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1180 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1181 * @param __HANDLE__ specifies the UART Handle. 1182 * @retval None 1183 */ 1184 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1185 do{ \ 1186 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1187 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1188 } while(0U) 1189 1190 /** @brief Enable RTS flow control. 1191 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1192 * without need to call HAL_UART_Init() function. 1193 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1194 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1195 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1196 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1197 * - macro could only be called when corresponding UART instance is disabled 1198 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1199 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1200 * @param __HANDLE__ specifies the UART Handle. 1201 * @retval None 1202 */ 1203 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1204 do{ \ 1205 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1206 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1207 } while(0U) 1208 1209 /** @brief Disable RTS flow control. 1210 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1211 * without need to call HAL_UART_Init() function. 1212 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1213 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1214 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1215 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1216 * - macro could only be called when corresponding UART instance is disabled 1217 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1218 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1219 * @param __HANDLE__ specifies the UART Handle. 1220 * @retval None 1221 */ 1222 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1223 do{ \ 1224 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1225 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1226 } while(0U) 1227 /** 1228 * @} 1229 */ 1230 1231 /* Private macros --------------------------------------------------------*/ 1232 /** @defgroup UART_Private_Macros UART Private Macros 1233 * @{ 1234 */ 1235 /** @brief Get UART clok division factor from clock prescaler value. 1236 * @param __CLOCKPRESCALER__ UART prescaler value. 1237 * @retval UART clock division factor 1238 */ 1239 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 1240 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ 1241 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ 1242 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ 1243 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ 1244 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ 1245 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ 1246 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ 1247 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ 1248 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ 1249 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ 1250 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \ 1251 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U) 1252 1253 #if defined(LPUART1) 1254 /** @brief BRR division operation to set BRR register with LPUART. 1255 * @param __PCLK__ LPUART clock. 1256 * @param __BAUD__ Baud rate set by the user. 1257 * @param __CLOCKPRESCALER__ UART prescaler value. 1258 * @retval Division result 1259 */ 1260 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1261 ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)+ \ 1262 (uint32_t)((__BAUD__)/2U)) / (__BAUD__)) \ 1263 ) 1264 #endif /* LPUART1 */ 1265 1266 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1267 * @param __PCLK__ UART clock. 1268 * @param __BAUD__ Baud rate set by the user. 1269 * @param __CLOCKPRESCALER__ UART prescaler value. 1270 * @retval Division result 1271 */ 1272 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1273 (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1274 1275 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1276 * @param __PCLK__ UART clock. 1277 * @param __BAUD__ Baud rate set by the user. 1278 * @param __CLOCKPRESCALER__ UART prescaler value. 1279 * @retval Division result 1280 */ 1281 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1282 ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2U)) / (__BAUD__)) 1283 1284 #if defined(LPUART1) 1285 /** @brief Check whether or not UART instance is Low Power UART. 1286 * @param __HANDLE__ specifies the UART Handle. 1287 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 1288 */ 1289 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) 1290 #endif /* LPUART1 */ 1291 1292 /** @brief Check UART Baud rate. 1293 * @param __BAUDRATE__ Baudrate specified by the user. 1294 * The maximum Baud Rate is derived from the maximum clock on WB (i.e. 64 MHz) 1295 * divided by the smallest oversampling used on the USART (i.e. 8) 1296 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1297 */ 1298 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 8000001U) 1299 1300 /** @brief Check UART assertion time. 1301 * @param __TIME__ 5-bit value assertion time. 1302 * @retval Test result (TRUE or FALSE). 1303 */ 1304 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1305 1306 /** @brief Check UART deassertion time. 1307 * @param __TIME__ 5-bit value deassertion time. 1308 * @retval Test result (TRUE or FALSE). 1309 */ 1310 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1311 1312 /** 1313 * @brief Ensure that UART frame number of stop bits is valid. 1314 * @param __STOPBITS__ UART frame number of stop bits. 1315 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1316 */ 1317 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1318 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1319 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1320 ((__STOPBITS__) == UART_STOPBITS_2)) 1321 1322 #if defined(LPUART1) 1323 /** 1324 * @brief Ensure that LPUART frame number of stop bits is valid. 1325 * @param __STOPBITS__ LPUART frame number of stop bits. 1326 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1327 */ 1328 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 1329 ((__STOPBITS__) == UART_STOPBITS_2)) 1330 #endif /* LPUART1 */ 1331 1332 /** 1333 * @brief Ensure that UART frame parity is valid. 1334 * @param __PARITY__ UART frame parity. 1335 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1336 */ 1337 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1338 ((__PARITY__) == UART_PARITY_EVEN) || \ 1339 ((__PARITY__) == UART_PARITY_ODD)) 1340 1341 /** 1342 * @brief Ensure that UART hardware flow control is valid. 1343 * @param __CONTROL__ UART hardware flow control. 1344 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1345 */ 1346 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1347 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1348 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1349 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1350 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1351 1352 /** 1353 * @brief Ensure that UART communication mode is valid. 1354 * @param __MODE__ UART communication mode. 1355 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1356 */ 1357 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1358 1359 /** 1360 * @brief Ensure that UART state is valid. 1361 * @param __STATE__ UART state. 1362 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1363 */ 1364 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1365 ((__STATE__) == UART_STATE_ENABLE)) 1366 1367 /** 1368 * @brief Ensure that UART oversampling is valid. 1369 * @param __SAMPLING__ UART oversampling. 1370 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1371 */ 1372 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1373 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1374 1375 /** 1376 * @brief Ensure that UART frame sampling is valid. 1377 * @param __ONEBIT__ UART frame sampling. 1378 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1379 */ 1380 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1381 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1382 1383 /** 1384 * @brief Ensure that UART auto Baud rate detection mode is valid. 1385 * @param __MODE__ UART auto Baud rate detection mode. 1386 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1387 */ 1388 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1389 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1390 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1391 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1392 1393 /** 1394 * @brief Ensure that UART receiver timeout setting is valid. 1395 * @param __TIMEOUT__ UART receiver timeout setting. 1396 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1397 */ 1398 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1399 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1400 1401 /** @brief Check the receiver timeout value. 1402 * @note The maximum UART receiver timeout value is 0xFFFFFF. 1403 * @param __TIMEOUTVALUE__ receiver timeout value. 1404 * @retval Test result (TRUE or FALSE) 1405 */ 1406 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) 1407 1408 /** 1409 * @brief Ensure that UART LIN state is valid. 1410 * @param __LIN__ UART LIN state. 1411 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1412 */ 1413 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1414 ((__LIN__) == UART_LIN_ENABLE)) 1415 1416 /** 1417 * @brief Ensure that UART LIN break detection length is valid. 1418 * @param __LENGTH__ UART LIN break detection length. 1419 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1420 */ 1421 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1422 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1423 1424 /** 1425 * @brief Ensure that UART DMA TX state is valid. 1426 * @param __DMATX__ UART DMA TX state. 1427 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1428 */ 1429 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1430 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1431 1432 /** 1433 * @brief Ensure that UART DMA RX state is valid. 1434 * @param __DMARX__ UART DMA RX state. 1435 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1436 */ 1437 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1438 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1439 1440 /** 1441 * @brief Ensure that UART half-duplex state is valid. 1442 * @param __HDSEL__ UART half-duplex state. 1443 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1444 */ 1445 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1446 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1447 1448 /** 1449 * @brief Ensure that UART wake-up method is valid. 1450 * @param __WAKEUP__ UART wake-up method . 1451 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1452 */ 1453 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1454 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1455 1456 /** 1457 * @brief Ensure that UART request parameter is valid. 1458 * @param __PARAM__ UART request parameter. 1459 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1460 */ 1461 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1462 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1463 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1464 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1465 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1466 1467 /** 1468 * @brief Ensure that UART advanced features initialization is valid. 1469 * @param __INIT__ UART advanced features initialization. 1470 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1471 */ 1472 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1473 UART_ADVFEATURE_TXINVERT_INIT | \ 1474 UART_ADVFEATURE_RXINVERT_INIT | \ 1475 UART_ADVFEATURE_DATAINVERT_INIT | \ 1476 UART_ADVFEATURE_SWAP_INIT | \ 1477 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1478 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1479 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1480 UART_ADVFEATURE_MSBFIRST_INIT)) 1481 1482 /** 1483 * @brief Ensure that UART frame TX inversion setting is valid. 1484 * @param __TXINV__ UART frame TX inversion setting. 1485 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1486 */ 1487 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1488 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1489 1490 /** 1491 * @brief Ensure that UART frame RX inversion setting is valid. 1492 * @param __RXINV__ UART frame RX inversion setting. 1493 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1494 */ 1495 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1496 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1497 1498 /** 1499 * @brief Ensure that UART frame data inversion setting is valid. 1500 * @param __DATAINV__ UART frame data inversion setting. 1501 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1502 */ 1503 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1504 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1505 1506 /** 1507 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1508 * @param __SWAP__ UART frame RX/TX pins swap setting. 1509 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1510 */ 1511 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1512 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1513 1514 /** 1515 * @brief Ensure that UART frame overrun setting is valid. 1516 * @param __OVERRUN__ UART frame overrun setting. 1517 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1518 */ 1519 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1520 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1521 1522 /** 1523 * @brief Ensure that UART auto Baud rate state is valid. 1524 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1525 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1526 */ 1527 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \ 1528 UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1529 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1530 1531 /** 1532 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1533 * @param __DMA__ UART DMA enabling or disabling on error setting. 1534 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1535 */ 1536 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1537 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1538 1539 /** 1540 * @brief Ensure that UART frame MSB first setting is valid. 1541 * @param __MSBFIRST__ UART frame MSB first setting. 1542 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1543 */ 1544 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1545 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1546 1547 /** 1548 * @brief Ensure that UART stop mode state is valid. 1549 * @param __STOPMODE__ UART stop mode state. 1550 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1551 */ 1552 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1553 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1554 1555 /** 1556 * @brief Ensure that UART mute mode state is valid. 1557 * @param __MUTE__ UART mute mode state. 1558 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1559 */ 1560 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1561 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1562 1563 /** 1564 * @brief Ensure that UART wake-up selection is valid. 1565 * @param __WAKE__ UART wake-up selection. 1566 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1567 */ 1568 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1569 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1570 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1571 1572 /** 1573 * @brief Ensure that UART driver enable polarity is valid. 1574 * @param __POLARITY__ UART driver enable polarity. 1575 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1576 */ 1577 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1578 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1579 1580 /** 1581 * @brief Ensure that UART Prescaler is valid. 1582 * @param __CLOCKPRESCALER__ UART Prescaler value. 1583 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 1584 */ 1585 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ 1586 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ 1587 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ 1588 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ 1589 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ 1590 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ 1591 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ 1592 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ 1593 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ 1594 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ 1595 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ 1596 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) 1597 1598 /** 1599 * @} 1600 */ 1601 1602 /* Include UART HAL Extended module */ 1603 #include "stm32wbxx_hal_uart_ex.h" 1604 1605 /* Exported functions --------------------------------------------------------*/ 1606 /** @addtogroup UART_Exported_Functions UART Exported Functions 1607 * @{ 1608 */ 1609 1610 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1611 * @{ 1612 */ 1613 1614 /* Initialization and de-initialization functions ****************************/ 1615 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1616 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1617 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1618 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1619 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1620 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1621 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1622 1623 /* Callbacks Register/UnRegister functions ***********************************/ 1624 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1625 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, 1626 pUART_CallbackTypeDef pCallback); 1627 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1628 1629 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); 1630 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); 1631 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1632 1633 /** 1634 * @} 1635 */ 1636 1637 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1638 * @{ 1639 */ 1640 1641 /* IO operation functions *****************************************************/ 1642 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); 1643 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1644 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1645 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1646 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1647 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1648 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1649 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1650 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1651 /* Transfer Abort functions */ 1652 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1653 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1654 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1655 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1656 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1657 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1658 1659 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1660 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1661 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1662 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1663 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1664 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1665 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1666 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1667 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1668 1669 void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); 1670 1671 /** 1672 * @} 1673 */ 1674 1675 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1676 * @{ 1677 */ 1678 1679 /* Peripheral Control functions ************************************************/ 1680 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); 1681 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); 1682 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); 1683 1684 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1685 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1686 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1687 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1688 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1689 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1690 1691 /** 1692 * @} 1693 */ 1694 1695 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1696 * @{ 1697 */ 1698 1699 /* Peripheral State and Errors functions **************************************************/ 1700 HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart); 1701 uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart); 1702 1703 /** 1704 * @} 1705 */ 1706 1707 /** 1708 * @} 1709 */ 1710 1711 /* Private functions -----------------------------------------------------------*/ 1712 /** @addtogroup UART_Private_Functions UART Private Functions 1713 * @{ 1714 */ 1715 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1716 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 1717 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1718 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1719 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1720 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, 1721 uint32_t Tickstart, uint32_t Timeout); 1722 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1723 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1724 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1725 1726 /** 1727 * @} 1728 */ 1729 1730 /* Private variables -----------------------------------------------------------*/ 1731 /** @defgroup UART_Private_variables UART Private variables 1732 * @{ 1733 */ 1734 /* Prescaler Table used in BRR computation macros. 1735 Declared as extern here to allow use of private UART macros, outside of HAL UART functions */ 1736 extern const uint16_t UARTPrescTable[12]; 1737 /** 1738 * @} 1739 */ 1740 1741 /** 1742 * @} 1743 */ 1744 1745 /** 1746 * @} 1747 */ 1748 1749 #ifdef __cplusplus 1750 } 1751 #endif 1752 1753 #endif /* STM32WBxx_HAL_UART_H */ 1754 1755
