1 /** 2 ****************************************************************************** 3 * @file stm32wbxx_hal_pwr.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32WBxx_HAL_PWR_H 21 #define STM32WBxx_HAL_PWR_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32wbxx_hal_def.h" 29 30 /* Include low level driver */ 31 #include "stm32wbxx_ll_pwr.h" 32 #include "stm32wbxx_ll_exti.h" 33 34 /** @addtogroup STM32WBxx_HAL_Driver 35 * @{ 36 */ 37 38 /** @defgroup PWR PWR 39 * @brief PWR HAL module driver 40 * @{ 41 */ 42 43 /* Exported types ------------------------------------------------------------*/ 44 /** @defgroup PWR_Exported_Types PWR Exported Types 45 * @{ 46 */ 47 48 /** 49 * @brief PWR PVD configuration structure definition 50 */ 51 typedef struct 52 { 53 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. 54 This parameter can be a value of @ref PWR_PVD_detection_level. */ 55 56 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 57 This parameter can be a value of @ref PWR_PVD_Mode. */ 58 } PWR_PVDTypeDef; 59 60 /** 61 * @} 62 */ 63 64 /* Exported constants --------------------------------------------------------*/ 65 /** @defgroup PWR_Exported_Constants PWR Exported Constants 66 * @{ 67 */ 68 69 /** @defgroup PWR_PVD_detection_level Power Voltage Detector Level selection 70 * @note Refer datasheet for selection voltage value 71 * @{ 72 */ 73 #define PWR_PVDLEVEL_0 (0x00000000U) /*!< PVD threshold around 2.0 V */ 74 #define PWR_PVDLEVEL_1 ( PWR_CR2_PLS_0) /*!< PVD threshold around 2.2 V */ 75 #define PWR_PVDLEVEL_2 ( PWR_CR2_PLS_1 ) /*!< PVD threshold around 2.4 V */ 76 #define PWR_PVDLEVEL_3 ( PWR_CR2_PLS_1 | PWR_CR2_PLS_0) /*!< PVD threshold around 2.5 V */ 77 #define PWR_PVDLEVEL_4 (PWR_CR2_PLS_2 ) /*!< PVD threshold around 2.6 V */ 78 #define PWR_PVDLEVEL_5 (PWR_CR2_PLS_2 | PWR_CR2_PLS_0) /*!< PVD threshold around 2.8 V */ 79 #define PWR_PVDLEVEL_6 (PWR_CR2_PLS_2 | PWR_CR2_PLS_1 ) /*!< PVD threshold around 2.9 V */ 80 #define PWR_PVDLEVEL_7 (PWR_CR2_PLS_2 | PWR_CR2_PLS_1 | PWR_CR2_PLS_0) /*!< External input analog voltage (compared internally to VREFINT) */ 81 /** 82 * @} 83 */ 84 85 /** @defgroup PWR_PVD_Mode PWR PVD interrupt and event mode 86 * @{ 87 */ 88 /* Note: On STM32WB series, power PVD event is not available on AIEC lines */ 89 /* (only interruption is available through AIEC line 16). */ 90 #define PWR_PVD_MODE_NORMAL (0x00000000U) /*!< Basic mode is used */ 91 92 #define PWR_PVD_MODE_IT_RISING (PVD_MODE_IT | PVD_RISING_EDGE) /*!< External Interrupt Mode with Rising edge trigger detection */ 93 #define PWR_PVD_MODE_IT_FALLING (PVD_MODE_IT | PVD_FALLING_EDGE) /*!< External Interrupt Mode with Falling edge trigger detection */ 94 #define PWR_PVD_MODE_IT_RISING_FALLING (PVD_MODE_IT | PVD_RISING_FALLING_EDGE) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 95 /** 96 * @} 97 */ 98 99 /* Note: On STM32WB series, power PVD event is not available on AIEC lines */ 100 /* (only interruption is available through AIEC line 16). */ 101 102 /** @defgroup PWR_Low_Power_Mode_Selection PWR Low Power Mode Selection 103 * @{ 104 */ 105 #define PWR_LOWPOWERMODE_STOP0 (0x00000000u) /*!< Stop 0: stop mode with main regulator */ 106 #define PWR_LOWPOWERMODE_STOP1 (PWR_CR1_LPMS_0) /*!< Stop 1: stop mode with low power regulator */ 107 #if defined(PWR_SUPPORT_STOP2) 108 #define PWR_LOWPOWERMODE_STOP2 (PWR_CR1_LPMS_1) /*!< Stop 2: stop mode with low power regulator and VDD12I interruptible digital core domain supply OFF (less peripherals activated than low power mode stop 1 to reduce power consumption)*/ 109 #endif /* PWR_SUPPORT_STOP2 */ 110 #define PWR_LOWPOWERMODE_STANDBY (PWR_CR1_LPMS_0 | PWR_CR1_LPMS_1) /*!< Standby mode */ 111 #define PWR_LOWPOWERMODE_SHUTDOWN (PWR_CR1_LPMS_2) /*!< Shutdown mode */ 112 /** 113 * @} 114 */ 115 116 /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR regulator mode 117 * @{ 118 */ 119 #define PWR_MAINREGULATOR_ON (0x00000000U) /*!< Regulator in main mode */ 120 #define PWR_LOWPOWERREGULATOR_ON (PWR_CR1_LPR) /*!< Regulator in low-power mode */ 121 /** 122 * @} 123 */ 124 125 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 126 * @{ 127 */ 128 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Sleep mode */ 129 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Sleep mode */ 130 /** 131 * @} 132 */ 133 134 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 135 * @{ 136 */ 137 #define PWR_STOPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Stop mode */ 138 #define PWR_STOPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Stop mode */ 139 /** 140 * @} 141 */ 142 143 /** 144 * @} 145 */ 146 147 /* Private define ------------------------------------------------------------*/ 148 /** @defgroup PWR_Private_Defines PWR Private Defines 149 * @{ 150 */ 151 152 /** @defgroup PWR_PVD_EXTI_LINE PWR PVD external interrupt line 153 * @{ 154 */ 155 #define PWR_EXTI_LINE_PVD (LL_EXTI_LINE_16) /*!< External interrupt line 16 Connected to the PWR PVD */ 156 /** 157 * @} 158 */ 159 160 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask 161 * @{ 162 */ 163 /* Note: On STM32WB series, power PVD event is not available on AIEC lines */ 164 /* (only interruption is available through AIEC line 16). */ 165 #define PVD_MODE_IT (0x00010000U) /*!< Mask for interruption yielded by PVD threshold crossing */ 166 #define PVD_RISING_EDGE (0x00000001U) /*!< Mask for rising edge set as PVD trigger */ 167 #define PVD_FALLING_EDGE (0x00000002U) /*!< Mask for falling edge set as PVD trigger */ 168 #define PVD_RISING_FALLING_EDGE (0x00000003U) /*!< Mask for rising and falling edges set as PVD trigger */ 169 /** 170 * @} 171 */ 172 173 /** 174 * @} 175 */ 176 177 /* Exported macros -----------------------------------------------------------*/ 178 /** @defgroup PWR_Exported_Macros PWR Exported Macros 179 * @{ 180 */ 181 /** @brief Check whether or not a specific PWR flag is set. 182 * @param __FLAG__ specifies the flag to check. 183 * This parameter can be one of the following values: 184 * 185 * /--------------------------------SR1-------------------------------/ 186 * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event 187 * was received from the WKUP pin 1. 188 * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event 189 * was received from the WKUP pin 2. 190 * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event 191 * was received from the WKUP pin 3. 192 * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event 193 * was received from the WKUP pin 4. 194 * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event 195 * was received from the WKUP pin 5. 196 * 197 * @arg @ref PWR_FLAG_BHWF BLE_Host WakeUp Flag 198 * @arg @ref PWR_FLAG_FRCBYPI SMPS Forced in Bypass Interrupt Flag 199 * @arg @ref PWR_FLAG_RFPHASEI Radio Phase Interrupt Flag 200 * @arg @ref PWR_FLAG_BLEACTI BLE Activity Interrupt Flag 201 * @arg @ref PWR_FLAG_802ACTI 802.15.4 Activity Interrupt Flag 202 * @arg @ref PWR_FLAG_HOLDC2I CPU2 on-Hold Interrupt Flag 203 * @arg @ref PWR_FLAG_WUFI Wake-Up Flag Internal. Set when a wakeup is detected on 204 * the internal wakeup line. 205 * 206 * @arg @ref PWR_FLAG_SMPSRDYF SMPS Ready Flag 207 * @arg @ref PWR_FLAG_SMPSBYPF SMPS Bypass Flag 208 * 209 * /--------------------------------SR2-------------------------------/ 210 * @arg @ref PWR_FLAG_REGLPS Low Power Regulator Started. Indicates whether or not the 211 * low-power regulator is ready. 212 * @arg @ref PWR_FLAG_REGLPF Low Power Regulator Flag. Indicates whether the 213 * regulator is ready in main mode or is in low-power mode. 214 * 215 * @arg @ref PWR_FLAG_VOSF Voltage Scaling Flag. Indicates whether the regulator is ready 216 * in the selected voltage range or is still changing to the required voltage level. 217 * @arg @ref PWR_FLAG_PVDO Power Voltage Detector Output. Indicates whether VDD voltage is 218 * below or above the selected PVD threshold. 219 * 220 * @arg @ref PWR_FLAG_PVMO1 Peripheral Voltage Monitoring Output 1. Indicates whether VDDUSB voltage is 221 * is below or above PVM1 threshold (applicable when USB feature is supported). 222 * @arg @ref PWR_FLAG_PVMO3 Peripheral Voltage Monitoring Output 3. Indicates whether VDDA voltage is 223 * is below or above PVM3 threshold. 224 * 225 * /----------------------------EXTSCR--------------------------/ 226 * @arg @ref PWR_FLAG_STOP System Stop Flag for CPU1. 227 * @arg @ref PWR_FLAG_SB System Standby Flag for CPU1. 228 * 229 * @arg @ref PWR_FLAG_C2STOP System Stop Flag for CPU2. 230 * @arg @ref PWR_FLAG_C2SB System Standby Flag for CPU2. 231 * 232 * @arg @ref PWR_FLAG_CRITICAL_RF_PHASE Critical radio system phase flag. 233 * 234 * @arg @ref PWR_FLAG_C1DEEPSLEEP CPU1 DeepSleep Flag. 235 * @arg @ref PWR_FLAG_C2DEEPSLEEP CPU2 DeepSleep Flag. 236 * 237 * @retval The new state of __FLAG__ (TRUE or FALSE). 238 */ 239 #define __HAL_PWR_GET_FLAG(__FLAG__) ((((__FLAG__) & PWR_FLAG_REG_MASK) == PWR_FLAG_REG_SR1) ? \ 240 ( \ 241 PWR->SR1 & (1UL << ((__FLAG__) & 31UL)) \ 242 ) \ 243 : \ 244 ( \ 245 (((__FLAG__) & PWR_FLAG_REG_MASK) == PWR_FLAG_REG_SR2) ? \ 246 ( \ 247 PWR->SR2 & (1UL << ((__FLAG__) & 31UL)) \ 248 ) \ 249 : \ 250 ( \ 251 PWR->EXTSCR & (1UL << ((__FLAG__) & 31UL)) \ 252 ) \ 253 ) \ 254 ) 255 256 /** @brief Clear a specific PWR flag. 257 * @note Clearing of flags {PWR_FLAG_STOP, PWR_FLAG_SB} 258 * and flags {PWR_FLAG_C2STOP, PWR_FLAG_C2SB} are grouped: 259 * clearing of one flag also clears the other one. 260 * @param __FLAG__ specifies the flag to clear. 261 * This parameter can be one of the following values: 262 * 263 * /--------------------------------SCR (SRR)------------------------------/ 264 * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event 265 * was received from the WKUP pin 1. 266 * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event 267 * was received from the WKUP pin 2. 268 * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event 269 * was received from the WKUP pin 3. 270 * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event 271 * was received from the WKUP pin 4. 272 * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event 273 * was received from the WKUP pin 5. 274 * @arg @ref PWR_FLAG_WU Encompasses all five Wake Up Flags. 275 * 276 * @arg @ref PWR_FLAG_BHWF Clear BLE_Host Wakeup Flag. 277 * @arg @ref PWR_FLAG_FRCBYPI Clear SMPS Forced in Bypass Interrupt Flag. 278 * @arg @ref PWR_FLAG_RFPHASEI RF Phase Interrupt Clear. 279 * @arg @ref PWR_FLAG_BLEACTI BLE Activity Interrupt Clear. 280 * @arg @ref PWR_FLAG_802ACTI 802.15.4. Activity Interrupt Clear. 281 * @arg @ref PWR_FLAG_HOLDC2I CPU2 on-Hold Interrupt Clear. 282 * 283 * /----------------------------EXTSCR--------------------------/ 284 * @arg @ref PWR_FLAG_STOP System Stop Flag for CPU1. 285 * @arg @ref PWR_FLAG_SB System Standby Flag for CPU1. 286 * 287 * @arg @ref PWR_FLAG_C2STOP System Stop Flag for CPU2. 288 * @arg @ref PWR_FLAG_C2SB System Standby Flag for CPU2. 289 * 290 * @arg @ref PWR_FLAG_CRITICAL_RF_PHASE RF phase Flag. 291 * 292 * @retval None 293 */ 294 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) ((((__FLAG__) & PWR_FLAG_REG_MASK) == PWR_FLAG_REG_EXTSCR) ? \ 295 ( \ 296 PWR->EXTSCR = (1UL << (((__FLAG__) & PWR_FLAG_EXTSCR_CLR_MASK) >> PWR_FLAG_EXTSCR_CLR_POS)) \ 297 ) \ 298 : \ 299 ( \ 300 (((__FLAG__)) == PWR_FLAG_WU) ? \ 301 (PWR->SCR = PWR_SCR_CWUF) : \ 302 (PWR->SCR = (1UL << ((__FLAG__) & 31UL))) \ 303 ) \ 304 ) 305 306 /** 307 * @brief Enable the PVD Extended Interrupt C1 Line. 308 * @retval None 309 */ 310 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() LL_EXTI_EnableIT_0_31(PWR_EXTI_LINE_PVD) 311 312 /** 313 * @brief Enable the PVD Extended Interrupt C2 Line. 314 * @retval None 315 */ 316 #define __HAL_PWR_PVD_EXTIC2_ENABLE_IT() LL_C2_EXTI_EnableIT_0_31(PWR_EXTI_LINE_PVD) 317 318 319 /** 320 * @brief Disable the PVD Extended Interrupt C1 Line. 321 * @retval None 322 */ 323 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() LL_EXTI_DisableIT_0_31(PWR_EXTI_LINE_PVD) 324 325 /** 326 * @brief Disable the PVD Extended Interrupt C2 Line. 327 * @retval None 328 */ 329 #define __HAL_PWR_PVD_EXTIC2_DISABLE_IT() LL_C2_EXTI_DisableIT_0_31(PWR_EXTI_LINE_PVD) 330 331 /* Note: On STM32WB series, power PVD event is not available on AIEC lines */ 332 /* (only interruption is available through AIEC line 16). */ 333 334 /** 335 * @brief Enable the PVD Extended Interrupt Rising Trigger. 336 * @note PVD flag polarity is inverted compared to EXTI line, therefore 337 * EXTI rising and falling logic edges are inverted versus PVD voltage edges. 338 * @retval None 339 */ 340 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() LL_EXTI_EnableRisingTrig_0_31(PWR_EXTI_LINE_PVD) 341 342 /** 343 * @brief Disable the PVD Extended Interrupt Rising Trigger. 344 * @note PVD flag polarity is inverted compared to EXTI line, therefore 345 * EXTI rising and falling logic edges are inverted versus PVD voltage edges. 346 * @retval None 347 */ 348 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() LL_EXTI_DisableFallingTrig_0_31(PWR_EXTI_LINE_PVD) 349 350 /** 351 * @brief Enable the PVD Extended Interrupt Falling Trigger. 352 * @note PVD flag polarity is inverted compared to EXTI line, therefore 353 * EXTI rising and falling logic edges are inverted versus PVD voltage edges. 354 * @retval None 355 */ 356 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() LL_EXTI_EnableFallingTrig_0_31(PWR_EXTI_LINE_PVD) 357 358 359 /** 360 * @brief Disable the PVD Extended Interrupt Falling Trigger. 361 * @note PVD flag polarity is inverted compared to EXTI line, therefore 362 * EXTI rising and falling logic edges are inverted versus PVD voltage edges. 363 * @retval None 364 */ 365 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() LL_EXTI_DisableRisingTrig_0_31(PWR_EXTI_LINE_PVD) 366 367 368 /** 369 * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger. 370 * @retval None 371 */ 372 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ 373 do { \ 374 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \ 375 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \ 376 } while(0) 377 378 /** 379 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 380 * @retval None 381 */ 382 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ 383 do { \ 384 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \ 385 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \ 386 } while(0) 387 388 /** 389 * @brief Generate a Software interrupt on selected EXTI line. 390 * @retval None 391 */ 392 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() LL_EXTI_GenerateSWI_0_31(PWR_EXTI_LINE_PVD) 393 394 /** 395 * @brief Check whether or not the PVD EXTI interrupt flag is set. 396 * @retval EXTI PVD Line Status. 397 */ 398 #define __HAL_PWR_PVD_EXTI_GET_FLAG() LL_EXTI_ReadFlag_0_31(PWR_EXTI_LINE_PVD) 399 400 /** 401 * @brief Clear the PVD EXTI interrupt flag. 402 * @retval None 403 */ 404 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() LL_EXTI_ClearFlag_0_31(PWR_EXTI_LINE_PVD) 405 406 /** 407 * @} 408 */ 409 410 411 /* Private macros --------------------------------------------------------*/ 412 /** @defgroup PWR_Private_Macros PWR Private Macros 413 * @{ 414 */ 415 416 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ 417 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ 418 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ 419 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 420 421 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) ||\ 422 ((MODE) == PWR_PVD_MODE_IT_RISING) ||\ 423 ((MODE) == PWR_PVD_MODE_IT_FALLING) ||\ 424 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING)) 425 426 427 428 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 429 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 430 431 432 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || \ 433 ((ENTRY) == PWR_SLEEPENTRY_WFE)) 434 435 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || \ 436 ((ENTRY) == PWR_STOPENTRY_WFE)) 437 /** 438 * @} 439 */ 440 441 /* Include PWR HAL Extended module */ 442 #include "stm32wbxx_hal_pwr_ex.h" 443 444 /* Exported functions --------------------------------------------------------*/ 445 /** @defgroup PWR_Exported_Functions PWR Exported Functions 446 * @{ 447 */ 448 449 /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 450 * @{ 451 */ 452 453 /* Initialization and de-initialization functions *******************************/ 454 void HAL_PWR_DeInit(void); 455 456 void HAL_PWR_EnableBkUpAccess(void); 457 void HAL_PWR_DisableBkUpAccess(void); 458 /** 459 * @} 460 */ 461 462 /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions 463 * @{ 464 */ 465 /* Peripheral Control functions ************************************************/ 466 HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); 467 void HAL_PWR_EnablePVD(void); 468 void HAL_PWR_DisablePVD(void); 469 470 /* WakeUp pins configuration functions ****************************************/ 471 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity); 472 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 473 474 /* Low Power modes configuration functions ************************************/ 475 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 476 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 477 void HAL_PWR_EnterSTANDBYMode(void); 478 479 void HAL_PWR_PVDCallback(void); 480 void HAL_PWR_EnableSleepOnExit(void); 481 void HAL_PWR_DisableSleepOnExit(void); 482 483 void HAL_PWR_EnableSEVOnPend(void); 484 void HAL_PWR_DisableSEVOnPend(void); 485 486 487 /** 488 * @} 489 */ 490 491 /** 492 * @} 493 */ 494 495 /** 496 * @} 497 */ 498 499 /** 500 * @} 501 */ 502 503 /** 504 * @} 505 */ 506 507 #ifdef __cplusplus 508 } 509 #endif 510 511 512 #endif /* STM32WBxx_HAL_PWR_H */ 513 514
