1 /** 2 ****************************************************************************** 3 * @file stm32wbxx_hal_hsem.h 4 * @author MCD Application Team 5 * @brief Header file of HSEM HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32WBxx_HAL_HSEM_H 21 #define STM32WBxx_HAL_HSEM_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32wbxx_hal_def.h" 29 30 /** @addtogroup STM32WBxx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup HSEM 35 * @{ 36 */ 37 38 /* Exported macro ------------------------------------------------------------*/ 39 /** @defgroup HSEM_Exported_Macros HSEM Exported Macros 40 * @{ 41 */ 42 43 /** 44 * @brief SemID to mask helper Macro. 45 * @param __SEMID__: semaphore ID from 0 to 31 46 * @retval Semaphore Mask. 47 */ 48 #define __HAL_HSEM_SEMID_TO_MASK(__SEMID__) (1 << (__SEMID__)) 49 50 /** 51 * @brief Enables the specified HSEM interrupts. 52 * @param __SEM_MASK__: semaphores Mask 53 * @retval None. 54 */ 55 #if defined(DUAL_CORE) 56 #define __HAL_HSEM_ENABLE_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \ 57 (HSEM->C1IER |= (__SEM_MASK__)) : \ 58 (HSEM->C2IER |= (__SEM_MASK__))) 59 #else 60 #define __HAL_HSEM_ENABLE_IT(__SEM_MASK__) (HSEM->IER |= (__SEM_MASK__)) 61 #endif /* DUAL_CORE */ 62 /** 63 * @brief Disables the specified HSEM interrupts. 64 * @param __SEM_MASK__: semaphores Mask 65 * @retval None. 66 */ 67 #if defined(DUAL_CORE) 68 #define __HAL_HSEM_DISABLE_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \ 69 (HSEM->C1IER &= ~(__SEM_MASK__)) : \ 70 (HSEM->C2IER &= ~(__SEM_MASK__))) 71 #else 72 #define __HAL_HSEM_DISABLE_IT(__SEM_MASK__) (HSEM->IER &= ~(__SEM_MASK__)) 73 #endif /* DUAL_CORE */ 74 75 /** 76 * @brief Checks whether interrupt has occurred or not for semaphores specified by a mask. 77 * @param __SEM_MASK__: semaphores Mask 78 * @retval semaphores Mask : Semaphores where an interrupt occurred. 79 */ 80 #if defined(DUAL_CORE) 81 #define __HAL_HSEM_GET_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \ 82 ((__SEM_MASK__) & HSEM->C1MISR) : \ 83 ((__SEM_MASK__) & HSEM->C2MISR1)) 84 #else 85 #define __HAL_HSEM_GET_IT(__SEM_MASK__) ((__SEM_MASK__) & HSEM->MISR) 86 #endif /* DUAL_CORE */ 87 88 /** 89 * @brief Get the semaphores release status flags. 90 * @param __SEM_MASK__: semaphores Mask 91 * @retval semaphores Mask : Semaphores where Release flags rise. 92 */ 93 #if defined(DUAL_CORE) 94 #define __HAL_HSEM_GET_FLAG(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \ 95 (__SEM_MASK__) & HSEM->C1ISR : \ 96 (__SEM_MASK__) & HSEM->C2ISR) 97 #else 98 #define __HAL_HSEM_GET_FLAG(__SEM_MASK__) ((__SEM_MASK__) & HSEM->ISR) 99 #endif /* DUAL_CORE */ 100 101 /** 102 * @brief Clears the HSEM Interrupt flags. 103 * @param __SEM_MASK__: semaphores Mask 104 * @retval None. 105 */ 106 #if defined(DUAL_CORE) 107 #define __HAL_HSEM_CLEAR_FLAG(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \ 108 (HSEM->C1ICR |= (__SEM_MASK__)) : \ 109 (HSEM->C2ICR |= (__SEM_MASK__))) 110 #else 111 #define __HAL_HSEM_CLEAR_FLAG(__SEM_MASK__) (HSEM->ICR |= (__SEM_MASK__)) 112 #endif /* DUAL_CORE */ 113 114 /** 115 * @} 116 */ 117 118 /* Exported functions --------------------------------------------------------*/ 119 /** @defgroup HSEM_Exported_Functions HSEM Exported Functions 120 * @{ 121 */ 122 123 /** @addtogroup HSEM_Exported_Functions_Group1 Take and Release functions 124 * @brief HSEM Take and Release functions 125 * @{ 126 */ 127 128 /* HSEM semaphore take (lock) using 2-Step method ****************************/ 129 HAL_StatusTypeDef HAL_HSEM_Take(uint32_t SemID, uint32_t ProcessID); 130 /* HSEM semaphore fast take (lock) using 1-Step method ***********************/ 131 HAL_StatusTypeDef HAL_HSEM_FastTake(uint32_t SemID); 132 /* HSEM Release **************************************************************/ 133 void HAL_HSEM_Release(uint32_t SemID, uint32_t ProcessID); 134 /* HSEM Release All************************************************************/ 135 void HAL_HSEM_ReleaseAll(uint32_t Key, uint32_t CoreID); 136 /* HSEM Check semaphore state Taken or not **********************************/ 137 uint32_t HAL_HSEM_IsSemTaken(uint32_t SemID); 138 139 /** 140 * @} 141 */ 142 143 /** @addtogroup HSEM_Exported_Functions_Group2 HSEM Set and Get Key functions 144 * @brief HSEM Set and Get Key functions. 145 * @{ 146 */ 147 /* HSEM Set Clear Key *********************************************************/ 148 void HAL_HSEM_SetClearKey(uint32_t Key); 149 /* HSEM Get Clear Key *********************************************************/ 150 uint32_t HAL_HSEM_GetClearKey(void); 151 /** 152 * @} 153 */ 154 155 /** @addtogroup HSEM_Exported_Functions_Group3 156 * @brief HSEM Notification functions 157 * @{ 158 */ 159 /* HSEM Activate HSEM Notification (When a semaphore is released) ) *****************/ 160 void HAL_HSEM_ActivateNotification(uint32_t SemMask); 161 /* HSEM Deactivate HSEM Notification (When a semaphore is released) ****************/ 162 void HAL_HSEM_DeactivateNotification(uint32_t SemMask); 163 /* HSEM Free Callback (When a semaphore is released) *******************************/ 164 void HAL_HSEM_FreeCallback(uint32_t SemMask); 165 /* HSEM IRQ Handler **********************************************************/ 166 void HAL_HSEM_IRQHandler(void); 167 168 /** 169 * @} 170 */ 171 172 /** 173 * @} 174 */ 175 176 /* Private macros ------------------------------------------------------------*/ 177 /** @defgroup HSEM_Private_Macros HSEM Private Macros 178 * @{ 179 */ 180 181 #define IS_HSEM_SEMID(__SEMID__) ((__SEMID__) <= HSEM_SEMID_MAX ) 182 183 #define IS_HSEM_PROCESSID(__PROCESSID__) ((__PROCESSID__) <= HSEM_PROCESSID_MAX ) 184 185 #define IS_HSEM_KEY(__KEY__) ((__KEY__) <= HSEM_CLEAR_KEY_MAX ) 186 187 #define IS_HSEM_COREID(__COREID__) (((__COREID__) == HSEM_CPU1_COREID) || \ 188 ((__COREID__) == HSEM_CPU2_COREID)) 189 190 191 /** 192 * @} 193 */ 194 195 /** 196 * @} 197 */ 198 199 /** 200 * @} 201 */ 202 203 #ifdef __cplusplus 204 } 205 #endif 206 207 #endif /* STM32WBxx_HAL_HSEM_H */ 208
