1 /**
2   ******************************************************************************
3   * @file    stm32wbaxx_ll_icache.c
4   * @author  MCD Application Team
5   * @brief   ICACHE LL module driver.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2022 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 #if defined(USE_FULL_LL_DRIVER)
19 
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32wbaxx_ll_icache.h"
22 #ifdef  USE_FULL_ASSERT
23 #include "stm32_assert.h"
24 #else
25 #define assert_param(expr) ((void)0U)
26 #endif /* USE_FULL_ASSERT */
27 
28 /** @addtogroup STM32WBAxx_LL_Driver
29   * @{
30   */
31 
32 #if defined(ICACHE)
33 
34 /** @defgroup ICACHE_LL ICACHE
35   * @{
36   */
37 
38 /* Private types -------------------------------------------------------------*/
39 /* Private variables ---------------------------------------------------------*/
40 /* Private constants ---------------------------------------------------------*/
41 /* Private macros ------------------------------------------------------------*/
42 /** @defgroup ICACHE_LL_Private_Macros ICACHE Private Macros
43   * @{
44   */
45 
46 #define IS_LL_ICACHE_REGION(__VALUE__)    (((__VALUE__) == LL_ICACHE_REGION_0) || \
47                                            ((__VALUE__) == LL_ICACHE_REGION_1) || \
48                                            ((__VALUE__) == LL_ICACHE_REGION_2) || \
49                                            ((__VALUE__) == LL_ICACHE_REGION_3))
50 
51 #define IS_LL_ICACHE_REGION_SIZE(__VALUE__) (((__VALUE__) == LL_ICACHE_REGIONSIZE_2MB)  || \
52                                              ((__VALUE__) == LL_ICACHE_REGIONSIZE_4MB)  || \
53                                              ((__VALUE__) == LL_ICACHE_REGIONSIZE_8MB)  || \
54                                              ((__VALUE__) == LL_ICACHE_REGIONSIZE_16MB) || \
55                                              ((__VALUE__) == LL_ICACHE_REGIONSIZE_32MB) || \
56                                              ((__VALUE__) == LL_ICACHE_REGIONSIZE_64MB) || \
57                                              ((__VALUE__) == LL_ICACHE_REGIONSIZE_128MB))
58 
59 #define IS_LL_ICACHE_MASTER_PORT(__VALUE__) (((__VALUE__) == LL_ICACHE_MASTER1_PORT) || \
60                                              ((__VALUE__) == LL_ICACHE_MASTER2_PORT))
61 
62 #define IS_LL_ICACHE_OUTPUT_BURST(__VALUE__) (((__VALUE__) == LL_ICACHE_OUTPUT_BURST_WRAP) || \
63                                               ((__VALUE__) == LL_ICACHE_OUTPUT_BURST_INCR))
64 
65 /**
66   * @}
67   */
68 
69 /* Private function prototypes -----------------------------------------------*/
70 
71 /* Exported functions --------------------------------------------------------*/
72 /** @addtogroup ICACHE_LL_Exported_Functions
73   * @{
74   */
75 
76 /** @addtogroup ICACHE_LL_EF_REGION_Init
77   * @{
78   */
79 
80 /**
81   * @brief  Configure and enable the memory remapped region.
82   * @note   The Instruction Cache and corresponding region must be disabled.
83   * @param  Region This parameter can be one of the following values:
84   *         @arg @ref LL_ICACHE_REGION_0
85   *         @arg @ref LL_ICACHE_REGION_1
86   *         @arg @ref LL_ICACHE_REGION_2
87   *         @arg @ref LL_ICACHE_REGION_3
88   * @param  pICACHE_RegionStruct pointer to a @ref LL_ICACHE_RegionTypeDef structure.
89   * @retval None
90   */
LL_ICACHE_ConfigRegion(uint32_t Region,const LL_ICACHE_RegionTypeDef * const pICACHE_RegionStruct)91 void LL_ICACHE_ConfigRegion(uint32_t Region, const LL_ICACHE_RegionTypeDef *const pICACHE_RegionStruct)
92 {
93   __IO uint32_t *p_reg;
94   uint32_t value;
95 
96   /* Check the parameters */
97   assert_param(IS_LL_ICACHE_REGION(Region));
98   assert_param(IS_LL_ICACHE_REGION_SIZE(pICACHE_RegionStruct->Size));
99   assert_param(IS_LL_ICACHE_MASTER_PORT(pICACHE_RegionStruct->TrafficRoute));
100   assert_param(IS_LL_ICACHE_OUTPUT_BURST(pICACHE_RegionStruct->OutputBurstType));
101 
102   /* Get region control register address */
103   p_reg = &(ICACHE->CRR0) + (1U * Region);
104 
105   /* Region 2MB:   BaseAddress size 8 bits, RemapAddress size 11 bits */
106   /* Region 4MB:   BaseAddress size 7 bits, RemapAddress size 10 bits */
107   /* Region 8MB:   BaseAddress size 6 bits, RemapAddress size 9 bits  */
108   /* Region 16MB:  BaseAddress size 5 bits, RemapAddress size 8 bits  */
109   /* Region 32MB:  BaseAddress size 4 bits, RemapAddress size 7 bits  */
110   /* Region 64MB:  BaseAddress size 3 bits, RemapAddress size 6 bits  */
111   /* Region 128MB: BaseAddress size 2 bits, RemapAddress size 5 bits  */
112   value  = ((pICACHE_RegionStruct->BaseAddress & 0x1FFFFFFFU) >> 21U) & \
113            (0xFFU & ~(pICACHE_RegionStruct->Size - 1U));
114   value |= ((pICACHE_RegionStruct->RemapAddress >> 5U) & \
115             ((uint32_t)(0x7FFU & ~(pICACHE_RegionStruct->Size - 1U)) << ICACHE_CRRx_REMAPADDR_Pos));
116   value |= (pICACHE_RegionStruct->Size << ICACHE_CRRx_RSIZE_Pos) | pICACHE_RegionStruct->TrafficRoute | \
117            pICACHE_RegionStruct->OutputBurstType;
118   *p_reg = (value | ICACHE_CRRx_REN);  /* Configure and enable region */
119 }
120 
121 /**
122   * @}
123   */
124 
125 /**
126   * @}
127   */
128 
129 /**
130   * @}
131   */
132 
133 #endif /* ICACHE */
134 
135 /**
136   * @}
137   */
138 
139 #endif /* USE_FULL_LL_DRIVER */
140