1 /**
2 ******************************************************************************
3 * @file stm32wbaxx_hal_flash_ex.c
4 * @author MCD Application Team
5 * @brief Extended FLASH HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the FLASH extended peripheral:
8 * + Extended programming operations functions
9 *
10 ******************************************************************************
11 * @attention
12 *
13 * Copyright (c) 2022 STMicroelectronics.
14 * All rights reserved.
15 *
16 * This software is licensed under terms that can be found in the LICENSE file
17 * in the root directory of this software component.
18 * If no LICENSE file comes with this software, it is provided AS-IS.
19 *
20 ******************************************************************************
21 @verbatim
22 ==============================================================================
23 ##### Flash Extended features #####
24 ==============================================================================
25
26 [..] Comparing to other previous devices, the FLASH interface for STM32WBAxx
27 devices contains the following additional features
28
29 (+) Capacity up to 2 Mbyte
30 (+) Watermark-based secure area including the secure hide areas
31 (+) Block-based secure pages
32
33 ##### How to use this driver #####
34 ==============================================================================
35 [..] This driver provides functions to configure and program the FLASH memory
36 of all STM32WBAxx devices. It includes:
37 (#) Flash Memory Erase functions:
38 (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
39 HAL_FLASH_Lock() functions
40 (++) Erase function: page Erase and Mass Erase
41 (++) There are two modes of erase :
42 (+++) Polling Mode using HAL_FLASHEx_Erase()
43 (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
44
45 (#) Option Bytes Programming function: Use HAL_FLASHEx_OBProgram() to:
46 (++) Configure the write protection for each area
47 (++) Set the Read protection Level
48 (++) Program the user Option Bytes
49 (++) Configure the watermark security for each area including the secure hide areas
50 (++) Configure the boot lock (BOOT_LOCK)
51 (++) Configure the Boot addresses
52
53 (#) Get Option Bytes Configuration function: Use HAL_FLASHEx_OBGetConfig() to:
54 (++) Get the value of a write protection area
55 (++) Know if the read protection is activated
56 (++) Get the value of the user Option Bytes
57 (++) Get the configuration of a watermark security area including the secure hide areas
58 (++) Get the boot lock (BOOT_LOCK) configuration
59 (++) Get the value of a boot address
60
61 (#) Block-based secure / privilege area configuration function: Use HAL_FLASHEx_ConfigBBAttributes()
62 (++) Bit-field allowing to secure or un-secure each page
63 (++) Bit-field allowing to privilege or un-privilege each page
64
65 (#) Get the block-based secure / privilege area configuration function: Use HAL_FLASHEx_GetBBSec()
66 (++) Return the configuration of the block-based security and privilege for all the pages
67
68 (#) Activation of the secure hide area function: Use HAL_FLASHEx_EnableSecHideProtection()
69 (++) Deny the access to the secure hide area
70
71 (#) Privilege mode configuration function: Use HAL_FLASHEx_ConfigPrivMode()
72 (++) FLASH register can be protected against non-privilege accesses
73
74 (#) Get the privilege mode configuration function: Use HAL_FLASHEx_GetPrivMode()
75 (++) Return if the FLASH registers are protected against non-privilege accesses
76
77 (#) Security inversion configuration function: Use HAL_FLASHEx_ConfigSecInversion()
78 (++) FLASH secure state can be override
79
80 (#) Get the security inversion configuration function: Use HAL_FLASHEx_GetSecInversion()
81 (++) Return if FLASH secure state is override
82
83 (#) Enable low-power mode function: Use HAL_FLASHEx_EnablePowerDown()
84 (++) Enable low-power mode for Flash
85
86 (#) Enable low-power read mode function: Use HAL_FLASHEx_ConfigLowPowerRead()
87 (++) Enable low-power read mode for Flash memory
88
89 (#) Get the low-power read mode configuration function: Use HAL_FLASHEx_GetLowPowerRead()
90 (++) Return if FLASH is in low-power read mode or normal read mode
91
92 (#) Get Flash operation function: Use HAL_FLASHEx_GetOperation()
93 (++) Return information about the on-going Flash operation. After a
94 system reset, return information about the interrupted Flash operation, if any.
95
96 @endverbatim
97 ******************************************************************************
98 */
99
100 /* Includes ------------------------------------------------------------------*/
101 #include "stm32wbaxx_hal.h"
102
103 /** @addtogroup STM32WBAxx_HAL_Driver
104 * @{
105 */
106
107 /** @defgroup FLASHEx FLASHEx
108 * @brief FLASH Extended HAL module driver
109 * @{
110 */
111
112 #ifdef HAL_FLASH_MODULE_ENABLED
113
114 /* Private typedef -----------------------------------------------------------*/
115 /* Private define ------------------------------------------------------------*/
116 /* Private macro -------------------------------------------------------------*/
117 /* Private variables ---------------------------------------------------------*/
118 /* Private function prototypes -----------------------------------------------*/
119 /** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions
120 * @{
121 */
122 static void FLASH_MassErase(void);
123 static void FLASH_OB_WRPConfig(uint32_t WRPArea, uint32_t WRPStartOffset, uint32_t WRPEndOffset,
124 FunctionalState WRPLock);
125 static void FLASH_OB_RDPConfig(uint32_t RDPLevel);
126 static void FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig);
127 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
128 static void FLASH_OB_WMSECConfig(uint32_t WMSecConfig, uint32_t WMSecStartPage, uint32_t WMSecEndPage,
129 uint32_t WMHDPEndPage);
130 static void FLASH_OB_BootLockConfig(uint32_t BootLockConfig);
131 #endif /* __ARM_FEATURE_CMSE */
132 static void FLASH_OB_BootAddrConfig(uint32_t BootAddrConfig, uint32_t BootAddr);
133 static void FLASH_OB_GetWRP(uint32_t WRPArea, uint32_t *WRPStartOffset, uint32_t *WRPEndOffset,
134 FunctionalState *WRPLock);
135 static uint32_t FLASH_OB_GetRDP(void);
136 static uint32_t FLASH_OB_GetUser(void);
137 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
138 static void FLASH_OB_GetWMSEC(uint32_t *WMSecConfig, uint32_t *WMSecStartPage, uint32_t *WMSecEndPage,
139 uint32_t *WMHDPEndPage);
140 static uint32_t FLASH_OB_GetBootLock(void);
141 #endif /* __ARM_FEATURE_CMSE */
142 static void FLASH_OB_GetBootAddr(uint32_t BootAddrConfig, uint32_t *BootAddr);
143 static void FLASH_OB_RDPKeyConfig(uint32_t RDPKeyType, uint32_t RDPKey1, uint32_t RDPKey2);
144 /**
145 * @}
146 */
147
148 /* Exported functions -------------------------------------------------------*/
149 /** @defgroup FLASHEx_Exported_Functions FLASH Extended Exported Functions
150 * @{
151 */
152
153 /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions
154 * @brief Extended IO operation functions
155 *
156 @verbatim
157 ===============================================================================
158 ##### Extended programming operation functions #####
159 ===============================================================================
160 [..]
161 This subsection provides a set of functions allowing to manage the Extended FLASH
162 programming operations Operations.
163
164 @endverbatim
165 * @{
166 */
167
168 /**
169 * @brief Perform a mass erase or erase the specified FLASH memory pages.
170 * @note Before any operation, it is possible to check there is no operation suspended
171 * by call HAL_FLASHEx_IsOperationSuspended()
172 * @param[in] pEraseInit Pointer to an @ref FLASH_EraseInitTypeDef structure that
173 * contains the configuration information for the erasing.
174 *
175 * @param[out] PageError Pointer to variable that contains the configuration
176 * information on faulty page in case of error (0xFFFFFFFF means that all
177 * the pages have been correctly erased)
178 *
179 * @retval HAL Status
180 */
HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef * pEraseInit,uint32_t * PageError)181 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
182 {
183 HAL_StatusTypeDef status;
184 uint32_t page_index;
185 __IO uint32_t *reg_cr;
186
187 /* Check the parameters */
188 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
189
190 /* Process Locked */
191 __HAL_LOCK(&pFlash);
192
193 /* Reset error code */
194 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
195
196 /* Verify that next operation can be proceed */
197 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
198
199 if (status == HAL_OK)
200 {
201 /* Current operation type */
202 pFlash.ProcedureOnGoing = pEraseInit->TypeErase;
203
204 /* Access to SECCR1 or NSCR1 depends on operation type */
205 #if defined(FLASH_SECCR1_LOCK)
206 reg_cr = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECCR1) : &(FLASH_NS->NSCR1);
207 #else
208 reg_cr = &(FLASH_NS->NSCR1);
209 #endif /* FLASH_SECCR1_LOCK */
210
211 if ((pEraseInit->TypeErase & (~FLASH_NON_SECURE_MASK)) == FLASH_TYPEERASE_MASSERASE)
212 {
213 /* Mass erase to be done */
214 FLASH_MassErase();
215
216 /* Wait for last operation to be completed */
217 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
218 }
219 else
220 {
221 /*Initialization of PageError variable*/
222 *PageError = 0xFFFFFFFFU;
223
224 for (page_index = pEraseInit->Page; page_index < (pEraseInit->Page + pEraseInit->NbPages); page_index++)
225 {
226 /* Start erase page */
227 FLASH_PageErase(page_index);
228
229 /* Wait for last operation to be completed */
230 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
231
232 if (status != HAL_OK)
233 {
234 /* In case of error, stop erase procedure and return the faulty page */
235 *PageError = page_index;
236 break;
237 }
238 }
239 }
240
241 /* If the erase operation is completed, disable the associated bits */
242 CLEAR_BIT((*reg_cr), (pEraseInit->TypeErase) & (~(FLASH_NON_SECURE_MASK)));
243 }
244
245 /* Process Unlocked */
246 __HAL_UNLOCK(&pFlash);
247
248 return status;
249 }
250
251 /**
252 * @brief Perform a mass erase or erase the specified FLASH memory pages with interrupt enabled.
253 * @note Before any operation, it is possible to check there is no operation suspended
254 * by call HAL_FLASHEx_IsOperationSuspended()
255 * @param pEraseInit Pointer to an @ref FLASH_EraseInitTypeDef structure that
256 * contains the configuration information for the erasing.
257 *
258 * @retval HAL Status
259 */
HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef * pEraseInit)260 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
261 {
262 HAL_StatusTypeDef status;
263 __IO uint32_t *reg_cr;
264
265 /* Check the parameters */
266 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
267
268 /* Process Locked */
269 __HAL_LOCK(&pFlash);
270
271 /* Reset error code */
272 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
273
274 /* Verify that next operation can be proceed */
275 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
276
277 if (status != HAL_OK)
278 {
279 /* Process Unlocked */
280 __HAL_UNLOCK(&pFlash);
281 }
282 else
283 {
284 /* Set internal variables used by the IRQ handler */
285 pFlash.ProcedureOnGoing = pEraseInit->TypeErase;
286
287 /* Access to SECCR1 or NSCR1 depends on operation type */
288 #if defined(FLASH_SECCR1_LOCK)
289 reg_cr = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECCR1) : &(FLASH_NS->NSCR1);
290 #else
291 reg_cr = &(FLASH_NS->NSCR1);
292 #endif /* FLASH_SECCR1_LOCK */
293
294 /* Enable End of Operation and Error interrupts */
295 (*reg_cr) |= (FLASH_IT_EOP | FLASH_IT_OPERR);
296
297 if ((pEraseInit->TypeErase & (~FLASH_NON_SECURE_MASK)) == FLASH_TYPEERASE_MASSERASE)
298 {
299 /* Mass erase to be done */
300 FLASH_MassErase();
301 }
302 else
303 {
304 /* Erase by page to be done */
305 pFlash.NbPagesToErase = pEraseInit->NbPages;
306 pFlash.Page = pEraseInit->Page;
307
308 /* Erase first page and wait for IT */
309 FLASH_PageErase(pEraseInit->Page);
310 }
311 }
312
313 /* return status */
314 return status;
315 }
316
317 /**
318 * @brief Program Option bytes.
319 * @param pOBInit Pointer to an @ref FLASH_OBProgramInitTypeDef structure that
320 * contains the configuration information for the programming.
321 *
322 * @note To configure any option bytes, the option lock bit OPTLOCK must be
323 * cleared with the call of @ref HAL_FLASH_OB_Unlock() function.
324 * @note New option bytes configuration will be taken into account in two cases:
325 * - after an option bytes launch through the call of @ref HAL_FLASH_OB_Launch()
326 * - after a power reset (BOR reset or exit from Standby/Shutdown modes)
327 *
328 * @retval HAL Status
329 */
HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef * pOBInit)330 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
331 {
332 HAL_StatusTypeDef status;
333
334 /* Check the parameters */
335 assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
336
337 /* Process Locked */
338 __HAL_LOCK(&pFlash);
339
340 /* Reset error code */
341 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
342
343 /* Verify that next operation can be proceed */
344 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
345
346 if (status == HAL_OK)
347 {
348 /* Write protection configuration */
349 if ((pOBInit->OptionType & OPTIONBYTE_WRP) != 0U)
350 {
351 /* Configure of Write protection on the selected area */
352 FLASH_OB_WRPConfig(pOBInit->WRPArea, pOBInit->WRPStartOffset, pOBInit->WRPEndOffset, pOBInit->WRPLock);
353 }
354
355 /* Read protection configuration */
356 if ((pOBInit->OptionType & OPTIONBYTE_RDP) != 0U)
357 {
358 /* Configure the Read protection level */
359 FLASH_OB_RDPConfig(pOBInit->RDPLevel);
360 }
361
362 /* Read protection key configuration */
363 if ((pOBInit->OptionType & OPTIONBYTE_RDPKEY) != 0U)
364 {
365 /* Configure the Read protection key */
366 FLASH_OB_RDPKeyConfig(pOBInit->RDPKeyType, pOBInit->RDPKey1, pOBInit->RDPKey2);
367 }
368
369 /* User Configuration */
370 if ((pOBInit->OptionType & OPTIONBYTE_USER) != 0U)
371 {
372 /* Configure the user option bytes */
373 FLASH_OB_UserConfig(pOBInit->USERType, pOBInit->USERConfig);
374 }
375
376 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
377 /* Watermark secure configuration */
378 if ((pOBInit->OptionType & OPTIONBYTE_WMSEC) != 0U)
379 {
380 /* Configure the watermark-based secure area */
381 FLASH_OB_WMSECConfig(pOBInit->WMSecConfig, pOBInit->WMSecStartPage, pOBInit->WMSecEndPage,
382 pOBInit->WMHDPEndPage);
383 }
384
385 /* Unique boot entry point configuration */
386 if ((pOBInit->OptionType & OPTIONBYTE_BOOT_LOCK) != 0U)
387 {
388 /* Configure the unique boot entry point */
389 FLASH_OB_BootLockConfig(pOBInit->BootLock);
390 }
391 #endif /* __ARM_FEATURE_CMSE */
392
393 /* Boot address configuration */
394 if ((pOBInit->OptionType & OPTIONBYTE_BOOTADDR) != 0U)
395 {
396 /* Configure the boot address */
397 FLASH_OB_BootAddrConfig(pOBInit->BootAddrConfig, pOBInit->BootAddr);
398 }
399
400 /* Set OPTSTRT Bit */
401 SET_BIT(FLASH->NSCR1, FLASH_NSCR1_OPTSTRT);
402
403 /* Wait for last operation to be completed */
404 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
405 }
406
407 /* Process Unlocked */
408 __HAL_UNLOCK(&pFlash);
409
410 /* return status */
411 return status;
412 }
413
414 /**
415 * @brief Get the Option bytes configuration.
416 * @param pOBInit Pointer to an @ref FLASH_OBProgramInitTypeDef structure that contains the
417 * configuration information.
418 * @note The fields pOBInit->WRPArea, pOBInit->WMSecConfig and pOBInit->BootAddrConfig
419 * should indicate which area/address is requested for the WRP, WM Security or
420 * Boot Address, else no information will be returned
421 *
422 * @retval None
423 */
HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef * pOBInit)424 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
425 {
426 pOBInit->OptionType = (OPTIONBYTE_RDP | OPTIONBYTE_USER);
427
428 if ((pOBInit->WRPArea == OB_WRPAREA_BANK1_AREAA) || (pOBInit->WRPArea == OB_WRPAREA_BANK1_AREAB))
429 {
430 pOBInit->OptionType |= OPTIONBYTE_WRP;
431 /* Get write protection on the selected area */
432 FLASH_OB_GetWRP(pOBInit->WRPArea, &(pOBInit->WRPStartOffset), &(pOBInit->WRPEndOffset), &(pOBInit->WRPLock));
433 }
434
435 /* Get Read protection level */
436 pOBInit->RDPLevel = FLASH_OB_GetRDP();
437
438 /* Get the user option bytes */
439 pOBInit->USERConfig = FLASH_OB_GetUser();
440
441 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
442 /* Get the configuration of the watermark secure area for the selected area */
443 if (pOBInit->WMSecConfig == OB_WMSEC_AREA1)
444 {
445 pOBInit->OptionType |= OPTIONBYTE_WMSEC;
446 FLASH_OB_GetWMSEC(&(pOBInit->WMSecConfig), &(pOBInit->WMSecStartPage), &(pOBInit->WMSecEndPage),
447 &(pOBInit->WMHDPEndPage));
448 }
449
450 pOBInit->OptionType |= OPTIONBYTE_BOOT_LOCK;
451
452 /* Get the configuration of the unique boot entry point */
453 pOBInit->BootLock = FLASH_OB_GetBootLock();
454 #endif /* __ARM_FEATURE_CMSE */
455
456 /* Get the value of the selected boot address */
457 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
458 if ((pOBInit->BootAddrConfig == OB_BOOTADDR_NS0) || (pOBInit->BootAddrConfig == OB_BOOTADDR_NS1) ||
459 (pOBInit->BootAddrConfig == OB_BOOTADDR_SEC0))
460 #else
461 if ((pOBInit->BootAddrConfig == OB_BOOTADDR_NS0) || (pOBInit->BootAddrConfig == OB_BOOTADDR_NS1))
462 #endif /* __ARM_FEATURE_CMSE */
463 {
464 pOBInit->OptionType |= OPTIONBYTE_BOOTADDR;
465 FLASH_OB_GetBootAddr(pOBInit->BootAddrConfig, &(pOBInit->BootAddr));
466 }
467 }
468
469 #if defined(FLASH_SECBBR1_SECBB0) || defined(FLASH_PRIVBBR1_PRIVBB0)
470 /**
471 * @brief Configure the block-based secure area.
472 *
473 * @param pBBAttributes pointer to an @ref FLASH_BBAttributesTypeDef structure that
474 * contains the configuration information for the programming.
475 *
476 * @note The field pBBAttributes->Bank should indicate which area is requested
477 * for the block-based attributes.
478 * @note The field pBBAttributes->BBAttributesType should indicate which
479 * block-base attribute type is requested: Secure or Privilege.
480 *
481 * @retval HAL Status
482 */
HAL_FLASHEx_ConfigBBAttributes(FLASH_BBAttributesTypeDef * pBBAttributes)483 HAL_StatusTypeDef HAL_FLASHEx_ConfigBBAttributes(FLASH_BBAttributesTypeDef *pBBAttributes)
484 {
485 HAL_StatusTypeDef status;
486 uint8_t index;
487 __IO uint32_t *reg;
488
489 /* Check the parameters */
490 assert_param(IS_FLASH_BB_EXCLUSIVE(pBBAttributes->BBAttributesType));
491
492 /* Wait for last operation to be completed */
493 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
494
495 if (status == HAL_OK)
496 {
497 /* Set the first Block-Based register to write */
498 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
499 if (pBBAttributes->BBAttributesType == FLASH_BB_SEC)
500 {
501 reg = &(FLASH->SECBBR1);
502 }
503 else
504 #endif /* __ARM_FEATURE_CMSE */
505 {
506 reg = &(FLASH->PRIVBBR1);
507 }
508
509 /* Modify the register values and check that new attributes are taken in account */
510 for (index = 0; index < FLASH_BLOCKBASED_NB_REG; index++)
511 {
512 *reg = pBBAttributes->BBAttributes_array[index];
513 if ((*reg) != pBBAttributes->BBAttributes_array[index])
514 {
515 status = HAL_ERROR;
516 }
517 reg++;
518 }
519
520 /* ISB instruction is called to be sure next instructions are performed with correct attributes */
521 __ISB();
522 }
523
524 /* Process Unlocked */
525 __HAL_UNLOCK(&pFlash);
526
527 return status;
528 }
529
530 /**
531 * @brief Return the block-based attributes.
532 *
533 * @param pBBAttributes [in/out] pointer to an FLASH_BBAttributesTypeDef structure
534 * that contains the configuration information.
535 * @note The field pBBAttributes->BBAttributesType should indicate which
536 * block-base attribute type is requested: Secure or Privilege.
537 *
538 * @retval None
539 */
HAL_FLASHEx_GetConfigBBAttributes(FLASH_BBAttributesTypeDef * pBBAttributes)540 void HAL_FLASHEx_GetConfigBBAttributes(FLASH_BBAttributesTypeDef *pBBAttributes)
541 {
542 uint8_t index;
543 __IO uint32_t *reg;
544
545 /* Check the parameters */
546 assert_param(IS_FLASH_BB_EXCLUSIVE(pBBAttributes->BBAttributesType));
547
548 /* Set the first Block-Based register to read */
549 if (pBBAttributes->BBAttributesType == FLASH_BB_SEC)
550 {
551 reg = &(FLASH->SECBBR1);
552 }
553 else
554 {
555 reg = &(FLASH->PRIVBBR1);
556 }
557
558 /* Read the register values */
559 for (index = 0; index < FLASH_BLOCKBASED_NB_REG; index++)
560 {
561 pBBAttributes->BBAttributes_array[index] = (*reg);
562 reg++;
563 }
564 }
565 #endif /* FLASH_SECBBR1_SECBB0 || FLASH_PRIVBBR1_PRIVBB0 */
566
567 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
568 /**
569 * @brief Activation of the protection of the secure hide area.
570 *
571 * @param Banks indicate the bank concerned by the activation
572 * This parameter can be one of the following values:
573 * @arg FLASH_BANK_1: Bank1 to be protected
574 *
575 * @retval None
576 */
HAL_FLASHEx_EnableSecHideProtection(uint32_t Banks)577 void HAL_FLASHEx_EnableSecHideProtection(uint32_t Banks)
578 {
579 /* Check the parameters */
580 assert_param(IS_FLASH_BANK(Banks));
581
582 SET_BIT(FLASH->SECHDPCR, FLASH_SECHDPCR_HDP_ACCDIS);
583
584 }
585 #endif /* __ARM_FEATURE_CMSE */
586
587 /**
588 * @}
589 */
590
591 /** @defgroup FLASHEx_Exported_Functions_Group2 Extended Peripheral Control functions
592 * @brief Extended Peripheral Control functions
593 *
594 @verbatim
595 ===============================================================================
596 ##### Extended Peripheral Control functions #####
597 ===============================================================================
598 [..]
599 This subsection provides a set of functions allowing to control the FLASH
600 memory operations.
601
602 @endverbatim
603 * @{
604 */
605
606 /**
607 * @brief Suspend new program or erase operation request.
608 * @param Request Indicate the suspend operation request
609 * This parameter can be a value of @ref FLASHEx_Suspend_Request
610 * @retval None
611 */
HAL_FLASHEx_SuspendOperation(uint32_t Request)612 void HAL_FLASHEx_SuspendOperation(uint32_t Request)
613 {
614 /* Check the parameter */
615 assert_param(IS_FLASH_SUSPEND_REQ(Request));
616
617 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
618 SET_BIT(FLASH->SECCR2, Request);
619 #else
620 SET_BIT(FLASH->NSCR2, Request);
621 #endif /* __ARM_FEATURE_CMSE */
622 }
623
624 /**
625 * @brief Allow new program or erase operation request.
626 * @param Request Indicate the allow operation request
627 * This parameter can be a value of @ref FLASHEx_Allow_Request
628 * @retval None
629 */
HAL_FLASHEx_AllowOperation(uint32_t Request)630 void HAL_FLASHEx_AllowOperation(uint32_t Request)
631 {
632 /* Check the parameter */
633 assert_param(IS_FLASH_ALLOW_REQ(Request));
634
635 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
636 CLEAR_BIT(FLASH->SECCR2, Request);
637 #else
638 CLEAR_BIT(FLASH->NSCR2, Request);
639 #endif /* __ARM_FEATURE_CMSE */
640 }
641
642 /**
643 * @brief Check if new program or erase operation request is suspended
644 * @retval Status
645 * - 0 : No suspended flash operation
646 * - FLASH_SUSPEND_PROGRAM : Program operations are suspended
647 * - FLASH_SUSPEND_ERASE : Erase operations are suspended
648 * - FLASH_SUSPEND_PROGRAM_ERASE : Program and erase operations are suspended
649 */
HAL_FLASHEx_IsOperationSuspended(void)650 uint32_t HAL_FLASHEx_IsOperationSuspended(void)
651 {
652 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
653 return (FLASH->SECCR2 & FLASH_SUSPEND_PROGRAM_ERASE);
654 #else
655 return (FLASH->NSCR2 & FLASH_SUSPEND_PROGRAM_ERASE);
656 #endif /* __ARM_FEATURE_CMSE */
657 }
658
659 #if defined(FLASH_PRIVCFGR_SPRIV)
660 /**
661 * @brief Configuration of the privilege attribute.
662 *
663 * @param PrivMode indicate privilege mode configuration
664 * This parameter can be one of the following values:
665 * @arg FLASH_SPRIV_GRANTED: access to secure Flash registers is granted to privileged or unprivileged access
666 * @arg FLASH_SPRIV_DENIED: access to secure Flash registers is denied to unprivileged access
667 * @arg FLASH_NSPRIV_GRANTED: access to non-secure Flash registers is granted to privileged or unprivileged access
668 * @arg FLASH_NSPRIV_DENIED: access to non-secure Flash registers is denied to unprivilege access
669 *
670 * @retval None
671 */
HAL_FLASHEx_ConfigPrivMode(uint32_t PrivMode)672 void HAL_FLASHEx_ConfigPrivMode(uint32_t PrivMode)
673 {
674 /* Check the parameters */
675 assert_param(IS_FLASH_CFGPRIVMODE(PrivMode));
676
677 MODIFY_REG(FLASH->PRIVCFGR, (FLASH_PRIVCFGR_SPRIV | FLASH_PRIVCFGR_NSPRIV), PrivMode);
678 }
679
680 /**
681 * @brief Return the value of the privilege attribute.
682 *
683 * @retval It indicates the privilege mode configuration.
684 * This return value can be one of the following values:
685 * @arg FLASH_SPRIV_GRANTED: access to secure Flash registers is granted to privileged or unprivileged access
686 * @arg FLASH_SPRIV_DENIED: access to secure Flash registers is denied to unprivileged access
687 * @arg FLASH_NSPRIV_GRANTED: access to non-secure Flash registers is granted to privileged or unprivileged access
688 * @arg FLASH_NSPRIV_DENIED: access to Flash registers is denied to unprivilege accessP
689 */
HAL_FLASHEx_GetPrivMode(void)690 uint32_t HAL_FLASHEx_GetPrivMode(void)
691 {
692 return (FLASH->PRIVCFGR & (FLASH_PRIVCFGR_SPRIV | FLASH_PRIVCFGR_NSPRIV));
693 }
694 #endif /* FLASH_PRIVCFGR_SPRIV */
695
696 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
697 /**
698 * @brief Configuration of the security inversion.
699 *
700 * @param SecInvState indicate the flash security state configuration
701 * This parameter can be one of the following values:
702 * @arg FLASH_SEC_INV_DISABLE: Security state of Flash is not inverted
703 * @arg FLASH_SEC_INV_ENABLE: Security state of Flash is inverted
704 *
705 * @retval HAL Status
706 */
HAL_FLASHEx_ConfigSecInversion(uint32_t SecInvState)707 HAL_StatusTypeDef HAL_FLASHEx_ConfigSecInversion(uint32_t SecInvState)
708 {
709 HAL_StatusTypeDef status;
710
711 /* Check the parameters */
712 assert_param(IS_FLASH_CFGSECINV(SecInvState));
713
714 /* Process Locked */
715 __HAL_LOCK(&pFlash);
716
717 /* Wait for last operation to be completed */
718 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
719
720 if (status == HAL_OK)
721 {
722 MODIFY_REG(FLASH->SECCR1, FLASH_SECCR1_INV, SecInvState);
723 }
724
725 /* Process Unlocked */
726 __HAL_UNLOCK(&pFlash);
727
728 return status;
729 }
730
731 /**
732 * @brief Return the value of the security inversion.
733 *
734 * @retval It indicates the flash security state configuration
735 * This return value can be one of the following values:
736 * @arg FLASH_SEC_INV_DISABLE: Security state of Flash is not inverted
737 * @arg FLASH_SEC_INV_ENABLE: Security state of Flash is inverted
738 */
HAL_FLASHEx_GetSecInversion(void)739 uint32_t HAL_FLASHEx_GetSecInversion(void)
740 {
741 return (FLASH->SECCR1 & FLASH_SECCR1_INV);
742 }
743 #endif /* __ARM_FEATURE_CMSE */
744
745 /**
746 * @brief Enable the Power-down Mode for Flash Banks
747 * @retval HAL Status
748 */
HAL_FLASHEx_EnablePowerDown()749 HAL_StatusTypeDef HAL_FLASHEx_EnablePowerDown()
750 {
751 HAL_StatusTypeDef status = HAL_OK;
752 uint32_t tickstart;
753
754 /* Check PD and PDREQ bits (Flash is not in power-down mode and not being
755 already under power-down request) */
756 if ((FLASH->NSSR & FLASH_NSSR_PD) != 0U)
757 {
758 status = HAL_ERROR;
759 }
760 else if ((FLASH->ACR & FLASH_ACR_PDREQ) != 0U)
761 {
762 status = HAL_ERROR;
763 }
764 else
765 {
766 /* Unlock PDREQ bit */
767 WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1);
768 WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2);
769
770 /* Set PDREQ in FLASH_ACR register */
771 SET_BIT(FLASH->ACR, FLASH_ACR_PDREQ);
772
773 /* Check PD1 bit */
774 tickstart = HAL_GetTick();
775 while (((FLASH->NSSR & FLASH_NSSR_PD) != FLASH_NSSR_PD))
776 {
777 if ((HAL_GetTick() - tickstart) > FLASH_TIMEOUT_VALUE)
778 {
779 return HAL_TIMEOUT;
780 }
781 }
782 }
783
784 return status;
785 }
786
787 /**
788 * @brief Configuration of the Low-Power read Mode.
789 *
790 * @param ConfigLPM indicate the Low-Power read Mode configuration.
791 * This parameter can be one of the following values:
792 * @arg FLASH_LPM_ENABLE: Flash is in low-power read mode
793 * @arg FLASH_LPM_DISABLE: Flash is in normal read mode
794 *
795 * @retval HAL Status
796 */
HAL_FLASHEx_ConfigLowPowerRead(uint32_t ConfigLPM)797 HAL_StatusTypeDef HAL_FLASHEx_ConfigLowPowerRead(uint32_t ConfigLPM)
798 {
799 HAL_StatusTypeDef status = HAL_OK;
800
801 /* Check the parameters */
802 assert_param(IS_FLASH_CFGLPM(ConfigLPM));
803
804 /* Set LPM Bit in FLASH_ACR register */
805 MODIFY_REG(FLASH->ACR, FLASH_ACR_LPM, ConfigLPM);
806
807 /* Check that low power read mode has been activated */
808 if (READ_BIT(FLASH->ACR, FLASH_ACR_LPM) != ConfigLPM)
809 {
810 status = HAL_ERROR;
811 }
812
813 return status;
814 }
815
816 /**
817 * @brief Return the value of the Low-Power read Mode.
818 *
819 * @retval It indicates the flash low-power read mode configuration
820 * This return value can be one of the following values:
821 * @arg FLASH_LPM_ENABLE: Flash is in low-power read mode
822 * @arg FLASH_LPM_DISABLE: Flash is in normal read mode
823 */
HAL_FLASHEx_GetLowPowerRead(void)824 uint32_t HAL_FLASHEx_GetLowPowerRead(void)
825 {
826 return (FLASH->ACR & FLASH_ACR_LPM);
827 }
828
829 /**
830 * @brief Return the on-going Flash Operation. After a system reset, return
831 * the interrupted Flash operation, if any.
832 * @param pFlashOperation [out] pointer to a FLASH_OperationTypeDef structure
833 * that contains the Flash operation information.
834 *
835 * @retval None
836 */
HAL_FLASHEx_GetOperation(FLASH_OperationTypeDef * pFlashOperation)837 void HAL_FLASHEx_GetOperation(FLASH_OperationTypeDef *pFlashOperation)
838 {
839 uint32_t opsr_reg = FLASH->OPSR;
840
841 /* Get Flash operation Type */
842 pFlashOperation->OperationType = opsr_reg & FLASH_OPSR_CODE_OP;
843
844 /* Get Flash operation memory */
845 pFlashOperation->FlashArea = opsr_reg & FLASH_OPSR_SYSF_OP;
846
847 /* Get Flash operation address */
848 pFlashOperation->Address = opsr_reg & FLASH_OPSR_ADDR_OP;
849 }
850
851 /**
852 * @}
853 */
854
855 /**
856 * @}
857 */
858
859 /* Private functions ---------------------------------------------------------*/
860
861 /** @addtogroup FLASHEx_Private_Functions
862 * @{
863 */
864 /**
865 * @brief Mass erase of FLASH memory.
866 * @retval None
867 */
FLASH_MassErase()868 static void FLASH_MassErase()
869 {
870 __IO uint32_t *reg_cr;
871
872 /* Access to SECCR1 or NSCR1 registers depends on operation type */
873 #if defined(FLASH_SECCR1_LOCK)
874 reg_cr = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECCR1) : &(FLASH_NS->NSCR1);
875 #else
876 reg_cr = &(FLASH_NS->NSCR1);
877 #endif /* FLASH_SECCR1_LOCK */
878
879 /* Set the Mass Erase Bit for the bank 1 and proceed to erase */
880 SET_BIT((*reg_cr), FLASH_NSCR1_MER | FLASH_NSCR1_STRT);
881 }
882
883 /**
884 * @brief Erase the specified FLASH memory page.
885 * @param Page FLASH page to erase
886 * This parameter must be a value between 0 and (max number of pages in the bank - 1)
887 * @retval None
888 */
FLASH_PageErase(uint32_t Page)889 void FLASH_PageErase(uint32_t Page)
890 {
891 __IO uint32_t *reg_cr;
892
893 /* Check the parameters */
894 assert_param(IS_FLASH_PAGE(Page));
895
896 /* Access to SECCR1 or NSCR1 registers depends on operation type */
897 #if defined(FLASH_SECCR1_LOCK)
898 reg_cr = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECCR1) : &(FLASH_NS->NSCR1);
899 #else
900 reg_cr = &(FLASH_NS->NSCR1);
901 #endif /* FLASH_SECCR1_LOCK */
902
903 /* Proceed to erase the page */
904 MODIFY_REG((*reg_cr), (FLASH_NSCR1_PNB | FLASH_NSCR1_PER | FLASH_NSCR1_STRT), ((Page << FLASH_NSCR1_PNB_Pos) | FLASH_NSCR1_PER | FLASH_NSCR1_STRT));
905 }
906
907 /**
908 * @brief Configure the write protection of the desired pages.
909 *
910 * @note When WRP is active in a zone, it cannot be erased or programmed.
911 * Consequently, a software mass erase cannot be performed if one zone
912 * is write-protected.
913 * @note When the memory read protection level is selected (RDP level = 1),
914 * it is not possible to program or erase Flash memory if the CPU debug
915 * features are connected (JTAG or single wire) or boot code is being
916 * executed from RAM or System flash, even if WRP is not activated.
917 * @note To configure the WRP options, the option lock bit OPTLOCK must be
918 * cleared with the call of the @ref HAL_FLASH_OB_Unlock() function.
919 * @note To validate the WRP options, the option bytes must be reloaded
920 * through the call of the @ref HAL_FLASH_OB_Launch() function.
921 *
922 * @param WRPArea Specifies the area to be configured.
923 * This parameter can be one of the following values:
924 * @arg @ref OB_WRPAREA_BANK1_AREAA Flash Bank 1 Area A
925 * @arg @ref OB_WRPAREA_BANK1_AREAB Flash Bank 1 Area B
926 *
927 * @param WRPStartOffset Specifies the start page of the write protected area
928 * This parameter can be page number between 0 and (max number of pages in the Flash - 1)
929 *
930 * @param WRPEndOffset Specifies the end page of the write protected area
931 * This parameter can be page number between WRPStartOffset and (max number of pages in the Flash - 1)
932 *
933 * @param WRPLock Enables the lock of the write protected area
934 * This parameter can be set to ENABLE or DISABLE
935 *
936 * @retval None
937 */
FLASH_OB_WRPConfig(uint32_t WRPArea,uint32_t WRPStartOffset,uint32_t WRPEndOffset,FunctionalState WRPLock)938 static void FLASH_OB_WRPConfig(uint32_t WRPArea, uint32_t WRPStartOffset, uint32_t WRPEndOffset, FunctionalState WRPLock)
939 {
940 /* Check the parameters */
941 assert_param(IS_OB_WRPAREA(WRPArea));
942 assert_param(IS_FLASH_PAGE(WRPStartOffset));
943 assert_param(IS_FLASH_PAGE(WRPEndOffset));
944 assert_param(IS_FUNCTIONAL_STATE(WRPLock));
945
946 /* Configure the write protected area */
947 if (WRPArea == OB_WRPAREA_BANK1_AREAA)
948 {
949 FLASH->WRPAR = (((uint32_t)(~WRPLock) << FLASH_WRPAR_UNLOCK_Pos) | \
950 (WRPEndOffset << FLASH_WRPAR_WRPA_PEND_Pos) | \
951 WRPStartOffset);
952 }
953 else if (WRPArea == OB_WRPAREA_BANK1_AREAB)
954 {
955 FLASH->WRPBR = (((uint32_t)(~WRPLock) << FLASH_WRPBR_UNLOCK_Pos) | \
956 (WRPEndOffset << FLASH_WRPBR_WRPB_PEND_Pos) | \
957 WRPStartOffset);
958 }
959 else
960 {
961 /* Empty statement (to be compliant MISRA 15.7) */
962 }
963 }
964
965 /**
966 * @brief Set the read protection level.
967 *
968 * @note To configure the RDP level, the option lock bit OPTLOCK must be
969 * cleared with the call of the @ref HAL_FLASH_OB_Unlock() function.
970 * @note To validate the RDP level, the option bytes must be reloaded
971 * through the call of the @ref HAL_FLASH_OB_Launch() function.
972 * @note !!! Warning : When enabling OB_RDP level 2 it's no more possible
973 * to go back to other levels !!!
974 *
975 * @param RDPLevel specifies the read protection level.
976 * This parameter can be one of the following values:
977 * @arg @ref OB_RDP_LEVEL_0 No protection
978 * @arg @ref OB_RDP_LEVEL_0_5 No debug access to secure area
979 * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory
980 * @arg @ref OB_RDP_LEVEL_2 Full chip protection
981 *
982 * @retval None
983 */
FLASH_OB_RDPConfig(uint32_t RDPLevel)984 static void FLASH_OB_RDPConfig(uint32_t RDPLevel)
985 {
986 /* Check the parameters */
987 assert_param(IS_OB_RDP_LEVEL(RDPLevel));
988
989 /* Configure the RDP level in the option bytes register */
990 MODIFY_REG(FLASH->OPTR, FLASH_OPTR_RDP, RDPLevel);
991 }
992
993 /**
994 * @brief Set the read protection key.
995 * @param RDPKeyType Specifies the read protection key type.
996 * This parameter can be one of the following values:
997 * @arg @ref OB_RDP_KEY_OEM1 OEM1 key
998 * @arg @ref OB_RDP_KEY_OEM2 OEM2 key
999 * @param RDPKey1 Specifies the RDP key 1.
1000 * @param RDPKey2 Specifies the RDP key 2.
1001 * @retval None
1002 */
FLASH_OB_RDPKeyConfig(uint32_t RDPKeyType,uint32_t RDPKey1,uint32_t RDPKey2)1003 static void FLASH_OB_RDPKeyConfig(uint32_t RDPKeyType, uint32_t RDPKey1, uint32_t RDPKey2)
1004 {
1005 /* Check the parameters */
1006 assert_param(IS_OB_RDP_KEY_TYPE(RDPKeyType));
1007
1008 /* Configure the RDP OEM key */
1009 if (RDPKeyType == OB_RDP_KEY_OEM1)
1010 {
1011 WRITE_REG(FLASH->OEM1KEYR1, RDPKey1);
1012 WRITE_REG(FLASH->OEM1KEYR2, RDPKey2);
1013 }
1014 else
1015 {
1016 WRITE_REG(FLASH->OEM2KEYR1, RDPKey1);
1017 WRITE_REG(FLASH->OEM2KEYR2, RDPKey2);
1018 }
1019 }
1020
1021 /**
1022 * @brief Program the FLASH User Option Byte.
1023 *
1024 * @note To configure the user option bytes, the option lock bit OPTLOCK must
1025 * be cleared with the call of the @ref HAL_FLASH_OB_Unlock() function.
1026 * @note To validate the user option bytes, the option bytes must be reloaded
1027 * through the call of the @ref HAL_FLASH_OB_Launch() function.
1028 *
1029 * @param UserType The FLASH User Option Bytes to be modified.
1030 * This parameter can be a combination of @ref FLASH_OB_USER_Type
1031 * @param UserConfig The selected User Option Bytes values.
1032 * This parameter can be a combination of @ref FLASH_OB_USER_BOR_LEVEL,
1033 * @ref FLASH_OB_USER_nRST_STOP, @ref FLASH_OB_USER_nRST_STANDBY,
1034 * @ref FLASH_OB_USER_SRAM1_RST, @ref FLASH_OB_USER_IWDG_SW,
1035 * @ref FLASH_OB_USER_IWDG_STOP, @ref FLASH_OB_USER_IWDG_STANDBY,
1036 * @ref FLASH_OB_USER_WWDG_SW, @ref FLASH_OB_USER_SRAM2_PAR,
1037 * @ref FLASH_OB_USER_SRAM2_RST, @ref FLASH_OB_USER_nSWBOOT0,
1038 * @ref FLASH_OB_USER_nBOOT0 and @ref OB_USER_TZEN(*)
1039 * (*) Feature not available on all devices of the family
1040 * @retval None
1041 */
FLASH_OB_UserConfig(uint32_t UserType,uint32_t UserConfig)1042 static void FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig)
1043 {
1044 uint32_t optr_reg_val = 0;
1045 uint32_t optr_reg_mask = 0;
1046
1047 /* Check the parameters */
1048 assert_param(IS_OB_USER_TYPE(UserType));
1049
1050 if ((UserType & OB_USER_BOR_LEV) != 0U)
1051 {
1052 /* BOR level option byte should be modified */
1053 assert_param(IS_OB_USER_BOR_LEVEL(UserConfig & FLASH_OPTR_BOR_LEV));
1054
1055 /* Set value and mask for BOR level option byte */
1056 optr_reg_val |= (UserConfig & FLASH_OPTR_BOR_LEV);
1057 optr_reg_mask |= FLASH_OPTR_BOR_LEV;
1058 }
1059
1060 if ((UserType & OB_USER_nRST_STOP) != 0U)
1061 {
1062 /* nRST_STOP option byte should be modified */
1063 assert_param(IS_OB_USER_STOP(UserConfig & FLASH_OPTR_nRST_STOP));
1064
1065 /* Set value and mask for nRST_STOP option byte */
1066 optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_STOP);
1067 optr_reg_mask |= FLASH_OPTR_nRST_STOP;
1068 }
1069
1070 if ((UserType & OB_USER_nRST_STDBY) != 0U)
1071 {
1072 /* nRST_STDBY option byte should be modified */
1073 assert_param(IS_OB_USER_STANDBY(UserConfig & FLASH_OPTR_nRST_STDBY));
1074
1075 /* Set value and mask for nRST_STDBY option byte */
1076 optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_STDBY);
1077 optr_reg_mask |= FLASH_OPTR_nRST_STDBY;
1078 }
1079
1080 if ((UserType & OB_USER_SRAM1_RST) != 0U)
1081 {
1082 /* SRAM1_RST option byte should be modified */
1083 assert_param(IS_OB_USER_SRAM1_RST(UserConfig & FLASH_OPTR_SRAM1_RST));
1084
1085 /* Set value and mask for SRAM1_RST option byte */
1086 optr_reg_val |= (UserConfig & FLASH_OPTR_SRAM1_RST);
1087 optr_reg_mask |= FLASH_OPTR_SRAM1_RST;
1088 }
1089
1090 if ((UserType & OB_USER_IWDG_SW) != 0U)
1091 {
1092 /* IWDG_SW option byte should be modified */
1093 assert_param(IS_OB_USER_IWDG(UserConfig & FLASH_OPTR_IWDG_SW));
1094
1095 /* Set value and mask for IWDG_SW option byte */
1096 optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_SW);
1097 optr_reg_mask |= FLASH_OPTR_IWDG_SW;
1098 }
1099
1100 if ((UserType & OB_USER_IWDG_STOP) != 0U)
1101 {
1102 /* IWDG_STOP option byte should be modified */
1103 assert_param(IS_OB_USER_IWDG_STOP(UserConfig & FLASH_OPTR_IWDG_STOP));
1104
1105 /* Set value and mask for IWDG_STOP option byte */
1106 optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_STOP);
1107 optr_reg_mask |= FLASH_OPTR_IWDG_STOP;
1108 }
1109
1110 if ((UserType & OB_USER_IWDG_STDBY) != 0U)
1111 {
1112 /* IWDG_STDBY option byte should be modified */
1113 assert_param(IS_OB_USER_IWDG_STDBY(UserConfig & FLASH_OPTR_IWDG_STDBY));
1114
1115 /* Set value and mask for IWDG_STDBY option byte */
1116 optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_STDBY);
1117 optr_reg_mask |= FLASH_OPTR_IWDG_STDBY;
1118 }
1119
1120 if ((UserType & OB_USER_WWDG_SW) != 0U)
1121 {
1122 /* WWDG_SW option byte should be modified */
1123 assert_param(IS_OB_USER_WWDG(UserConfig & FLASH_OPTR_WWDG_SW));
1124
1125 /* Set value and mask for WWDG_SW option byte */
1126 optr_reg_val |= (UserConfig & FLASH_OPTR_WWDG_SW);
1127 optr_reg_mask |= FLASH_OPTR_WWDG_SW;
1128 }
1129
1130 if ((UserType & OB_USER_SRAM2_PE) != 0U)
1131 {
1132 /* SRAM2_PAR option byte should be modified */
1133 assert_param(IS_OB_USER_SRAM2_PARITY(UserConfig & FLASH_OPTR_SRAM2_PE));
1134
1135 /* Set value and mask for SRAM2_PAR option byte */
1136 optr_reg_val |= (UserConfig & FLASH_OPTR_SRAM2_PE);
1137 optr_reg_mask |= FLASH_OPTR_SRAM2_PE;
1138 }
1139
1140 if ((UserType & OB_USER_SRAM2_RST) != 0U)
1141 {
1142 /* SRAM2_RST option byte should be modified */
1143 assert_param(IS_OB_USER_SRAM2_RST(UserConfig & FLASH_OPTR_SRAM2_RST));
1144
1145 /* Set value and mask for SRAM2_RST option byte */
1146 optr_reg_val |= (UserConfig & FLASH_OPTR_SRAM2_RST);
1147 optr_reg_mask |= FLASH_OPTR_SRAM2_RST;
1148 }
1149
1150 if ((UserType & OB_USER_nSWBOOT0) != 0U)
1151 {
1152 /* nSWBOOT0 option byte should be modified */
1153 assert_param(IS_OB_USER_SWBOOT0(UserConfig & FLASH_OPTR_nSWBOOT0));
1154
1155 /* Set value and mask for nSWBOOT0 option byte */
1156 optr_reg_val |= (UserConfig & FLASH_OPTR_nSWBOOT0);
1157 optr_reg_mask |= FLASH_OPTR_nSWBOOT0;
1158 }
1159
1160 if ((UserType & OB_USER_nBOOT0) != 0U)
1161 {
1162 /* nBOOT0 option byte should be modified */
1163 assert_param(IS_OB_USER_BOOT0(UserConfig & FLASH_OPTR_nBOOT0));
1164
1165 /* Set value and mask for nBOOT0 option byte */
1166 optr_reg_val |= (UserConfig & FLASH_OPTR_nBOOT0);
1167 optr_reg_mask |= FLASH_OPTR_nBOOT0;
1168 }
1169
1170 #if defined(FLASH_OPTR_TZEN)
1171 if ((UserType & OB_USER_TZEN) != 0U)
1172 {
1173 /* TZEN option byte should be modified */
1174 assert_param(IS_OB_USER_TZEN(UserConfig & FLASH_OPTR_TZEN));
1175
1176 /* Set value and mask for TZEN option byte */
1177 optr_reg_val |= (UserConfig & FLASH_OPTR_TZEN);
1178 optr_reg_mask |= FLASH_OPTR_TZEN;
1179 }
1180 #endif /* FLASH_OPTR_TZEN */
1181
1182 /* Configure the option bytes register */
1183 MODIFY_REG(FLASH->OPTR, optr_reg_mask, optr_reg_val);
1184 }
1185
1186 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
1187 /**
1188 * @brief Configure the watermarked-based secure area.
1189 *
1190 * @param WMSecConfig specifies the area to be configured.
1191 * This parameter can be a combination of the following values:
1192 * @arg @ref OB_WMSEC_AREA1 Select Flash Secure Area 1
1193 * @arg @ref OB_WMSEC_SECURE_AREA_CONFIG Configure Flash Secure Area
1194 * @arg @ref OB_WMSEC_HDP_AREA_CONFIG Configure Flash secure hide Area
1195 * @arg @ref OB_WMSEC_HDP_AREA_ENABLE Enable secure hide Area in Secure Area
1196 * @arg @ref OB_WMSEC_HDP_AREA_DISABLE Disable secure hide Area in Secure Area
1197 *
1198 * @param WMSecStartPage Specifies the start page of the secure area
1199 * This parameter can be page number between 0 and (max number of pages in the bank - 1)
1200 *
1201 * @param WMSecEndPage Specifies the end page of the secure area
1202 * This parameter can be page number between WMSecStartPage and (max number of pages in the bank - 1)
1203 *
1204 * @param WMHDPEndPage Specifies the end page of the secure hide area
1205 * This parameter can be a page number between WMSecStartPage and WMSecEndPage
1206 *
1207 * @retval None
1208 */
FLASH_OB_WMSECConfig(uint32_t WMSecConfig,uint32_t WMSecStartPage,uint32_t WMSecEndPage,uint32_t WMHDPEndPage)1209 static void FLASH_OB_WMSECConfig(uint32_t WMSecConfig, uint32_t WMSecStartPage, uint32_t WMSecEndPage,
1210 uint32_t WMHDPEndPage)
1211 {
1212 uint32_t tmp_secwm1 = 0U;
1213 uint32_t tmp_secwm2 = 0U;
1214
1215 /* Check the parameters */
1216 assert_param(IS_OB_WMSEC_CONFIG(WMSecConfig));
1217 assert_param(IS_OB_WMSEC_AREA_EXCLUSIVE(WMSecConfig & 0x3U));
1218 assert_param(IS_FLASH_PAGE(WMSecStartPage));
1219 assert_param(IS_FLASH_PAGE(WMSecEndPage));
1220 assert_param(IS_FLASH_PAGE(WMHDPEndPage));
1221
1222 /* Read SECWM registers */
1223 if ((WMSecConfig & OB_WMSEC_AREA1) != 0U)
1224 {
1225 tmp_secwm1 = FLASH->SECWMR1;
1226 tmp_secwm2 = FLASH->SECWMR2;
1227 }
1228 else
1229 {
1230 /* Nothing to do */
1231 }
1232
1233 /* Configure Secure Area */
1234 if ((WMSecConfig & OB_WMSEC_SECURE_AREA_CONFIG) != 0U)
1235 {
1236 MODIFY_REG(tmp_secwm1, (FLASH_SECWMR1_SECWM_PSTRT | FLASH_SECWMR1_SECWM_PEND),
1237 ((WMSecEndPage << FLASH_SECWMR1_SECWM_PEND_Pos) | WMSecStartPage));
1238 }
1239
1240 /* Configure Secure Hide Area */
1241 if ((WMSecConfig & OB_WMSEC_HDP_AREA_CONFIG) != 0U)
1242 {
1243 tmp_secwm2 &= (~FLASH_SECWMR2_HDP_PEND);
1244 tmp_secwm2 |= (WMHDPEndPage << FLASH_SECWMR2_HDP_PEND_Pos);
1245 }
1246
1247 /* Enable Secure Hide Area */
1248 if ((WMSecConfig & OB_WMSEC_HDP_AREA_ENABLE) != 0U)
1249 {
1250 tmp_secwm2 |= FLASH_SECWMR2_HDPEN;
1251 }
1252
1253 /* Disable Secure Hide Area */
1254 if ((WMSecConfig & OB_WMSEC_HDP_AREA_DISABLE) != 0U)
1255 {
1256 tmp_secwm2 &= (~FLASH_SECWMR2_HDPEN);
1257 }
1258
1259 /* Write SECWM registers */
1260 if ((WMSecConfig & OB_WMSEC_AREA1) != 0U)
1261 {
1262 FLASH->SECWMR1 = tmp_secwm1;
1263 FLASH->SECWMR2 = tmp_secwm2;
1264 }
1265 else
1266 {
1267 /* Nothing to do */
1268 }
1269 }
1270
1271 /**
1272 * @brief Configure the boot lock.
1273 * @param BootLockConfig Specifies the activation of the BOOT_LOCK.
1274 * This parameter can be one of the following values:
1275 * @arg @ref OB_BOOT_LOCK_DISABLE Boot Lock mode deactivated
1276 * @arg @ref OB_BOOT_LOCK_ENABLE Boot Lock mode activated
1277 * @retval None
1278 */
FLASH_OB_BootLockConfig(uint32_t BootLockConfig)1279 static void FLASH_OB_BootLockConfig(uint32_t BootLockConfig)
1280 {
1281 /* Check the parameters */
1282 assert_param(IS_OB_BOOT_LOCK(BootLockConfig));
1283
1284 /* Configure the option bytes register */
1285 MODIFY_REG(FLASH->SECBOOTADD0R, FLASH_SECBOOTADD0R_BOOT_LOCK, BootLockConfig);
1286 }
1287 #endif /* __ARM_FEATURE_CMSE */
1288
1289 /**
1290 * @brief Configure the boot address.
1291 *
1292 * @param BootAddrConfig specifies the area to be configured.
1293 * This parameter can be one of the following values:
1294 * @arg @ref OB_BOOTADDR_NS0 Non-secure boot address 0
1295 * @arg @ref OB_BOOTADDR_NS1 Non-secure boot address 1
1296 * @arg @ref OB_BOOTADDR_SEC0 Secure boot address 0
1297 *
1298 * @param BootAddr Specifies the address used for the boot
1299 * This parameter can be page number between 0 and 0xFFFFFF00
1300 *
1301 * @retval None
1302 */
FLASH_OB_BootAddrConfig(uint32_t BootAddrConfig,uint32_t BootAddr)1303 static void FLASH_OB_BootAddrConfig(uint32_t BootAddrConfig, uint32_t BootAddr)
1304 {
1305 /* Check the parameters */
1306 assert_param(IS_OB_BOOTADDR_CONFIG(BootAddrConfig));
1307
1308 if (BootAddrConfig == OB_BOOTADDR_NS0)
1309 {
1310 MODIFY_REG(FLASH->NSBOOTADD0R, FLASH_NSBOOTADD0R_NSBOOTADD0, BootAddr);
1311 }
1312 else if (BootAddrConfig == OB_BOOTADDR_NS1)
1313 {
1314 MODIFY_REG(FLASH->NSBOOTADD1R, FLASH_NSBOOTADD1R_NSBOOTADD1, BootAddr);
1315 }
1316 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
1317 else if (BootAddrConfig == OB_BOOTADDR_SEC0)
1318 {
1319 MODIFY_REG(FLASH->SECBOOTADD0R, FLASH_SECBOOTADD0R_SECBOOTADD0, BootAddr);
1320 }
1321 #endif /* __ARM_FEATURE_CMSE */
1322 else
1323 {
1324 /* Empty statement (to be compliant MISRA 15.7) */
1325 }
1326 }
1327
1328 /**
1329 * @brief Return the FLASH Write Protection Option Bytes value.
1330 *
1331 * @param[in] WRPArea Specifies the area to be returned.
1332 * This parameter can be one of the following values:
1333 * @arg @ref OB_WRPAREA_BANK1_AREAA Flash Bank 1 Area A
1334 * @arg @ref OB_WRPAREA_BANK1_AREAB Flash Bank 1 Area B
1335 *
1336 * @param[out] WRPStartOffset Specifies the address where to copied the start page
1337 * of the write protected area
1338 *
1339 * @param[out] WRPEndOffset Specifies the address where to copied the end page of
1340 * the write protected area
1341 *
1342 * @param[out] WRPLock Specifies the lock status of the write protected area.
1343 * The returned value can be ENABLE or DISABLE
1344 *
1345 * @retval None
1346 */
FLASH_OB_GetWRP(uint32_t WRPArea,uint32_t * WRPStartOffset,uint32_t * WRPEndOffset,FunctionalState * WRPLock)1347 static void FLASH_OB_GetWRP(uint32_t WRPArea, uint32_t *WRPStartOffset, uint32_t *WRPEndOffset, FunctionalState *WRPLock)
1348 {
1349 /* Get the configuration of the write protected area */
1350 if (WRPArea == OB_WRPAREA_BANK1_AREAA)
1351 {
1352 *WRPStartOffset = READ_BIT(FLASH->WRPAR, FLASH_WRPAR_WRPA_PSTRT);
1353 *WRPEndOffset = (READ_BIT(FLASH->WRPAR, FLASH_WRPAR_WRPA_PEND) >> FLASH_WRPAR_WRPA_PEND_Pos);
1354 *WRPLock = (READ_BIT(FLASH->WRPAR, FLASH_WRPAR_UNLOCK) != 0U) ? DISABLE : ENABLE;
1355 }
1356 else if (WRPArea == OB_WRPAREA_BANK1_AREAB)
1357 {
1358 *WRPStartOffset = READ_BIT(FLASH->WRPBR, FLASH_WRPBR_WRPB_PSTRT);
1359 *WRPEndOffset = (READ_BIT(FLASH->WRPBR, FLASH_WRPBR_WRPB_PEND) >> FLASH_WRPBR_WRPB_PEND_Pos);
1360 *WRPLock = (READ_BIT(FLASH->WRPBR, FLASH_WRPBR_UNLOCK) != 0U) ? DISABLE : ENABLE;
1361 }
1362 else
1363 {
1364 /* Empty statement (to be compliant MISRA 15.7) */
1365 }
1366 }
1367
1368 /**
1369 * @brief Return the FLASH Read Protection level.
1370 * @retval FLASH ReadOut Protection Level
1371 * This return value can be one of the following values:
1372 * @arg @ref OB_RDP_LEVEL_0 No protection
1373 * @arg @ref OB_RDP_LEVEL_0_5 No debug access to secure area
1374 * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory
1375 * @arg @ref OB_RDP_LEVEL_2 Full chip protection
1376 */
FLASH_OB_GetRDP(void)1377 static uint32_t FLASH_OB_GetRDP(void)
1378 {
1379 uint32_t rdp_level = READ_BIT(FLASH->OPTR, FLASH_OPTR_RDP);
1380
1381 if ((rdp_level != OB_RDP_LEVEL_0) && (rdp_level != OB_RDP_LEVEL_0_5) && (rdp_level != OB_RDP_LEVEL_2))
1382 {
1383 return (OB_RDP_LEVEL_1);
1384 }
1385 else
1386 {
1387 return (rdp_level);
1388 }
1389 }
1390
1391 /**
1392 * @brief Return the FLASH User Option Byte value.
1393 * @retval The FLASH User Option Bytes values.
1394 * The return value can be a combination of @ref FLASH_OB_USER_BOR_LEVEL,
1395 * @arg @ref FLASH_OB_USER_nRST_STOP, @arg @ref FLASH_OB_USER_nRST_STANDBY,
1396 * @arg @ref FLASH_OB_USER_SRAM1_RST, @arg @ref FLASH_OB_USER_IWDG_SW,
1397 * @arg @ref FLASH_OB_USER_IWDG_STOP, @arg @ref FLASH_OB_USER_IWDG_STANDBY,
1398 * @arg @ref FLASH_OB_USER_WWDG_SW, @arg @ref FLASH_OB_USER_SRAM2_PAR,
1399 * @arg @ref FLASH_OB_USER_SRAM2_RST, @arg @ref FLASH_OB_USER_nSWBOOT0,
1400 * @arg @ref FLASH_OB_USER_nBOOT0 and @arg @ref OB_USER_TZEN(*)
1401 * (*) Feature not available on all devices of the family
1402 */
FLASH_OB_GetUser(void)1403 static uint32_t FLASH_OB_GetUser(void)
1404 {
1405 uint32_t user_config = READ_REG(FLASH->OPTR);
1406 CLEAR_BIT(user_config, FLASH_OPTR_RDP);
1407
1408 return user_config;
1409 }
1410
1411 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
1412 /**
1413 * @brief Return the watermarked-based secure area configuration.
1414 *
1415 * @param WMSecConfig [in/out] Specifies the area to be returned.
1416 * This parameter can be one of the following values:
1417 * @arg @ref OB_WMSEC_AREA1 select Flash Secure Area 1
1418 * When return from the function, this parameter will be a combinaison of the following values:
1419 * @arg @ref OB_WMSEC_AREA1 selected Flash Secure Area 1
1420 * @arg @ref OB_WMSEC_HDP_AREA_ENABLE Secure Hide Area in Secure Area enabled
1421 * @arg @ref OB_WMSEC_HDP_AREA_DISABLE Secure Hide Area in Secure Area disabled
1422 *
1423 * @param WMSecStartPage [out] Specifies the start page of the secure area
1424 *
1425 * @param WMSecEndPage [out] Specifies the end page of the secure area
1426 *
1427 * @param WMHDPEndPage [out] Specifies the end page of the secure hide area
1428 *
1429 * @retval None
1430 */
FLASH_OB_GetWMSEC(uint32_t * WMSecConfig,uint32_t * WMSecStartPage,uint32_t * WMSecEndPage,uint32_t * WMHDPEndPage)1431 static void FLASH_OB_GetWMSEC(uint32_t *WMSecConfig, uint32_t *WMSecStartPage, uint32_t *WMSecEndPage,
1432 uint32_t *WMHDPEndPage)
1433 {
1434 uint32_t tmp_secwm1 = 0U;
1435 uint32_t tmp_secwm2 = 0U;
1436
1437 /* Check the parameters */
1438 assert_param(IS_OB_WMSEC_CONFIG(*WMSecConfig));
1439 assert_param(IS_FLASH_BANK_EXCLUSIVE((*WMSecConfig) & 0x3U));
1440
1441 /* Read SECWM registers */
1442 if (((*WMSecConfig) & OB_WMSEC_AREA1) != 0U)
1443 {
1444 tmp_secwm1 = FLASH->SECWMR1;
1445 tmp_secwm2 = FLASH->SECWMR2;
1446 }
1447 else
1448 {
1449 /* Empty statement (to be compliant MISRA 15.7) */
1450 }
1451
1452 /* Configuration of secure area */
1453 *WMSecStartPage = (tmp_secwm1 & FLASH_SECWMR1_SECWM_PSTRT);
1454 *WMSecEndPage = ((tmp_secwm1 & FLASH_SECWMR1_SECWM_PEND) >> FLASH_SECWMR1_SECWM_PEND_Pos);
1455
1456 /* Configuration of secure hide area */
1457 *WMHDPEndPage = ((tmp_secwm2 & FLASH_SECWMR2_HDP_PEND) >> FLASH_SECWMR2_HDP_PEND_Pos);
1458
1459 if ((tmp_secwm2 & FLASH_SECWMR2_HDPEN) == 0U)
1460 {
1461 *WMSecConfig = ((*WMSecConfig) | OB_WMSEC_HDP_AREA_DISABLE);
1462 }
1463 else
1464 {
1465 *WMSecConfig = ((*WMSecConfig) | OB_WMSEC_HDP_AREA_ENABLE);
1466 }
1467 }
1468
1469 /**
1470 * @brief Return the boot lock configuration.
1471 *
1472 * @retval Value of Boot Lock configuration
1473 * It can be one of the following values:
1474 * @arg @ref OB_BOOT_LOCK_DISABLE Boot Lock mode deactivated
1475 * @arg @ref OB_BOOT_LOCK_ENABLE Boot Lock mode activated
1476 */
FLASH_OB_GetBootLock(void)1477 static uint32_t FLASH_OB_GetBootLock(void)
1478 {
1479 return (FLASH->SECBOOTADD0R & FLASH_SECBOOTADD0R_BOOT_LOCK);
1480 }
1481 #endif /* __ARM_FEATURE_CMSE */
1482
1483 /**
1484 * @brief Return the boot address.
1485 *
1486 * @param[in] BootAddrConfig Specifies the area to be returned
1487 * This parameter can be one of the following values:
1488 * @arg @ref OB_BOOTADDR_NS0 Non-secure boot address 0
1489 * @arg @ref OB_BOOTADDR_NS1 Non-secure boot address 1
1490 * @arg @ref OB_BOOTADDR_SEC0 Secure boot address 0
1491 *
1492 * @param[out] BootAddr specifies the boot address value
1493 *
1494 * @retval None
1495 */
FLASH_OB_GetBootAddr(uint32_t BootAddrConfig,uint32_t * BootAddr)1496 static void FLASH_OB_GetBootAddr(uint32_t BootAddrConfig, uint32_t *BootAddr)
1497 {
1498 if (BootAddrConfig == OB_BOOTADDR_NS0)
1499 {
1500 *BootAddr = (FLASH->NSBOOTADD0R & FLASH_NSBOOTADD0R_NSBOOTADD0);
1501 }
1502 else if (BootAddrConfig == OB_BOOTADDR_NS1)
1503 {
1504 *BootAddr = (FLASH->NSBOOTADD1R & FLASH_NSBOOTADD1R_NSBOOTADD1);
1505 }
1506 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
1507 else if (BootAddrConfig == OB_BOOTADDR_SEC0)
1508 {
1509 *BootAddr = (FLASH->SECBOOTADD0R & FLASH_SECBOOTADD0R_SECBOOTADD0);
1510 }
1511 #endif /* __ARM_FEATURE_CMSE */
1512 else
1513 {
1514 /* Empty statement (to be compliant MISRA 15.7) */
1515 }
1516 }
1517
1518 /**
1519 * @}
1520 */
1521
1522 /**
1523 * @}
1524 */
1525
1526 #endif /* HAL_FLASH_MODULE_ENABLED */
1527
1528 /**
1529 * @}
1530 */
1531
1532 /**
1533 * @}
1534 */
1535
