1 /** 2 ****************************************************************************** 3 * @file stm32wbaxx_hal_uart_ex.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32WBAxx_HAL_UART_EX_H 21 #define STM32WBAxx_HAL_UART_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32wbaxx_hal_def.h" 29 30 /** @addtogroup STM32WBAxx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UARTEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UARTEx_Exported_Types UARTEx Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART wake up from stop mode parameters 45 */ 46 typedef struct 47 { 48 uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF). 49 This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. 50 If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must 51 be filled up. */ 52 53 uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. 54 This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ 55 56 uint8_t Address; /*!< UART/USART node address (7-bit long max). */ 57 } UART_WakeUpTypeDef; 58 59 /** 60 * @brief UART Autonomous mode parameters 61 */ 62 typedef struct 63 { 64 uint32_t AutonomousModeState; /*!< Specifies the autonomous mode state.This parameter can be a value of 65 @ref UARTEx_Autonomous_mode.*/ 66 67 uint32_t TriggerSelection; /*!< Specifies which trigger will activate the Transmission automatically. 68 This parameter can be a value of @ref UARTEx_Autonomous_Trigger_selection 69 or @ref LPUARTEx_Autonomous_Trigger_selection.*/ 70 71 uint32_t TriggerPolarity; /*!< Specifies the autonomous mode trigger signal polarity. 72 This parameter can be a value of @ref UARTEx_Autonomous_Trigger_Polarity */ 73 74 uint32_t DataSize; /*!< Specifies the transmitted data size in byte */ 75 76 uint32_t IdleFrame; /*!< Specifies whether the IDLE frame transmission is enabled or disabled. 77 This parameter can be a value of @ref UARTEx_Autonomous_IDLE_FRAME. */ 78 } UART_AutonomousModeConfTypeDef; 79 80 /** 81 * @} 82 */ 83 84 /* Exported constants --------------------------------------------------------*/ 85 /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants 86 * @{ 87 */ 88 89 /** @defgroup UARTEx_Word_Length UARTEx Word Length 90 * @{ 91 */ 92 #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ 93 #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ 94 #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ 95 /** 96 * @} 97 */ 98 99 /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length 100 * @{ 101 */ 102 #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ 103 #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ 104 /** 105 * @} 106 */ 107 108 /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode 109 * @brief UART FIFO mode 110 * @{ 111 */ 112 #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ 113 #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ 114 /** 115 * @} 116 */ 117 118 /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level 119 * @brief UART TXFIFO threshold level 120 * @{ 121 */ 122 #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TX FIFO reaches 1/8 of its depth */ 123 #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TX FIFO reaches 1/4 of its depth */ 124 #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TX FIFO reaches 1/2 of its depth */ 125 #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TX FIFO reaches 3/4 of its depth */ 126 #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TX FIFO reaches 7/8 of its depth */ 127 #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TX FIFO becomes empty */ 128 /** 129 * @} 130 */ 131 132 /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level 133 * @brief UART RXFIFO threshold level 134 * @{ 135 */ 136 #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RX FIFO reaches 1/8 of its depth */ 137 #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RX FIFO reaches 1/4 of its depth */ 138 #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RX FIFO reaches 1/2 of its depth */ 139 #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RX FIFO reaches 3/4 of its depth */ 140 #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RX FIFO reaches 7/8 of its depth */ 141 #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RX FIFO becomes full */ 142 /** 143 * @} 144 */ 145 146 /** @defgroup UARTEx_Autonomous_mode UARTEx Autonomous Mode 147 * @brief UART Autonomous mode 148 * @{ 149 */ 150 #define UART_AUTONOMOUS_MODE_DISABLE 0x00000000U /*!< Autonomous mode disable */ 151 #define UART_AUTONOMOUS_MODE_ENABLE USART_AUTOCR_TRIGEN /*!< Autonomous mode enable */ 152 /** 153 * @} 154 */ 155 156 /** @defgroup UARTEx_Autonomous_Trigger_Polarity UARTEx Autonomous Trigger Polarity 157 * @brief UART Trigger polarity edge selection 158 * @{ 159 */ 160 #define UART_TRIG_POLARITY_RISING 0x00000000U /*!< UART triggered on rising edge */ 161 #define UART_TRIG_POLARITY_FALLING USART_AUTOCR_TRIGPOL /*!< UART triggered on falling edge */ 162 /** 163 * @} 164 */ 165 166 /** @defgroup UARTEx_Autonomous_IDLE_FRAME UARTEx Autonomous IDLE Frame 167 * @brief UART IDLE frame transmission 168 * @{ 169 */ 170 #define UART_IDLE_FRAME_ENABLE 0x00000000U /*!< IDLE Frame sent after enabling the transmitter */ 171 #define UART_IDLE_FRAME_DISABLE USART_AUTOCR_IDLEDIS /*!< IDLE Frame not sent after enabling the transmitter */ 172 /** 173 * @} 174 */ 175 176 /** @defgroup UARTEx_Autonomous_Trigger_selection UARTEx Autonomous trigger selection 177 * @brief UART Autonomous Trigger selection 178 * @{ 179 */ 180 #define UART_GPDMA1_CH0_TCF_TRG 0U /*!< UART GPDMA1 channel0 Internal Trigger */ 181 #define UART_GPDMA1_CH1_TCF_TRG 1U /*!< UART GPDMA1 channel1 Internal Trigger */ 182 #define UART_GPDMA1_CH2_TCF_TRG 2U /*!< UART GPDMA1 channel2 Internal Trigger */ 183 #define UART_GPDMA1_CH3_TCF_TRG 3U /*!< UART GPDMA1 channel3 Internal Trigger */ 184 #define UART_EXTI_LINE6_TRG 4U /*!< UART EXTI line 6 Internal Trigger */ 185 #define UART_EXTI_LINE9_TRG 5U /*!< UART EXTI line 9 Internal Trigger */ 186 #define UART_LPTIM1_OUT_TRG 6U /*!< UART LPTIM1 out Internal Trigger */ 187 #if defined(LPTIM2) 188 #define UART_LPTIM2_OUT_TRG 7U /*!< UART LPTIM2 out Internal Trigger */ 189 #endif /* LPTIM2 */ 190 #if defined(COMP12_COMMON) 191 #define UART_COMP1_OUT_TRG 8U /*!< UART COMP1 out Internal Trigger */ 192 #define UART_COMP2_OUT_TRG 9U /*!< UART COMP2 out Internal Trigger */ 193 #endif /* COMP12_COMMON */ 194 #define UART_RTC_ALRA_TRG 10U /*!< UART RTC alarm Internal Trigger */ 195 #define UART_RTC_WUT_TRG 11U /*!< UART RTC wakeup Internal Trigger */ 196 /** 197 * @} 198 */ 199 200 /** @defgroup LPUARTEx_Autonomous_Trigger_selection LPUARTEx Autonomous trigger selection 201 * @brief LPUART Autonomous Trigger selection 202 * @{ 203 */ 204 #define LPUART_GPDMA1_CH0_TCF_TRG 0U /*!< LPUART GPDMA1 channel0 Internal Trigger */ 205 #define LPUART_GPDMA1_CH1_TCF_TRG 1U /*!< LPUART GPDMA1 channel1 Internal Trigger */ 206 #define LPUART_GPDMA1_CH2_TCF_TRG 2U /*!< LPUART GPDMA1 channel2 Internal Trigger */ 207 #define LPUART_GPDMA1_CH3_TCF_TRG 3U /*!< LPUART GPDMA1 channel3 Internal Trigger */ 208 #define LPUART_EXTI_LINE6_TRG 4U /*!< LPUART EXTI line 6 Internal Trigger */ 209 #define LPUART_EXTI_LINE8_TRG 5U /*!< LPUART EXTI line 8 Internal Trigger */ 210 #define LPUART_LPTIM1_OUT_TRG 6U /*!< LPUART LPTIM1 channe11 Internal Trigger */ 211 #if defined(COMP12_COMMON) 212 #define LPUART_COMP1_OUT_TRG 8U /*!< LPUART COMP1 out Internal Trigger */ 213 #define LPUART_COMP2_OUT_TRG 9U /*!< LPUART COMP2 out Internal Trigger */ 214 #endif /* COMP12_COMMON */ 215 #define LPUART_RTC_ALRA_TRG 10U /*!< LPUART RTC alarm Internal Trigger */ 216 #define LPUART_RTC_WUT_TRG 11U /*!< LPUART RTC wakeup Internal Trigger */ 217 /** 218 * @} 219 */ 220 221 /** 222 * @} 223 */ 224 225 /* Exported macros -----------------------------------------------------------*/ 226 /* Exported functions --------------------------------------------------------*/ 227 /** @addtogroup UARTEx_Exported_Functions 228 * @{ 229 */ 230 231 /** @addtogroup UARTEx_Exported_Functions_Group1 232 * @{ 233 */ 234 235 /* Initialization and de-initialization functions ****************************/ 236 HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, 237 uint32_t DeassertionTime); 238 239 /** 240 * @} 241 */ 242 243 /** @addtogroup UARTEx_Exported_Functions_Group2 244 * @{ 245 */ 246 247 void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); 248 249 void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); 250 void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); 251 252 /** 253 * @} 254 */ 255 256 /** @addtogroup UARTEx_Exported_Functions_Group3 257 * @{ 258 */ 259 260 /* Peripheral Control functions **********************************************/ 261 HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); 262 HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); 263 HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); 264 265 HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); 266 267 HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); 268 HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); 269 HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 270 HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 271 272 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, 273 uint32_t Timeout); 274 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 275 #if defined(HAL_DMA_MODULE_ENABLED) 276 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 277 #endif /* HAL_DMA_MODULE_ENABLED */ 278 279 HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(const UART_HandleTypeDef *huart); 280 281 /* Autonomous Mode Control functions **********************************************/ 282 HAL_StatusTypeDef HAL_UARTEx_SetConfigAutonomousMode(UART_HandleTypeDef *huart, 283 const UART_AutonomousModeConfTypeDef *sConfig); 284 HAL_StatusTypeDef HAL_UARTEx_GetConfigAutonomousMode(const UART_HandleTypeDef *huart, 285 UART_AutonomousModeConfTypeDef *sConfig); 286 HAL_StatusTypeDef HAL_UARTEx_ClearConfigAutonomousMode(UART_HandleTypeDef *huart); 287 288 289 /** 290 * @} 291 */ 292 293 /** 294 * @} 295 */ 296 297 /* Private macros ------------------------------------------------------------*/ 298 /** @defgroup UARTEx_Private_Macros UARTEx Private Macros 299 * @{ 300 */ 301 302 /** @brief Report the UART clock source. 303 * @param __HANDLE__ specifies the UART Handle. 304 * @param __CLOCKSOURCE__ output variable. 305 * @retval UART clocking source, written in __CLOCKSOURCE__. 306 */ 307 #if defined (USART2) 308 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 309 do { \ 310 if((__HANDLE__)->Instance == USART1) \ 311 { \ 312 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 313 { \ 314 case RCC_USART1CLKSOURCE_PCLK2: \ 315 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 316 break; \ 317 case RCC_USART1CLKSOURCE_HSI: \ 318 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 319 break; \ 320 case RCC_USART1CLKSOURCE_SYSCLK: \ 321 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 322 break; \ 323 case RCC_USART1CLKSOURCE_LSE: \ 324 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 325 break; \ 326 default: \ 327 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 328 break; \ 329 } \ 330 } \ 331 else if((__HANDLE__)->Instance == USART2) \ 332 { \ 333 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 334 { \ 335 case RCC_USART2CLKSOURCE_PCLK1: \ 336 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 337 break; \ 338 case RCC_USART2CLKSOURCE_HSI: \ 339 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 340 break; \ 341 case RCC_USART2CLKSOURCE_SYSCLK: \ 342 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 343 break; \ 344 case RCC_USART2CLKSOURCE_LSE: \ 345 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 346 break; \ 347 default: \ 348 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 349 break; \ 350 } \ 351 } \ 352 else if((__HANDLE__)->Instance == LPUART1) \ 353 { \ 354 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 355 { \ 356 case RCC_LPUART1CLKSOURCE_PCLK7: \ 357 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK7; \ 358 break; \ 359 case RCC_LPUART1CLKSOURCE_HSI: \ 360 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 361 break; \ 362 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 363 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 364 break; \ 365 case RCC_LPUART1CLKSOURCE_LSE: \ 366 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 367 break; \ 368 default: \ 369 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 370 break; \ 371 } \ 372 } \ 373 else \ 374 { \ 375 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 376 } \ 377 } while(0U) 378 #else 379 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 380 do { \ 381 if((__HANDLE__)->Instance == USART1) \ 382 { \ 383 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 384 { \ 385 case RCC_USART1CLKSOURCE_PCLK2: \ 386 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 387 break; \ 388 case RCC_USART1CLKSOURCE_HSI: \ 389 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 390 break; \ 391 case RCC_USART1CLKSOURCE_SYSCLK: \ 392 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 393 break; \ 394 case RCC_USART1CLKSOURCE_LSE: \ 395 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 396 break; \ 397 default: \ 398 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 399 break; \ 400 } \ 401 } \ 402 else if((__HANDLE__)->Instance == LPUART1) \ 403 { \ 404 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 405 { \ 406 case RCC_LPUART1CLKSOURCE_PCLK7: \ 407 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK7; \ 408 break; \ 409 case RCC_LPUART1CLKSOURCE_HSI: \ 410 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 411 break; \ 412 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 413 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 414 break; \ 415 case RCC_LPUART1CLKSOURCE_LSE: \ 416 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 417 break; \ 418 default: \ 419 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 420 break; \ 421 } \ 422 } \ 423 else \ 424 { \ 425 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 426 } \ 427 } while(0U) 428 #endif /* USART2 */ 429 430 /** @brief Report the UART mask to apply to retrieve the received data 431 * according to the word length and to the parity bits activation. 432 * @note If PCE = 1, the parity bit is not included in the data extracted 433 * by the reception API(). 434 * This masking operation is not carried out in the case of 435 * DMA transfers. 436 * @param __HANDLE__ specifies the UART Handle. 437 * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. 438 */ 439 #define UART_MASK_COMPUTATION(__HANDLE__) \ 440 do { \ 441 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ 442 { \ 443 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 444 { \ 445 (__HANDLE__)->Mask = 0x01FFU ; \ 446 } \ 447 else \ 448 { \ 449 (__HANDLE__)->Mask = 0x00FFU ; \ 450 } \ 451 } \ 452 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ 453 { \ 454 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 455 { \ 456 (__HANDLE__)->Mask = 0x00FFU ; \ 457 } \ 458 else \ 459 { \ 460 (__HANDLE__)->Mask = 0x007FU ; \ 461 } \ 462 } \ 463 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ 464 { \ 465 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 466 { \ 467 (__HANDLE__)->Mask = 0x007FU ; \ 468 } \ 469 else \ 470 { \ 471 (__HANDLE__)->Mask = 0x003FU ; \ 472 } \ 473 } \ 474 else \ 475 { \ 476 (__HANDLE__)->Mask = 0x0000U; \ 477 } \ 478 } while(0U) 479 480 /** 481 * @brief Ensure that UART frame length is valid. 482 * @param __LENGTH__ UART frame length. 483 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 484 */ 485 #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ 486 ((__LENGTH__) == UART_WORDLENGTH_8B) || \ 487 ((__LENGTH__) == UART_WORDLENGTH_9B)) 488 489 /** 490 * @brief Ensure that UART wake-up address length is valid. 491 * @param __ADDRESS__ UART wake-up address length. 492 * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) 493 */ 494 #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ 495 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) 496 497 /** 498 * @brief Ensure that UART TXFIFO threshold level is valid. 499 * @param __THRESHOLD__ UART TXFIFO threshold level. 500 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 501 */ 502 #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ 503 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ 504 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ 505 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ 506 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ 507 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) 508 509 /** 510 * @brief Ensure that UART RXFIFO threshold level is valid. 511 * @param __THRESHOLD__ UART RXFIFO threshold level. 512 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 513 */ 514 #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ 515 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ 516 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ 517 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ 518 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ 519 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) 520 521 /** 522 * @brief Ensure that UART Trigger polarity state is valid. 523 * @param __POLARITY__ UART Trigger polarity. 524 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 525 */ 526 #define IS_UART_TRIGGER_POLARITY(__POLARITY__) (((__POLARITY__) == UART_TRIG_POLARITY_RISING) ||\ 527 ((__POLARITY__) == UART_TRIG_POLARITY_FALLING)) 528 529 /** 530 * @brief Ensure that UART IDLE Frame Transmit state is valid. 531 * @param __IDLE__ UART IDLE Frame Transmit state. 532 * @retval SET (__IDLE__ is valid) or RESET (__IDLE__ is invalid) 533 */ 534 #define IS_UART_IDLE_FRAME_TRANSMIT(__IDLE__) (((__IDLE__) == UART_IDLE_FRAME_ENABLE) ||\ 535 ((__IDLE__) == UART_IDLE_FRAME_DISABLE)) 536 537 /** 538 * @brief Ensure that UART Trigger source selection is valid. 539 * @param __SOURCE__ UART Trigger source selection. 540 * @retval SET (__SOURCE__ is valid) or RESET (__SOURCE__ is invalid) 541 */ 542 #define IS_UART_TRIGGER_SELECTION(__SOURCE__) ((__SOURCE__) <= 11U) 543 544 /** 545 * @brief Ensure that LPUART Trigger source selection is valid. 546 * @param __SOURCE__ LPUART Trigger source selection. 547 * @retval SET (__SOURCE__ is valid) or RESET (__SOURCE__ is invalid) 548 */ 549 #define IS_LPUART_TRIGGER_SELECTION(__SOURCE__) ((__SOURCE__) <= 11U) 550 551 /** 552 * @brief Ensure that the number of transferred data is valid. 553 * @param __SOURCE__ UART TX data size. 554 * @retval SET (__SOURCE__ is valid) or RESET (__SOURCE__ is invalid) 555 */ 556 #define IS_UART_TX_DATA_SIZE(__SOURCE__) ((__SOURCE__) <= 0xFFFFU) 557 558 /** 559 * @} 560 */ 561 562 /* Private functions ---------------------------------------------------------*/ 563 564 /** 565 * @} 566 */ 567 568 /** 569 * @} 570 */ 571 572 #ifdef __cplusplus 573 } 574 #endif 575 576 #endif /* STM32WBAxx_HAL_UART_EX_H */ 577 578
