1 /**
2   ******************************************************************************
3   * @file    stm32wbaxx_hal_spi_ex.h
4   * @author  MCD Application Team
5   * @brief   Header file of SPI HAL Extended module.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2022 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32WBAxx_HAL_SPI_EX_H
21 #define STM32WBAxx_HAL_SPI_EX_H
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26 
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32wbaxx_hal_def.h"
29 
30 /** @addtogroup STM32WBAxx_HAL_Driver
31   * @{
32   */
33 
34 /** @addtogroup SPIEx
35   * @{
36   */
37 
38 /* Exported types ------------------------------------------------------------*/
39 /** @defgroup SPIEx_Exported_Types SPIEx Exported Types
40   * @{
41   */
42 
43 /**
44   * @brief  SPI Autonomous Mode Configuration structure definition
45   */
46 typedef struct
47 {
48   uint32_t TriggerState;        /*!< Specifies the trigger state. This parameter can be a value
49                                      of @ref FunctionalState */
50 
51   uint32_t TriggerSelection;    /*!< Specifies the autonomous mode trigger signal selection. This parameter
52                                      can be a value of @ref SPI_AutonomousMode_TriggerSelection */
53 
54   uint32_t TriggerPolarity;     /*!< Specifies the autonomous mode trigger signal polarity sensitivity. This parameter
55                                      can be a value of @ref SPI_AutonomousMode_TriggerPolarity */
56 
57 } SPI_AutonomousModeConfTypeDef;
58 
59 
60 /**
61   * @}
62   */
63 
64 /* Exported constants --------------------------------------------------------*/
65 /** @defgroup SPIEx_Exported_Constants SPIEx Exported Constants
66   * @{
67   */
68 
69 /** @defgroup FunctionalState SPI Autonomous Mode State
70   * @{
71   */
72 #define SPI_AUTO_MODE_DISABLE           (0x00000000UL)
73 #define SPI_AUTO_MODE_ENABLE            SPI_AUTOCR_TRIGEN
74 /**
75   * @}
76   */
77 
78 /** @defgroup SPI_AutonomousMode_TriggerSelection Autonomous Mode Trigger Selection
79   * @{
80   */
81 #if defined (SPI1)
82 #define SPI_TRIG_GRP1                   (0x10000000U)      /* Trigger Group for SPI1 */
83 #endif /* SPI1 */
84 #define SPI_TRIG_GRP2                   (0x20000000U)      /* Trigger Group for SPI3 */
85 
86 #if defined (SPI_TRIG_GRP1)
87 /* HW Trigger signal is GPDMA_CH0_TRG   */
88 #define SPI_GRP1_GPDMA_CH0_TCF_TRG      (uint32_t)(SPI_TRIG_GRP1 | (0x00000000U))
89 /* HW Trigger signal is GPDMA_CH1_TRG   */
90 #define SPI_GRP1_GPDMA_CH1_TCF_TRG      (uint32_t)(SPI_TRIG_GRP1 | (0x1U << SPI_AUTOCR_TRIGSEL_Pos))
91 /* HW Trigger signal is GPDMA_CH2_TRG   */
92 #define SPI_GRP1_GPDMA_CH2_TCF_TRG      (uint32_t)(SPI_TRIG_GRP1 | (0x2U << SPI_AUTOCR_TRIGSEL_Pos))
93 /* HW Trigger signal is GPDMA_CH3_TRG   */
94 #define SPI_GRP1_GPDMA_CH3_TCF_TRG      (uint32_t)(SPI_TRIG_GRP1 | (0x3U << SPI_AUTOCR_TRIGSEL_Pos))
95 /* HW Trigger signal is EXTI4_TRG       */
96 #define SPI_GRP1_EXTI4_TRG              (uint32_t)(SPI_TRIG_GRP1 | (0x4U << SPI_AUTOCR_TRIGSEL_Pos))
97 /* HW Trigger signal is EXTI9_TRG       */
98 #define SPI_GRP1_EXTI9_TRG              (uint32_t)(SPI_TRIG_GRP1 | (0x5U << SPI_AUTOCR_TRIGSEL_Pos))
99 /* HW Trigger signal is LPTIM1_CH1_TRG  */
100 #define SPI_GRP1_LPTIM1_CH1_TRG         (uint32_t)(SPI_TRIG_GRP1 | (0x6U << SPI_AUTOCR_TRIGSEL_Pos))
101 #if defined(LPTIM2)
102 /* HW Trigger signal is LPTIM2_CH1_TRG  */
103 #define SPI_GRP1_LPTIM2_CH1_TRG         (uint32_t)(SPI_TRIG_GRP1 | (0x7U << SPI_AUTOCR_TRIGSEL_Pos))
104 #endif /* LPTIM2 */
105 #if defined(COMP1)
106 /* HW Trigger signal is COMP1_TRG       */
107 #define SPI_GRP1_COMP1_TRG              (uint32_t)(SPI_TRIG_GRP1 | (0x8U << SPI_AUTOCR_TRIGSEL_Pos))
108 #endif /* COMP1 */
109 #if defined(COMP2)
110 /* HW Trigger signal is COMP2_TRG       */
111 #define SPI_GRP1_COMP2_TRG              (uint32_t)(SPI_TRIG_GRP1 | (0x9U << SPI_AUTOCR_TRIGSEL_Pos))
112 #endif /* (COMP2) */
113 /* HW Trigger signal is RTC_ALRA_TRG    */
114 #define SPI_GRP1_RTC_ALRA_TRG           (uint32_t)(SPI_TRIG_GRP1 | (0xAU << SPI_AUTOCR_TRIGSEL_Pos))
115 /* HW Trigger signal is RTC_WUT_TRG     */
116 #define SPI_GRP1_RTC_WUT_TRG            (uint32_t)(SPI_TRIG_GRP1 | (0xBU << SPI_AUTOCR_TRIGSEL_Pos))
117 #endif /* SPI_TRIG_GRP1 */
118 
119 /* HW Trigger signal is GPDMA_CH0_TRG   */
120 #define SPI_GRP2_GPDMA_CH0_TCF_TRG      (uint32_t)(SPI_TRIG_GRP2 | (0x00000000U))
121 /* HW Trigger signal is GPDMA_CH1_TRG   */
122 #define SPI_GRP2_GPDMA_CH1_TCF_TRG      (uint32_t)(SPI_TRIG_GRP2 | (0x1U << SPI_AUTOCR_TRIGSEL_Pos))
123 /* HW Trigger signal is GPDMA_CH2_TRG   */
124 #define SPI_GRP2_GPDMA_CH2_TCF_TRG      (uint32_t)(SPI_TRIG_GRP2 | (0x2U << SPI_AUTOCR_TRIGSEL_Pos))
125 /* HW Trigger signal is GPDMA_CH3_TRG   */
126 #define SPI_GRP2_GPDMA_CH3_TCF_TRG      (uint32_t)(SPI_TRIG_GRP2 | (0x3U << SPI_AUTOCR_TRIGSEL_Pos))
127 /* HW Trigger signal is EXTI4_TRG       */
128 #define SPI_GRP2_EXTI4_TRG              (uint32_t)(SPI_TRIG_GRP2 | (0x4U << SPI_AUTOCR_TRIGSEL_Pos))
129 /* HW Trigger signal is EXTI8_TRG       */
130 #define SPI_GRP2_EXTI8_TRG              (uint32_t)(SPI_TRIG_GRP2 | (0x5U << SPI_AUTOCR_TRIGSEL_Pos))
131 /* HW Trigger signal is LPTIM1_CH1_TRG  */
132 #define SPI_GRP2_LPTIM1_CH1_TRG         (uint32_t)(SPI_TRIG_GRP2 | (0x6U << SPI_AUTOCR_TRIGSEL_Pos))
133 #if defined(COMP1)
134 /* HW Trigger signal is COMP1_TRG       */
135 #define SPI_GRP2_COMP1_TRG              (uint32_t)(SPI_TRIG_GRP2 | (0x8U << SPI_AUTOCR_TRIGSEL_Pos))
136 #endif /* COMP1 */
137 /* HW Trigger signal is RTC_ALRA_TRG    */
138 #define SPI_GRP2_RTC_ALRA_TRG           (uint32_t)(SPI_TRIG_GRP2 | (0xAU << SPI_AUTOCR_TRIGSEL_Pos))
139 /* HW Trigger signal is RTC_WUT_TRG     */
140 #define SPI_GRP2_RTC_WUT_TRG            (uint32_t)(SPI_TRIG_GRP2 | (0xBU << SPI_AUTOCR_TRIGSEL_Pos))
141 /**
142   * @}
143   */
144 
145 /** @defgroup SPI_AutonomousMode_TriggerPolarity Autonomous Mode Trigger Polarity
146   * @{
147   */
148 #define SPI_TRIG_POLARITY_RISING        (0x00000000UL)       /* SPI HW Trigger signal on rising edge  */
149 #define SPI_TRIG_POLARITY_FALLING       SPI_AUTOCR_TRIGPOL   /* SPI HW Trigger signal on falling edge */
150 /**
151   * @}
152   */
153 
154 /**
155   * @}
156   */
157 
158 /* Exported macros -----------------------------------------------------------*/
159 /** @defgroup SPIEx_Exported_Macros SPIEx Extended Exported Macros
160   * @{
161   */
162 
163 #define IS_SPI_AUTO_MODE(__MODE__)                  (((__MODE__) == SPI_AUTO_MODE_DISABLE) || \
164                                                      ((__MODE__) == SPI_AUTO_MODE_ENABLE))
165 
166 #if defined(SPI_TRIG_GRP1)
167 #define IS_SPI_AUTONOMOUS_INSTANCE(__INSTANCE__)    (IS_SPI_GRP1_INSTANCE(__INSTANCE__) || \
168                                                      IS_SPI_GRP2_INSTANCE(__INSTANCE__))
169 #else
170 #define IS_SPI_AUTONOMOUS_INSTANCE(__INSTANCE__)    IS_SPI_GRP1_INSTANCE(__INSTANCE__)
171 #endif /* SPI_TRIG_GRP1 */
172 
173 #if defined (SPI_TRIG_GRP1)
174 #define IS_SPI_TRIG_SOURCE(__INSTANCE__, __SOURCE__)  ((IS_SPI_GRP2_INSTANCE(__INSTANCE__)) ? \
175                                                         IS_SPI_GRP2_TRIG_SOURCE(__SOURCE__) : \
176                                                         IS_SPI_GRP1_TRIG_SOURCE(__SOURCE__))
177 #else
178 #define IS_SPI_TRIG_SOURCE(__INSTANCE__, __SOURCE__)  (IS_SPI_GRP2_TRIG_SOURCE(__SOURCE__))
179 #endif /* SPI_TRIG_GRP1 */
180 
181 #if defined(COMP1) && defined(COMP2)
182 #if defined (SPI_TRIG_GRP1)
183 #define IS_SPI_GRP1_TRIG_SOURCE(__SOURCE__)  (((__SOURCE__) == SPI_GRP1_GPDMA_CH0_TCF_TRG  ) || \
184                                               ((__SOURCE__) == SPI_GRP1_GPDMA_CH1_TCF_TRG  ) || \
185                                               ((__SOURCE__) == SPI_GRP1_GPDMA_CH2_TCF_TRG  ) || \
186                                               ((__SOURCE__) == SPI_GRP1_GPDMA_CH3_TCF_TRG  ) || \
187                                               ((__SOURCE__) == SPI_GRP1_EXTI4_TRG          ) || \
188                                               ((__SOURCE__) == SPI_GRP1_EXTI9_TRG          ) || \
189                                               ((__SOURCE__) == SPI_GRP1_LPTIM1_CH1_TRG     ) || \
190                                               ((__SOURCE__) == SPI_GRP1_LPTIM2_CH1_TRG     ) || \
191                                               ((__SOURCE__) == SPI_GRP1_COMP1_TRG          ) || \
192                                               ((__SOURCE__) == SPI_GRP1_COMP2_TRG          ) || \
193                                               ((__SOURCE__) == SPI_GRP1_RTC_ALRA_TRG       ) || \
194                                               ((__SOURCE__) == SPI_GRP1_RTC_WUT_TRG        ))
195 #endif /* SPI_TRIG_GRP1 */
196 
197 #define IS_SPI_GRP2_TRIG_SOURCE(__SOURCE__)  (((__SOURCE__) == SPI_GRP2_GPDMA_CH0_TCF_TRG  ) || \
198                                               ((__SOURCE__) == SPI_GRP2_GPDMA_CH1_TCF_TRG  ) || \
199                                               ((__SOURCE__) == SPI_GRP2_GPDMA_CH2_TCF_TRG  ) || \
200                                               ((__SOURCE__) == SPI_GRP2_GPDMA_CH3_TCF_TRG  ) || \
201                                               ((__SOURCE__) == SPI_GRP2_EXTI4_TRG          ) || \
202                                               ((__SOURCE__) == SPI_GRP2_EXTI8_TRG          ) || \
203                                               ((__SOURCE__) == SPI_GRP2_LPTIM1_CH1_TRG     ) || \
204                                               ((__SOURCE__) == SPI_GRP2_COMP1_TRG          ) || \
205                                               ((__SOURCE__) == SPI_GRP2_RTC_ALRA_TRG       ) || \
206                                               ((__SOURCE__) == SPI_GRP2_RTC_WUT_TRG        ))
207 #else /* COMP1 && COMP2 */
208 #if defined (SPI_TRIG_GRP1)
209 #define IS_SPI_GRP1_TRIG_SOURCE(__SOURCE__)  (((__SOURCE__) == SPI_GRP1_GPDMA_CH0_TCF_TRG  ) || \
210                                               ((__SOURCE__) == SPI_GRP1_GPDMA_CH1_TCF_TRG  ) || \
211                                               ((__SOURCE__) == SPI_GRP1_GPDMA_CH2_TCF_TRG  ) || \
212                                               ((__SOURCE__) == SPI_GRP1_GPDMA_CH3_TCF_TRG  ) || \
213                                               ((__SOURCE__) == SPI_GRP1_EXTI4_TRG          ) || \
214                                               ((__SOURCE__) == SPI_GRP1_EXTI9_TRG          ) || \
215                                               ((__SOURCE__) == SPI_GRP1_LPTIM1_CH1_TRG     ) || \
216                                               ((__SOURCE__) == SPI_GRP1_LPTIM2_CH1_TRG     ) || \
217                                               ((__SOURCE__) == SPI_GRP1_RTC_ALRA_TRG       ) || \
218                                               ((__SOURCE__) == SPI_GRP1_RTC_WUT_TRG        ))
219 #endif /* SPI_TRIG_GRP1 */
220 
221 #define IS_SPI_GRP2_TRIG_SOURCE(__SOURCE__)  (((__SOURCE__) == SPI_GRP2_GPDMA_CH0_TCF_TRG  ) || \
222                                               ((__SOURCE__) == SPI_GRP2_GPDMA_CH1_TCF_TRG  ) || \
223                                               ((__SOURCE__) == SPI_GRP2_GPDMA_CH2_TCF_TRG  ) || \
224                                               ((__SOURCE__) == SPI_GRP2_GPDMA_CH3_TCF_TRG  ) || \
225                                               ((__SOURCE__) == SPI_GRP2_EXTI4_TRG          ) || \
226                                               ((__SOURCE__) == SPI_GRP2_EXTI8_TRG          ) || \
227                                               ((__SOURCE__) == SPI_GRP2_LPTIM1_CH1_TRG     ) || \
228                                               ((__SOURCE__) == SPI_GRP2_RTC_ALRA_TRG       ) || \
229                                               ((__SOURCE__) == SPI_GRP2_RTC_WUT_TRG        ))
230 #endif /* COMP1 && COMP2 */
231 
232 #define IS_SPI_AUTO_MODE_TRG_POL(__POLARITY__)      (((__POLARITY__) == SPI_TRIG_POLARITY_RISING) || \
233                                                      ((__POLARITY__) == SPI_TRIG_POLARITY_FALLING))
234 
235 /**
236   * @}
237   */
238 
239 /* Exported functions --------------------------------------------------------*/
240 /** @addtogroup SPIEx_Exported_Functions
241   * @{
242   */
243 
244 /* Initialization and de-initialization functions  ****************************/
245 /* IO operation functions *****************************************************/
246 /** @addtogroup SPIEx_Exported_Functions_Group1
247   * @{
248   */
249 HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi);
250 HAL_StatusTypeDef HAL_SPIEx_EnableLockConfiguration(SPI_HandleTypeDef *hspi);
251 HAL_StatusTypeDef HAL_SPIEx_ConfigureUnderrun(SPI_HandleTypeDef *hspi, uint32_t UnderrunDetection,
252                                               uint32_t UnderrunBehaviour);
253 /**
254   * @}
255   */
256 
257 /** @addtogroup SPI_Autonomous_Mode_Functions Autonomous Mode Functions
258   * @{
259   */
260 HAL_StatusTypeDef HAL_SPIEx_SetConfigAutonomousMode(SPI_HandleTypeDef *hspi,
261                                                     const SPI_AutonomousModeConfTypeDef *sConfig);
262 HAL_StatusTypeDef HAL_SPIEx_GetConfigAutonomousMode(const SPI_HandleTypeDef *hspi,
263                                                     SPI_AutonomousModeConfTypeDef *sConfig);
264 HAL_StatusTypeDef HAL_SPIEx_ClearConfigAutonomousMode(SPI_HandleTypeDef *hspi);
265 /**
266   * @}
267   */
268 /**
269   * @}
270   */
271 
272 /**
273   * @}
274   */
275 
276 /**
277   * @}
278   */
279 
280 
281 #ifdef __cplusplus
282 }
283 #endif
284 
285 #endif /* STM32WBAxx_HAL_SPI_EX_H */
286