1 /** 2 ****************************************************************************** 3 * @file stm32wbaxx_hal_smbus_ex.h 4 * @author MCD Application Team 5 * @brief Header file of SMBUS HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32WBAxx_HAL_SMBUS_EX_H 21 #define STM32WBAxx_HAL_SMBUS_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32wbaxx_hal_def.h" 29 30 /** @addtogroup STM32WBAxx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup SMBUSEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup SMBUS_Exported_Types SMBUS Exported Types 40 * @{ 41 */ 42 43 /** @defgroup SMBUS_Autonomous_Mode_Configuration_Structure_definition Autonomous Mode Configuration 44 Structure definition. 45 * @brief SMBUS Autonomous Mode Configuration structure definition 46 * @{ 47 */ 48 typedef struct 49 { 50 uint32_t TriggerState; /*!< Specifies the trigger state. This parameter can be a value 51 of @ref SMBUSEx_AutonomousMode_FunctionalState */ 52 53 uint32_t TriggerSelection; /*!< Specifies the autonomous mode trigger signal selection. This parameter 54 can be a value of @ref SMBUSEx_AutonomousMode_TriggerSelection */ 55 56 uint32_t TriggerPolarity; /*!< Specifies the autonomous mode trigger signal polarity sensitivity. This parameter 57 can be a value of @ref SMBUSEx_AutonomousMode_TriggerPolarity */ 58 59 } SMBUS_AutonomousModeConfTypeDef; 60 /** 61 * @} 62 */ 63 64 /** 65 * @} 66 */ 67 68 /* Exported constants --------------------------------------------------------*/ 69 /** @defgroup SMBUSEx_Exported_Constants SMBUS Extended Exported Constants 70 * @{ 71 */ 72 73 /** @defgroup SMBUSEx_FastModePlus SMBUS Extended Fast Mode Plus 74 * @{ 75 */ 76 #define SMBUS_FASTMODEPLUS_ENABLE 0x00000000U /*!< Enable Fast Mode Plus */ 77 #define SMBUS_FASTMODEPLUS_DISABLE 0x00000001U /*!< Disable Fast Mode Plus */ 78 /** 79 * @} 80 */ 81 82 /** @defgroup SMBUSEx_AutonomousMode_FunctionalState SMBUS Extended Autonomous Mode State 83 * @{ 84 */ 85 #define SMBUS_AUTO_MODE_DISABLE (0x00000000U) /* Autonomous mode disable */ 86 #define SMBUS_AUTO_MODE_ENABLE I2C_AUTOCR_TRIGEN /* Autonomous mode enable */ 87 /** 88 * @} 89 */ 90 91 /** @defgroup SMBUSEx_AutonomousMode_TriggerSelection SMBUS Extended Autonomous Mode Trigger Selection 92 * @{ 93 */ 94 #if defined(I2C1) 95 #define SMBUS_TRIG_GRP1 (0x10000000U) /*!< Trigger Group for I2C1 */ 96 #endif /* I2C1 */ 97 #define SMBUS_TRIG_GRP2 (0x20000000U) /*!< Trigger Group for I2C3 */ 98 99 #if defined(SMBUS_TRIG_GRP1) 100 #define SMBUS_GRP1_GPDMA_CH0_TCF_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x00000000U)) 101 /*!< HW Trigger signal is GPDMA_CH0_TRG */ 102 #define SMBUS_GRP1_GPDMA_CH1_TCF_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x1U << I2C_AUTOCR_TRIGSEL_Pos)) 103 /*!< HW Trigger signal is GPDMA_CH1_TRG */ 104 #define SMBUS_GRP1_GPDMA_CH2_TCF_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x2U << I2C_AUTOCR_TRIGSEL_Pos)) 105 /*!< HW Trigger signal is GPDMA_CH2_TRG */ 106 #define SMBUS_GRP1_GPDMA_CH3_TCF_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x3U << I2C_AUTOCR_TRIGSEL_Pos)) 107 /*!< HW Trigger signal is GPDMA_CH3_TRG */ 108 #define SMBUS_GRP1_EXTI5_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x4U << I2C_AUTOCR_TRIGSEL_Pos)) 109 /*!< HW Trigger signal is EXTI5_TRG */ 110 #define SMBUS_GRP1_EXTI9_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x5U << I2C_AUTOCR_TRIGSEL_Pos)) 111 /*!< HW Trigger signal is EXTI9_TRG */ 112 #define SMBUS_GRP1_LPTIM1_CH1_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x6U << I2C_AUTOCR_TRIGSEL_Pos)) 113 /*!< HW Trigger signal is LPTIM1_CH1_TRG */ 114 #define SMBUS_GRP1_LPTIM2_CH1_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x7U << I2C_AUTOCR_TRIGSEL_Pos)) 115 /*!< HW Trigger signal is LPTIM2_CH1_TRG */ 116 #if defined(COMP1) 117 #define SMBUS_GRP1_COMP1_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x8U << I2C_AUTOCR_TRIGSEL_Pos)) 118 /*!< HW Trigger signal is COMP1_TRG */ 119 #endif /* COMP1 */ 120 #if defined(COMP2) 121 #define SMBUS_GRP1_COMP2_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x9U << I2C_AUTOCR_TRIGSEL_Pos)) 122 /*!< HW Trigger signal is COMP2_TRG */ 123 #endif /* COMP2 */ 124 #define SMBUS_GRP1_RTC_ALRA_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0xAU << I2C_AUTOCR_TRIGSEL_Pos)) 125 /*!< HW Trigger signal is RTC_ALRA_TRG */ 126 #define SMBUS_GRP1_RTC_WUT_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0xBU << I2C_AUTOCR_TRIGSEL_Pos)) 127 /*!< HW Trigger signal is RTC_WUT_TRG */ 128 #endif /* SMBUS_TRIG_GRP1 */ 129 130 #define SMBUS_GRP2_GPDMA_CH0_TCF_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x00000000U)) 131 /*!< HW Trigger signal is GPDMA_CH0_TRG */ 132 #define SMBUS_GRP2_GPDMA_CH1_TCF_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x1U << I2C_AUTOCR_TRIGSEL_Pos)) 133 /*!< HW Trigger signal is GPDMA_CH1_TRG */ 134 #define SMBUS_GRP2_GPDMA_CH2_TCF_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x2U << I2C_AUTOCR_TRIGSEL_Pos)) 135 /*!< HW Trigger signal is GPDMA_CH2_TRG */ 136 #define SMBUS_GRP2_GPDMA_CH3_TCF_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x3U << I2C_AUTOCR_TRIGSEL_Pos)) 137 /*!< HW Trigger signal is GPDMA_CH3_TRG */ 138 #define SMBUS_GRP2_EXTI5_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x4U << I2C_AUTOCR_TRIGSEL_Pos)) 139 /*!< HW Trigger signal is EXTI5_TRG */ 140 #define SMBUS_GRP2_EXTI8_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x5U << I2C_AUTOCR_TRIGSEL_Pos)) 141 /*!< HW Trigger signal is EXTI8_TRG */ 142 #define SMBUS_GRP2_LPTIM1_CH1_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x6U << I2C_AUTOCR_TRIGSEL_Pos)) 143 /*!< HW Trigger signal is LPTIM1_CH1_TRG */ 144 #if defined(COMP1) 145 #define SMBUS_GRP2_COMP1_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x8U << I2C_AUTOCR_TRIGSEL_Pos)) 146 /*!< HW Trigger signal is COMP1_TRG */ 147 #endif /* COMP1 */ 148 #if defined(COMP2) 149 #define SMBUS_GRP2_COMP2_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x9U << I2C_AUTOCR_TRIGSEL_Pos)) 150 /*!< HW Trigger signal is COMP2_TRG */ 151 #endif /* COMP2 */ 152 #define SMBUS_GRP2_RTC_ALRA_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0xAU << I2C_AUTOCR_TRIGSEL_Pos)) 153 /*!< HW Trigger signal is RTC_ALRA_TRG */ 154 #define SMBUS_GRP2_RTC_WUT_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0xBU << I2C_AUTOCR_TRIGSEL_Pos)) 155 /*!< HW Trigger signal is RTC_WUT_TRG */ 156 /** 157 * @} 158 */ 159 160 /** @defgroup SMBUSEx_AutonomousMode_TriggerPolarity Extended Autonomous Mode Trigger Polarity 161 * @{ 162 */ 163 #define SMBUS_TRIG_POLARITY_RISING (0x00000000U) /* SMBUS HW Trigger signal on rising edge */ 164 #define SMBUS_TRIG_POLARITY_FALLING I2C_AUTOCR_TRIGPOL /* SMBUS HW Trigger signal on falling edge */ 165 /** 166 * @} 167 */ 168 169 /** 170 * @} 171 */ 172 173 /* Exported macro ------------------------------------------------------------*/ 174 /** @defgroup SMBUSEx_Exported_Macros SMBUS Extended Exported Macros 175 * @{ 176 */ 177 178 /** 179 * @} 180 */ 181 182 /* Exported functions --------------------------------------------------------*/ 183 /** @addtogroup SMBUSEx_Exported_Functions SMBUS Extended Exported Functions 184 * @{ 185 */ 186 187 /** @addtogroup SMBUSEx_Exported_Functions_Group2 WakeUp Mode Functions 188 * @{ 189 */ 190 /* Peripheral Control functions ************************************************/ 191 HAL_StatusTypeDef HAL_SMBUSEx_EnableWakeUp(SMBUS_HandleTypeDef *hsmbus); 192 HAL_StatusTypeDef HAL_SMBUSEx_DisableWakeUp(SMBUS_HandleTypeDef *hsmbus); 193 /** 194 * @} 195 */ 196 197 /** @addtogroup SMBUSEx_Exported_Functions_Group3 Fast Mode Plus Functions 198 * @{ 199 */ 200 HAL_StatusTypeDef HAL_SMBUSEx_ConfigFastModePlus(SMBUS_HandleTypeDef *hsmbus, uint32_t FastModePlus); 201 /** 202 * @} 203 */ 204 205 /** @addtogroup SMBUSEx_Exported_Functions_Group4 Autonomous Mode Functions 206 * @{ 207 */ 208 HAL_StatusTypeDef HAL_SMBUSEx_SetConfigAutonomousMode(SMBUS_HandleTypeDef *hsmbus, 209 const SMBUS_AutonomousModeConfTypeDef *sConfig); 210 HAL_StatusTypeDef HAL_SMBUSEx_GetConfigAutonomousMode(const SMBUS_HandleTypeDef *hsmbus, 211 SMBUS_AutonomousModeConfTypeDef *sConfig); 212 HAL_StatusTypeDef HAL_SMBUSEx_ClearConfigAutonomousMode(SMBUS_HandleTypeDef *hsmbus); 213 /** 214 * @} 215 */ 216 217 /** 218 * @} 219 */ 220 221 /* Private constants ---------------------------------------------------------*/ 222 /** @defgroup SMBUSEx_Private_Constants SMBUS Extended Private Constants 223 * @{ 224 */ 225 226 /** 227 * @} 228 */ 229 230 /* Private macros ------------------------------------------------------------*/ 231 /** @defgroup SMBUSEx_Private_Macro SMBUS Extended Private Macros 232 * @{ 233 */ 234 #define IS_SMBUS_FASTMODEPLUS(__CONFIG__) (((__CONFIG__) == (SMBUS_FASTMODEPLUS_ENABLE)) || \ 235 ((__CONFIG__) == (SMBUS_FASTMODEPLUS_DISABLE))) 236 237 #define IS_SMBUS_AUTO_MODE(__MODE__) (((__MODE__) == SMBUS_AUTO_MODE_DISABLE) || \ 238 ((__MODE__) == SMBUS_AUTO_MODE_ENABLE)) 239 240 #if defined(SMBUS_TRIG_GRP1) 241 #define IS_SMBUS_TRIG_SOURCE(__INSTANCE__, __SOURCE__) (((__INSTANCE__) == I2C3) ? \ 242 IS_SMBUS_GRP2_TRIG_SOURCE(__SOURCE__) : \ 243 IS_SMBUS_GRP1_TRIG_SOURCE(__SOURCE__)) 244 #else 245 #define IS_SMBUS_TRIG_SOURCE(__INSTANCE__, __SOURCE__) (IS_SMBUS_GRP2_TRIG_SOURCE(__SOURCE__)) 246 #endif /* SMBUS_TRIG_GRP1 */ 247 248 #if defined(COMP1) && defined(COMP2) 249 #if defined(SMBUS_TRIG_GRP1) 250 #define IS_SMBUS_GRP1_TRIG_SOURCE(__SOURCE__) (((__SOURCE__) == SMBUS_GRP1_GPDMA_CH0_TCF_TRG ) || \ 251 ((__SOURCE__) == SMBUS_GRP1_GPDMA_CH1_TCF_TRG ) || \ 252 ((__SOURCE__) == SMBUS_GRP1_GPDMA_CH2_TCF_TRG ) || \ 253 ((__SOURCE__) == SMBUS_GRP1_GPDMA_CH3_TCF_TRG ) || \ 254 ((__SOURCE__) == SMBUS_GRP1_EXTI5_TRG ) || \ 255 ((__SOURCE__) == SMBUS_GRP1_EXTI9_TRG ) || \ 256 ((__SOURCE__) == SMBUS_GRP1_LPTIM1_CH1_TRG ) || \ 257 ((__SOURCE__) == SMBUS_GRP1_LPTIM2_CH1_TRG ) || \ 258 ((__SOURCE__) == SMBUS_GRP1_COMP1_TRG ) || \ 259 ((__SOURCE__) == SMBUS_GRP1_COMP2_TRG ) || \ 260 ((__SOURCE__) == SMBUS_GRP1_RTC_ALRA_TRG ) || \ 261 ((__SOURCE__) == SMBUS_GRP1_RTC_WUT_TRG )) 262 #endif /* SMBUS_TRIG_GRP1 */ 263 264 #define IS_SMBUS_GRP2_TRIG_SOURCE(__SOURCE__) (((__SOURCE__) == SMBUS_GRP2_GPDMA_CH0_TCF_TRG ) || \ 265 ((__SOURCE__) == SMBUS_GRP2_GPDMA_CH1_TCF_TRG ) || \ 266 ((__SOURCE__) == SMBUS_GRP2_GPDMA_CH2_TCF_TRG ) || \ 267 ((__SOURCE__) == SMBUS_GRP2_GPDMA_CH3_TCF_TRG ) || \ 268 ((__SOURCE__) == SMBUS_GRP2_EXTI5_TRG ) || \ 269 ((__SOURCE__) == SMBUS_GRP2_EXTI8_TRG ) || \ 270 ((__SOURCE__) == SMBUS_GRP2_LPTIM1_CH1_TRG ) || \ 271 ((__SOURCE__) == SMBUS_GRP2_COMP1_TRG ) || \ 272 ((__SOURCE__) == SMBUS_GRP2_COMP2_TRG ) || \ 273 ((__SOURCE__) == SMBUS_GRP2_RTC_ALRA_TRG ) || \ 274 ((__SOURCE__) == SMBUS_GRP2_RTC_WUT_TRG )) 275 276 #else 277 278 #define IS_SMBUS_GRP1_TRIG_SOURCE(__SOURCE__) (((__SOURCE__) == SMBUS_GRP1_GPDMA_CH0_TCF_TRG ) || \ 279 ((__SOURCE__) == SMBUS_GRP1_GPDMA_CH1_TCF_TRG ) || \ 280 ((__SOURCE__) == SMBUS_GRP1_GPDMA_CH2_TCF_TRG ) || \ 281 ((__SOURCE__) == SMBUS_GRP1_GPDMA_CH3_TCF_TRG ) || \ 282 ((__SOURCE__) == SMBUS_GRP1_EXTI5_TRG ) || \ 283 ((__SOURCE__) == SMBUS_GRP1_EXTI9_TRG ) || \ 284 ((__SOURCE__) == SMBUS_GRP1_LPTIM1_CH1_TRG ) || \ 285 ((__SOURCE__) == SMBUS_GRP1_LPTIM2_CH1_TRG ) || \ 286 ((__SOURCE__) == SMBUS_GRP1_RTC_ALRA_TRG ) || \ 287 ((__SOURCE__) == SMBUS_GRP1_RTC_WUT_TRG )) 288 289 #define IS_SMBUS_GRP2_TRIG_SOURCE(__SOURCE__) (((__SOURCE__) == SMBUS_GRP2_GPDMA_CH0_TCF_TRG ) || \ 290 ((__SOURCE__) == SMBUS_GRP2_GPDMA_CH1_TCF_TRG ) || \ 291 ((__SOURCE__) == SMBUS_GRP2_GPDMA_CH2_TCF_TRG ) || \ 292 ((__SOURCE__) == SMBUS_GRP2_GPDMA_CH3_TCF_TRG ) || \ 293 ((__SOURCE__) == SMBUS_GRP2_EXTI5_TRG ) || \ 294 ((__SOURCE__) == SMBUS_GRP2_EXTI8_TRG ) || \ 295 ((__SOURCE__) == SMBUS_GRP2_LPTIM1_CH1_TRG ) || \ 296 ((__SOURCE__) == SMBUS_GRP2_RTC_ALRA_TRG ) || \ 297 ((__SOURCE__) == SMBUS_GRP2_RTC_WUT_TRG )) 298 #endif /* COMP1 && COMP2 */ 299 300 #if defined(SMBUS_TRIG_GRP1) 301 #define IS_SMBUS_TRIG_INPUT_INSTANCE(__INSTANCE__) (IS_SMBUS_GRP1_INSTANCE(__INSTANCE__) || \ 302 IS_SMBUS_GRP2_INSTANCE(__INSTANCE__)) 303 #else 304 #define IS_SMBUS_TRIG_INPUT_INSTANCE(__INSTANCE__) IS_SMBUS_GRP1_INSTANCE(__INSTANCE__) 305 #endif /* SMBUS_TRIG_GRP1 */ 306 307 #define IS_SMBUS_AUTO_MODE_TRG_POL(__POLARITY__) (((__POLARITY__) == SMBUS_TRIG_POLARITY_RISING) || \ 308 ((__POLARITY__) == SMBUS_TRIG_POLARITY_FALLING)) 309 /** 310 * @} 311 */ 312 313 /* Private Functions ---------------------------------------------------------*/ 314 /** @defgroup SMBUSEx_Private_Functions SMBUS Extended Private Functions 315 * @{ 316 */ 317 /* Private functions are defined in stm32wbaxx_hal_smbus_ex.c file */ 318 /** 319 * @} 320 */ 321 322 /** 323 * @} 324 */ 325 326 /** 327 * @} 328 */ 329 330 #ifdef __cplusplus 331 } 332 #endif 333 334 #endif /* STM32WBAxx_HAL_SMBUS_EX_H */ 335
