1 /** 2 ****************************************************************************** 3 * @file stm32wbaxx_hal_pwr.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32WBAxx_HAL_PWR_H 21 #define STM32WBAxx_HAL_PWR_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif /* __cplusplus */ 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32wbaxx_hal_def.h" 29 30 /** @addtogroup STM32WBAxx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup PWR 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 40 /** @defgroup PWR_Exported_Types PWR Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief PWR PVD configuration structure definition 46 */ 47 typedef struct 48 { 49 uint32_t PVDLevel; /*!< Specifies the PVD detection level. 50 This parameter can be a value of 51 @ref PWR_PVD_Detection_Level. */ 52 53 uint32_t Mode; /*!< Specifies the operating mode for the selected pins. 54 This parameter can be a value of @ref PWR_PVD_Mode. */ 55 } PWR_PVDTypeDef; 56 /** 57 * @} 58 */ 59 60 /* Exported constants --------------------------------------------------------*/ 61 62 /** @defgroup PWR_Exported_Constants PWR Exported Constants 63 * @{ 64 */ 65 66 /** @defgroup PWR_PVD_Detection_Level Programmable Voltage Detection Level 67 * @{ 68 */ 69 #define PWR_PVDLEVEL_0 0x00000000UL /*!< PVD threshold around 2.0 V */ 70 #define PWR_PVDLEVEL_1 (PWR_SVMCR_PVDLS_0) /*!< PVD threshold around 2.2 V */ 71 #define PWR_PVDLEVEL_2 (PWR_SVMCR_PVDLS_1) /*!< PVD threshold around 2.4 V */ 72 #define PWR_PVDLEVEL_3 (PWR_SVMCR_PVDLS_0 | PWR_SVMCR_PVDLS_1) /*!< PVD threshold around 2.5 V */ 73 #define PWR_PVDLEVEL_4 (PWR_SVMCR_PVDLS_2) /*!< PVD threshold around 2.6 V */ 74 #define PWR_PVDLEVEL_5 (PWR_SVMCR_PVDLS_0 | PWR_SVMCR_PVDLS_2) /*!< PVD threshold around 2.8 V */ 75 #define PWR_PVDLEVEL_6 (PWR_SVMCR_PVDLS_1 | PWR_SVMCR_PVDLS_2) /*!< PVD threshold around 2.9 V */ 76 #define PWR_PVDLEVEL_7 (PWR_SVMCR_PVDLS) /*!< External input analog voltage 77 (compared internally to VREFINT) */ 78 /** 79 * @} 80 */ 81 82 /** @defgroup PWR_PVD_Mode PWR PVD Mode 83 * @{ 84 */ 85 #define PWR_PVD_MODE_NORMAL (0x00U) /*!< Basic Mode is used */ 86 #define PWR_PVD_MODE_IT_RISING (0x05U) /*!< External Interrupt Mode with Rising edge trigger detection */ 87 #define PWR_PVD_MODE_IT_FALLING (0x06U) /*!< External Interrupt Mode with Falling edge trigger detection */ 88 #define PWR_PVD_MODE_IT_RISING_FALLING (0x07U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 89 #define PWR_PVD_MODE_EVENT_RISING (0x09U) /*!< Event Mode with Rising edge trigger detection */ 90 #define PWR_PVD_MODE_EVENT_FALLING (0x0AU) /*!< Event Mode with Falling edge trigger detection */ 91 #define PWR_PVD_MODE_EVENT_RISING_FALLING (0x0BU) /*!< Event Mode with Rising/Falling edge trigger detection */ 92 /** 93 * @} 94 */ 95 96 /** @defgroup PWR_Regulator_In_LowPower_Mode PWR Regulator State in Sleep/Stop Mode 97 * @{ 98 */ 99 #define PWR_MAINREGULATOR_ON (0x00U) /*!< Main Regulator ON in Run Mode */ 100 #define PWR_LOWPOWERREGULATOR_ON (PWR_CR1_LPMS_0) /*!< Main Regulator ON in Low Power Mode */ 101 /** 102 * @} 103 */ 104 105 /** @defgroup PWR_Low_Power_Mode_Selection PWR Low Power Mode Selection 106 * @{ 107 */ 108 #define PWR_LOWPOWERMODE_STOP0 (0x00000000u) /*!< Stop 0: stop mode with main regulator */ 109 #define PWR_LOWPOWERMODE_STOP1 (PWR_CR1_LPMS_0) /*!< Stop 1: stop mode with low power regulator */ 110 #define PWR_LOWPOWERMODE_STANDBY (PWR_CR1_LPMS_2) /*!< Standby mode */ 111 /** 112 * @} 113 */ 114 115 /** @defgroup PWR_Sleep_Mode_Entry PWR Sleep Mode Entry 116 * @{ 117 */ 118 #define PWR_SLEEPENTRY_WFI (0x01U) /*!< Wait For Interruption instruction to enter Sleep mode */ 119 #define PWR_SLEEPENTRY_WFE (0x02U) /*!< Wait For Event instruction to enter Sleep mode */ 120 /** 121 * @} 122 */ 123 124 /** @defgroup PWR_Stop_Mode_Entry PWR Stop Mode Entry 125 * @{ 126 */ 127 #define PWR_STOPENTRY_WFI (0x01U) /*!< Wait For Interruption instruction to enter Stop mode */ 128 #define PWR_STOPENTRY_WFE (0x02U) /*!< Wait For Event instruction to enter Stop mode */ 129 /** 130 * @} 131 */ 132 133 /** @defgroup PWR_Flags PWR Flags 134 * @{ 135 */ 136 #define PWR_FLAG_VOSRDY (0x01U) /*!< Voltage scaling ready flag */ 137 #define PWR_FLAG_STOPF (0x02U) /*!< Stop flag */ 138 #define PWR_FLAG_SBF (0x03U) /*!< Standby flag */ 139 #define PWR_FLAG_ACTVOSRDY (0x04U) /*!< Currently applied VOS ready flag */ 140 #define PWR_FLAG_PVDO (0x05U) /*!< VDD voltage detector output flag */ 141 #if defined(PWR_SVMSR_REGS) 142 #define PWR_FLAG_REGS (0x06U) /*!< Regulator selection flag */ 143 #endif /* defined(PWR_SVMSR_REGS) */ 144 #define PWR_FLAG_REGPARDYVDDRFPA (0x07U) /*!< Ready bit for VDDHPA voltage level when selecting VDDRFPA input */ 145 #if defined(PWR_RADIOSCR_REGPARDYV11) 146 #define PWR_FLAG_REGPARDYV11 (0x08U) /*!< Ready bit for VDDHPA voltage level when selecting VDD11 input */ 147 #endif /* defined(PWR_RADIOSCR_REGPARDYV11) */ 148 /** 149 * @} 150 */ 151 152 /** @defgroup PWR_WakeUp_Lines_Flags PWR Wakeup Lines Flags 153 * @{ 154 */ 155 #define PWR_WAKEUP_FLAG1 (0x10U) /*!< Wakeup flag 1 */ 156 #if defined(PWR_WUCR1_WUPEN2) 157 #define PWR_WAKEUP_FLAG2 (0x20U) /*!< Wakeup flag 2 */ 158 #endif /* defined(PWR_WUCR1_WUPEN2) */ 159 #define PWR_WAKEUP_FLAG3 (0x30U) /*!< Wakeup flag 3 */ 160 #define PWR_WAKEUP_FLAG4 (0x40U) /*!< Wakeup flag 4 */ 161 #if defined(PWR_WUCR1_WUPEN5) 162 #define PWR_WAKEUP_FLAG5 (0x50U) /*!< Wakeup flag 5 */ 163 #endif /* defined(PWR_WUCR1_WUPEN5) */ 164 #define PWR_WAKEUP_FLAG6 (0x60U) /*!< Wakeup flag 6 */ 165 #define PWR_WAKEUP_FLAG7 (0x70U) /*!< Wakeup flag 7 */ 166 #define PWR_WAKEUP_FLAG8 (0x80U) /*!< Wakeup flag 8 */ 167 #define PWR_WAKEUP_ALL_FLAG (0x90U) /*!< Wakeup flag all */ 168 /** 169 * @} 170 */ 171 172 /** @defgroup PWR_WakeUp_Pin_High_Polarity PWR Wake Up Pins High Polarity 173 * @{ 174 */ 175 #define PWR_WAKEUP_PIN1_HIGH_0 (PWR_WUCR1_WUPEN1 | PWR_WAKEUP1_SOURCE_SELECTION_0) /*!< PA0 : Wakeup pin 1 (high polarity) */ 176 #if defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) 177 #define PWR_WAKEUP_PIN1_HIGH_1 (PWR_WUCR1_WUPEN1 | PWR_WAKEUP1_SOURCE_SELECTION_1) /*!< PB2 : Wakeup pin 1 (high polarity) */ 178 #endif /* defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) */ 179 180 #if defined(PWR_WUCR1_WUPEN2) 181 #define PWR_WAKEUP_PIN2_HIGH_0 (PWR_WUCR1_WUPEN2 | PWR_WAKEUP2_SOURCE_SELECTION_0) /*!< PA4 : Wakeup pin 2 (high polarity) */ 182 #define PWR_WAKEUP_PIN2_HIGH_1 (PWR_WUCR1_WUPEN2 | PWR_WAKEUP2_SOURCE_SELECTION_1) /*!< PC13 : Wakeup pin 2 (high polarity) */ 183 #endif /* defined(PWR_WUCR1_WUPEN2) */ 184 185 #define PWR_WAKEUP_PIN3_HIGH_1 (PWR_WUCR1_WUPEN3 | PWR_WAKEUP3_SOURCE_SELECTION_1) /*!< PA1 : Wakeup pin 3 (high polarity) */ 186 #if defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) 187 #define PWR_WAKEUP_PIN3_HIGH_2 (PWR_WUCR1_WUPEN3 | PWR_WAKEUP3_SOURCE_SELECTION_2) /*!< PB6 : Wakeup pin 3 (high polarity) */ 188 #endif /* defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) */ 189 190 #define PWR_WAKEUP_PIN4_HIGH_0 (PWR_WUCR1_WUPEN4 | PWR_WAKEUP4_SOURCE_SELECTION_0) /*!< PA2 : Wakeup pin 4 (high polarity) */ 191 #if defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) 192 #define PWR_WAKEUP_PIN4_HIGH_1 (PWR_WUCR1_WUPEN4 | PWR_WAKEUP4_SOURCE_SELECTION_1) /*!< PB1 : Wakeup pin 4 (high polarity) */ 193 #endif /* defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) */ 194 195 #if defined(PWR_WUCR1_WUPEN5) 196 #define PWR_WAKEUP_PIN5_HIGH_1 (PWR_WUCR1_WUPEN5 | PWR_WAKEUP5_SOURCE_SELECTION_1) /*!< PA3 : Wakeup pin 5 (high polarity) */ 197 #define PWR_WAKEUP_PIN5_HIGH_2 (PWR_WUCR1_WUPEN5 | PWR_WAKEUP5_SOURCE_SELECTION_2) /*!< PB7 : Wakeup pin 5 (high polarity) */ 198 #endif /* defined(PWR_WUCR1_WUPEN5) */ 199 200 #define PWR_WAKEUP_PIN6_HIGH_0 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_SOURCE_SELECTION_0) /*!< PA12 : Wakeup pin 6 (high polarity) */ 201 #define PWR_WAKEUP_PIN6_HIGH_1 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_SOURCE_SELECTION_1) /*!< PA5 : Wakeup pin 6 (high polarity) */ 202 #define PWR_WAKEUP_PIN6_HIGH_3 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_SOURCE_SELECTION_3) /*!< RTC : Wakeup pin 6 (high polarity) */ 203 204 #if defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) 205 #define PWR_WAKEUP_PIN7_HIGH_0 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_SOURCE_SELECTION_0) /*!< PB14 : Wakeup pin 7 (high polarity) */ 206 #endif /* defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) */ 207 #define PWR_WAKEUP_PIN7_HIGH_1 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_SOURCE_SELECTION_1) /*!< PA6 : Wakeup pin 7 (high polarity) */ 208 #define PWR_WAKEUP_PIN7_HIGH_3 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_SOURCE_SELECTION_3) /*!< RTC : Wakeup pin 7 (high polarity) */ 209 210 #define PWR_WAKEUP_PIN8_HIGH_1 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_SOURCE_SELECTION_1) /*!< PA7 : Wakeup pin 8 (high polarity) */ 211 #define PWR_WAKEUP_PIN8_HIGH_2 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_SOURCE_SELECTION_2) /*!< PB9 : Wakeup pin 8 (high polarity) */ 212 #define PWR_WAKEUP_PIN8_HIGH_3 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_SOURCE_SELECTION_3) /*!< TAMP : Wakeup pin 8 (high polarity) */ 213 /** 214 * @} 215 */ 216 217 /** @defgroup PWR_WakeUp_Pin_Low_Polarity PWR Wake Up Pins Low Polarity 218 * @{ 219 */ 220 #define PWR_WAKEUP_PIN1_LOW_0 (PWR_WUCR1_WUPEN1 | PWR_WAKEUP1_POLARITY_LOW | PWR_WAKEUP1_SOURCE_SELECTION_0) /*!< PA0 : Wakeup pin 1 (low polarity) */ 221 #if defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) 222 #define PWR_WAKEUP_PIN1_LOW_1 (PWR_WUCR1_WUPEN1 | PWR_WAKEUP1_POLARITY_LOW | PWR_WAKEUP1_SOURCE_SELECTION_1) /*!< PB2 : Wakeup pin 1 (low polarity) */ 223 #endif /* defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) */ 224 225 #if defined(PWR_WUCR1_WUPEN2) 226 #define PWR_WAKEUP_PIN2_LOW_0 (PWR_WUCR1_WUPEN2 | PWR_WAKEUP2_POLARITY_LOW | PWR_WAKEUP2_SOURCE_SELECTION_0) /*!< PA4 : Wakeup pin 2 (low polarity) */ 227 #define PWR_WAKEUP_PIN2_LOW_1 (PWR_WUCR1_WUPEN2 | PWR_WAKEUP2_POLARITY_LOW | PWR_WAKEUP2_SOURCE_SELECTION_1) /*!< PC13 : Wakeup pin 2 (low polarity) */ 228 #endif /* defined(PWR_WUCR1_WUPEN2) */ 229 230 #define PWR_WAKEUP_PIN3_LOW_1 (PWR_WUCR1_WUPEN3 | PWR_WAKEUP3_POLARITY_LOW | PWR_WAKEUP3_SOURCE_SELECTION_1) /*!< PA1 : Wakeup pin 3 (low polarity) */ 231 #if defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) 232 #define PWR_WAKEUP_PIN3_LOW_2 (PWR_WUCR1_WUPEN3 | PWR_WAKEUP3_POLARITY_LOW | PWR_WAKEUP3_SOURCE_SELECTION_2) /*!< PB6 : Wakeup pin 3 (low polarity) */ 233 #endif /* defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) */ 234 235 #define PWR_WAKEUP_PIN4_LOW_0 (PWR_WUCR1_WUPEN4 | PWR_WAKEUP4_POLARITY_LOW | PWR_WAKEUP4_SOURCE_SELECTION_0) /*!< PA2 : Wakeup pin 4 (low polarity) */ 236 #if defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) 237 #define PWR_WAKEUP_PIN4_LOW_1 (PWR_WUCR1_WUPEN4 | PWR_WAKEUP4_POLARITY_LOW | PWR_WAKEUP4_SOURCE_SELECTION_1) /*!< PB1 : Wakeup pin 4 (low polarity) */ 238 #endif /* defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) */ 239 240 #if defined(PWR_WUCR1_WUPEN5) 241 #define PWR_WAKEUP_PIN5_LOW_1 (PWR_WUCR1_WUPEN5 | PWR_WAKEUP5_POLARITY_LOW | PWR_WAKEUP5_SOURCE_SELECTION_1) /*!< PA3 : Wakeup pin 5 (low polarity) */ 242 #define PWR_WAKEUP_PIN5_LOW_2 (PWR_WUCR1_WUPEN5 | PWR_WAKEUP5_POLARITY_LOW | PWR_WAKEUP5_SOURCE_SELECTION_2) /*!< PB7 : Wakeup pin 5 (low polarity) */ 243 #endif /* defined(PWR_WUCR1_WUPEN5) */ 244 245 #define PWR_WAKEUP_PIN6_LOW_0 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_POLARITY_LOW | PWR_WAKEUP6_SOURCE_SELECTION_0) /*!< PA12 : Wakeup pin 6 (low polarity) */ 246 #define PWR_WAKEUP_PIN6_LOW_1 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_POLARITY_LOW | PWR_WAKEUP6_SOURCE_SELECTION_1) /*!< PA5 : Wakeup pin 6 (low polarity) */ 247 #define PWR_WAKEUP_PIN6_LOW_3 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_POLARITY_LOW | PWR_WAKEUP6_SOURCE_SELECTION_3) /*!< RTC : Wakeup pin 6 (low polarity) */ 248 249 #if defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) 250 #define PWR_WAKEUP_PIN7_LOW_0 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_POLARITY_LOW | PWR_WAKEUP7_SOURCE_SELECTION_0) /*!< PB14 : Wakeup pin 7 (low polarity) */ 251 #endif /* defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) */ 252 #define PWR_WAKEUP_PIN7_LOW_1 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_POLARITY_LOW | PWR_WAKEUP7_SOURCE_SELECTION_1) /*!< PA6 : Wakeup pin 7 (low polarity) */ 253 #define PWR_WAKEUP_PIN7_LOW_3 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_POLARITY_LOW | PWR_WAKEUP7_SOURCE_SELECTION_3) /*!< RTC : Wakeup pin 7 (low polarity) */ 254 255 #define PWR_WAKEUP_PIN8_LOW_1 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_POLARITY_LOW | PWR_WAKEUP8_SOURCE_SELECTION_1) /*!< PA7 : Wakeup pin 8 (low polarity) */ 256 #define PWR_WAKEUP_PIN8_LOW_2 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_POLARITY_LOW | PWR_WAKEUP8_SOURCE_SELECTION_2) /*!< PB9 : Wakeup pin 8 (low polarity) */ 257 #define PWR_WAKEUP_PIN8_LOW_3 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_POLARITY_LOW | PWR_WAKEUP8_SOURCE_SELECTION_3) /*!< TAMP : Wakeup pin 8 (low polarity) */ 258 /** 259 * @} 260 */ 261 262 /** @defgroup PWR_WakeUp_Pins PWR Wake Up Pins (Default polarity and default pin selection) 263 * @{ 264 */ 265 #define PWR_WAKEUP_PIN1 (PWR_WUCR1_WUPEN1) /*!< PA0 : Wakeup pin 1 (high polarity) */ 266 #if defined(PWR_WUCR1_WUPEN2) 267 #define PWR_WAKEUP_PIN2 (PWR_WUCR1_WUPEN2) /*!< PA4 : Wakeup pin 2 (high polarity) */ 268 #endif /* defined(PWR_WUCR1_WUPEN2) */ 269 #define PWR_WAKEUP_PIN3 (PWR_WUCR1_WUPEN3) /*!< reserved */ 270 #define PWR_WAKEUP_PIN4 (PWR_WUCR1_WUPEN4) /*!< PA2 : Wakeup pin 4 (high polarity) */ 271 #if defined(PWR_WUCR1_WUPEN5) 272 #define PWR_WAKEUP_PIN5 (PWR_WUCR1_WUPEN5) /*!< reserved */ 273 #endif /* defined(PWR_WUCR1_WUPEN5) */ 274 #define PWR_WAKEUP_PIN6 (PWR_WUCR1_WUPEN6) /*!< PA12 : Wakeup pin 6 (high polarity) */ 275 #define PWR_WAKEUP_PIN7 (PWR_WUCR1_WUPEN7) /*!< PB14 : Wakeup pin 7 (high polarity) */ 276 #define PWR_WAKEUP_PIN8 (PWR_WUCR1_WUPEN8) /*!< reserved */ 277 /** 278 * @} 279 */ 280 281 /** @defgroup PWR_Items PWR Items 282 * @{ 283 */ 284 #define PWR_WKUP1 (PWR_SECCFGR_WUP1SEC) /*!< WUP1 secure protection */ 285 #if defined(PWR_WUCR1_WUPEN2) 286 #define PWR_WKUP2 (PWR_SECCFGR_WUP2SEC) /*!< WUP2 secure protection */ 287 #endif /* defined(PWR_WUCR1_WUPEN2) */ 288 #define PWR_WKUP3 (PWR_SECCFGR_WUP3SEC) /*!< WUP3 secure protection */ 289 #define PWR_WKUP4 (PWR_SECCFGR_WUP4SEC) /*!< WUP4 secure protection */ 290 #if defined(PWR_WUCR1_WUPEN5) 291 #define PWR_WKUP5 (PWR_SECCFGR_WUP5SEC) /*!< WUP5 secure protection */ 292 #endif /* defined(PWR_WUCR1_WUPEN5) */ 293 #define PWR_WKUP6 (PWR_SECCFGR_WUP6SEC) /*!< WUP6 secure protection */ 294 #define PWR_WKUP7 (PWR_SECCFGR_WUP7SEC) /*!< WUP7 secure protection */ 295 #define PWR_WKUP8 (PWR_SECCFGR_WUP8SEC) /*!< WUP8 secure protection */ 296 #define PWR_LPM (PWR_SECCFGR_LPMSEC) /*!< Low power modes secure protection */ 297 #define PWR_VDM (PWR_SECCFGR_VDMSEC) /*!< Voltage detection and monitoring secure protection */ 298 #define PWR_VB (PWR_SECCFGR_VBSEC) /*!< Backup domain secure protection */ 299 #if defined(PWR_WUCR1_WUPEN2) && defined(PWR_WUCR1_WUPEN5) 300 #define PWR_ALL (PWR_WKUP1 | PWR_WKUP2 | PWR_WKUP3 | PWR_WKUP4 | \ 301 PWR_WKUP5 | PWR_WKUP7 | PWR_WKUP6 | PWR_WKUP8 | \ 302 PWR_LPM | PWR_VDM | PWR_VB) 303 #else 304 #define PWR_ALL (PWR_WKUP1 | PWR_WKUP3 | PWR_WKUP4 | \ 305 PWR_WKUP7 | PWR_WKUP6 | PWR_WKUP8 | \ 306 PWR_LPM | PWR_VDM | PWR_VB) 307 #endif /* defined(PWR_WUCR1_WUPEN2) && defined(PWR_WUCR1_WUPEN5) */ 308 /** 309 * @} 310 */ 311 312 #if defined(PWR_PRIVCFGR_SPRIV) 313 /** @defgroup PWR_Attributes PWR Attributes 314 * @brief PWR Privilege/NPrivilege and Secure/NSecure Attributes 315 * @{ 316 */ 317 #define PWR_NSEC_PRIV (PWR_ITEM_ATTR_NSEC_PRIV_MASK | 0x01U) /*!< NSecure and Privileged attribute */ 318 #define PWR_NSEC_NPRIV (PWR_ITEM_ATTR_NSEC_PRIV_MASK) /*!< NSecure and NPrivileged attribute */ 319 #define PWR_SEC_PRIV (PWR_ITEM_ATTR_SEC_PRIV_MASK | 0x02U) /*!< Secure and Privileged attribute */ 320 #define PWR_SEC_NPRIV (PWR_ITEM_ATTR_SEC_PRIV_MASK) /*!< Secure and NPrivileged attribute */ 321 /** 322 * @} 323 */ 324 #endif /* defined(PWR_PRIVCFGR_SPRIV) */ 325 326 /** 327 * @} 328 */ 329 330 /* Exported macros -----------------------------------------------------------*/ 331 332 /** @defgroup PWR_Exported_Macros PWR Exported Macros 333 * @{ 334 */ 335 336 /** @brief Check PWR flags are set or not. 337 * @param __FLAG__ : Specifies the flag to check. 338 * This parameter can be one of the following values when available : 339 * @arg @ref PWR_FLAG_VOSRDY : Voltage scaling ready flag. 340 * Indicates that the Vcore level at or above VOS selected level. 341 * @arg @ref PWR_FLAG_STOPF : Stop flag. 342 * Indicates that the device was resumed from Stop mode. 343 * @arg @ref PWR_FLAG_SBF : Standby flag. 344 * Indicates that the device was resumed from Standby mode. 345 * @arg @ref PWR_FLAG_ACTVOSRDY : Currently applied VOS ready flag. 346 * Indicates that Vcore is equal to the current 347 * voltage scaling provided by ACTVOS. 348 * @arg @ref PWR_FLAG_PVDO VDD : Voltage detector output flag. 349 * Indicates that Vdd is equal or above 350 * the PVD threshold selected by PVDLS. 351 * @arg @ref PWR_FLAG_REGS : Regulator selection flag. 352 * Indicates the regulator selected.(*) 353 * @arg @ref PWR_FLAG_REGPARDYVDDRFPA : Ready bit for VDDHPA voltage level when selecting VDDRFPA 354 * input. 355 * Indicates VDDHPA voltage level is ready. 356 * @arg @ref PWR_FLAG_REGPARDYV11 : Ready bit for VDDHPA voltage level when selecting VDD11 357 * input. 358 * Indicates VDDHPA voltage level is ready.(*) 359 * @arg @ref PWR_WAKEUP_FLAG1 : Wakeup flag 1. 360 * Indicates that a wakeup event was received from the WKUP line 1. 361 * @arg @ref PWR_WAKEUP_FLAG2 : Wakeup flag 2. 362 * Indicates that a wakeup event was received from the WKUP line 2. 363 * @arg @ref PWR_WAKEUP_FLAG3 : Wakeup flag 3. 364 * Indicates that a wakeup event was received from the WKUP line 3. 365 * @arg @ref PWR_WAKEUP_FLAG4 : Wakeup flag 4. 366 * Indicates that a wakeup event was received from the WKUP line 4. 367 * @arg @ref PWR_WAKEUP_FLAG5 : Wakeup flag 5. 368 * Indicates that a wakeup event was received from the WKUP line 5. 369 * @arg @ref PWR_WAKEUP_FLAG6 : Wakeup flag 6. 370 * Indicates that a wakeup event was received from the WKUP line 6. 371 * @arg @ref PWR_WAKEUP_FLAG7 : Wakeup flag 7. 372 * Indicates that a wakeup event was received from the WKUP line 7. 373 * @arg @ref PWR_WAKEUP_FLAG8 : Wakeup flag 8. 374 * Indicates that a wakeup event was received from the WKUP line 8. 375 * (*) Feature not available on all devices of the family 376 * @retval The state of __FLAG__ (TRUE or FALSE). 377 */ 378 #if defined(PWR_FLAG_REGPARDYV11) 379 #if defined(PWR_FLAG_REGS) 380 #define __HAL_PWR_GET_FLAG(__FLAG__)( \ 381 ((__FLAG__) == PWR_FLAG_VOSRDY) ? (READ_BIT(PWR->VOSR, PWR_VOSR_VOSRDY)== \ 382 PWR_VOSR_VOSRDY) : \ 383 ((__FLAG__) == PWR_FLAG_STOPF) ? (READ_BIT(PWR->SR, PWR_SR_STOPF)== \ 384 PWR_SR_STOPF) : \ 385 ((__FLAG__) == PWR_FLAG_SBF) ? (READ_BIT(PWR->SR, PWR_SR_SBF)== \ 386 PWR_SR_SBF) : \ 387 ((__FLAG__) == PWR_FLAG_ACTVOSRDY) ?(READ_BIT(PWR->SVMSR, PWR_SVMSR_ACTVOSRDY)== \ 388 PWR_SVMSR_ACTVOSRDY): \ 389 ((__FLAG__) == PWR_FLAG_PVDO) ?(READ_BIT(PWR->SVMSR, PWR_SVMSR_PVDO)== \ 390 PWR_SVMSR_PVDO) : \ 391 ((__FLAG__) == PWR_FLAG_REGS) ?(READ_BIT(PWR->SVMSR, PWR_SVMSR_REGS)== \ 392 PWR_SVMSR_REGS) : \ 393 ((__FLAG__) == PWR_FLAG_REGPARDYVDDRFPA) ?(READ_BIT(PWR->RADIOSCR, PWR_RADIOSCR_REGPARDYVDDRFPA)== \ 394 PWR_RADIOSCR_REGPARDYVDDRFPA) : \ 395 ((__FLAG__) == PWR_FLAG_REGPARDYV11) ?(READ_BIT(PWR->RADIOSCR, PWR_RADIOSCR_REGPARDYV11)== \ 396 PWR_RADIOSCR_REGPARDYV11) : \ 397 ((__FLAG__) == PWR_WAKEUP_FLAG1) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF1) == \ 398 PWR_WUSR_WUF1) : \ 399 ((__FLAG__) == PWR_WAKEUP_FLAG2) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF2) == \ 400 PWR_WUSR_WUF2) : \ 401 ((__FLAG__) == PWR_WAKEUP_FLAG3) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF3) == \ 402 PWR_WUSR_WUF3) : \ 403 ((__FLAG__) == PWR_WAKEUP_FLAG4) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF4) == \ 404 PWR_WUSR_WUF4) : \ 405 ((__FLAG__) == PWR_WAKEUP_FLAG5) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF5) == \ 406 PWR_WUSR_WUF5) : \ 407 ((__FLAG__) == PWR_WAKEUP_FLAG6) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF6) == \ 408 PWR_WUSR_WUF6) : \ 409 ((__FLAG__) == PWR_WAKEUP_FLAG7) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF7) == \ 410 PWR_WUSR_WUF7) : \ 411 (READ_BIT(PWR->WUSR, PWR_WUSR_WUF8) == PWR_WUSR_WUF8)) 412 #else 413 #define __HAL_PWR_GET_FLAG(__FLAG__)( \ 414 ((__FLAG__) == PWR_FLAG_VOSRDY) ? (READ_BIT(PWR->VOSR, PWR_VOSR_VOSRDY)== \ 415 PWR_VOSR_VOSRDY) : \ 416 ((__FLAG__) == PWR_FLAG_STOPF) ? (READ_BIT(PWR->SR, PWR_SR_STOPF)== \ 417 PWR_SR_STOPF) : \ 418 ((__FLAG__) == PWR_FLAG_SBF) ? (READ_BIT(PWR->SR, PWR_SR_SBF)== \ 419 PWR_SR_SBF) : \ 420 ((__FLAG__) == PWR_FLAG_ACTVOSRDY) ?(READ_BIT(PWR->SVMSR, PWR_SVMSR_ACTVOSRDY)== \ 421 PWR_SVMSR_ACTVOSRDY): \ 422 ((__FLAG__) == PWR_FLAG_PVDO) ?(READ_BIT(PWR->SVMSR, PWR_SVMSR_PVDO)== \ 423 PWR_SVMSR_PVDO) : \ 424 ((__FLAG__) == PWR_FLAG_REGPARDYVDDRFPA) ?(READ_BIT(PWR->RADIOSCR, PWR_RADIOSCR_REGPARDYVDDRFPA)== \ 425 PWR_RADIOSCR_REGPARDYVDDRFPA) : \ 426 ((__FLAG__) == PWR_FLAG_REGPARDYV11) ?(READ_BIT(PWR->RADIOSCR, PWR_RADIOSCR_REGPARDYV11)== \ 427 PWR_RADIOSCR_REGPARDYV11) : \ 428 ((__FLAG__) == PWR_WAKEUP_FLAG1) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF1) == \ 429 PWR_WUSR_WUF1) : \ 430 ((__FLAG__) == PWR_WAKEUP_FLAG2) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF2) == \ 431 PWR_WUSR_WUF2) : \ 432 ((__FLAG__) == PWR_WAKEUP_FLAG3) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF3) == \ 433 PWR_WUSR_WUF3) : \ 434 ((__FLAG__) == PWR_WAKEUP_FLAG4) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF4) == \ 435 PWR_WUSR_WUF4) : \ 436 ((__FLAG__) == PWR_WAKEUP_FLAG5) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF5) == \ 437 PWR_WUSR_WUF5) : \ 438 ((__FLAG__) == PWR_WAKEUP_FLAG6) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF6) == \ 439 PWR_WUSR_WUF6) : \ 440 ((__FLAG__) == PWR_WAKEUP_FLAG7) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF7) == \ 441 PWR_WUSR_WUF7) : \ 442 (READ_BIT(PWR->WUSR, PWR_WUSR_WUF8) == PWR_WUSR_WUF8)) 443 #endif /* defined(PWR_FLAG_REGS) */ 444 #else 445 #define __HAL_PWR_GET_FLAG(__FLAG__)( \ 446 ((__FLAG__) == PWR_FLAG_VOSRDY) ? (READ_BIT(PWR->VOSR, PWR_VOSR_VOSRDY)== \ 447 PWR_VOSR_VOSRDY) : \ 448 ((__FLAG__) == PWR_FLAG_STOPF) ? (READ_BIT(PWR->SR, PWR_SR_STOPF)== \ 449 PWR_SR_STOPF) : \ 450 ((__FLAG__) == PWR_FLAG_SBF) ? (READ_BIT(PWR->SR, PWR_SR_SBF)== \ 451 PWR_SR_SBF) : \ 452 ((__FLAG__) == PWR_FLAG_ACTVOSRDY) ?(READ_BIT(PWR->SVMSR, PWR_SVMSR_ACTVOSRDY)== \ 453 PWR_SVMSR_ACTVOSRDY): \ 454 ((__FLAG__) == PWR_FLAG_PVDO) ?(READ_BIT(PWR->SVMSR, PWR_SVMSR_PVDO)== \ 455 PWR_SVMSR_PVDO) : \ 456 ((__FLAG__) == PWR_FLAG_REGPARDYVDDRFPA) ?(READ_BIT(PWR->RADIOSCR, PWR_RADIOSCR_REGPARDYVDDRFPA)== \ 457 PWR_RADIOSCR_REGPARDYVDDRFPA) : \ 458 ((__FLAG__) == PWR_WAKEUP_FLAG1) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF1) == \ 459 PWR_WUSR_WUF1) : \ 460 ((__FLAG__) == PWR_WAKEUP_FLAG3) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF3) == \ 461 PWR_WUSR_WUF3) : \ 462 ((__FLAG__) == PWR_WAKEUP_FLAG4) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF4) == \ 463 PWR_WUSR_WUF4) : \ 464 ((__FLAG__) == PWR_WAKEUP_FLAG6) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF6) == \ 465 PWR_WUSR_WUF6) : \ 466 ((__FLAG__) == PWR_WAKEUP_FLAG7) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF7) == \ 467 PWR_WUSR_WUF7) : \ 468 (READ_BIT(PWR->WUSR, PWR_WUSR_WUF8) == PWR_WUSR_WUF8)) 469 #endif /* defined(PWR_FLAG_REGPARDYV11) */ 470 471 /** @brief Clear PWR flags. 472 * @param __FLAG__ : Specifies the flag to clear. 473 * This parameter can be one of the following values when available: 474 * @arg @ref PWR_FLAG_STOPF : Stop flag. 475 * Indicates that the device was resumed from Stop mode. 476 * @arg @ref PWR_FLAG_SBF : Standby flag. 477 * Indicates that the device was resumed from Standby mode. 478 * @arg @ref PWR_WAKEUP_FLAG1 : Wakeup flag 1. 479 * Indicates that a wakeup event was received from the WKUP line 1. 480 * @arg @ref PWR_WAKEUP_FLAG2 : Wakeup flag 2. 481 * Indicates that a wakeup event was received from the WKUP line 2. 482 * @arg @ref PWR_WAKEUP_FLAG3 : Wakeup flag 3. 483 * Indicates that a wakeup event was received from the WKUP line 3. 484 * @arg @ref PWR_WAKEUP_FLAG4 : Wakeup flag 4. 485 * Indicates that a wakeup event was received from the WKUP line 4. 486 * @arg @ref PWR_WAKEUP_FLAG5 : Wakeup flag 5. 487 * Indicates that a wakeup event was received from the WKUP line 5. 488 * @arg @ref PWR_WAKEUP_FLAG6 : Wakeup flag 6. 489 * Indicates that a wakeup event was received from the WKUP line 6. 490 * @arg @ref PWR_WAKEUP_FLAG7 : Wakeup flag 7. 491 * Indicates that a wakeup event was received from the WKUP line 7. 492 * @arg @ref PWR_WAKEUP_FLAG8 : Wakeup flag 8. 493 * Indicates that a wakeup event was received from the WKUP line 8. 494 * @arg @ref PWR_WAKEUP_ALL_FLAG : all Wakeup flags. 495 * @retval None. 496 */ 497 #if defined(PWR_WUCR1_WUPEN2) && defined(PWR_WUCR1_WUPEN5) 498 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) ( \ 499 ((__FLAG__) == PWR_FLAG_STOPF) ? (SET_BIT(PWR->SR, PWR_SR_CSSF)) : \ 500 ((__FLAG__) == PWR_FLAG_SBF) ? (SET_BIT(PWR->SR, PWR_SR_CSSF)) : \ 501 ((__FLAG__) == PWR_WAKEUP_FLAG1) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF1)) : \ 502 ((__FLAG__) == PWR_WAKEUP_FLAG2) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF2)) : \ 503 ((__FLAG__) == PWR_WAKEUP_FLAG3) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF3)) : \ 504 ((__FLAG__) == PWR_WAKEUP_FLAG4) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF4)) : \ 505 ((__FLAG__) == PWR_WAKEUP_FLAG5) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF5)) : \ 506 ((__FLAG__) == PWR_WAKEUP_FLAG6) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF6)) : \ 507 ((__FLAG__) == PWR_WAKEUP_FLAG7) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF7)) : \ 508 ((__FLAG__) == PWR_WAKEUP_FLAG8) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF8)) : \ 509 (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF))) 510 #else 511 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) ( \ 512 ((__FLAG__) == PWR_FLAG_STOPF) ? (SET_BIT(PWR->SR, PWR_SR_CSSF)) : \ 513 ((__FLAG__) == PWR_FLAG_SBF) ? (SET_BIT(PWR->SR, PWR_SR_CSSF)) : \ 514 ((__FLAG__) == PWR_WAKEUP_FLAG1) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF1)) : \ 515 ((__FLAG__) == PWR_WAKEUP_FLAG3) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF3)) : \ 516 ((__FLAG__) == PWR_WAKEUP_FLAG4) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF4)) : \ 517 ((__FLAG__) == PWR_WAKEUP_FLAG6) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF6)) : \ 518 ((__FLAG__) == PWR_WAKEUP_FLAG7) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF7)) : \ 519 ((__FLAG__) == PWR_WAKEUP_FLAG8) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF8)) : \ 520 (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF))) 521 #endif /* defined(PWR_WUCR1_WUPEN2) && defined(PWR_WUCR1_WUPEN5) */ 522 523 /** 524 * @brief Enable the PVD Extended Interrupt Line. 525 * @retval None. 526 */ 527 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) 528 529 /** 530 * @brief Disable the PVD Extended Interrupt Line. 531 * @retval None. 532 */ 533 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) 534 535 /** 536 * @brief Enable the PVD Event Line. 537 * @retval None. 538 */ 539 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EXTI_LINE_PVD) 540 541 /** 542 * @brief Disable the PVD Event Line. 543 * @retval None. 544 */ 545 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EXTI_LINE_PVD) 546 547 /** 548 * @brief Enable the PVD Extended Interrupt Rising Trigger. 549 * @retval None. 550 */ 551 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) 552 553 /** 554 * @brief Disable the PVD Extended Interrupt Rising Trigger. 555 * @retval None. 556 */ 557 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) 558 559 /** 560 * @brief Enable the PVD Extended Interrupt Falling Trigger. 561 * @retval None. 562 */ 563 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) 564 565 /** 566 * @brief Disable the PVD Extended Interrupt Falling Trigger. 567 * @retval None. 568 */ 569 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) 570 571 /** 572 * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger. 573 * @retval None. 574 */ 575 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ 576 do \ 577 { \ 578 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \ 579 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \ 580 } while(0) 581 582 /** 583 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 584 * @retval None. 585 */ 586 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ 587 do \ 588 { \ 589 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \ 590 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \ 591 } while(0) 592 593 /** 594 * @brief Generate a Software Interrupt on selected EXTI line. 595 * @retval None 596 */ 597 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_PVD) 598 599 /** 600 * @brief Check whether or not the PVD EXTI interrupt Rising flag is set. 601 * @retval EXTI PVD Line Status. 602 */ 603 #define __HAL_PWR_PVD_EXTI_GET_RISING_FLAG() (EXTI->RPR1 & PWR_EXTI_LINE_PVD) 604 605 /** 606 * @brief Check whether or not the PVD EXTI interrupt Falling flag is set. 607 * @retval EXTI PVD Line Status. 608 */ 609 #define __HAL_PWR_PVD_EXTI_GET_FALLING_FLAG() (EXTI->FPR1 & PWR_EXTI_LINE_PVD) 610 611 /** 612 * @brief Clear the PVD EXTI interrupt Rising flag. 613 * @retval None 614 */ 615 #define __HAL_PWR_PVD_EXTI_CLEAR_RISING_FLAG() WRITE_REG(EXTI->RPR1, PWR_EXTI_LINE_PVD) 616 617 /** 618 * @brief Clear the PVD EXTI interrupt Falling flag. 619 * @retval None 620 */ 621 #define __HAL_PWR_PVD_EXTI_CLEAR_FALLING_FLAG() WRITE_REG(EXTI->FPR1, PWR_EXTI_LINE_PVD) 622 /** 623 * @} 624 */ 625 626 /* Private constants ---------------------------------------------------------*/ 627 628 /** @addtogroup PWR_Private_Constants PWR Private Constants 629 * @{ 630 */ 631 /* Define PVD extended interrupts and event line */ 632 #define PWR_EXTI_LINE_PVD (0x00010000UL) /*!< PVD EXTI Line */ 633 634 /* Defines wake up lines shift */ 635 #define PWR_WUP_POLARITY_SHIFT (0x08U) /*!< Internal constant used to retrieve wakeup signal polariry */ 636 #define PWR_WUP_SELECT_SIGNAL_SHIFT (0x10U) /*!< Internal constant used to retrieve wakeup signal selection */ 637 638 /* Defines wake up lines mask */ 639 #define PWR_EWUP_MASK (0x000000FFUL) /*!< Internal constant used to retrieve wakeup signal enable */ 640 #define PWR_WUP_POLARITY_MASK (0x0000FF00UL) /*!< Internal constant used to retrieve wakeup signal polariry */ 641 #define PWR_WUP_SELECT_MASK (0xFFFF0000UL) /*!< Internal constant used to retrieve wakeup signal selection */ 642 643 /* Defines wake up lines selection */ 644 #define PWR_WAKEUP1_SOURCE_SELECTION_0 (0U) 645 #if defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) 646 #define PWR_WAKEUP1_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL1_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 647 #endif /* defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) */ 648 649 #if defined(PWR_WUCR1_WUPEN2) 650 #define PWR_WAKEUP2_SOURCE_SELECTION_0 (0U) /*!< Internal constant used to retrieve wakeup signal selection */ 651 #define PWR_WAKEUP2_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL2_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 652 #endif /* defined(PWR_WUCR1_WUPEN2) */ 653 654 #define PWR_WAKEUP3_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL3_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 655 #if defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) 656 #define PWR_WAKEUP3_SOURCE_SELECTION_2 (PWR_WUCR3_WUSEL3_1 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 657 #endif /* defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) */ 658 659 #define PWR_WAKEUP4_SOURCE_SELECTION_0 (0U) /*!< Internal constant used to retrieve wakeup signal selection */ 660 #if defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) 661 #define PWR_WAKEUP4_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL4_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 662 #endif /* defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) */ 663 664 #if defined(PWR_WUCR1_WUPEN5) 665 #define PWR_WAKEUP5_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL5_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 666 #define PWR_WAKEUP5_SOURCE_SELECTION_2 (PWR_WUCR3_WUSEL5_1 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 667 #endif /* defined(PWR_WUCR1_WUPEN5) */ 668 669 #define PWR_WAKEUP6_SOURCE_SELECTION_0 (0U) /*!< Internal constant used to retrieve wakeup signal selection */ 670 #define PWR_WAKEUP6_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL6_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 671 #define PWR_WAKEUP6_SOURCE_SELECTION_3 ((PWR_WUCR3_WUSEL6_0 | PWR_WUCR3_WUSEL6_1) << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 672 673 #if defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) 674 #define PWR_WAKEUP7_SOURCE_SELECTION_0 (0U) /*!< Internal constant used to retrieve wakeup signal selection */ 675 #endif /* defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) */ 676 #define PWR_WAKEUP7_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL7_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 677 #define PWR_WAKEUP7_SOURCE_SELECTION_3 ((PWR_WUCR3_WUSEL7_0 | PWR_WUCR3_WUSEL7_1) << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 678 679 #define PWR_WAKEUP8_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL8_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 680 #define PWR_WAKEUP8_SOURCE_SELECTION_2 (PWR_WUCR3_WUSEL8_1 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 681 #define PWR_WAKEUP8_SOURCE_SELECTION_3 ((PWR_WUCR3_WUSEL8_0 | PWR_WUCR3_WUSEL8_1) << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 682 683 /* Defines wake up lines low polarity */ 684 #define PWR_WAKEUP1_POLARITY_LOW (PWR_WUCR2_WUPP1 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 685 #if defined(PWR_WUCR1_WUPEN2) 686 #define PWR_WAKEUP2_POLARITY_LOW (PWR_WUCR2_WUPP2 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 687 #endif /* defined(PWR_WUCR1_WUPEN2) */ 688 #define PWR_WAKEUP3_POLARITY_LOW (PWR_WUCR2_WUPP3 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 689 #define PWR_WAKEUP4_POLARITY_LOW (PWR_WUCR2_WUPP4 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 690 #if defined(PWR_WUCR1_WUPEN5) 691 #define PWR_WAKEUP5_POLARITY_LOW (PWR_WUCR2_WUPP5 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 692 #endif /* defined(PWR_WUCR1_WUPEN5) */ 693 #define PWR_WAKEUP6_POLARITY_LOW (PWR_WUCR2_WUPP6 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 694 #define PWR_WAKEUP7_POLARITY_LOW (PWR_WUCR2_WUPP7 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 695 #define PWR_WAKEUP8_POLARITY_LOW (PWR_WUCR2_WUPP8 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 696 697 /* Defines attribute */ 698 #define PWR_ITEM_ATTR_NSEC_PRIV_MASK (0x10U) /*!< NSecure Privilege / NPrivilege attribute item mask */ 699 #define PWR_ITEM_ATTR_SEC_PRIV_MASK (0x20U) /*!< Secure Privilege / NPrivilege attribute item mask */ 700 /** 701 * @} 702 */ 703 704 /* Private macros ------------------------------------------------------------*/ 705 706 /** @addtogroup PWR_Private_Macros PWR Private Macros 707 * @{ 708 */ 709 710 /* Stop mode entry check macro */ 711 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 712 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 713 714 /* Wake up pins check macro */ 715 #if defined(PWR_WUCR1_WUPEN2) && defined(PWR_WUCR1_WUPEN5) 716 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1_HIGH_0) ||\ 717 ((PIN) == PWR_WAKEUP_PIN1_HIGH_1) ||\ 718 ((PIN) == PWR_WAKEUP_PIN2_HIGH_0) ||\ 719 ((PIN) == PWR_WAKEUP_PIN2_HIGH_1) ||\ 720 ((PIN) == PWR_WAKEUP_PIN3_HIGH_1) ||\ 721 ((PIN) == PWR_WAKEUP_PIN3_HIGH_2) ||\ 722 ((PIN) == PWR_WAKEUP_PIN4_HIGH_0) ||\ 723 ((PIN) == PWR_WAKEUP_PIN4_HIGH_1) ||\ 724 ((PIN) == PWR_WAKEUP_PIN5_HIGH_1) ||\ 725 ((PIN) == PWR_WAKEUP_PIN5_HIGH_2) ||\ 726 ((PIN) == PWR_WAKEUP_PIN6_HIGH_0) ||\ 727 ((PIN) == PWR_WAKEUP_PIN6_HIGH_1) ||\ 728 ((PIN) == PWR_WAKEUP_PIN6_HIGH_3) ||\ 729 ((PIN) == PWR_WAKEUP_PIN7_HIGH_0) ||\ 730 ((PIN) == PWR_WAKEUP_PIN7_HIGH_1) ||\ 731 ((PIN) == PWR_WAKEUP_PIN7_HIGH_3) ||\ 732 ((PIN) == PWR_WAKEUP_PIN8_HIGH_1) ||\ 733 ((PIN) == PWR_WAKEUP_PIN8_HIGH_2) ||\ 734 ((PIN) == PWR_WAKEUP_PIN8_HIGH_3) ||\ 735 ((PIN) == PWR_WAKEUP_PIN1_LOW_0) ||\ 736 ((PIN) == PWR_WAKEUP_PIN1_LOW_1) ||\ 737 ((PIN) == PWR_WAKEUP_PIN2_LOW_0) ||\ 738 ((PIN) == PWR_WAKEUP_PIN2_LOW_1) ||\ 739 ((PIN) == PWR_WAKEUP_PIN3_LOW_1) ||\ 740 ((PIN) == PWR_WAKEUP_PIN3_LOW_2) ||\ 741 ((PIN) == PWR_WAKEUP_PIN4_LOW_0) ||\ 742 ((PIN) == PWR_WAKEUP_PIN4_LOW_1) ||\ 743 ((PIN) == PWR_WAKEUP_PIN5_LOW_1) ||\ 744 ((PIN) == PWR_WAKEUP_PIN5_LOW_2) ||\ 745 ((PIN) == PWR_WAKEUP_PIN6_LOW_0) ||\ 746 ((PIN) == PWR_WAKEUP_PIN6_LOW_1) ||\ 747 ((PIN) == PWR_WAKEUP_PIN6_LOW_3) ||\ 748 ((PIN) == PWR_WAKEUP_PIN7_LOW_0) ||\ 749 ((PIN) == PWR_WAKEUP_PIN7_LOW_1) ||\ 750 ((PIN) == PWR_WAKEUP_PIN7_LOW_3) ||\ 751 ((PIN) == PWR_WAKEUP_PIN8_LOW_1) ||\ 752 ((PIN) == PWR_WAKEUP_PIN8_LOW_2) ||\ 753 ((PIN) == PWR_WAKEUP_PIN8_LOW_3) ||\ 754 ((PIN) == PWR_WAKEUP_PIN1) ||\ 755 ((PIN) == PWR_WAKEUP_PIN2) ||\ 756 ((PIN) == PWR_WAKEUP_PIN3) ||\ 757 ((PIN) == PWR_WAKEUP_PIN4) ||\ 758 ((PIN) == PWR_WAKEUP_PIN5) ||\ 759 ((PIN) == PWR_WAKEUP_PIN6) ||\ 760 ((PIN) == PWR_WAKEUP_PIN7) ||\ 761 ((PIN) == PWR_WAKEUP_PIN8)) 762 #else 763 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1_HIGH_0) ||\ 764 ((PIN) == PWR_WAKEUP_PIN3_HIGH_1) ||\ 765 ((PIN) == PWR_WAKEUP_PIN4_HIGH_0) ||\ 766 ((PIN) == PWR_WAKEUP_PIN6_HIGH_0) ||\ 767 ((PIN) == PWR_WAKEUP_PIN6_HIGH_1) ||\ 768 ((PIN) == PWR_WAKEUP_PIN6_HIGH_3) ||\ 769 ((PIN) == PWR_WAKEUP_PIN7_HIGH_1) ||\ 770 ((PIN) == PWR_WAKEUP_PIN7_HIGH_3) ||\ 771 ((PIN) == PWR_WAKEUP_PIN8_HIGH_1) ||\ 772 ((PIN) == PWR_WAKEUP_PIN8_HIGH_2) ||\ 773 ((PIN) == PWR_WAKEUP_PIN8_HIGH_3) ||\ 774 ((PIN) == PWR_WAKEUP_PIN1_LOW_0) ||\ 775 ((PIN) == PWR_WAKEUP_PIN3_LOW_1) ||\ 776 ((PIN) == PWR_WAKEUP_PIN4_LOW_0) ||\ 777 ((PIN) == PWR_WAKEUP_PIN6_LOW_0) ||\ 778 ((PIN) == PWR_WAKEUP_PIN6_LOW_1) ||\ 779 ((PIN) == PWR_WAKEUP_PIN6_LOW_3) ||\ 780 ((PIN) == PWR_WAKEUP_PIN7_LOW_1) ||\ 781 ((PIN) == PWR_WAKEUP_PIN7_LOW_3) ||\ 782 ((PIN) == PWR_WAKEUP_PIN8_LOW_1) ||\ 783 ((PIN) == PWR_WAKEUP_PIN8_LOW_2) ||\ 784 ((PIN) == PWR_WAKEUP_PIN8_LOW_3) ||\ 785 ((PIN) == PWR_WAKEUP_PIN1) ||\ 786 ((PIN) == PWR_WAKEUP_PIN3) ||\ 787 ((PIN) == PWR_WAKEUP_PIN4) ||\ 788 ((PIN) == PWR_WAKEUP_PIN6) ||\ 789 ((PIN) == PWR_WAKEUP_PIN7) ||\ 790 ((PIN) == PWR_WAKEUP_PIN8)) 791 #endif /* defined(PWR_WUCR1_WUPEN2) && defined(PWR_WUCR1_WUPEN5) */ 792 793 /* PVD level check macro */ 794 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1) || \ 795 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3) || \ 796 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5) || \ 797 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 798 799 /* PVD mode check macro */ 800 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) ||\ 801 ((MODE) == PWR_PVD_MODE_IT_RISING) ||\ 802 ((MODE) == PWR_PVD_MODE_IT_FALLING) ||\ 803 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) ||\ 804 ((MODE) == PWR_PVD_MODE_EVENT_RISING) ||\ 805 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) ||\ 806 ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING)) 807 808 /* Sleep mode entry check macro */ 809 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) 810 811 /* Stop mode entry check macro */ 812 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) 813 814 /* PWR items check macro */ 815 #define IS_PWR_ITEMS_ATTRIBUTES(ITEM) ((((ITEM) & (~PWR_ALL)) == 0U) && ((ITEM) != 0U)) 816 817 #if defined(PWR_PRIVCFGR_SPRIV) 818 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 819 /* PWR attribute check macro (Secure) */ 820 #define IS_PWR_ATTRIBUTES(ATTRIBUTES) ((((~(((ATTRIBUTES)& \ 821 0xF0U) >> 4U)) & ((ATTRIBUTES) & 0x0FU)) == 0U) && \ 822 (((ATTRIBUTES) & 0xFFFFFFCCU) == 0U)) 823 #else 824 /* PWR attribute check macro (NSecure) */ 825 #define IS_PWR_ATTRIBUTES(ATTRIBUTES) (((ATTRIBUTES) == PWR_NSEC_NPRIV) || ((ATTRIBUTES) == PWR_NSEC_PRIV)) 826 #endif /* __ARM_FEATURE_CMSE */ 827 #endif /* defined(PWR_PRIVCFGR_SPRIV) */ 828 829 /* PWR regulation VDDHPA input supply selection */ 830 #define IS_PWR_REGPASEL_SUPPLYSELECTION(SUPPLYSELECTION) (((SUPPLYSELECTION) == PWR_RADIO_REG_VDDRFPA) ||\ 831 ((SUPPLYSELECTION) == PWR_RADIO_REG_VDDHPA_VD11)) 832 /** 833 * @} 834 */ 835 836 /* Include PWR HAL Extended module */ 837 #include "stm32wbaxx_hal_pwr_ex.h" 838 839 /* Exported functions --------------------------------------------------------*/ 840 841 /** @addtogroup PWR_Exported_Functions PWR Exported Functions 842 * @{ 843 */ 844 845 /** @addtogroup PWR_Exported_Functions_Group1 846 * @{ 847 */ 848 /* Initialization and de-initialization functions *****************************/ 849 void HAL_PWR_DeInit(void); 850 void HAL_PWR_EnableBkUpAccess(void); 851 void HAL_PWR_DisableBkUpAccess(void); 852 /** 853 * @} 854 */ 855 856 /** @addtogroup PWR_Exported_Functions_Group2 857 * @{ 858 */ 859 /* Programmable voltage detector functions ************************************/ 860 HAL_StatusTypeDef HAL_PWR_ConfigPVD(const PWR_PVDTypeDef *sConfigPVD); 861 void HAL_PWR_EnablePVD(void); 862 void HAL_PWR_DisablePVD(void); 863 864 /* Wake up pins configuration functions ***************************************/ 865 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPin); 866 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPin); 867 uint32_t HAL_PWR_GetClearWakeupSource(void); 868 869 /* Low power modes configuration functions ************************************/ 870 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 871 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 872 void HAL_PWR_EnterSTANDBYMode(void); 873 874 /* Sleep on exit and sev on pending configuration functions *******************/ 875 void HAL_PWR_EnableSleepOnExit(void); 876 void HAL_PWR_DisableSleepOnExit(void); 877 void HAL_PWR_EnableSEVOnPend(void); 878 void HAL_PWR_DisableSEVOnPend(void); 879 880 /* Interrupt handler functions ************************************************/ 881 void HAL_PWR_PVD_IRQHandler(void); 882 void HAL_PWR_PVD_Rising_Callback(void); 883 void HAL_PWR_PVD_Falling_Callback(void); 884 void HAL_PWR_WKUP_IRQHandler(void); 885 void HAL_PWR_WKUP1_Callback(void); 886 #if defined (PWR_WUCR1_WUPEN2) 887 void HAL_PWR_WKUP2_Callback(void); 888 #endif /* defined (PWR_WUCR1_WUPEN2) */ 889 void HAL_PWR_WKUP3_Callback(void); 890 void HAL_PWR_WKUP4_Callback(void); 891 #if defined (PWR_WUCR1_WUPEN5) 892 void HAL_PWR_WKUP5_Callback(void); 893 #endif /* defined (PWR_WUCR1_WUPEN5) */ 894 void HAL_PWR_WKUP6_Callback(void); 895 void HAL_PWR_WKUP7_Callback(void); 896 void HAL_PWR_WKUP8_Callback(void); 897 /** 898 * @} 899 */ 900 901 /** @addtogroup PWR_Exported_Functions_Group3 902 * @{ 903 */ 904 /* Privileges and security configuration functions ****************************/ 905 void HAL_PWR_ConfigAttributes(uint32_t Item, uint32_t Attributes); 906 HAL_StatusTypeDef HAL_PWR_GetConfigAttributes(uint32_t Item, uint32_t *pAttributes); 907 /** 908 * @} 909 */ 910 911 /** 912 * @} 913 */ 914 915 /** 916 * @} 917 */ 918 919 /** 920 * @} 921 */ 922 923 /** 924 * @} 925 */ 926 927 #ifdef __cplusplus 928 } 929 #endif /* __cplusplus */ 930 931 #endif /* STM32WBAxx_HAL_PWR_H */ 932 933
